CN104217997B - 3d封装件及其形成方法 - Google Patents

3d封装件及其形成方法 Download PDF

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Publication number
CN104217997B
CN104217997B CN201310710945.8A CN201310710945A CN104217997B CN 104217997 B CN104217997 B CN 104217997B CN 201310710945 A CN201310710945 A CN 201310710945A CN 104217997 B CN104217997 B CN 104217997B
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substrate
supporting construction
tube core
top surface
unification
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CN104217997A (zh
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林士庭
叶宫辰
卢思维
林俊成
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明的实施例包括半导体器件和形成半导体器件的方法。一个实施例是形成半导体器件的方法，该方法包括：将管芯接合至第一衬底的顶面，管芯电连接至第一衬底；以及在第一衬底的顶面上形成支撑结构，支撑结构与管芯物理间隔开，支撑结构的顶面与管芯的顶面共面。该方法进一步包括对第一衬底实施锯切工艺，该锯切工艺锯切穿过支撑结构。本发明还公开了3D的封装件及其形成方法。

Description

3D封装件及其形成方法
相关申请的交叉引用
本申请要求于2013年5月30日提交的标题为“3D Package and Methods forForming the Same”的美国临时专利申请第61/829,158号的优先权，其全部内容结合于此作为参考。
技术领域
本发明总的来说涉及集成电路领域，更具体地，涉及3D封装件及其形成方法。
背景技术
自发明集成电路（IC）开始，由于各种电子元件（即，晶体管、二极管、电阻器、电容器等）的集成密度的持续改进，半导体工业经历了快速的发展。在很大程度上，这种集成密度的改善源自重复减少最小部件尺寸，这允许更多部件集成到给定区域。
事实上，这些集成改进基本上是二维（2D）的，其中集成部件所占据的空间基本上位于半导体晶圆的表面上。虽然光刻的显著进步已经引起2DIC构造中相当大的改进，但对于可以二维实现的密度存在物理限制。这些限制中的一个是制造这些部件所需的最小尺寸。另外，当更多器件放进一个芯片或管芯时，需要更复杂的设计。
发明内容
根据本发明的一个方面，提供了一种形成半导体器件的方法，包括：将管芯接合至第一衬底的顶面，管芯电连接至第一衬底；在第一衬底的顶面上形成支撑结构，支撑结构与管芯物理间隔开，支撑结构的顶面与管芯的顶面共面；以及对第一衬底实施锯切工艺，锯切工艺锯切穿过支撑结构。
优选地，形成支撑结构进一步包括：沿第一衬底的顶面上的锯线放置支撑结构。
优选地，形成支撑结构进一步包括：将棒形支撑结构放置在第一衬底的顶面上，棒形支撑结构横向邻近管芯的一侧。
优选地，形成支撑结构进一步包括：将环形支撑结构放置于衬底的顶面上，环形支撑结构环绕管芯。
优选地，该方法进一步包括：将第一衬底接合至第二衬底，第一衬底电连接至第二衬底；在管芯和支撑结构的顶面上形成热界面材料；以及将盖放置在第一衬底、管芯和支撑结构上方，盖的底面位于第二衬底的顶面上，盖的一部分与管芯和支撑结构的顶面上的热界面材料接触。
优选地，形成支撑结构进一步包括：在第一衬底的顶面上形成粘合层；以及将支撑结构放置于粘合层上，粘合层将支撑结构粘附至第一衬底。
优选地，支撑结构包括硅、铜、镍或者它们的组合。
根据本发明的另一方面，提供了一种形成半导体器件的方法，包括：将多个管芯接合至第一衬底的第一侧；沿第一衬底的第一侧上的多条锯线形成多个支撑结构，多条锯线邻近多个管芯，多个支撑结构中的每一个都与多个管芯中的每一个横向间隔开；以及通过沿多条锯线中的每一条实施锯切工艺来单一化多个管芯，锯切工艺锯切穿过第一衬底和多个支撑结构。
优选地，多个管芯中的每一个都具有邻近管芯的至少两侧的多个支撑结构中的一个。
优选地，多个管芯中的至少两个具有邻近至少两个管芯的四侧的每一侧的多个支撑结构中的一个。
优选地，多个管芯中的至少两个具有环绕至少两个管芯中的每一个的连续支撑结构。
优选地，形成多个支撑结构包括：沿锯线使用取放工具放置多个支撑结构。
优选地，形成多个支撑结构包括：在锯线的交叉点使用取放工具放置多个支撑结构。
优选地，该方法进一步包括：在第一衬底的第二侧形成连接件，第二侧与第一侧相对；将一个单一化的第一衬底接合至第二衬底，连接件将一个单一化的第一衬底电连接至第二衬底；在一个单一化的第一衬底的第一侧上的单一化的管芯以及每个支撑结构的顶面上形成热界面材料；以及将盖安装在第二衬底上，盖位于一个单一化的第一衬底的第一侧上的单一化的管芯以及每个支撑结构上方，盖至少接触一个单一化的第一衬底的第一侧上的每个支撑结构的顶面上的热界面材料。
优选地，多个支撑结构中的每一个的顶面都与多个管芯中的至少一个的顶面共面。
根据本发明的又一方面，提供了一种半导体器件，包括：第一衬底，位于第二衬底上方；第一组连接件，将第一衬底连接至第二衬底；管芯，位于第一衬底上方；第二组连接件，将管芯连接至第一衬底；第一支撑结构，粘附至第一衬底，第一支撑结构的顶面与管芯的顶面共面，第一支撑结构邻近管芯；热界面材料层，位于管芯以及第一支撑结构的顶面上；以及盖，安装至第二衬底，盖的一部分接触热界面材料层。
优选地，该半导体器件进一步包括：横向位于第一支撑结构和管芯之间的模制材料，模制材料的顶面与管芯的顶面及支撑结构的顶面共面。
优选地，第一支撑结构环绕管芯。
优选地，该半导体器件进一步包括：粘附至第一衬底的第二支撑结构，第二支撑结构与第一支撑结构物理间隔开，第二支撑结构的顶面与管芯的顶面共面。
优选地，第二支撑结构的纵轴在垂直于第一支撑结构的纵轴的方向上延伸。
附图说明
为了更全面地理解本发明及其优势，现将结合附图所进行的以下描述作为参考，其中：
图1至图5根据实施例示出了形成半导体器件的中间阶段；
图6根据实施例示出了在图1至图5中示出的工艺的工艺流程图。
图7至图11根据实施例示出了形成半导体器件的中间阶段。
具体实施方式
参考相应附图详细描述实施例。在可能情况下，附图和说明书中所使用的相同的符号表示相同的或者相似的部分。在附图中，为了清楚和方便，形状和厚度可以增大。根据本发明，本说明书将具体针对方法和装置的元件形成部分，或针对与方法或装置更直接合作的元件。应该理解，元件并未具体的示出或描述，其可以具有本领域普通技术人员所知的各种形式。通过本发明，一些可选例和修改例对本领域普通技术人员而言是显而易见的。
整个本说明书中引用“一个实施例”或“某个实施例”表示至少一个实施例包括关于所述实施例而描述的特定部件、结构或特征。因此在本说明书的各个位置出现的短语“在一个实施中”或“在某个实施例中”不一定指同一个实施例。而且，在一个或多个实施例中可以以任何合适的方式组合特定部件、结构或特征。应该理解，以下附图没有按比例绘制；而这些附图仅用于示出的目的。
实施例将在具体的环境中进行描述，即，形成具有导热支撑结构的半导体器件的方法。然而，对其它的封装结构配置而言，也可以应用其它的实施例。
图1至图5是根据实施例的半导体器件制造的中间阶段的截面图，图6是图1至图5中示出的工艺的工艺流程图。
图1示出了处于制造中间阶段的半导体器件100。半导体器件100可以包括载体102、粘合层104、连接件106、接合焊盘108、钝化层110、具有金属化层和通孔114的衬底112、接合焊盘116、位于底部填充物118中的连接件120和管芯130。管芯130可以通过连接件120接合到衬底112（步骤602）。衬底112可以由诸如硅、锗、金刚石等的半导体材料制成。可选地，也可以使用诸如硅锗、碳化硅、砷化镓、砷化铟、磷化铟、碳化硅锗、磷化镓砷、磷化镓铟和它们的组合等的化合物材料。此外，衬底112可以是绝缘体上硅（SOI）衬底。通常，SOI衬底包括诸如外延的硅、锗、硅锗、SOI、绝缘体上硅锗（SGOI）或者它们的组合的半导体材料层。
衬底112可以包括有源和无源器件（未在图1中示出）。本领域普通技术人员应当了解，诸如晶体管、电容器、电阻器以及它们的组合等的多种器件可以用来产生半导体器件100的设计的结构和功能的需要。器件可以使用任何合适的方法形成。
衬底112也可以包括金属化层114。金属化层可以形成于有源和无源器件的上方，并且设计成连接各种器件以形成功能电路。金属化层可以由交替的电介质层（例如，低k电介质材料）和导电材料层（例如，铜）形成，并且可以通过任何合适的工艺（诸如沉积、嵌入、双嵌入式等）形成，其中，导电材料层具有互连导电材料层的通孔。
接合焊盘116可以形成于衬底112的第一侧。在一些实施例中，通过在衬底112内形成凹槽（未示出）或者在衬底112上形成钝化层（未示出）来形成接合焊盘116。可以形成凹槽以允许接合焊盘116嵌入衬底112或者钝化层内。在其它实施例中，省略凹槽，焊盘可以形成于衬底112的第一侧上。这些接合焊盘116将随后接合的管芯130电连接至金属化层114和/或位于衬底112的第二侧上的连接件106。在一些实施例中，接合焊盘116包括诸如通过物理汽相沉积（PVD）、化学汽相沉积（CVD）、原子层沉积（ALD）等或它们的组合沉积在衬底112上的薄晶种层（未示出）。晶种层可以由铜、钛、镍、金等或它们的组合制成。接合焊盘116的导电材料可以沉积在薄晶种层上方。导电材料可以通过电化学镀工艺、CVD、ALD、PVD等或它们的组合形成。在实施例中，接合焊盘116的导电材料是铜、钨、铝、银、金等或它们的组合。
在实施例中，接合焊盘116是UBM116并且包括三层导电材料，诸如钛层、铜层和镍层。然而，本领域普通技术人员将意识到，存在许多适合的材料和层的布置适合于形成UBM116，诸如铬/铬铜合金/铜/金的布置、钛/钛钨/铜的布置或铜/镍/金的布置。任何可以用于UBM116的合适的材料或者材料层完全包括在本发明的范围之内。
在形成接合焊盘116之后，管芯130的有源表面（具有连接件120）通过连接件120和接合焊盘116接合至衬底112的第一侧。管芯130可以是其中具有集成电路器件（诸如晶体管、电容器、电感器、电阻器（未示出）等）的器件管芯。此外，管芯130可以是具有核心电路的逻辑管芯，并且例如可以是中央处理单元（CPU）管芯。在一些实施例中，管芯130是类似存储器堆叠的多重堆叠管芯。连接件120可以接合至管芯130上的接触件或者接合焊盘（未示出）。
连接件120在图1中示出为微凸块，然而，在其它实施例中，连接件120是焊球、金属柱、可控塌陷芯片连接（C4）凸块、化学镀镍钯浸金技术（ENEPIG）形成的凸块等。连接件120可以包括诸如焊料、铜、铝、金、镍、银、钯、锡等或它们的组合的导电材料。在连接件120是焊料凸块的实施例中，通过使用诸如蒸发、电镀、印刷、焊料转移、焊球置放等的常用方法首先形成焊料层来形成连接件120。一旦焊料层形成在结构上，为了将材料塑造为期望的凸块形状，可以实施回流。在另一个实施例中，连接件120是通过溅射、印刷、电镀、化学镀、CVD等形成的金属柱（诸如铜柱）。金属柱可以是无焊料的并且具有基本上垂直的侧壁。在一些实施例中，金属覆盖层（未示出）形成于金属柱连接件120顶部。金属覆盖层可以包括镍、锡、锡铅、金、银、钯、铟、镍钯金、镍金等或它们的组合，并且可以通过镀工艺形成。
管芯130和衬底112之间的接合可以是焊料接合或者直接金属与金属的接合（诸如铜与铜或者锡与锡）。在实施例中，管芯130通过回流工艺接合至衬底112。在这个回流工艺过程中，连接件120与接合焊盘116和管芯130接触以使管芯130与衬底112物理和电连接。
底部填充材料118可以被注射或以其他方式形成在管芯130和衬底112之间的空间中。例如，底部填充材料118可以是液态环氧树脂、可变形凝胶、硅橡胶等，其分配于管芯130和衬底112之间，然后固化变硬。此外，使用底部填充材料118以减少连接件120中的断裂并保护连接件120。
钝化层110可以形成于衬底112的第二侧上。钝化层110可以是氮化硅、碳化硅、氧化硅、低k电介质（诸如碳掺杂氧化物）、极低k电介质（诸如多孔碳掺杂的二氧化硅）、聚合物（诸如环氧树脂、聚酰亚胺、苯并环丁烯（BCB）、聚苯并恶唑（PBO））等或它们的组合，也可以使用其它相对较软、通常为有机物的电介质材料，并且通过CVD、PVD、ALD、旋涂电介质工艺等或它们的组合沉积。在一些实施例中，钝化层110是诸如聚酰胺的聚合物。
衬底112可以具有形成在衬底112的第二侧上的焊盘108和连接件106。接合焊盘108和连接件106允许衬底112和管芯130电连接至外部器件，诸如芯片、管芯、衬底等（参见图5）。在一些实施例中，接合焊盘108嵌入钝化层110内。接合焊盘108和连接件106可以分别由与上面讨论的接合焊盘116和连接件120相似的材料并且通过相似的工艺形成，这里将不再重复，当然它们也不是必须相同。
载体102可以通过粘合层104安装至连接件106。粘合层104可以例如以层压方式设置于载体102上。粘合层104可以由诸如紫外线胶的胶形成，或者可以是由薄片形成的层压层。载体102可以是任何合适的衬底，其在制造工艺的中间操作过程中为顶部上的层提供机械支撑。载体102可以是晶圆，其包括玻璃、硅（例如硅晶圆）、氧化硅、金属板、陶瓷材料等。
图2A示出了位于衬底112的第一侧上方的支撑结构204的形成（步骤604）。支撑结构204可以在管芯130和衬底112的单一化期间提供结构支持，并且也可以作为热部件以从衬底112中驱散热量。支撑结构204通过粘合层202粘附至衬底112。粘合层202可以是环氧树脂、树脂等或它们的组合。粘合层202在垂直于第一侧表面的方向上的厚度可以介于约1μm至约200μm之间。虽然实施例未限定具体的厚度，但该厚度不应该过厚以抑制热量的耗散。然后，支撑结构204通过粘合层202粘附至衬底112的第一侧。可以通过取放工具放置支撑结构204。在一些实施例中，支撑结构204被放置为邻近管芯130和/或者管芯130之间的衬底112将被单一化或锯切的位置（参见图3A至3D）。这些位置可以称为锯线或划线（参见图3A至3D中的302A和302B）。支撑结构可以由诸如硅、硅锗、铜、镍镀铜、铝等或它们的组合的金属或者非金属制成。在实施例中，支撑结构204的顶面204A基本上与管芯130的顶面130A共面。支撑结构204可以没有有源和无源器件。在实施例中，如顶视图所示，支撑结构204为矩形或者棒形（参见图3A和3C）。在另一实施例中，支撑结构204是环绕管芯130的连续环（参见图3B）。
图2B示出了将模制材料模制在支撑结构204、管芯130、连接件120和衬底112上和周围的实施例。模制材料206填充支撑结构204和管芯130之间的间隙，并且可以与衬底112接触。此外，模制材料206可以填充管芯130和衬底112之间的间隙，并且可以省略底部填充118，因为模制材料206可以保护连接件120。模制材料206可以包括模塑料、模制底部填充物、环氧树脂、树脂等或它们的组合。模制材料206的顶面可以高于管芯130的顶面130A以及支撑结构204的顶面204A。在实施例中，实施削薄步骤（可以是研磨步骤）以使模制材料206变薄，直到模制材料206的顶面206A与管芯130的顶面130A和支撑结构204的顶面204A基本共面。模制材料206也可以通过压板或者模具（未示出）经历压力模制工艺以定型模制材料206，并将模制材料206推入环绕管芯130和支撑结构204的裂缝内。
虽然图2A和图2B示出了邻近管芯130的支撑结构204接合至载体102上安装的衬底112，但是本领域普通技术人员应该理解，支撑结构204可以形成在任何在单一化过程中需要支撑的封装部件上。例如，可以形成邻近引线接合至衬底或中介层的芯片的支撑结构204。
图3A根据实施例示出了具有管芯130和矩形支撑结构204的衬底112的第一侧的顶部图。矩形支撑结构204可以沿锯线302A和302B放置。在一些实施例中，锯线302A或302B具有沿其放置的多于一个支撑结构204，且支撑结构204彼此物理间隔开（参见图3A）。在其它实施例中，锯线302A或者302B具有沿锯线放置的单一连续的支撑结构204。沿锯线302A的支撑结构204的纵轴基本上垂直于沿锯线302B的支撑结构204的纵轴。内管芯130可以具有邻近内管芯130的四侧的每一侧的支撑结构204。外管芯130可以具有仅邻近外管芯130的两侧的支撑结构204。
图3B示出了具有管芯130和环状支撑结构204的衬底112的第一侧的顶视图。环状支撑结构204可以环绕管芯130，并且可以沿锯线302A和302B放置。在实施例中，每个环状支撑结构204均环绕单一管芯130。例如，在图3B中，可以具有九个独立的环状支撑结构204，每一个环绕单个管芯130。在另一实施例中，每个环状支撑结构204均可以环绕多于一个的管芯130。例如，在图3B中，环绕九个管芯130的每个的支撑结构204可以是单个连续的支撑结构204。
图3C根据实施例示出了具有用于每个封装结构的多个管芯130A、130B和130C和矩形支撑结构204的衬底112的第一侧的顶视图。在这个实施例中，每个单一化的封装结构包括三个管芯，至少一个管芯包括逻辑管芯，至少一个其它管芯包括一个存储管芯。在实施例中，模制材料206横向位于管芯130A、130B和130C之间并环绕管芯130A、130B和130C。这里将不重复与先前描述的实施例相似的关于本实施例的细节。
图3D示出了具有用于每个单一化的封装结构的多个管芯130A、130B和130C以及支撑结构204（位于锯线302A和302B的交叉点处）的衬底112的第一侧的顶视图。在实施例中，支撑结构204基本为正方形并且集中在锯线302A和302B的交叉点上。这里将不重复与先前描述的实施例相似的关于本实施例的细节。
图3A至图3D中管芯130的数目、支撑结构204的形状、支撑结构204的数目仅用于示出目的并且不用于限制本发明。管芯130和支撑结构204可以具有任何合适的数目，并且支撑结构204可以是任何合适的形状。
图4示出了管芯130和衬底112的单一化（步骤606）。如图所示，翻转衬底112和管芯130结构，并将管芯130的顶面130A和支撑结构204的顶面204A放置于切割带402上。从连接件106上卸下载体102，并去除粘合层104。然后可以将衬底112锯切以单一化为单独的封装件。通过锯切工艺形成的切割路径404将衬底112分隔成单独的封装件，并且也由支撑结构204形成分隔开的支撑结构204’。切割路径404可以基本上沿着锯线302A和302B（参见图3A至图3D）。在单一化之后，支撑结构204’具有基本上垂直于衬底112的顶面的侧壁。支撑结构204’的侧壁基本上平行于管芯130的侧壁。在实施例中，基本上支撑结构204’的整个侧壁（从衬底112的顶面至支撑结构204’的顶面204A）为平面并且垂直于衬底112的顶面。
图5示出了将衬底112接合至衬底502（步骤608）以及在衬底112和管芯130上方安装盖（步骤610）。如前文所述，衬底502可以相似于衬底112，虽然衬底112和衬底502不是必须相同。在一个可选实施例中，衬底502基于绝缘核心，诸如玻璃纤维增强树脂核心。一个核心材料的实例为诸如FR4的玻璃纤维树脂。可选的核心材料包括双马来酰亚胺三嗪（BT）树脂，或者可选择其它PC板材料或者薄膜。衬底502可以使用诸如ABF膜（Ajinomoto build-upfilm）的增强膜或者其它层压片。
衬底502可以具有物理和电连接至连接件106的接触件508。在一些实施例中，预焊料层形成于接触件508上方，并且在一些实施中，接触件包括接合焊盘或者焊球。接触件508可以由焊料、锡、银等或它们的组合制成。在实施例中，衬底502通过回流工艺接合至衬底112。在回流工艺过程中，衬底502上的接触件508与连接件106接触，从而使衬底502物理并且电连接至衬底112。
半导体器件100进一步包括盖506（也可以是散热器），其使用热界面材料504附接于衬底502的顶面以及管芯130和支撑结构204’的顶面130A和204A。在这个实施例中，盖506具有平坦的侧面和平坦的顶面，而在其它实施例中，盖506可以根据半导体器件100的各种轮廓而具有轮廓，诸如管芯130的顶面低于支撑结构204’的顶面。在这个实施例中，盖506是钢的，在其它实施例中，其可以是诸如铜、不锈钢等或它们的组合的其它金属或者非金属。热界面材料504可以是导热材料和电绝缘材料，诸如聚合物或者环氧树脂，如混合有金属（如银或金）的环氧树脂，“热油脂”、“白油脂”等或它们的组合。热界面材料504可以分配在管芯130和支撑结构204’的顶面130A和204A上。然后可以使用取放工具将盖506放置在热界面材料504上以使盖506附接于半导体器件100的剩余部分。在这个实施例中，盖506不横向延伸至衬底502的横向边缘。在一些实施例中，盖506横向延伸至衬底502的横向边缘，使得盖506的外部边缘和衬底502的横向边缘共端面。
衬底502可以在与顶面相对的底面上具有连接件510，从而允许衬底502接合至其它器件和/或衬底。连接件510可以通过上面讨论的连接件106和120相似的工艺及相似的材料形成，这里将不再进行重复讨论。
图7至图11是根据另一实施例的半导体器件制造的中间阶段的截面图，图6是图7至图11所示工艺的工艺流程图。在这个实施例中，不使用载体，因为衬底112较厚并在工艺过程中提供机械支撑。金属化层和通孔114部分延伸穿过衬底112，但是不延伸到衬底112的背侧。在此将不重复与先前描述的实施例相似的关于本实施例的细节。
图8示出了位于衬底112的第一侧上方的支撑结构204的形成（步骤604）。支撑结构204可以在管芯130和衬底112的单一化过程中提供结构支持，并且也可以作为热部件以驱散来自衬底112的热量。支撑结构204通过粘合层202粘附于衬底112。将模制材料206模制于支撑结构204、管芯130、连接件120和衬底112上并环绕支撑结构204、管芯130、连接件120和衬底112。模制材料206填充支撑结构204和管芯130之间的间隙，并且可以与衬底112接触。此外，模制材料206可以填充到管芯130和衬底112之间的间隙内。在实施例中，实施削薄步骤（可以是研磨步骤）以使模制材料206变薄，直到模制材料206的顶面206A与管芯130的顶面130A以及支撑结构204的顶面204A基本共面。模制材料206也可以通过压力板或者模具（未示出）经历压力模制工艺以定型模制材料206，并且将模制材料206推入环绕管芯130和支撑结构204的空隙内。
图9示出了衬底112的背面削薄和连接件106的形成。在实施例中，衬底112可以通过研磨工艺和/或蚀刻工艺削薄。在一些实施例中，衬底112可以被削薄，使得通过衬底112的背侧露出通孔114。在衬底112削薄之后，钝化层110、接合焊盘108和连接件106可以在衬底112的背侧上形成。
图10示出了管芯130和衬底112的单一化（步骤606）。如图所示，翻转衬底112和管芯130结构，并且将管芯130的顶面130A、支撑结构204的顶面204A和模塑料206的顶面206A放置在切割带402上。这一步骤与前文中图4描述的步骤相似，并且将不再重复描述其中细节。
图11示出了衬底112接合至衬底502（步骤608）以及在衬底112和管芯130上方安装盖（步骤610）。这一步骤与前文中图5描述的步骤相似，并且将不再重复描述其中细节。
通过在锯线中具有支撑结构，使得在锯切过程中衬底得到支撑且不会剥落。并且，支撑结构可以充当热部件以从衬底中驱散热量。在一些实施例中，支撑结构将热量驱散至盖或者散热器。此外，支撑结构可以帮助防止管芯下面的底部填充物渗出到衬底的横向边缘，这会影响热性能。
本发明的一个实施例是一种形成半导体器件的方法，该方法包括：将管芯接合至第一衬底的顶面，管芯电连接至第一衬底；以及在第一衬底的顶面上形成支撑结构，支撑结构与管芯物理间隔开，支撑结构的顶面与管芯的顶面共面。该方法进一步包括：在第一衬底上实施锯切工艺，该锯切工艺锯切穿过支撑结构。
本发明的另一个实施例是一种形成半导体器件的方法，该方法包括：将多个管芯接合至第一衬底的第一侧；以及沿第一衬底的第一侧上的多条锯线形成多个支撑结构，多条锯线邻近多个管芯，多个支撑结构的每一个都与多个管芯的每一个横向隔开。该方法进一步包括：通过沿多条锯线的每一条实施锯切工艺来单一化多个管芯，该锯切工艺锯切穿过第一衬底和多个支撑结构。
本发明的又一实施例是一种半导体器件，其包括位于第二衬底上方的第一衬底、将第一衬底连接至第二衬底的第一组连接件、位于第一衬底上方的管芯以及将管芯连接至第一衬底的第二组连接件。半导体器件进一步包括：粘附至第一衬底的第一支撑结构，第一支撑结构的顶面与管芯的顶面共面，第一支撑结构邻近管芯；热界面材料层，位于管芯和第一支撑结构的顶面上；以及安装到第二衬底的盖，盖的一部分与热界面材料层接触。
尽管已经详细地描述了本发明的实施例及其优势，但应该理解，可以在不背离所附权利要求限定的本发明主旨和范围的情况下，做各种不同的改变，替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、手段、方法和步骤的特定实施例。作为本领域普通技术人员应理解，根据本发明，现有的或今后开发的用于执行与根据本发明所采用的所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造、材料组分、手段、方法或步骤本发明可以被使用。相应的，所附的权利要求意指包括例如工艺、机器、制造、材料组分、手段、方法或步骤的范围。

Claims (17)

1.一种形成半导体器件的方法，所述方法包括：
将管芯接合至第一衬底的顶面，所述管芯电连接至所述第一衬底；
使用取放工具在所述第一衬底的顶面上放置支撑结构，所述支撑结构与所述管芯物理间隔开，所述支撑结构的顶面与所述管芯的顶面共面；
对所述第一衬底实施锯切工艺，所述锯切工艺锯切穿过所述支撑结构；
将所述第一衬底接合至第二衬底，所述第一衬底电连接至所述第二衬底；
在所述管芯和所述支撑结构的顶面上形成热界面材料；以及
将盖放置在所述第一衬底、所述管芯和所述支撑结构上方，所述盖的底面位于所述第二衬底的顶面上，所述盖的一部分与所述管芯和所述支撑结构的顶面上的所述热界面材料接触。
2.根据权利要求1所述的方法，其中，放置所述支撑结构进一步包括：沿所述第一衬底的顶面上的锯线放置所述支撑结构。
3.根据权利要求1所述的方法，其中，放置所述支撑结构进一步包括：将棒形支撑结构放置在所述第一衬底的顶面上，所述棒形支撑结构横向邻近所述管芯的一侧。
4.根据权利要求1所述的方法，其中，放置所述支撑结构进一步包括：将环形支撑结构放置于所述衬底的顶面上，所述环形支撑结构环绕所述管芯。
5.根据权利要求1所述的方法，其中，放置所述支撑结构进一步包括：
在所述第一衬底的顶面上形成粘合层；以及
将所述支撑结构放置于所述粘合层上，所述粘合层将所述支撑结构粘附至所述第一衬底。
6.根据权利要求1所述的方法，其中，所述支撑结构包括硅、铜、镍或者它们的组合。
7.一种形成半导体器件的方法，所述方法包括：
将多个管芯接合至第一衬底的第一侧；
沿所述第一衬底的第一侧上的多条锯线形成多个支撑结构，形成所述多个支撑结构包括沿所述锯线使用取放工具放置所述多个支撑结构，所述多条锯线邻近所述多个管芯，所述多个支撑结构中的每一个都与所述多个管芯中的每一个横向间隔开；
通过沿所述多条锯线中的每一条实施锯切工艺来单一化所述多个管芯，所述锯切工艺锯切穿过所述第一衬底和所述多个支撑结构；
在所述第一衬底的第二侧形成连接件，所述第二侧与所述第一侧相对；
将一个单一化的第一衬底接合至第二衬底，所述连接件将所述一个单一化的第一衬底电连接至所述第二衬底；
在所述一个单一化的第一衬底的第一侧上的单一化的管芯以及每个所述支撑结构的顶面上形成热界面材料；以及
将盖安装在所述第二衬底上，所述盖位于所述一个单一化的第一衬底的第一侧上的所述单一化的管芯以及每个所述支撑结构上方，所述盖至少接触所述一个单一化的第一衬底的第一侧上的每个所述支撑结构的顶面上的所述热界面材料。
8.根据权利要求7所述的方法，其中，所述多个管芯中的每一个都具有邻近所述管芯的至少两侧的所述多个支撑结构中的一个。
9.根据权利要求7所述的方法，其中，所述多个管芯中的至少两个具有邻近所述至少两个管芯的四侧的每一侧的所述多个支撑结构中的一个。
10.根据权利要求7所述的方法，其中，所述多个管芯中的至少两个具有环绕所述至少两个管芯中的每一个的连续支撑结构。
11.根据权利要求7所述的方法，其中，形成所述多个支撑结构包括：在所述锯线的交叉点使用取放工具放置所述多个支撑结构。
12.根据权利要求7所述的方法，其中，所述多个支撑结构中的每一个的顶面都与所述多个管芯中的至少一个的顶面共面。
13.一种半导体器件，包括：
第一衬底，位于第二衬底上方；
第一组连接件，将所述第一衬底连接至所述第二衬底；
管芯，位于所述第一衬底上方；
第二组连接件，将所述管芯连接至所述第一衬底；
第一支撑结构，粘附至所述第一衬底，所述第一支撑结构的顶面与所述管芯的顶面共面，所述第一支撑结构邻近所述管芯；
热界面材料层，位于所述管芯以及所述第一支撑结构的顶面上；以及
盖，安装至所述第二衬底，所述盖的一部分接触所述热界面材料层。
14.根据权利要求13所述的半导体器件，进一步包括：横向位于所述第一支撑结构和所述管芯之间的模制材料，所述模制材料的顶面与所述管芯的顶面及所述支撑结构的顶面共面。
15.根据权利要求13所述的半导体器件，其中，所述第一支撑结构环绕所述管芯。
16.根据权利要求13所述的半导体器件，进一步包括：粘附至所述第一衬底的第二支撑结构，所述第二支撑结构与所述第一支撑结构物理间隔开，所述第二支撑结构的顶面与所述管芯的所述顶面共面。
17.根据权利要求16所述的半导体器件，其中，所述第二支撑结构的纵轴在垂直于所述第一支撑结构的纵轴的方向上延伸。
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