JP5234703B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5234703B2 JP5234703B2 JP2006170835A JP2006170835A JP5234703B2 JP 5234703 B2 JP5234703 B2 JP 5234703B2 JP 2006170835 A JP2006170835 A JP 2006170835A JP 2006170835 A JP2006170835 A JP 2006170835A JP 5234703 B2 JP5234703 B2 JP 5234703B2
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Description
しかしながら、上記積層技術(b)においては、以下の問題が懸念される。
本発明の前記並びにその他の目的と新規な特徴は、本明細書の記述及び添付図面によって明らかになるであろう。
(1)上記目的は、チップ搭載部に平面的に重なり合って積層される複数の半導体チップのうち、上下方向において互いに向かい合う(隣り合う)2つの半導体チップにおいて、下段側の半導体チップの主面(電極パッド形成面)の周縁部に、絶縁性の突起体を設けることによって達成される。
(2)また、上記目的は、チップ搭載部に平面的に重なり合って積層される複数の半導体チップのうち、上下方向において互いに向かい合う(隣り合う)2つの半導体チップにおいて、下段側の半導体チップを接着固定するための接着材の一部で下段側の半導体チップの主面(電極パッド形成面)の周縁を覆うことによって達成される。
(3)また、上記目的は、チップ搭載部に平面的に重なり合って積層される複数の半導体チップのうち、上下方向において互いに向かい合う(隣り合う)2つの半導体チップにおいて、下段側の半導体チップを接着固定するための接着材の一部を下段側の半導体チップの主面側にせり上げて、ボンディングワイヤを支持するための厚肉部を形成することによって達成される。
半導体装置の製造歩留まり向上を図ることができる。
図1は、半導体装置の内部構造を示す図((a)は模式的平面図,(b)は(a)のa−a線に沿う模式的断面図)、
図2は、図1(b)の一部を拡大した模式的断面図、
図3は、半導体装置において、下段の半導体チップにおけるワイヤ接続状態を示す模式的平面図、
図4は、半導体チップの概略構成を示す図((a)は模式的平面図,(b)は(a)のb−b線に沿う模式的断面図)、
図5は、図4(b)の一部を拡大した模式的断面図、
図6は、半導体装置の製造に使用されるマルチ配線基板の模式的平面図、
図7は、図6のc−c線に沿う模式的断面図、
図8は、半導体装置の製造工程を示すフローチャート、
図9は、半導体装置の製造において、半導体ウエハに複数のチップ形成領域が形成された状態を示す図((a)は模式的平面図,(b)は(a)のd−d線に沿う模式的断面図)、
図10乃至図14は、半導体装置の製造工程を示す模式的断面図である。
図6及び図7に示すように、マルチ配線基板20は、その厚さ方向と交差する平面形状が方形状になっており、本実施例1では例えば長方形になっている。マルチ配線基板20は、互いに反対側に位置する主面20x及び裏面20yを有し、その主面20xにはモールド領域21が設けられている。モールド領域21の中には、平面的に並列して配置された複数の製品形成領域(個片基板形成領域)22が設けられ、この各々の製品形成領域22の中にはチップ搭載部24が設けられている。
まず、図9((a),(b))に示す半導体ウエハ30を準備する(図8のウエハ準備工程〈100〉)。半導体ウエハ30は、例えば単結晶シリコンからなる半導体基板を主体に構成されている。半導体ウエハ30の主面には、スクライブ領域(分離領域)32によって区画された複数のチップ形成領域31が行列状に配置されている。各チップ形成領域31は、基本的に図4((a),(b))及び図5に示す半導体チップ5と同様の構成及び平面形状になっている。半導体ウエハ30の主面と反対側の裏面には、この裏面を覆うようにして樹脂フィルム15が予め貼り付けられている。
図15は、半導体装置の模式的断面図、
図16は、半導体チップの概略構成を示す図((a)は模式的平面図,(b)は(a)のe−e線に沿う模式的断面図)である。
このように構成された本実施例2においても、前述の実施例1と同様の効果が得られる。
図17は、半導体装置の要部模式的断面図、
図18及び図19は、半導体装置の製造工程(チップ搭載工程)を示す模式的断面図である。
まず、マルチ配線基板20の各製品形成領域22において、図18に示すように、マルチ配線基板20の主面20xのチップ搭載部24に接着材16を介在して半導体チップ5aを接着固定すると共に、接着材16の一部で半導体チップ5aの主面5xの周縁を覆う。半導体チップ5aの接着固定は、例えば、チップ搭載部24にペースト状の接着材16を塗布し、その後、ペースト状の接着材16を介在してチップ搭載部24に半導体チップ5aを圧着することによって行われる。この工程において、接着材16の一部が半導体チップ5aの主面5x側にせり上がるように、接着材16の量や流動性、更に半導体チップ5aの圧着力を調整することによって、接着材16の一部で半導体チップ5aの主面5xの周縁を覆うことができる。接着材16としては、絶縁性であれば熱硬化性でも熱可塑性でもよい。また、ペースト状でもフィルム状でもよい。
図20に示すように、本実施例4の半導体装置1cは、基本的に前述の実施例2と同様の構成になっており、以下の構成が異なっている。
Claims (2)
- (a)チップ搭載部と前記チップ搭載部の周囲に沿って配置された複数の接続部とを備えた基板を準備する工程と、
(b)互いに反対側に位置する主面及び裏面と、前記主面に配置された複数の電極パッドとを有する第1の半導体チップを準備する工程と、
(c)互いに反対側に位置する主面及び裏面と、前記主面に配置された複数の電極パッドと、前記裏面を覆うようにして前記裏面に設けられた樹脂フィルムとを有する第2の半導体チップを準備する工程と、
(d)前記チップ搭載部に前記第1の半導体チップを搭載する工程と、
(e)前記第1の半導体チップの主面の周縁を横切って、前記第1の半導体チップの複数の電極パッドと、前記第1の半導体チップの周囲に配置された複数の接続部とを複数のボンディングワイヤで夫々電気的に接続する工程と、
(f)加熱ステージ上で前記(e)で得られた基板を加熱しながら前記樹脂フィルムを介して前記複数のボンディングワイヤの各々の一部を覆うようにして前記第1の半導体チップの主面に前記第2の半導体チップを圧着することにより、前記加熱ステージ上の基板を通して加熱された前記樹脂フィルムが溶融し、溶融した前記樹脂フィルムが前記複数のボンディングワイヤの各々の一部を覆い前記第1の半導体チップの主面に達するまで加熱処理することにより、前記第1の半導体チップに前記第2の半導体チップを接着固定する工程と、
(g)前記工程(e)より前の工程で前記第1の半導体チップの主面の周縁部であって、前記複数のボンディングワイヤが横切る部分に、前記第1の半導体チップの主面よりも突起して設けられた突起体を形成する工程と、
を有し、
前記基板は、主面に複数の接続部が配置された配線基板であり、
前記工程(d)において、前記第1の半導体チップは前記裏面に設けられた樹脂フィルムを介在して前記配線基板の主面に搭載され、
(d1)前記工程(d)で得られた基板に対する前記加熱ステージ上で加熱された状態での圧着処理で前記第1の半導体チップを前記配線基板に接着固定する工程と、
をさらに有し、
前記第1の半導体チップの主面の周縁は前記工程(d1)における加熱圧着処理で形成された前記裏面から延在した前記樹脂フィルムで覆われ、前記延在部分が前記突起体を構成することを特徴とする半導体装置の製造方法。 - (a)主面に複数の接続部が配置された配線基板を準備する工程と、
(b)互いに反対側に位置する主面及び裏面と、前記主面に配置された複数の電極パッドと、前記裏面に設けられた第1の樹脂フィルムとを有する第1の半導体チップを準備する工程と、
(c)前記第1の半導体チップを前記第1の樹脂フィルムを介して前記配線基板の前記主面に搭載し、加熱圧接処理により前記基板に接着固定する工程と、
(d)各々が前記半導体チップの主面の周縁を横切って前記第1の半導体チップの複数の電極パッドと前記配線基板の複数の接続部を複数のボンディングワイヤで夫々電気的に接続する工程と、
(e)互いに反対側に位置する主面及び裏面と、前記主面に配置された複数の電極パッドと、前記裏面に設けられた第2の樹脂フィルムとを有する第2の半導体チップを準備する工程と、
(f)前記第2の半導体チップを、第2の樹脂フィルムを介在して前記第1の半導体チップの前記主面上に載置し、溶融した前記第2の樹脂フィルムが前記複数のボンディングワイヤの各々の一部を覆い前記第1の半導体チップの主面に達するまで加熱圧着処理を行うことにより接着固定する工程と、
を含み、
前記工程(c)において、加熱圧接処理により溶融した前記第1の樹脂フィルムが前記第1の半導体チップの主面側にせり上がり厚肉部を形成し、前記工程(d)で配設された前記複数のボンディングワイヤは、前記第1の樹脂フィルムの厚肉部に支持されていることを特徴とする半導体装置の製造方法。
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