JP5621712B2 - 半導体チップ - Google Patents
半導体チップ Download PDFInfo
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- JP5621712B2 JP5621712B2 JP2011126264A JP2011126264A JP5621712B2 JP 5621712 B2 JP5621712 B2 JP 5621712B2 JP 2011126264 A JP2011126264 A JP 2011126264A JP 2011126264 A JP2011126264 A JP 2011126264A JP 5621712 B2 JP5621712 B2 JP 5621712B2
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- bump
- semiconductor
- protective film
- semiconductor chip
- electrode pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
電極パッド(14)上に積層されて接続され、半導体部(11)の一面(12)上に突出する導電性材料よりなるバンプ(15)と、
半導体部(11)の一面(12)上に設けられ、電極パッド(14)およびバンプ(15)を封止する電気絶縁性の保護膜(16)と、を備え、
バンプ(15)の先端面(15a)は保護膜(16)より露出するとともに、保護膜(16)とバンプ(15)の先端面(15a)とは連続した同一平面を構成しており、
バンプ(15)の先端面(15a)にワイヤボンディングがなされるようになっており、
バンプ(15)の先端面(15a)上には、当該先端面(15a)よりも広いサイズの金属箔(18)が、当該先端面(15a)から保護膜(16)上まではみ出した状態で積層されていることを特徴とする。
図1は、本発明の第1実施形態に係る半導体チップ10を示す図であり、(a)は概略断面図、(b)は(a)中の上視概略平面図である。また、図2は、図1中の半導体チップ10を含むモールドパッケージ1の概略断面構成を示す図である。
図7は、本発明の第2実施形態に係る半導体チップ10の概略断面構成を示す図である。本実施形態では、上記第1実施形態との相違点を中心に述べることとする。
図8は、本発明の第3実施形態に係る半導体チップ10の概略断面構成を示す図である。本実施形態では、上記第1実施形態との相違点を中心に述べることとする。
図9は、本発明の第4実施形態に係る半導体チップ10の応用例を示す概略断面図である。本実施形態では、上記第1実施形態と同様の半導体チップ10を用いて、チップ間ワイヤボンディングを行う構造を示す。
なお、バンプ15は上記した形状以外にも、電極パッド14上に積層されて半導体部11の一面12上に突出する形状であればよく、たとえば角錐、円柱、角柱などの柱状のものでもよい。
10 半導体チップ
11 半導体部
12 半導体部の一面
14 電極パッド
15 バンプ
15a バンプの先端面
16 保護膜
18 金属箔
60 シート
61 シートの貫通穴
70 導電性ペースト
Claims (3)
- 半導体よりなる半導体部(11)と、前記半導体部(11)の一面(12)上に設けられたワイヤボンディング用の電極パッド(14)とを備える半導体チップにおいて、
前記電極パッド(14)上に積層されて接続され、前記半導体部(11)の一面(12)上に突出する導電性材料よりなるバンプ(15)と、
前記半導体部(11)の一面(12)上に設けられ、前記電極パッド(14)および前記バンプ(15)を封止する電気絶縁性の保護膜(16)と、を備え、
前記バンプ(15)の先端面(15a)は前記保護膜(16)より露出するとともに、前記保護膜(16)と前記バンプ(15)の先端面(15a)とは連続した同一平面を構成しており、
前記バンプ(15)の先端面(15a)にワイヤボンディングがなされるようになっており、
前記バンプ(15)の先端面(15a)上には、当該先端面(15a)よりも広いサイズの金属箔(18)が、当該先端面(15a)から前記保護膜(16)上まではみ出した状態で積層されていることを特徴とする半導体チップ。 - 前記バンプ(15)は前記半導体部(11)よりも軟らかい材料よりなるものであることを特徴とする請求項1に記載の半導体チップ。
- 前記保護膜(16)は、前記半導体部(11)の一面(12)に直接接触して設けられていることを特徴とする請求項1または2に記載の半導体チップ。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011126264A JP5621712B2 (ja) | 2011-06-06 | 2011-06-06 | 半導体チップ |
Applications Claiming Priority (1)
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JP2011126264A JP5621712B2 (ja) | 2011-06-06 | 2011-06-06 | 半導体チップ |
Publications (2)
Publication Number | Publication Date |
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JP2012253263A JP2012253263A (ja) | 2012-12-20 |
JP5621712B2 true JP5621712B2 (ja) | 2014-11-12 |
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JP2011126264A Expired - Fee Related JP5621712B2 (ja) | 2011-06-06 | 2011-06-06 | 半導体チップ |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9528225B2 (en) | 2008-10-20 | 2016-12-27 | Schweerbau Gmbh & Co. Kg | Method and apparatus for machining a workpiece by way of a geometrically defined blade |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101800619B1 (ko) * | 2016-03-03 | 2017-11-23 | 주식회사 에스에프에이반도체 | 반도체 패키지 제조방법 |
JP6938966B2 (ja) * | 2017-03-02 | 2021-09-22 | 昭和電工マテリアルズ株式会社 | 接続構造体の製造方法、接続構造体及び半導体装置 |
WO2023189480A1 (ja) * | 2022-03-31 | 2023-10-05 | ローム株式会社 | 半導体素子および半導体装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3906522B2 (ja) * | 1997-06-10 | 2007-04-18 | ソニー株式会社 | 半導体装置の製造方法 |
US6350664B1 (en) * | 1999-09-02 | 2002-02-26 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of manufacturing the same |
JP2001144123A (ja) * | 1999-09-02 | 2001-05-25 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法および半導体装置 |
JP2003068738A (ja) * | 2001-08-29 | 2003-03-07 | Seiko Epson Corp | 半導体装置及びその製造方法及び半導体チップ及びその実装方法 |
DE102007057689A1 (de) * | 2007-11-30 | 2009-06-04 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement mit einem Chipgebiet, das für eine aluminiumfreie Lothöckerverbindung gestaltet ist, und eine Teststruktur, die für eine aluminiumfreie Drahtverbindung gestaltet ist |
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- 2011-06-06 JP JP2011126264A patent/JP5621712B2/ja not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9528225B2 (en) | 2008-10-20 | 2016-12-27 | Schweerbau Gmbh & Co. Kg | Method and apparatus for machining a workpiece by way of a geometrically defined blade |
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JP2012253263A (ja) | 2012-12-20 |
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