CN106898379A - 半导体存储装置 - Google Patents
半导体存储装置 Download PDFInfo
- Publication number
- CN106898379A CN106898379A CN201610585515.1A CN201610585515A CN106898379A CN 106898379 A CN106898379 A CN 106898379A CN 201610585515 A CN201610585515 A CN 201610585515A CN 106898379 A CN106898379 A CN 106898379A
- Authority
- CN
- China
- Prior art keywords
- voltage
- bit line
- group
- memory cell
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
- G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (15)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011145642.2A CN112259149B (zh) | 2015-12-17 | 2016-07-22 | 半导体存储装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015-246749 | 2015-12-17 | ||
JP2015246749A JP2017111847A (ja) | 2015-12-17 | 2015-12-17 | 半導体記憶装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011145642.2A Division CN112259149B (zh) | 2015-12-17 | 2016-07-22 | 半导体存储装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106898379A true CN106898379A (zh) | 2017-06-27 |
CN106898379B CN106898379B (zh) | 2020-11-13 |
Family
ID=59064477
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011145642.2A Active CN112259149B (zh) | 2015-12-17 | 2016-07-22 | 半导体存储装置 |
CN201610585515.1A Active CN106898379B (zh) | 2015-12-17 | 2016-07-22 | 半导体存储装置 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011145642.2A Active CN112259149B (zh) | 2015-12-17 | 2016-07-22 | 半导体存储装置 |
Country Status (4)
Country | Link |
---|---|
US (3) | US9984761B2 (zh) |
JP (1) | JP2017111847A (zh) |
CN (2) | CN112259149B (zh) |
TW (2) | TWI771422B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110838321A (zh) * | 2018-08-17 | 2020-02-25 | 北京兆易创新科技股份有限公司 | 一种存储器的编程方法和系统 |
CN110931070A (zh) * | 2018-09-20 | 2020-03-27 | 东芝存储器株式会社 | 半导体存储装置 |
CN111312315A (zh) * | 2018-12-11 | 2020-06-19 | 东芝存储器株式会社 | 半导体存储装置及存储系统 |
CN111627473A (zh) * | 2019-02-27 | 2020-09-04 | 东芝存储器株式会社 | 半导体存储装置 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3935139B2 (ja) * | 2002-11-29 | 2007-06-20 | 株式会社東芝 | 半導体記憶装置 |
JP5814867B2 (ja) | 2012-06-27 | 2015-11-17 | 株式会社東芝 | 半導体記憶装置 |
JP2017111847A (ja) | 2015-12-17 | 2017-06-22 | 株式会社東芝 | 半導体記憶装置 |
JP6490018B2 (ja) | 2016-02-12 | 2019-03-27 | 東芝メモリ株式会社 | 半導体記憶装置 |
JP6779819B2 (ja) * | 2017-03-22 | 2020-11-04 | キオクシア株式会社 | 半導体記憶装置 |
JP2018160303A (ja) * | 2017-03-23 | 2018-10-11 | 東芝メモリ株式会社 | 半導体記憶装置 |
JP6983617B2 (ja) | 2017-10-17 | 2021-12-17 | キオクシア株式会社 | 半導体記憶装置 |
JP2020009509A (ja) * | 2018-07-03 | 2020-01-16 | キオクシア株式会社 | 半導体記憶装置 |
KR20220106991A (ko) * | 2019-11-11 | 2022-08-01 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 정보 처리 장치 및 정보 처리 장치의 동작 방법 |
KR20210106753A (ko) * | 2020-02-21 | 2021-08-31 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그 동작 방법 |
CN112992201B (zh) * | 2021-03-24 | 2022-05-10 | 长鑫存储技术有限公司 | 灵敏放大器、存储器以及控制方法 |
JP2022170342A (ja) | 2021-04-28 | 2022-11-10 | キオクシア株式会社 | 半導体記憶装置 |
WO2022256956A1 (en) * | 2021-06-07 | 2022-12-15 | Yangtze Memory Technologies Co., Ltd. | Methods of reducing program disturb by array source coupling in 3d nand memory devices |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW501283B (en) * | 2000-12-28 | 2002-09-01 | Samsung Electronics Co Ltd | Method of programming non-volatile semiconductor memory device |
CN102714055A (zh) * | 2009-11-24 | 2012-10-03 | 桑迪士克技术有限公司 | 通过基于感测的位线补偿对存储器编程以减少沟道到浮栅的耦合 |
US8325545B2 (en) * | 2010-10-13 | 2012-12-04 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
US8339857B2 (en) * | 2010-01-20 | 2012-12-25 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and operation method thereof |
Family Cites Families (52)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6222762B1 (en) * | 1992-01-14 | 2001-04-24 | Sandisk Corporation | Multi-state memory |
US5705811A (en) * | 1996-10-30 | 1998-01-06 | Raytheon Ti Systems, Inc. | System and apparatus for calibrating an image detector |
US6606267B2 (en) * | 1998-06-23 | 2003-08-12 | Sandisk Corporation | High data rate write process for non-volatile flash memories |
JP3629144B2 (ja) * | 1998-06-01 | 2005-03-16 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2000269366A (ja) * | 1999-03-19 | 2000-09-29 | Toshiba Corp | 不揮発性半導体メモリ |
JP3863330B2 (ja) * | 1999-09-28 | 2006-12-27 | 株式会社東芝 | 不揮発性半導体メモリ |
JP3983969B2 (ja) * | 2000-03-08 | 2007-09-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US6907497B2 (en) * | 2001-12-20 | 2005-06-14 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device |
US6864530B2 (en) * | 2002-03-05 | 2005-03-08 | Hynix Semiconductor America, Inc. | High density flash memory architecture with columnar substrate coding |
KR100475119B1 (ko) * | 2002-11-26 | 2005-03-10 | 삼성전자주식회사 | Sonos 셀이 채용된 nor 형 플래시 메모리 소자의동작 방법 |
US7064980B2 (en) * | 2003-09-17 | 2006-06-20 | Sandisk Corporation | Non-volatile memory and method with bit line coupled compensation |
JP2005267821A (ja) * | 2004-03-22 | 2005-09-29 | Toshiba Corp | 不揮発性半導体メモリ |
JP4817615B2 (ja) * | 2004-05-31 | 2011-11-16 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP4832767B2 (ja) * | 2005-02-03 | 2011-12-07 | 株式会社東芝 | 半導体集積回路装置及びそのデータプログラム方法 |
US7203092B2 (en) * | 2005-05-12 | 2007-04-10 | Micron Technology, Inc. | Flash memory array using adjacent bit line as source |
US7257013B2 (en) * | 2005-09-08 | 2007-08-14 | Infineon Technologies Ag | Method for writing data into a memory cell of a conductive bridging random access memory, memory circuit and CBRAM memory circuit |
JP2007128583A (ja) * | 2005-11-02 | 2007-05-24 | Sharp Corp | 不揮発性半導体記憶装置 |
US7813170B2 (en) * | 2005-11-11 | 2010-10-12 | Kabushiki Kaisha Toshiba | Semiconductor memory device capable of memorizing multivalued data |
US7352628B2 (en) * | 2006-06-19 | 2008-04-01 | Sandisk Corporation | Systems for programming differently sized margins and sensing with compensations at select states for improved read operations in a non-volatile memory |
KR100851546B1 (ko) * | 2006-09-22 | 2008-08-11 | 삼성전자주식회사 | 비휘발성 기억 장치 및 그 동작 방법 |
US7894263B2 (en) * | 2007-09-28 | 2011-02-22 | Sandisk Corporation | High voltage generation and control in source-side injection programming of non-volatile memory |
US7751245B2 (en) * | 2007-10-10 | 2010-07-06 | Micron Technology, Inc. | Programming sequence in NAND memory |
JP2009230818A (ja) * | 2008-03-24 | 2009-10-08 | Toshiba Corp | 半導体記憶装置 |
KR20090120205A (ko) * | 2008-05-19 | 2009-11-24 | 삼성전자주식회사 | 플래시 메모리 장치 및 그것의 동작 방법 |
US7719902B2 (en) | 2008-05-23 | 2010-05-18 | Sandisk Corporation | Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage |
KR20100043935A (ko) * | 2008-10-21 | 2010-04-29 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 방법 |
KR101141381B1 (ko) * | 2010-08-16 | 2012-07-13 | 삼성전기주식회사 | 크로스토크 저감을 위한 통신 회로 |
US8369149B2 (en) * | 2010-09-30 | 2013-02-05 | Sandisk Technologies Inc. | Multi-step channel boosting to reduce channel to floating gate coupling in memory |
US8426306B1 (en) * | 2010-12-31 | 2013-04-23 | Crossbar, Inc. | Three dimension programmable resistive random accessed memory array with shared bitline and method |
KR101762828B1 (ko) * | 2011-04-05 | 2017-07-31 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 불휘발성 메모리 장치의 동작 방법 |
FR2976115B1 (fr) * | 2011-05-30 | 2013-07-05 | St Microelectronics Rousset | Memoire non volatile a compensation de couplage capacitif entre lignes de bit |
JP5514158B2 (ja) | 2011-06-16 | 2014-06-04 | 株式会社東芝 | 不揮発性半導体記憶装置 |
WO2013075067A1 (en) * | 2011-11-18 | 2013-05-23 | Aplus Flash Technology, Inc. | Low voltage page buffer for use in nonvolatile memory design |
US8902659B2 (en) * | 2012-03-26 | 2014-12-02 | SanDisk Technologies, Inc. | Shared-bit-line bit line setup scheme |
JP2014053056A (ja) * | 2012-09-06 | 2014-03-20 | Toshiba Corp | 半導体記憶装置 |
JP2014186763A (ja) * | 2013-03-21 | 2014-10-02 | Toshiba Corp | 不揮発性半導体記憶装置 |
WO2015033417A1 (ja) * | 2013-09-05 | 2015-03-12 | 株式会社 東芝 | 半導体記憶装置及びデータ書き込み方法 |
KR102168652B1 (ko) * | 2013-12-16 | 2020-10-23 | 삼성전자주식회사 | 감지 증폭기, 그것을 포함하는 반도체 메모리 장치 및 그것의 읽기 방법 |
CN105830164B (zh) * | 2013-12-18 | 2019-11-19 | 东芝存储器株式会社 | 半导体存储装置 |
US9251903B2 (en) * | 2014-03-13 | 2016-02-02 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and control method thereof |
US9443579B2 (en) * | 2014-08-17 | 2016-09-13 | Aplus Flash Technology, Inc | VSL-based VT-compensation and analog program scheme for NAND array without CSL |
JP2016062623A (ja) * | 2014-09-16 | 2016-04-25 | 株式会社東芝 | 半導体記憶装置 |
US9613713B2 (en) * | 2014-09-16 | 2017-04-04 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
US9318204B1 (en) * | 2014-10-07 | 2016-04-19 | SanDisk Technologies, Inc. | Non-volatile memory and method with adjusted timing for individual programming pulses |
KR102333738B1 (ko) * | 2015-02-03 | 2021-12-01 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 불휘발성 메모리 장치의 동작 방법 |
JP6313244B2 (ja) * | 2015-02-24 | 2018-04-18 | 東芝メモリ株式会社 | 半導体記憶装置 |
US9627046B2 (en) * | 2015-03-02 | 2017-04-18 | Sandisk Technologies Llc | Programming techniques for non-volatile memories with charge trapping layers |
KR20160125114A (ko) * | 2015-04-21 | 2016-10-31 | 에스케이하이닉스 주식회사 | 이-퓨즈를 구비하는 반도체장치 및 그 제조 방법 |
KR102470606B1 (ko) * | 2015-11-26 | 2022-11-28 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 불휘발성 메모리 장치를 포함하는 스토리지 장치 |
JP2017111847A (ja) * | 2015-12-17 | 2017-06-22 | 株式会社東芝 | 半導体記憶装置 |
JP6490018B2 (ja) * | 2016-02-12 | 2019-03-27 | 東芝メモリ株式会社 | 半導体記憶装置 |
JP6783682B2 (ja) * | 2017-02-27 | 2020-11-11 | キオクシア株式会社 | 半導体記憶装置及びメモリシステム |
-
2015
- 2015-12-17 JP JP2015246749A patent/JP2017111847A/ja not_active Abandoned
-
2016
- 2016-07-05 TW TW107117973A patent/TWI771422B/zh active
- 2016-07-05 TW TW105121269A patent/TWI633548B/zh active
- 2016-07-22 CN CN202011145642.2A patent/CN112259149B/zh active Active
- 2016-07-22 CN CN201610585515.1A patent/CN106898379B/zh active Active
- 2016-08-10 US US15/233,658 patent/US9984761B2/en active Active
-
2018
- 2018-05-23 US US15/987,810 patent/US10381096B2/en active Active
-
2019
- 2019-07-01 US US16/459,528 patent/US10672487B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW501283B (en) * | 2000-12-28 | 2002-09-01 | Samsung Electronics Co Ltd | Method of programming non-volatile semiconductor memory device |
CN102714055A (zh) * | 2009-11-24 | 2012-10-03 | 桑迪士克技术有限公司 | 通过基于感测的位线补偿对存储器编程以减少沟道到浮栅的耦合 |
US8339857B2 (en) * | 2010-01-20 | 2012-12-25 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and operation method thereof |
US8325545B2 (en) * | 2010-10-13 | 2012-12-04 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110838321A (zh) * | 2018-08-17 | 2020-02-25 | 北京兆易创新科技股份有限公司 | 一种存储器的编程方法和系统 |
CN110931070A (zh) * | 2018-09-20 | 2020-03-27 | 东芝存储器株式会社 | 半导体存储装置 |
CN110931070B (zh) * | 2018-09-20 | 2023-10-20 | 铠侠股份有限公司 | 半导体存储装置 |
CN111312315A (zh) * | 2018-12-11 | 2020-06-19 | 东芝存储器株式会社 | 半导体存储装置及存储系统 |
CN111312315B (zh) * | 2018-12-11 | 2023-10-03 | 铠侠股份有限公司 | 半导体存储装置及存储系统 |
CN111627473A (zh) * | 2019-02-27 | 2020-09-04 | 东芝存储器株式会社 | 半导体存储装置 |
Also Published As
Publication number | Publication date |
---|---|
CN112259149A (zh) | 2021-01-22 |
US9984761B2 (en) | 2018-05-29 |
CN106898379B (zh) | 2020-11-13 |
TWI633548B (zh) | 2018-08-21 |
US20170178739A1 (en) | 2017-06-22 |
TWI771422B (zh) | 2022-07-21 |
JP2017111847A (ja) | 2017-06-22 |
TW201732815A (zh) | 2017-09-16 |
CN112259149B (zh) | 2024-02-09 |
TW201830391A (zh) | 2018-08-16 |
US20180301197A1 (en) | 2018-10-18 |
US10672487B2 (en) | 2020-06-02 |
US10381096B2 (en) | 2019-08-13 |
US20190325973A1 (en) | 2019-10-24 |
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Effective date of registration: 20170815 Address after: Tokyo, Japan Applicant after: TOSHIBA MEMORY Corp. Address before: Tokyo, Japan Applicant before: Toshiba Corp. |
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