CN106549001B - 具有再分布焊盘的半导体装置 - Google Patents

具有再分布焊盘的半导体装置 Download PDF

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CN106549001B
CN106549001B CN201610675009.1A CN201610675009A CN106549001B CN 106549001 B CN106549001 B CN 106549001B CN 201610675009 A CN201610675009 A CN 201610675009A CN 106549001 B CN106549001 B CN 106549001B
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pads
redistribution
pad
semiconductor device
electrical
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CN106549001A (zh
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朴明洵
郑显秀
金原永
张爱妮
李灿浩
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Abstract

公开了具有再分布焊盘的半导体装置。所述半导体装置包括设置在半导体基板上的多个电焊盘以及电连接到电焊盘和外部端子的多个再分布焊盘。所述多个再分布焊盘包括构成用于第一电信号的传输路径的多个第一再分布焊盘以及构成用于与第一电信号不同的第二电信号的传输路径的至少一个第二再分布焊盘。第一再分布焊盘布置在半导体基板上以形成至少两行，所述至少一个第二再分布焊盘设置在所述至少两行第一再分布焊盘之间。

Description

具有再分布焊盘的半导体装置
本专利申请要求于2015年9月17日在韩国知识产权局提交的第10-2015-0131832号韩国专利申请的优先权，所述韩国专利申请的全部内容通过引用包含于此。
技术领域
示例实施例涉及一种半导体装置，和/或涉及一种具有再分布焊盘的半导体装置。
背景技术
随着对于高性能高密度半导体装置的不断增长的需求，开发能够实现高的信号传输速度以及减小的图案尺寸的半导体装置或半导体封装件会是有利的。因为再分布技术可使得半导体装置具有减小的尺寸以及改善的电特性，所以该技术可被认为是有效的解决方案。
发明内容
发明构思的一些示例实施例提供了一种具有减小的尺寸的半导体装置。
发明构思的一些示例实施例提供了一种具有改善的电特性的半导体装置。
发明构思的一些示例实施例提供了一种更有效地布置再分布焊盘的半导体装置。
在发明构思的一些示例实施例中，具有再分布焊盘的半导体装置可包括至少两行输入/输出焊盘以及布置在所述两行输入/输出焊盘之间的电源/接地焊盘。
在发明构思的一些示例实施例中，在电焊盘和再分布焊盘之间的再分布结构可具有小的长度以允许半导体装置具有改善的电特性。
在发明构思的一些示例实施例中，焊盘可设置成具有允许在半导体装置的尺寸方面的减小以及允许有效供应电功率的改善的布置。
根据发明构思的一些示例实施例，一种半导体装置可包括设置在半导体基板上的多个电焊盘以及电连接到电焊盘和外部端子的多个再分布焊盘。所述多个再分布焊盘可包括构成用于第一电信号的传输路径的多个第一再分布焊盘以及构成用于与第一电信号不同的第二电信号的传输路径的至少一个第二再分布焊盘。所述多个第一再分布焊盘可布置在半导体基板上以形成至少两行，所述至少一个第二再分布焊盘可设置在半导体基板上并且在所述至少两行第一再分布焊盘之间。
根据发明构思的一些示例实施例，一种半导体装置可包括设置在半导体基板上的多个电焊盘以及电连接到所述多个电焊盘和外部端子的多个再分布焊盘。所述多个电焊盘可包括构成用于第一电信号的传输路径的多个第一电焊盘以及构成用于与第一电信号不同的第二电信号的传输路径的多个第二电焊盘。所述多个再分布焊盘可包括电连接到所述多个第一电焊盘的多个第一再分布焊盘以及电连接到所述多个第二电焊盘的多个第二再分布焊盘。第一再分布焊盘可布置成形成至少两行，第二再分布焊盘可设置在所述至少两行第一再分布焊盘之间。
根据发明构思的一些示例实施例，一种半导体装置可具有其上设置有多个输入/输出焊盘以及多个电源焊盘的表面。输入/输出焊盘可布置在半导体装置的所述表面上以形成平行于第一方向的第一行和第二行，电源焊盘可布置在半导体装置的所述表面上以形成可在第一行和第二行之间并且平行于第一方向的第三行。
附图说明
通过下面结合附图进行的简要描述，将更清楚地理解示例实施例。附图代表如这里所描述的非限制性的示例实施例。
图1A是示出根据发明构思的一些示例实施例的半导体装置的剖视图。
图1B是示出根据发明构思的一些示例实施例的设置在半导体装置中的电焊盘和再分布焊盘的平面图。
图1C和图1D是示出图1B的电焊盘和再分布焊盘的其他示例的平面图。
图1E是示出图1A的半导体装置的另一示例的剖视图。
图2A是示出根据发明构思的一些示例实施例的焊盘布置的平面图。
图2B是示出图2A的焊盘布置的另一示例的平面图。
图3是示出根据对比示例的半导体装置的焊盘布置的平面图。
图4A至图12A是示出根据发明构思的一些示例实施例的焊盘布置的平面图。
图4B至图12B是分别示出图4A至图12A的焊盘布置的其他示例的平面图。
具体实施方式
[半导体装置]
图1A是示出根据发明构思的一些示例实施例的半导体装置的剖视图。图1B是示出设置在根据发明构思的一些示例实施例的半导体装置中的电焊盘和再分布焊盘的平面图。图1C和图1D是示出图1B的电焊盘和再分布焊盘的其他示例的平面图。图1E是示出图1A的半导体装置的另一示例的剖视图。
参照图1A，半导体装置100可包括半导体基板110、保护层112、绝缘层114、再分布结构130和焊料掩模层118。半导体基板110可具有其上设置有一个或更多个电焊盘120的顶表面111a以及底表面111b。保护层112和绝缘层114可设置为覆盖(例如顺序地覆盖)半导体基板110的顶表面111a。再分布结构130可设置在绝缘层114上并且可电连接到电焊盘120。焊料掩模层118可设置为覆盖再分布结构130。半导体装置100可以以倒装芯片键合方式安装在例如印刷电路板(PCB)上，由此构成半导体封装件。
半导体基板110的顶表面111a可以是其上集成有电连接到电焊盘120的电路图案的有效表面，底表面111b可以是非有效表面。电路图案可包括存储器电路、逻辑电路和它们的组合中的至少一个。如下将描述的，电焊盘120可设置在半导体基板110的顶表面111a的中心区域或边缘区域上以形成一行或多行。
再分布结构130可包括再分布焊盘140，焊料掩模层118可包括选择性地暴露再分布焊盘140的开口117。开口117可用由导电材料形成或包括导电材料的外部端子150来填充。外部端子150可包括堆叠的(例如，顺序地堆叠的)金属柱150a和焊料150b以形成凸块。可选择地，外部端子150可以以焊球的形式来设置。半导体装置100还可包括设置为覆盖再分布结构130的绝缘层116。
电焊盘120可被可通过选择性地去除保护层112和绝缘层114而形成的开口125暴露。再分布结构130可包括填充开口125并且结合到电焊盘120的竖直图案130a以及从竖直图案130a水平地延伸的水平图案130b。水平图案130b可设置为具有线性的、弯曲的或弯折的形状。如上所述，水平图案130b的部分可用作外部端子150结合到其的再分布焊盘140。
电焊盘120可设置为具有等于或小于再分布焊盘140的尺寸或面积的尺寸或面积。例如，如在图1B中所示，在电焊盘120和再分布焊盘140在平面图中具有正方形形状的情况下，再分布焊盘140的每边的长度L2可以是电焊盘120的每边的长度L1的至少大约一倍或三倍。
可选择地，在如图1C中所示的电焊盘120和再分布焊盘140在平面图中具有基本上长方形形状的情况下，再分布焊盘140的短边的长度L2a可以是电焊盘120的短边的长度L1a的至少大约一倍至三倍。在如图1D中所示的电焊盘120和再分布焊盘140在平面图中具有圆形形状的情况下，再分布焊盘140的直径D2可以是电焊盘120的直径D1的至少大约一倍至三倍。电焊盘120和再分布焊盘140的形状不限于上面的基本上正方形、基本上长方形或基本上圆形的示例并且可以进行各种改变。
参照图1E，作为发明构思的另一示例，半导体装置100a可包括覆盖半导体基板110的顶表面111a的层间绝缘层190、至少穿过半导体基板110的穿过电极170、电连接到穿过电极170的再分布结构130以及覆盖再分布结构130的下保护层180。在示例实施例中，穿过电极170可电连接到电焊盘120，在其他示例实施例中，穿过电极170可竖直地延伸或者在与半导体基板110的顶表面111a基本上垂直的方向上延伸以穿透层间绝缘层190的至少部分。
半导体基板110的顶表面111a可以是其上集成有电连接到电焊盘120的电路图案的有效表面，底表面111b可以是其上设置有再分布结构130的非有效表面。电焊盘120可电连接到金属线195，此外，电焊盘120可电连接到结合到金属线195的外部端子197。下保护层180可包括开口187，再分布结构130的一部分可被开口187选择性地暴露而作为再分布焊盘140。外部端子150(例如，焊球)可结合到再分布焊盘140。绝缘层还可设置在半导体基板110的底表面111b与再分布结构130之间。
如将在下面描述的，可以有许多方式来布置半导体装置100的再分布焊盘140和电焊盘120。半导体装置100a的再分布焊盘140和电焊盘120可以以与将在下面描述的半导体装置100的焊盘布置相同或相似的方式来布置。
[电焊盘和再分布焊盘的布置]
图2A是示出根据发明构思的一些示例实施例的焊盘布置的平面图。图2B是示出图2A的焊盘布置的另一示例的平面图。图3是示出根据对比示例的半导体装置的焊盘布置的平面图。
参照图2A，半导体装置100可包括至少一个第一区110a和至少一个第二区110b。第一区110a可表示半导体基板110的其上设置有单元阵列的单元区，第二区110b可表示半导体基板110的其上设置有外围电路的外围区。
在一些示例实施例中，半导体装置100的中心区域可与在第一方向X上延伸的第二区110b对应，半导体装置100的剩余部分可与在第二方向Y上通过第二区域110b彼此分隔开的多个第一区110a对应。在示例实施例中，第一区110a可表示其上未设置有再分布焊盘140的区域，第二区110b可表示设置有再分布焊盘140的另一区域。
再分布焊盘140可设置在第二区110b上。换句话说，半导体装置100可具有中心焊盘结构。再分布焊盘140可包括向其施加用于操作半导体装置100的输入/输出信号的多个输入/输出焊盘142以及向其施加至少一个电源和接地信号的一个或更多个电源焊盘144。在示例实施例中，至少一个再分布焊盘140可设置在至少一个第一区110a上。
输入/输出焊盘142可布置成与第一方向X平行的至少两行。电源焊盘144可布置在第一方向X上并且可设置在所述至少两行输入/输出焊盘142之间。例如，电源焊盘144可布置成与第一方向X平行的单行。
例如，再分布焊盘140可布置在半导体装置100的中心区域上并且可布置成与第一方向X平行的至少三行。输入/输出焊盘142可布置成与第一方向X平行的两行，电源焊盘144可布置在所述两行输入/输出焊盘142之间并且可布置成与第一方向X平行的行。电源焊盘144和输入/输出焊盘142可沿第二方向对齐；例如，每个电源焊盘144或至少一个电源焊盘144可设置为具有与在第二方向Y上布置的一对输入/输出焊盘142的x坐标相同的x坐标。
在半导体装置100中，如图1A中所示，输入/输出焊盘142和电源焊盘144可设置在半导体基板110的顶表面111a(例如，有效表面)上。在半导体装置100a中，如图1E中所示，输入/输出焊盘142和电源焊盘144可设置在半导体基板110的底表面111b(例如，非有效表面)上。
在示例实施例中，如在图3中示出的对比示例中所示，再分布焊盘140可布置在半导体装置100的中心区域上并且可布置成与第一方向X平行的两行。至少一个电源焊盘144可设置在同一行上的输入/输出焊盘142之间。在这种情况下，被电源焊盘144和输入/输出焊盘142占有的区域的长度Sp可比在图2A和图2B中示出的半导体装置中的相应的长度长。
根据发明构思的一些示例实施例，如在图2A中所示，由于电源焊盘144设置在所述至少两行输入/输出焊盘142之间，因此半导体装置100可在第一方向X上具有减小的长度S。长度S的减小可使得能够减小半导体装置100的尺寸或面积。此外，由于如先前参照图1B至图1D所描述的，电焊盘120设置为具有比再分布焊盘140的尺寸小的尺寸，因此能够减小半导体装置100的尺寸。
返回参照图2A，电焊盘120可设置在半导体装置100的与第二区110b对应的区域中。例如，由于再分布焊盘140和电焊盘120设置在第二区110b上，因此能够减小在再分布焊盘140和电焊盘120之间的再分布结构130的长度。再分布结构130的长度上的减小可导致在其电阻或电感方面的减小，因此，可能够减小在半导体装置100的操作期间的噪声信号。电焊盘120可设置在输入/输出焊盘142和电源焊盘144之间以形成与第一方向X平行的至少一行。
参照图2B，半导体装置100还可包括电连接到电源焊盘144的至少一个辅助电源焊盘144a。作为示例，一对辅助电源焊盘144a可电连接到每个电源焊盘144或至少一个电源焊盘144。辅助电源焊盘144a可设置在例如第一区110a上。作为另一示例，辅助电源焊盘144a可设置在第二区上。辅助电源焊盘144a可布置为形成与第一方向X平行的至少一行。辅助电源焊盘144a和电源焊盘144也可设置为在第二方向Y上形成Z字形布置或交替构造。
电源焊盘144可电连接到所述至少一个辅助电源焊盘144a，由此用作具有基本上相同的电势的单个焊盘。通过经包括多个电源焊盘144和144a的单个焊盘结构来施加电源信号，可能够将电功率有效地供应到半导体装置100。
[电焊盘和再分布焊盘的布置]
图4A至图12A是示出根据发明构思的一些示例实施例的焊盘布置的平面图。图4B至图12B是分别示出图4A至图12A的焊盘布置的其他示例的平面图。为了简明的描述，先前参照图2A或图2B描述的元件可通过相似或相同的附图标记来标识并且不重复它们的重复描述。
参照图4A，半导体装置100还可包括至少一个虚设焊盘145。例如，一个或多个虚设焊盘145可设置为连同电源焊盘144一起形成至少一行。虚设焊盘145可设置为形成与第一方向X平行的至少一行，并且每个虚设焊盘145可设置在相应的一对电源焊盘144之间。如在图4B中所示，半导体装置100还可包括至少一个辅助电源焊盘144a。每个辅助电源焊盘144a可电连接到一个电源焊盘144。这可使得能够将电功率更有效地供应到半导体装置100。在发明构思的示例实施例中，半导体装置可被构造成包括所述至少一个虚设焊盘145。
参照图5A，电源焊盘144和输入/输出焊盘142可设置成在第二方向Y上形成Z字形布置或交替构造。如在图5B中所示，半导体装置100还可包括电连接到电源焊盘144的至少一个辅助电源焊盘144a。辅助电源焊盘144a可设置在第一区110a上。辅助电源焊盘144a和电源焊盘144可设置成形成与第二方向Y平行的至少一行。
参照图6A，电焊盘120可设置在第一区110a上。例如，电连接到电源焊盘144和输入/输出焊盘142的电焊盘120可设置在第一区110a上。如在图6B中所示，辅助电源焊盘144a连同电焊盘120一起可设置在第一区110a上。
参照图7A，一些电焊盘120可设置在第一区110a上，其他电焊盘120可设置在第二区110b上。作为示例，电连接到输入/输出焊盘142的第一电焊盘122可设置在第一区110a上，电连接到电源焊盘144的第二电焊盘124可设置在第二区110b上。如在图7B中所示，辅助电源焊盘144a可通过设置在第二区110b上的第二电焊盘124电连接到电源焊盘144。
参照图8A，电连接到输入/输出焊盘142的第一电焊盘122可设置在第二区110b上，电连接到电源焊盘144的第二电焊盘124可设置在第一区110a上。如在图8B中所示，辅助电源焊盘144a可通过设置在第一区110a上的第二电焊盘124电连接到电源焊盘144。
参照图9A，半导体装置100可包括占有半导体装置100的角的多个第一区110a以及将第一区110a彼此分离的第二区110b。例如，第二区110b可以是十字形区域。再分布焊盘140可设置在第二区110b上以形成与特定方向(例如，第一方向X)平行的至少三行。电焊盘120连同再分布焊盘140一起可设置在第二区110b上。如在图9B中所示，在设置有辅助电源焊盘144a的情况下，一些辅助电源焊盘144a可设置在第一区110a上，其他辅助电源焊盘144a可设置在第二区110b上。基本上所有的电焊盘120可设置在第二区110b上。可选择地，基本上所有的电焊盘120可如图6A中示出地设置在第一区110a上。在示例实施例中，如图7A或图8A中所示，一些电焊盘120可设置在第一区110a上，其他电焊盘120可设置在第二区110b上。
参照图10A，再分布焊盘140可设置在十字形的第二区110b上并且可设置在第一方向X和第二方向Y两者上，因此形成十字形的布置。如在图10B中所示，在还设置有辅助电源焊盘144a的情况下，辅助电源焊盘144a可设置在第一区110a上。基本上所有的电焊盘120可如图6A中示出地设置在第二区110b上，但在某些实施例中，如图7A或图8A中所示，一些电焊盘120可设置在第一区110a上，其他电焊盘120可设置在第二区110b上。
参照图11A，半导体装置100可包括占有了半导体装置100的部分区域的第一区110a以及占有了半导体装置100的剩余区域的第二区110b。例如，第二区110b可与半导体装置100的边相邻并且可在该边的延伸方向(例如，第一方向X)上延伸。再分布焊盘140可设置在第二区110b上并且可布置成形成与第一方向X平行的至少三行。如图11B中所示，在还设置有辅助电源焊盘144a的情况下，辅助电源焊盘144a可设置在第一区110a上。电焊盘120连同再分布焊盘140一起可设置在第二区110b上。在示例实施例中，基本上所有的电焊盘120可如图6A中示出地设置在第一区110a上。可选择地，如图7A或图8A中所示，一些电焊盘120可设置在第一区110a上，其他电焊盘120可设置在第二区110b上。
参照图12A，半导体装置100可包括占有半导体装置100的中心区域的第一区110a以及包围第一区110a的第二区110b。例如，第二区110b可以是基本上环形的区域，再分布焊盘140可设置在第二区110b上以形成基本上环形的布置。如图12B中所示，在还设置有辅助电源焊盘144a的情况下，辅助电源焊盘144a可设置在第一区110a上。基本上所有的电焊盘120可设置在第二区110b上。在示例实施例中，基本上所有的电焊盘120可如图6A中示出地设置在第一区110a上。可选择地，如图7A或图8A中所示，一些电焊盘120可设置在第一区110a上，其他电焊盘120可设置在第二区110b上。
根据发明构思的一些示例实施例，电源/接地焊盘布置在输入/输出焊盘的行之间，因此，可能够减小被焊盘占有的面积并且因此减小半导体装置的尺寸。因此，可能够减小电子产品的尺寸。此外，可能够减小电焊盘和再分布焊盘之间的再分布结构的布线长度，由此克服由布线长度的增加而可能导致的在半导体装置的电特性方面的劣化。
虽然已经具体示出并描述了发明构思的示例实施例，但是本领域普通技术人员将理解的是，在不脱离权利要求的精神和范围的情况下，可在这里作出形式和细节上的变化。

Claims (20)

1.一种半导体装置，所述半导体装置包括：
多个电焊盘，设置在半导体基板上；
多个再分布焊盘，电连接到电焊盘和外部端子，
其中，所述多个再分布焊盘包括：
多个第一再分布焊盘，形成用于第一电信号的第一传输路径；
至少一个第二再分布焊盘，形成用于与第一电信号不同的第二电信号的第二传输路径，
所述多个第一再分布焊盘布置在半导体基板上以形成至少两行，
所述至少一个第二再分布焊盘在所述至少两行第一再分布焊盘之间设置半导体基板上，
其中，所述多个第一再分布焊盘和所述至少一个第二再分布焊盘位于半导体基板的中心区域上。
2.如权利要求1所述的半导体装置，其中，半导体基板包括：
至少两个单元区，通过中心区域彼此分离，
其中，中心区域跨过半导体基板的中心延伸，
其中，第一再分布焊盘和第二再分布焊盘与中心区域的延伸方向平行地布置。
3.如权利要求2所述的半导体装置，其中，电焊盘设置在中心区域上。
4.如权利要求2所述的半导体装置，所述半导体装置还包括：
至少一个辅助焊盘，电连接到所述至少一个第二再分布焊盘。
5.如权利要求4所述的半导体装置，其中，所述至少一个辅助焊盘设置在单元区上。
6.如权利要求2所述的半导体装置，其中，电焊盘设置在单元区上。
7.如权利要求2所述的半导体装置，其中，至少一个电焊盘在单元区上，至少另一个电焊盘在中心区域上。
8.如权利要求1所述的半导体装置，其中，第一电信号包括输入/输出信号，第二电信号包括电源信号和接地信号中的至少一个。
9.如权利要求1所述的半导体装置，其中，半导体基板包括：
多个单元区，在半导体基板的角区域处；
其中，中心区域为十字形并且将单元区彼此分离，
其中，第一再分布焊盘和第二再分布焊盘布置在与第一方向平行的方向上。
10.如权利要求1所述的半导体装置，其中，半导体基板包括：
多个单元区，在半导体基板的角区域处；
其中，中心区域为十字形并且将单元区彼此分离，
其中，第一再分布焊盘和第二再分布焊盘沿两个正交方向布置在中心区域上且形成十字形布置。
11.如权利要求1所述的半导体装置，其中，所述多个再分布焊盘还包括在所述至少两行第一再分布焊盘之间设置在半导体基板上的至少一个虚设焊盘。
12.一种半导体装置，所述半导体装置包括：
多个电焊盘，设置在半导体基板上；
多个再分布焊盘，电连接到所述多个电焊盘和外部端子，
所述多个电焊盘包括：
多个第一电焊盘，形成用于第一电信号的第一传输路径；
多个第二电焊盘，形成用于第二电信号的第二传输路径，第二电信号与第一电信号不同，
所述多个再分布焊盘包括：
多个第一再分布焊盘，电连接到所述多个第一电焊盘；
多个第二再分布焊盘，电连接到所述多个第二电焊盘，
其中，第一再分布焊盘形成至少两行，
其中，一个或更多个第二再分布焊盘设置在所述至少两行第一再分布焊盘之间，
其中，所述多个第一再分布焊盘和所述多个第二再分布焊盘位于半导体基板的中心区域上。
13.如权利要求12所述的半导体装置，其中，第一再分布焊盘布置在第一方向上，
第二再分布焊盘沿第一方向布置。
14.如权利要求13所述的半导体装置，其中，第一电焊盘在半导体基板的中心区域上布置成与第一方向平行的至少两行，
第二电焊盘沿第一方向布置在半导体基板的中心区域上并且设置在第一电焊盘之间。
15.如权利要求12所述的半导体装置，其中，所述多个再分布焊盘还包括电连接到第二再分布焊盘的多个辅助焊盘。
16.如权利要求12所述的半导体装置，其中，所述多个再分布焊盘还包括电连接到第二再分布焊盘的多个辅助焊盘，
辅助焊盘形成用于第二电信号的第二传输路径。
17.一种半导体装置，所述半导体装置包括其上设置有多个输入/输出焊盘以及多个电源焊盘的表面，
其中，所述多个输入/输出焊盘以第一行和第二行位于半导体装置的所述表面上，第一行和第二行与第一方向平行，
其中，所述多个电源焊盘以在第一行和第二行之间并且平行于第一方向的第三行位于半导体装置的所述表面上，
其中，所述多个输入/输出焊盘和所述多个电源焊盘位于半导体装置的所述表面的中心区域上。
18.如权利要求17所述的半导体装置，所述半导体装置还包括电连接到至少一个电源焊盘的至少一个辅助电源焊盘，
其中，电源焊盘和所述至少一个辅助电源焊盘电连接以形成具有基本上相同的电势的单个焊盘。
19.如权利要求17所述的半导体装置，所述半导体装置还包括：
多个电焊盘，
其中，输入/输出焊盘和电源焊盘中的至少一些构造为电连接到电焊盘和外部端子的再分布焊盘。
20.如权利要求19所述的半导体装置，其中，所述多个输入/输出焊盘和所述多个电源焊盘中的至少一个具有基本上等于或大于所述多个电焊盘的尺寸的尺寸。
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