CN106256018A - 具有支撑构件的堆叠式半导体裸片组合件及相关的系统及方法 - Google Patents

具有支撑构件的堆叠式半导体裸片组合件及相关的系统及方法 Download PDF

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Publication number
CN106256018A
CN106256018A CN201580023622.9A CN201580023622A CN106256018A CN 106256018 A CN106256018 A CN 106256018A CN 201580023622 A CN201580023622 A CN 201580023622A CN 106256018 A CN106256018 A CN 106256018A
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die
attached
semiconductor die
package substrate
supporting member
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CN201580023622.9A
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黄宏远
倪胜锦
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Micron Technology Inc
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Micron Technology Inc
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Priority to CN202110508645.6A priority Critical patent/CN113257803A/zh
Publication of CN106256018A publication Critical patent/CN106256018A/zh
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Abstract

本文揭示具有支撑构件的堆叠式半导体裸片组合件及相关的系统与方法。在一个实施例中，半导体裸片组合件可包含封装衬底、附接到所述封装衬底的第一半导体裸片及也附接到所述封装衬底的多个支撑构件。所述多个支撑构件可包含安置于所述第一半导体裸片的相对侧处的第一支撑构件及第二支撑构件，且第二半导体裸片可耦合到所述支撑构件，使得所述第二半导体裸片的至少一部分在所述第一半导体裸片上方。

Description

具有支撑构件的堆叠式半导体裸片组合件及相关的系统及 方法
技术领域
所揭示的实施例涉及半导体裸片组合件及支撑此类组合件内的构件。在若干实施例中，本发明涉及可包含控制器裸片及承载于控制器裸片上方的存储器裸片的裸片组合件。
背景技术
封装式半导体裸片(其包含存储器芯片、微处理器芯片及成像器芯片)可包含安装到封装衬底上的半导体裸片。半导体裸片被围封于塑料保护盖中，且每一裸片包含功能特征件，例如存储器单元、处理器电路及成像器装置。裸片上的接合垫电连接在封装衬底上的功能特征件与端子之间，其允许裸片被连接到外部电路。
为增加封装内裸片的密度，裸片可在外壳内被堆叠于彼此之上。然而，垂直堆叠式裸片的一个挑战在于裸片可具有不同大小或占据面积。举例来说，在存储器封装中，存储器控制器裸片可具有小于封装内的存储器裸片的占据面积。存储器控制器裸片可更难线接合，这是因为其从存储器裸片偏移。此外，存储器裸片有时可在堆叠于更小的存储器控制器裸片上时倾斜。
附图说明
图1A是根据本发明的实施例配置的半导体裸片组合件的横截面视图，且图1B是图1A的组合件的俯视平面图，其中外壳及半导体裸片堆叠从组合件移除。
图2是根据本发明的实施例的已被割开以形成半导体裸片组合件的支撑构件的半导体晶片的俯视平面图。
图3A到3C是说明根据本发明的实施例的在各种制造阶段的图1A的半导体裸片组合件的横截面视图。
图4是根据本发明的另一实施例配置的半导体裸片组合件的横截面视图。
图5是根据本发明的另一实施例配置的半导体裸片组合件的俯视平面图。
图6A及6B是说明根据本发明的若干实施例配置的半导体裸片组合件的俯视平面图。
图7是包含根据本发明的实施例配置的半导体裸片组合件的系统的示意性视图。
具体实施方式
下文描述具有间隔件支撑构件的堆叠式半导体裸片组合件及相关的系统及方法的若干实施例的特定细节。术语“半导体裸片”大体上是指具有集成电路或组件、数据存储元件、处理组件及/或制造在半导体衬底上的其它特征件的裸片。举例来说，半导体裸片可包含集成电路存储器及/或逻辑电路。半导体裸片及/或半导体裸片封装中的其它特征件在两个结构可通过热量交换能量的情况下可被认为彼此“热接触”。相关领域的技术人员也将理解，技术可具有额外实施例，且可在无下文参考图1到7描述的实施例的若干细节的情况下实践所述技术。
如本文使用，鉴于图中展示的定向，术语“垂直”、“横向”、“上部”及“下部”可指代半导体裸片组合件中的特征件的相对方向或位置。举例来说，“上部”或“最上部”可指代比另一特征件更靠近页面的顶部定位的特征件。然而，这些术语应被广义地解释以包含具有其它定向(例如在其侧上翻转或倒转)的半导体装置。
图1A是根据本发明的实施例配置的半导体裸片组合件100(“组合件100”)的横截面视图。如展示，组合件100包含承载第一半导体裸片(或控制器裸片103)的封装衬底102，及在控制器裸片103的相对侧上的第一支撑构件130a及第二支撑构件130b(统称为“支撑构件130”)。支撑构件130承载在控制器裸片103上方以堆叠布置的第一及第二半导体裸片(或第一存储器裸片106a及第二存储器裸片106b(统称为“存储器裸片106”))。封装衬底102包含在第一存储器裸片106a的占据面积内(例如，在其正下方)的多个第一接合垫108a及在第一存储器裸片106a的占据面积外侧(例如，不在其正下方)的多个第二接合垫108b。第一接合垫108a由第一线接合111a耦合到控制器裸片103上的对应接合垫109a，且第二接合垫108b由第二线接合111b耦合到存储器裸片106中的每一者上的对应接合垫109b。封装衬底102可包含(例如)印刷电路板或具有电连接器104(示意性展示)(例如金属迹线、导通孔或其它适当连接器)的其它适当衬底。电连接器104可经由在封装衬底102的相对侧处的封装接触件113及互连件114(例如，凸块接合)将第一接合垫108a及/或第二接合垫108b耦合到外部电路(未展示)。在若干实施例中，电连接器104也可将个别第一接合垫108a与个别第二接合垫108b耦合，以将控制器裸片103与存储器裸片106相互电耦合。
组合件100进一步包含由囊封剂116构成的封装外壳115，囊封剂116至少部分囊封控制器裸片103、存储器裸片106及支撑构件130。在所说明的实施例中，囊封剂116还延伸到封装衬底102与第一存储器裸片106a之间的腔118中，以至少部分充填第一存储器裸片106a下方未由控制器裸片103及支撑构件占用的区。在一些实施例中，腔118中的囊封剂116的部分可强化支撑构件130且提供第一存储器裸片106a下方的进一步机械支撑。囊封剂116可包含(例如)热固材料、环氧树脂或提供机械支撑、与周围环境的屏蔽(例如，屏蔽湿度)及/或电隔离(例如，线接合之间)的其它适当化合物。
控制器裸片103及存储器裸片106各自可由半导体衬底(例如硅、绝缘体上硅、化合物半导体(例如，氮化镓)或其它适当衬底)形成。半导体衬底可经切割或单粒化为具有多种集成电路组件或功能特征件中的任一者的半导体裸片，例如动态随机存取存储器(DRAM)、静态随机存取存储器(SRAM)、快闪存储器、其它形式的集成电路装置(其包含存储器、处理电路、成像组件)及/或其它半导体装置。在选择的实施例中，组合件100可被配置为存储器，其中存储器裸片106提供数据存储(例如，NAND裸片)且控制器裸片103提供存储器控制(例如，NAND控制)。在一些实施例中，组合件100可包含除控制器裸片103及/或存储器裸片106中的一或多者外及/或替代其的其它半导体裸片。举例来说，替代两个存储器裸片，组合件100可包含两个以上存储器裸片(例如，四个裸片、八个裸片等等)或仅单个存储器裸片。此外，在各种实施例中，组合件100的裸片可具有不同大小。举例来说，在一些实施例中，存储器裸片106中的一者或两者可延伸超越一或多个侧处的支撑构件130。
如在图1A中进一步展示，控制器裸片103通过裸片附接材料140(例如，裸片附接薄膜)附接到封装衬底102。第一支撑构件130a通过裸片附接材料141a附接到封装衬底102，且第二支撑构件130b通过裸片附接材料141b附接到封装衬底102。存储器裸片106又通过裸片附接材料142附接到控制器裸片103及支撑构件130，且通过薄膜覆线材料143(“覆线材料142”)附接到彼此。在若干实施例中，可由相同或类似材料形成裸片附接材料140、141a到b及142。在一些实施例中，可由相同或类似材料140、141a到b及142形成覆线材料143，但覆线材料143可具有更大厚度来容纳存储器裸片106之间的第一线接合111a的线部分112。在选择的实施例中，裸片附接材料140、141a到b及142及覆线材料143各自可包含基于环氧树脂材料的层合薄膜。此类层合薄膜可包含(例如)裸片附接薄膜或切割裸片附接薄膜(被所属领域的技术人员分别称为“DAF”、“DDF”)。在一个实施例中，裸片附接材料及/或薄膜覆线材料各自可包含由中国上海的德国汉高公司(Henkel AG&Co.)提供的DAF或DDF(例如，Ablestick ATB-100、100U、100A、100U型号)。
在一些常规封装组合件中，控制器裸片可定位于封装衬底及存储器裸片堆叠之间。通常通过使用囊封剂囊封控制器裸片，且接着在囊封剂的表面上堆叠存储器裸片而形成此配置。然而，在此阶段囊封控制器裸片的一个挑战在于其使制造变得复杂。举例来说，囊封剂上的安装表面可能为不均匀的。当存储器裸片被堆叠于不均匀安装表面上时，其可倾侧或倾斜而达到裸片突出于保护外壳的外侧的程度。此外，裸片倾斜可使线接合更困难，这是因为线接合在组合件的相对侧处具有不同长度。另一常规制造技术涉及形成封装衬底中的腔，控制器裸片可被插入到所述腔中。此技术也可使制造变得复杂且增加成本，这是因为其需要封装衬底被研磨或蚀刻以形成腔。
根据本发明的若干实施例配置的裸片组合件的实施例可解决常规裸片组合件的这些及其它限制。举例来说，一个优点在于存储器裸片106的堆叠可被安装到支撑构件130而不必首先将控制器裸片103囊封于存储器裸片106下方。相关优点在于可消除用于囊封控制器裸片的高温模制及固化步骤，且因此减少热循环。因此，制造可为较不复杂，这是因为其可消除了若干制造步骤。另一优点在于支撑构件130可具有类似于存储器裸片106或与其相同的热膨胀系数(CTE)。举例来说，支撑构件130可由半导体材料(例如硅)形成。此CTE匹配在操作期间减小了封装内的热应力。又一优点在于存储器裸片106并不倾向于倾斜，这是因为支撑构件130可具有相同高度，且裸片附接材料140、141a到b及142可由具有均匀厚度的层合薄膜形成。
图1B是组合件100的俯视平面图，其中出于说明目的移除图1A中展示的外壳115及存储器裸片106。如展示，控制器裸片103定位于在封装衬底102上叠加的存储器裸片106堆叠(图1A)的周边或占据面积107(以虚线展示)内。第一支撑构件130a及第二支撑构件130b也被定位于占据面积107内，且分别沿控制器裸片103的第一侧105a及第二侧105b延伸。在若干实施例中，支撑构件130各自可包含由插入器衬底、印刷电路板、半导体晶片或裸片或另一适当支撑材料形成的细长构件。在下文更详细描述的一个实施例中，支撑构件130可为从半导体晶片或裸片(例如“坯料”硅晶片或裸片)割开(例如，切割或单粒化)的半导体材料块。
图2是根据本发明的实施例的已被割开以形成带有裸片附接材料141的支撑构件130的半导体晶片220的俯视平面图。在所说明的实施例中，通过首先使用裸片附接材料240(例如，裸片附接薄膜)覆盖半导体晶片220且接着沿多个切割线221同时切割晶片220及裸片附接材料240来形成支撑构件130。一旦完成切割，那么支撑构件130可接着经由由裸片附接材料240的相应部分形成的裸片附接材料141附接到封装衬底102(图1A)。在一个实施例中，可由坯料硅晶片形成支撑构件130。在另一实施例中，可由原本将丢弃的半导体晶片的部分形成支撑构件。举例来说，可由在裸片单粒化后剩余的半导体晶片220的边缘部分223形成支撑构件230。在额外或替代实施例中，不产出或不起作用的裸片也可被切割为多个件以形成个别间隔件构件。
图3A到3C是说明根据本发明的实施例在各种制造阶段的组合件100的横截面视图。首先参考图3A，控制器裸片103使用裸片附接材料140附接到封装衬底102，且第一支撑构件130a及第二支撑构件130b分别使用裸片附接材料141a到b附接到封装衬底。在一个实施例中，裸片附接材料140及141a到b中的一或多者可包含压力固化薄膜，其在被压缩(例如，在封装衬底102与支撑构件130中的每一者之间被压缩)超过阈值压力级别时，将材料粘合在一起。在另一实施例中，裸片附接材料140及141a到b中的一或多者可为UV固化薄膜，其通过暴露于UV辐射而固化。
图3B展示在封装衬底102的第一接合垫108a与控制器裸片103的对应接合垫109a之间形成第一线接合111a后的组合件100。如展示，支撑构件130可具有大于控制器裸片103的第二厚度t2的第一厚度t1。在若干实施例中，第一厚度t1及第二厚度t2可经选择，使得当第一存储器裸片106a被安装到支撑构件130时，第一线接合111a中的每一者的线部分312不与裸片附接材料142接触。在另一实施例中，厚度t1及t2可经选择，使得线部分312至少部分突起到裸片附接材料142中。在任一情况中，一旦形成第一线接合111a，那么第一存储器裸片106a可经由裸片附接材料142附接到支撑构件130。
图3C展示在封装衬底102的第二接合垫108b与第一存储器裸片106a的对应接合垫109b之间形成第二线接合111b后的组合件100。在形成第二线接合111b后，第二存储器裸片106b可使用覆线材料143附接到第一存储器裸片106a。一旦存储器裸片106被附接到彼此，那么处理可继续进行后续制造阶段。举例来说，处理可通过将第二存储器裸片106b线接合到封装衬底102且接着在裸片堆叠上方模制封装外壳115(图1A)而继续。在一些实施例中，一或多个额外存储器裸片306(以虚线展示)可被堆叠于第二存储器裸片106b上方，且被线接合到封装衬底102的第二接合垫108b。
图4是根据本发明的另一实施例配置的半导体裸片组合件400(“组合件400”)的横截面视图。组合件400可包含大体上类似于上文详细描述的组合件100的所述特征件的特征件。举例来说，组合件400包含控制器裸片103及通过裸片附接材料140及141a到b附接到封装衬底120的支撑构件130。在图4中展示的布置中，个别存储器裸片406经交错使得存储器裸片406的个别接合垫409沿存储器裸片406的堆叠的至少一个边缘暴露。在此实施例的一个方面中，线接合411可被接合到暴露的接合垫409，使得其不由薄膜覆线材料(例如，图1A的覆线材料143)覆盖。因而，可使用比薄膜覆线材料相对更薄的裸片附接材料440组装存储器裸片406。此外，存储器裸片406的堆叠可具有比与更厚薄膜覆线材料附接在一起的相同数量的存储器裸片的堆叠更小的高度。
图5是根据本发明的另一实施例配置的半导体裸片组合件500(“组合件500”)的俯视平面图。组合件500可包含大体上类似于上文详细描述的组合件的所述特征件的特征件。举例来说，组合件500包含被定位于存储器裸片106的占据面积107内的控制器裸片103(图1A)。在图5说明的实施例中，组合件500也可包含也在占据面积107内且经由接合垫508耦合到封装衬底102的电容器550。电容器550可包含(例如)单片(例如，陶瓷)、集成电路或其它适当电容器装置。在若干实施例中，电容器550可经配置以调节电力信号或促进通电。在其它实施例中，组合件500可包含额外或替代电路元件(例如，电感器、电阻器及/或二极管)及/或电路组件，例如至少部分在占据面积107内的另一半导体裸片。
图6A及6B是说明根据本发明的若干实施例分别配置的半导体裸片组合件600a及600b的俯视平面图。组合件600a及600b各自可包含大体上类似于上文详细描述的组合件的所述特征件的特征件。举例来说，半导体裸片组合件600a及600b各自可包含由支撑构件130形成的在封装衬底102与存储器裸片106(图1A)之间的腔118。
参考图6A，半导体裸片组合件600a包含在与支撑构件130中的每一者大体成横向的方向上延伸的第三支撑构件630(例如，细长构件)。在此实施例的一个方面中，第三支撑构件630可通过在第三支撑构件630的相对侧上的间隙G1与支撑构件130间隔开以促进囊封剂116流动到腔118中以形成外壳115(图1A)。参考图6B，半导体裸片组合件600b可包含定位于控制器裸片103的每一侧处的支撑构件635。类似于在图6A中展示的第三支撑构件630，支撑构件635通过间隙G2与支撑构件分离以促进囊封剂116流动到腔118中。
上文参考图1到6B描述的堆叠式半导体裸片组合件中的任一者可被并入到大量更大及/或更复杂系统中的任一者中，所述系统的代表性实例是在图7中示意性展示的系统790。系统790可包含半导体裸片组合件700、电源792、驱动器794、处理器796及/或其它子系统或组件798。半导体裸片组合件700可包含大体上类似于上文描述的堆叠式半导体裸片组合件的所述特征件的特征件。所得系统790可执行多种多样功能中的任一者，例如存储器存储、数据处理及/或其它适当功能。因此，代表性系统790可包含(但不限于)手持式装置(例如，移动电话、平板计算机、数字阅读器及数字音频播放器)、计算机及电器。系统790的组件可被容纳于单个单元中或被分布在多个互连的单元(例如，通过通信网路)中。系统790的组件也可包含远程装置及多种多样的计算机可读媒体中的任一者。
从前述内容将了解，在本文中已出于说明目的描述本发明的特定实施例，但可在不脱离本发明的情况下做出各种修改。此外，在特定实施例的上下文中描述的新技术的某些方面也可在其它实施例中组合或消除。此外，尽管与新技术的某些实施例相关的优点已在那些实施例的上下文中描述，但其它实施例也可展现此类优点，且并非所有实施例都一定需要展现此类优点来落入本发明的范围内。因此，本发明及相关技术可涵盖在本文中未清楚展示或描述的其它实施例。

Claims (37)

1.一种半导体裸片组合件，其包括：
封装衬底；
第一半导体裸片，其附接到所述封装衬底；
多个支撑构件，其附接到所述封装衬底，所述多个支撑构件包含安置于所述第一半导体裸片的相对侧上的第一支撑构件及第二支撑构件；及
第二半导体裸片，其耦合到所述多个支撑构件，使得所述第二半导体裸片的至少一部分在所述第一半导体裸片上方。
2.根据权利要求1所述的半导体裸片组合件，其中所述封装衬底进一步包含：
多个第一接合垫，其电耦合到所述第一半导体裸片，其中所述第一接合垫的至少一部分在所述第二半导体裸片正下方；及
多个第二接合垫，其电耦合到所述第二半导体裸片，其中所述第二接合垫延伸到所述第二半导体裸片外侧。
3.根据权利要求2所述的半导体裸片组合件，其进一步包括：
多个第一线接合，其将所述第一接合垫电耦合到所述第一半导体裸片的对应接合垫；及
多个第二线接合，其将所述第二接合垫电耦合到所述第二半导体裸片的对应接合垫。
4.根据权利要求1所述的半导体裸片组合件，其中所述多个支撑构件、所述第二半导体裸片及所述封装衬底一起界定所述第二半导体裸片下方的腔，且其中所述半导体裸片组合件进一步包括包含至少部分延伸到所述腔内的囊封剂的封装外壳。
5.根据权利要求1所述的半导体裸片组合件，其进一步包括将所述第一半导体裸片附接到所述封装衬底的裸片附接薄膜。
6.根据权利要求5所述的半导体裸片组合件，其进一步包括将所述支撑构件中的每一者附接到所述封装衬底的单独裸片附接薄膜。
7.根据权利要求1所述的半导体裸片组合件，其进一步包括裸片附接薄膜，所述裸片附接薄膜将所述支撑构件中的每一者附接到所述第二半导体裸片，而不将所述第一半导体裸片附接到所述第二半导体裸片。
8.一种半导体裸片组合件，其包括：
封装衬底；
存储器裸片；
多个支撑构件，其附接到所述封装衬底及所述存储器裸片，其中所述存储器裸片与所述封装衬底间隔开；及
控制器裸片，其在所述封装衬底上，其中所述控制器裸片在所述封装衬底与所述存储器裸片之间。
9.根据权利要求8所述的半导体裸片组合件，其进一步包括将所述支撑构件中的每一者附接到所述存储器裸片的裸片附接薄膜。
10.根据权利要求9所述的半导体裸片组合件，其中所述控制器裸片与所述裸片附接薄膜间隔开。
11.根据权利要求8所述的半导体裸片组合件，其中所述多个支撑构件包含在所述控制器裸片的相对侧处且与彼此平行的第一及第二细长构件。
12.根据权利要求11所述的半导体裸片组合件，其中所述第一及第二细长构件各自包含硅。
13.根据权利要求11所述的半导体裸片组合件，其进一步包括在第一及第二细长构件之间横向延伸的第三细长构件。
14.根据权利要求8所述的半导体裸片组合件，进一步包括：
第一裸片附接材料，其将所述控制器裸片附接到所述封装衬底；
第二裸片附接材料，其将所述第一细长构件附接到所述封装衬底；
第三裸片附接材料，其将所述第二细长构件附接到所述封装衬底；及
第四裸片附接材料，其将所述第一及第二细长构件两者附接到所述存储器裸片。
15.根据权利要求14所述的半导体裸片组合件，其中所述第一、第二、第三及第四裸片附接材料各自包含裸片附接薄膜。
16.根据权利要求8所述的半导体裸片组合件，其中所述存储器裸片是第一存储器裸片，且其中所述半导体裸片组合件进一步包含堆叠于所述第一存储器裸片上的第二存储器裸片。
17.根据权利要求16所述的半导体裸片组合件，其中：
所述第一存储器裸片包含多个接合垫；且
所述第二存储器裸片相对于所述第一存储器裸片交错，使得所述接合垫暴露于所述第一存储器裸片的至少一个侧上。
18.根据权利要求8所述的半导体裸片组合件，其进一步包括定位于所述存储器裸片下方且至少部分在所述存储器裸片的占据面积内的电路组件，其中所述电路组件在所述封装衬底上与所述控制器裸片分离。
19.根据权利要求18所述的半导体裸片组合件，其中所述电路组件是电容器。
20.一种制造半导体裸片组合件的方法，所述方法包括：
将第一半导体裸片附接到封装衬底；
将第一支撑构件及第二支撑构件定位于所述第一半导体裸片的不同侧上；及
将第二半导体裸片附接到所述第一及第二支撑构件，使得所述第一及第二支撑构件将所述第二半导体裸片承载于所述第一半导体裸片上方。
21.根据权利要求20所述的方法，其进一步包括：
将所述封装衬底的第一接合垫线接合到所述第一半导体裸片的对应接合垫；及
将所述封装衬底的第二接合垫线接合到所述第二半导体裸片的对应接合垫，
其中所述第一接合垫在所述第一半导体裸片的占据面积内。
22.根据权利要求20所述的方法，其中所述第一及第二支撑构件、所述第二半导体裸片及所述封装衬底一起界定所述第二半导体裸片下方的腔，且其中所述方法进一步包含将囊封剂流动到所述腔中。
23.根据权利要求20所述的方法，其中将所述第一半导体裸片附接到所述封装衬底包含使用裸片附接薄膜将所述第一半导体裸片附接到所述封装衬底。
24.根据权利要求20所述的方法，其中形成所述第一支撑构件及所述第二支撑构件包含：
使用第一裸片附接薄膜将所述第一支撑构件附接到所述封装衬底；及
使用第二裸片附接薄膜将所述第二支撑构件附接到所述封装衬底。
25.根据权利要求20所述的方法，其中将所述第二半导体裸片附接到所述第一及第二支撑构件包含将裸片附接薄膜附接到所述第二半导体裸片及所述第一及第二支撑构件中的每一者，而不将所述裸片附接薄膜附接到所述第一半导体裸片。
26.根据权利要求25所述的方法，其进一步包括形成将所述第一半导体裸片与所述封装衬底电耦合的线接合，其中所述线接合的部分突出到所述裸片附接薄膜中。
27.根据权利要求20所述的方法，其中形成所述第一支撑构件及所述第二支撑构件包含：
使用裸片附接材料覆盖半导体晶片；
切割所述半导体晶片以形成细长半导体构件，其各自具有附接到其的所述裸片附接材料的部分；及
经由附接到所述细长半导体构件中的每一者的所述裸片附接材料的所述部分，将所述细长半导体构件附接到所述封装衬底。
28.一种制造半导体裸片组合件的方法，所述方法包括：
将多个支撑构件附接到封装衬底；
将控制器裸片附接到所述封装衬底的部分，其中所述封装衬底的所述部分在由所述衬底上的所述多个支撑构件界定的周边内；及
将存储器裸片安装到所述多个支撑构件。
29.根据权利要求28所述的方法，其中：
将所述多个支撑构件附接到所述封装衬底包含使用第一裸片附接材料将第一支撑构件附接到所述封装衬底，及使用第二裸片附接材料将第二支撑构件附接到所述封装衬底；
将所述控制器裸片附接到所述封装衬底的所述部分包含使用第三裸片附接材料将所述控制器裸片附接到所述封装衬底的所述部分；及
将所述存储器裸片安装到所述多个支撑构件包含使用第四裸片附接材料将所述存储器裸片附接到所述第一及第二支撑构件两者。
30.根据权利要求29所述的方法，其中所述第一、第二、第三及第四裸片附接材料各自包含裸片附接薄膜。
31.根据权利要求29所述的方法，其中所述第一、第二、第三及第四裸片附接材料各自包含压力固化裸片附接薄膜。
32.根据权利要求28所述的方法，其进一步包括在所述存储器裸片下方形成线接合，以将所述控制器裸片电耦合到所述封装衬底。
33.根据权利要求32所述的方法，其中将所述存储器裸片安装到所述多个支撑构件包含形成与所述线接合而非与所述控制器裸片接触的裸片附接薄膜。
34.根据权利要求28所述的方法，其中所述存储器裸片是第一存储器裸片，且其中所述方法进一步包括将第二存储器裸片堆叠于所述第一存储器裸片的顶部上。
35.根据权利要求34所述的方法，其中将所述第二存储器裸片堆叠于所述第一存储器裸片的顶部上包含堆叠所述第二存储器裸片，使得所述第二存储器裸片相对于所述第一存储器裸片交错。
36.根据权利要求28所述的方法，其进一步包括将电路组件附接到至少部分在由所述衬底上的所述多个支撑构件界定的所述周边内的所述封装衬底的一部分。
37.根据权利要求28所述的方法，其中所述电路组件包含电容器。
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