CN112563213B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN112563213B
CN112563213B CN202010123291.9A CN202010123291A CN112563213B CN 112563213 B CN112563213 B CN 112563213B CN 202010123291 A CN202010123291 A CN 202010123291A CN 112563213 B CN112563213 B CN 112563213B
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substrate
resin
semiconductor chip
chips
semiconductor
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CN112563213A (zh
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仓田稔
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Kioxia Corp
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Kioxia Corp
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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

实施方式提供一种不易形成因树脂填充不足所导致的间隙的半导体装置及其制造方法。实施方式的半导体装置具有：衬底；第1半导体芯片，搭载在所述衬底面上，与所述衬底电连接；多个间隔件，在所述衬底面上，于所述第1半导体芯片的周围隔着空隙相互隔开，且隔着第1非导电性材设置；第2半导体芯片，隔着所述多个间隔件从所述第1半导体芯片相对于所述衬底面朝上方向隔开设置，且与所述衬底电连接；以及突出部，在所述空隙之一部分具有从所述衬底面上朝上方向突出的形状。

Description

半导体装置及其制造方法
[相关申请]
本申请享有以日本专利申请2019-164909号(申请日：2019年9月10日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及一种半导体装置及其制造方法。
背景技术
将半导体芯片安装在衬底上之后，利用树脂将半导体芯片的周围模塑。如果因树脂填充不足而导致半导体封装体内存在间隙，那么有产生半导体封装体出现龟裂等不良之虞。
发明内容
实施方式提供一种不易形成因树脂填充不足所导致的间隙的半导体装置及其制造方法。
实施方式的半导体装置具有：衬底；第1半导体芯片，搭载在所述衬底面上，与所述衬底电连接；多个间隔件，在所述衬底面上，于所述第1半导体芯片的周围隔着空隙相互隔开，且隔着第1非导电性材设置；第2半导体芯片，隔着所述多个间隔件从所述第1半导体芯片相对于所述衬底面朝上方向隔开设置，且与所述衬底电连接；以及突出部，在所述空隙之一部分具有从所述衬底面上朝上方向突出的形状。
附图说明
图1是实施方式的半导体装置的俯视图。
图2是实施方式的半导体装置的组装图。
图3是实施方式的半导体装置的前视图。
图4是表示实施方式的将搭载着多个半导体芯片的衬底浸渍在液体树脂中时的树脂的浸入方向的图。
图5是表示实施方式的树脂的流向的图。
图6是用来说明实施方式的树脂从各箭头方向浸入时的前端面的移动状态的图。
图7是用来说明实施方式的树脂的各前端面的合流点的位置的图。
图8是用来说明实施方式的树脂的各前端面的合流点的位置的图。
图9是用来说明实施方式的树脂的各前端面的合流点的位置的图。
图10是用来说明实施方式的树脂的各前端面的合流点的位置的图。
图11是实施方式的变化例的由阻焊剂构成树脂阻力部的衬底的立体图。
图12是实施方式的变化例的由灌封树脂构成树脂阻力部的衬底的立体图。
具体实施方式
以下，参照附图说明实施方式。此外，附图是示意性的图，应注意各部件的厚度与宽度的关系、各个部件的厚度的比率等与实际情况不同，当然，附图相互之间也包含彼此的尺寸关系或比率不同的部分。
(构成)
图1是本实施方式的半导体装置的俯视图。图2是半导体装置的组装图。图3是半导体装置的前视图。本实施方式的半导体装置1是在树脂内将多个半导体芯片堆积在衬底上，且具有与内部的各半导体芯片电连接的外部端子群的半导体封装体。
半导体装置1的衬底11是上表面11a具有长方形形状的BGA(Ball Grid Array，球栅阵列)封装体衬底。此处，衬底11为玻璃环氧化物制的插入物。衬底11经由衬底下表面11b的多个焊球11c而连接于未图示的电路衬底上的多个电极。
为了将各半导体芯片装入较薄的半导体封装体内，而对形成着半导体电路的半导体晶圆的背面进行研削。在经研削而变薄的半导体晶圆背面，贴附用来粘附在衬底11上的DAF(Die Attachment Film，晶粒附接膜)，半导体晶圆与作为粘附剂的DAF一起被切割，而以半导体芯片为单位被分割。
半导体芯片12被加热，通过DAF而固定在衬底11的上表面11a。在衬底11上堆积多个半导体芯片，但半导体芯片12配置在最下段，在该半导体芯片12的上方载置较大的半导体芯片。
将半导体封装体用于手机等时，封装体尺寸受到限制，尤其需要抑制高度。通常，在堆积多个半导体芯片的情况下，将较大的芯片搭载在下段且将较小的芯片搭载在上段的情况较多。然而，在插入物的配线等受到限制，或像NAND(Not AND，与非)存储器的控制器芯片那样芯片尺寸较小但接合线数量较多，在3个方向或4个方向的芯片的边上进行引线接合的情况下，将较小的半导体芯片搭载在最下段，将较大的存储器芯片设置在上段。
如图1所示，半导体芯片12的上表面12a的多个焊垫通过金等的引线接合，而经由多条接合线12b与设置在衬底11上表面的多个电极连接。如上所述，半导体芯片12搭载在衬底11上，且通过多条接合线12b与衬底11电连接。
为了在最下段的半导体芯片12的上方确保指定间隙，而将多个间隔部件设置在衬底11上。将作为间隔件的4个间隔芯片13A、13B、13C、13D搭载在设置着多条接合线12b的半导体芯片12周围的衬底11的上表面11a。以下，指全部4个或任意1个以上的间隔芯片时，称为间隔芯片13。此处，4个间隔芯片13是硅晶圆片，为相同尺寸，且具有相同的长方体形状。
如图1所示，将半导体芯片12配置在长方形衬底11的中央部，4个间隔芯片13配置在衬底11的4个角。间隔芯片13A与13B沿着衬底11的长边轴方向D1配置，间隔芯片13C与13D也沿着衬底11的长边轴方向D1配置。另外，间隔芯片13A与13C沿着衬底11的短边轴方向D2配置，间隔芯片13B与13D也沿着衬底11的短边轴方向D2配置。各间隔芯片13通过DAF等粘附剂而粘附并固定在衬底11上。
如图3所示，衬底11的上表面11a至半导体芯片12的上表面12a的高度h1低于各间隔芯片13的高度h2。
在间隔芯片13A与13C上，搭载着半导体芯片14A。同样地，在间隔芯片13B与13D上，搭载着半导体芯片14B。如图1所示，半导体芯片14A与14B具有长方形形状。半导体芯片14A与14B通过DAF等粘附剂而粘附并固定在间隔芯片13A、13C与13B、13D上。
以半导体芯片14A的长边轴与衬底11的短边轴方向D2平行的方式，半导体芯片14A沿着衬底11的短边轴方向D2搭载在间隔芯片13A与13C上。同样地，以半导体芯片14B的长边轴与衬底11的短边轴方向D2平行的方式，半导体芯片14B沿着衬底11的短边轴方向D2搭载在间隔芯片13B与13D上。以各半导体芯片14A、14B的长边轴方向两端部的下表面由2个间隔芯片13的上表面支撑的方式，各半导体芯片14A、14B载置在2个间隔芯片13上，并通过粘附剂被固定。
此外，如上所述，半导体芯片12的高度h1低于各间隔芯片13的高度h2，所以各半导体芯片14A、14B的下表面未与半导体芯片12及多条接合线12b接触。换句话说，在各半导体芯片14A、14B的下表面与半导体芯片12的上表面12a之间形成有间隙。如上所述，多个间隔芯片13搭载在衬底11上的半导体芯片12的周围，半导体芯片14A、14B隔着设置在衬底11上的多个间隔芯片13与半导体芯片12隔开设置。
进而，在半导体芯片14A、14B上搭载着半导体芯片15。如图1所示，半导体芯片15具有长方形形状。此处，半导体芯片15在半导体芯片14A、14B的长边轴方向(衬底11的短边轴方向D2)上偏向一侧(图1的下侧)而配置。
以半导体芯片15的长边轴与衬底11的长边轴方向D1平行的方式，半导体芯片15沿着衬底11的长边轴方向D1搭载在半导体芯片14A与14B上。半导体芯片15通过DAF等粘附剂而粘附并固定在半导体芯片14A与14B上。半导体芯片15以其长边轴方向的两端下表面由2个半导体芯片14的上表面支撑的方式载置在2个半导体芯片14上，且通过粘附剂被固定。如上所述，半导体芯片15设置在多个(此处为2个)半导体芯片14A、14B上。
半导体芯片14A、14B分别经由多条接合线14a、14b而连接于设置在衬底11的上表面11a上的多个电极。多条接合线14a、14b在各半导体芯片14A、14B的一缘部(图1的上侧部分)，与设置在衬底11的上表面11a的多个电极连接。
半导体芯片15经由多条接合线15a而连接于设置在衬底11上的多个电极。多条接合线15a在半导体芯片15的一缘部(图1的下侧部分)，与设置在衬底11的上表面11a的多个电极连接。
进而，在间隔芯片13A与13C之间的衬底11上，形成有树脂阻力部21。树脂阻力部21是对树脂填充时的树脂的流动产生阻力，使树脂的流速减慢的部分。如图2所示，树脂阻力部21由多条接合线21a形成。如图2所示，各接合线21a具有圆弧形状。
具体来说，各接合线21a通过引线接合机而沿长边轴方向D1将上表面11a上的2点间连结，且各接合线21a形成为其中央部从上表面11a隔开的圆弧形状。各接合线21a的中央部的高度低于所述间隔芯片13的高度h12。另外，多条接合线21a沿着短边轴方向D2以指定间隔形成在间隔芯片13A的侧面13Ab与间隔芯片13C的侧面13Cb之间。如上所述，树脂阻力部21构成突出部，所述突出部以从衬底11上突出的方式设置在多个间隔芯片13中的相邻的2个间隔芯片13间(对应于空隙)。该突出部包含多条接合线21a。
如上所述，将半导体芯片12搭载在衬底11上，且在衬底11上形成树脂阻力部21之后，搭载多个半导体芯片14A等。之后，利用树脂将多个半导体芯片12、14、15及多个间隔芯片13的周围模塑。如图3所示，衬底11上的多个半导体芯片的周围由树脂16填充。
树脂的填充是通过在抽真空的状态下浸渍在具有指定的凹部形状的模具中已溶解的液体状树脂中而进行。溶解的树脂覆盖多个半导体芯片12等而硬化。
如图1及图3所示的堆积着多个半导体芯片12等的衬底11以多个半导体芯片12等相对于衬底11成为重力方向下方的方式浸渍在液体树脂中。图4是表示将搭载着多个半导体芯片的衬底11浸渍在液体树脂中时的树脂的浸入方向的图。
箭头A1表示间隔芯片13A与13B之间的树脂的浸入方向。箭头A2表示间隔芯片13C与13D之间的浸入方向。箭头A3表示间隔芯片13A与13C之间的浸入方向。箭头A4表示间隔芯片13B与13D之间的浸入方向。来自箭头A1方向的树脂通过间隔芯片13A的侧面13Aa与间隔芯片13B的侧面13Ba之间的开口OP1向半导体芯片12侧流入。此外，来自箭头A1方向的树脂也从半导体芯片14A与14B间的间隙浸入。
来自箭头A2方向的树脂从形成在间隔芯片13C的侧面13Ca与间隔芯片13D的侧面13Da侧的开口OP2流入。来自箭头A2方向的树脂通过由衬底11的上表面11a、半导体芯片15的下表面15b、半导体芯片14A、14B的侧面14Aa、14Ba、及间隔芯片13C、13D的侧面13Ca、13Da包围所形成的隧道状间隙而朝向半导体芯片12浸入。
来自箭头A3方向的树脂从形成在间隔芯片13C的侧面13Ab与间隔芯片13C的侧面13Cb侧的开口OP3流入。来自箭头A3方向的树脂通过由衬底11的上表面11a、半导体芯片14A的下表面14Ab、间隔芯片13A的侧面13Ab、及间隔芯片13C的侧面13Cb包围所形成的隧道状间隙而朝向半导体芯片12浸入。
来自箭头A4方向的树脂从形成在间隔芯片13B的侧面13Bb与间隔芯片13D的侧面13Db侧的开口OP4流入。来自箭头A4方向的树脂通过由衬底11的上表面11a、半导体芯片14B的下表面14Bb、间隔芯片13B的侧面13Bb、及间隔芯片13D的侧面13Db包围所形成的隧道状间隙而朝向半导体芯片12浸入。也就是说，在半导体芯片12的周围形成着多个隧道状间隙，树脂通过多个隧道状间隙而朝向半导体芯片12浸入。
此外，将如图3所示的堆积着多个半导体芯片12、14、15的半导体芯片部分在一片较大的衬底11上设置多个，且将该较大的衬底11以半导体芯片部分侧在重力方向上成为下方的方式浸渍在液体树脂中。
在树脂硬化之后，将多个焊球置于衬底11的下表面11b的指定的多个位置的状态下，通过对衬底11进行加热而使多个焊球11c附着在衬底11上。之后，通过切割以半导体芯片部分为单位切下，由此形成如图3所示的1个半导体装置、也就是1个半导体封装体。
本实施方式中，如上所述，在所堆积的多个芯片部的最下段配置着较小的半导体芯片12，在该半导体芯片12上隔开间隙而配置着较大的半导体芯片14A、14B、15。
另外，多条接合线12b并非均等地设置在半导体芯片12周围。
(作用)
关于最下段的半导体芯片12，树脂通过其周围的多个隧道状间隙，由此利用树脂将其模塑，但树脂必须将半导体芯片12周围及所有接合线12b周围无间隙地模塑。
此外，如图1所示，在间隔芯片13A与13B之间的空间上不存在部件。由此，双点划线的细长椭圆表示树脂流入的开口OP1、OP2、OP3、OP4，但在开口OP1，树脂也从半导体芯片14A与14B之间的空间流入。
接下来，对树脂的流向进行说明。图5是表示树脂流向的图。此外，以下说明的图5与图6表示将设置在半导体芯片12周围的多条接合线12b相对于半导体芯片12的长边轴及端手轴对称且均等地设置的示例。
来自箭头A1方向的树脂碰到半导体芯片12的侧面，之后分为2个方向。2个方向是沿着以虚线所示的流向fl1与fl2的2个方向。流向fl1是来自箭头A1方向的树脂中朝向间隔芯片13A的侧面13Ab与间隔芯片13C的侧面13Cb之间的树脂的流向。流向fl2是来自箭头A1方向的树脂中朝向间隔芯片13B的侧面13Bb与间隔芯片13D的侧面13Db之间的树脂的流向。
来自箭头A2方向的树脂碰到半导体芯片12的侧面，之后分为2个方向。2个方向是沿着以虚线所示的流向fl3与fl4的2个方向。流向fl3是来自箭头A2方向的树脂中朝向间隔芯片13A的侧面13Ab与间隔芯片13C的侧面13Cb之间的树脂的流向。流向fl4是来自箭头A2方向的树脂中朝向间隔芯片13B的侧面13Bb与间隔芯片13D的侧面13Db之间的树脂的流向。
以虚线所示的流向fl5表示从箭头A3方向朝向半导体芯片12的树脂的流向。以虚线所示的流向fl6表示从箭头A4方向朝向半导体芯片12的树脂的流向。
此外，因为在半导体芯片12的上表面12a与半导体芯片14A、14B的2个下表面之间具有间隙，所以来自各箭头方向的树脂也浸入到半导体芯片12的上表面12a与半导体芯片14A、14B的2个下表面14Ab、14Bb之间的间隙。
图6是用来说明树脂从各箭头方向浸入时的前端面的移动状态的图。图6中，双点划线表示树脂从各箭头方向浸入时的树脂前端面。
树脂从箭头A1方向通过间隔芯片13A的侧面13Aa与间隔芯片13B的侧面13Ba间的空间之后，通过半导体芯片12与间隔芯片13A的侧面13Ab间的空间。如图6所示，沿着流向fl1的树脂的前端面fs1朝与箭头A3方向相反的方向移动。同样地，树脂从箭头A2方向通过间隔芯片13C的侧面13Ca与间隔芯片13D的侧面13Da间的空间之后，通过半导体芯片12与间隔芯片13C的侧面13Cb间的空间。如图6所示，沿着流向fl3的树脂的前端面fs3朝与箭头A3方向相反的方向移动。树脂的前端面fs5从箭头A3方向沿着流向fl5移动。
图6所示的沿着流向fl2的树脂的前端面fs2、沿着流向fl4的树脂的前端面fs4及沿着流向fl6的树脂的前端面fs6也如图6所示分别像所述前端面fs1、fs3及fs5那样移动。
各前端面最后在合流点相互接触，结果为，在半导体装置1内，由树脂将半导体芯片12完全模塑。
然而，流向fl5、fl6比流向fl1、fl2、fl3、fl4快，所以前端面fs1、fs3及fs5的合流点及前端面fs2、fs4及fs6的合流点有时会接近半导体芯片12的侧面。
图7至图10是用来说明树脂的各前端面的合流点的位置的图。图7与图8是用来说明将多条接合线12b如图1、图2及图4所示那样不均等地配置在半导体芯片12周围的情况下的合流点的位置的示例的图。在图7及图8中，半导体芯片12的箭头A4侧的接合线12b的数量少于半导体芯片12的箭头A3侧的接合线12b的数量。
图9与图10是用来说明将多条接合线12b如图5及图6所示那样均等地配置在半导体芯片12周围的情况下的合流点的位置的示例的图。各合流点是基于树脂浸入的隧道状间隙长度等，根据实验、模拟等而预测的。
图7中，树脂阻力部21未设置在衬底11上。图7中，所预测的前端面fs1、fs3及fs5的合流点P1及所预测的前端面fs2、fs4及fs6的合流点P2以X记号表示。然而，在实际尝试制造时，存在如下情况：树脂因半导体芯片12的多条接合线12b的影响，合流点成为以圆记号表示的RP1的位置而非P1的位置。该情况下，树脂的移动受到多条接合线12b阻碍，而有在合流点RP1附近形成微小间隙之虞。
这是因为，半导体芯片12的长边轴方向一侧(图7的左侧)的接合线12b的数量多于半导体芯片12的长边轴方向另一侧(图7的右侧)的接合线12b的数量。因此，在半导体芯片12的长边轴方向一侧(图7的左侧)的接合线12b附近，合流点RP1移动，在该合流点RP1附近容易形成微小间隙。
另一方面，半导体芯片12的长边轴方向另一侧(图7的右侧)的接合线12b的数量少于半导体芯片12的长边轴方向一侧(图7的左侧)的接合线12b的数量。因此，较多的半导体芯片12的长边轴方向另一侧(图7的右侧)的接合线12b附近并未成为前端面fs2、fs4及fs65的合流点，而是从接合线12b隔开的部位成为合流点P2。因此，在该合流点P2不易形成微小间隙。
因此，图8中，如图1至图4所示，在衬底11上设置着树脂阻力部21。树脂阻力部21相对于合流点RP1设置在开口OP3侧。树脂阻力部21使来自箭头A3方向的树脂所流入的隧道状间隙的尺寸减小。图8中，所预测的前端面fs1、fs3及fs5的合流点QP1以三角记号表示。树脂阻力部21使来自开口OP3的树脂的流动减慢，交流点RP1从半导体芯片12的侧面向衬底11的外周缘侧移动。由此，图8的情况与图7相比，前端面fs1、fs3及fs5的合流点从RP1向QP1移动。因此，在该合流点QP1不易形成微小间隙。
也就是说，当模塑时，通过使来自箭头A3方向的树脂所流入的隧道状间隙的尺寸减小，从而来自箭头A3方向的树脂的流入速度与来自箭头A4方向的树脂的流入速度一致。结果为，合流点从RP1移动到QP1，不易形成微小间隙。
图9的情况下，树脂阻力部21未设置在衬底11上。图9中，所预测的前端面fs1、fs3及fs5的合流点P1及所预测的前端面fs2、fs4及fs6的合流点P2以X记号表示。然而，在实际尝试制造时，存在如下情况：树脂因半导体芯片12的多条接合线12b的影响，第1合流点成为以圆记号表示的RP1的位置而非P1的位置，第2合流点成为以圆记号表示的RP2的位置而非P2的位置。该情况下，树脂的流动受到多条接合线12b阻碍，而有在合流点RP1及RP2附近形成微小间隙之虞。
图9与图10中，半导体芯片12的长边轴方向一侧(图7的左侧)的接合线12b的数量与半导体芯片12的长边轴方向另一侧(图7的右侧)的接合线12b的数量相等。因此，如图9所示，在半导体芯片12的长边轴方向两侧(图7的左侧与右侧)的接合线12b附近，合流点RP1、RP2移动，在该合流点RP1、RP2附近容易形成微小间隙。
因此，图10中，将2个树脂阻力部21设置在衬底11上。树脂阻力部21相对于合流点RP1设置在开口OP3侧，相对于合流点RP2设置在开口OP4侧。图10的情况下，所预测的前端面fs1、fs3及fs5的合流点QP1、及所预测的前端面fs2、fs4及fs6的合流点QP2以三角记号表示。2个树脂阻力部21使来自开口OP3与OP4的树脂的流动减慢，交流点RP1、RP2从半导体芯片12的侧面向衬底11的外周缘侧移动。由此，在图10的情况下，与图9相比，前端面fs1、fs3及fs5的合流点从RP1向QP1移动，前端面fs2、fs4及fs6的合流点从RP2向QP2移动。因此，在该合流点QP1与QP2不易形成微小间隙。
也就是说，当模塑时，通过使来自箭头A3方向及箭头A4方向的树脂所流入的2个隧道状间隙的尺寸减小，而降低来自箭头A3方向及箭头A4方向的树脂的流入速度。结果为，合流点从RP1移动到QP1，且从RP2移动到QP2，不易形成微小间隙。
树脂具有吸湿性。对于无法填充树脂而在内部具有微小间隙的半导体装置，在出货后吸湿的情况下，有可能水分会汇集在该微小间隙，当水分因回流焊的热气化时损坏。因此，必须以封装体内无间隙的方式进行制造。根据本实施方式，在半导体封装体内不易形成微小间隙，所以可防止因吸湿后的回流焊导致的破坏。
如上所述，根据所述实施方式，可提供一种不易形成因树脂填充不足所导致的间隙的半导体装置。
尤其是利用树脂阻力部21调整通过下段的半导体芯片12周围所形成的多个隧道状间隙的各树脂流入时的阻力，使来自各开口的树脂的流入速度一致、或减慢，由此使树脂前端面的合流点的位置移动，从而防止产生微小间隙。
此外，所述实施方式中，树脂阻力部21由多条接合线21a构成，但作为其变化例，也可由阻焊剂或灌封(potting)树脂构成。所谓灌封树脂是指通过灌封法而模塑的树脂。
图11是由阻焊剂构成树脂阻力部的衬底11的立体图。图11中，在所述图2的树脂阻力部21的位置，设置着从衬底11的上表面11a突出的矩形阻焊剂部22作为树脂阻力部。也就是说，阻焊剂部22构成包含设置在衬底11上的阻焊剂的突出部。
制造衬底11时，可通过将涂布在衬底11的上表面11a的阻焊剂局部加厚涂布而形成树脂阻力部。结果为，当模塑时，可使来自箭头A3方向的树脂所流入的隧道状间隙的尺寸变小，从而使来自箭头A3方向的树脂的流入速度与来自箭头A4方向的树脂的流入速度一致。
图12是由灌封树脂构成树脂阻力部的衬底11的立体图。图12中，在所述图2的树脂阻力部21的位置，设置着在衬底11的上表面11a灌封指定厚度的树脂而成的灌封树脂部23作为树脂阻力部。也就是说，灌封树脂部23构成包含设置在衬底11上的灌封树脂的突出部。
进而，此外，树脂阻力部也可将多条接合线21a、阻焊剂部22及灌封树脂部23中的2个以上组合而构成。
将半导体芯片12搭载在衬底11的上表面11a之后，使用灌封用树脂，在上表面11a上形成指定厚度的树脂的隆起部分，由此形成树脂阻力部23。结果为，当模塑时，可使来自箭头A3方向的树脂所流入的隧道状间隙的尺寸变小，从而使来自箭头A3方向的树脂的流入速度与来自箭头A4方向的树脂的流入速度一致。
如上所述，根据所述实施方式及各变化例，可提供一种不易形成因树脂填充不足所导致的间隙的半导体装置。
对本发明的若干实施方式进行了说明，但这些实施方式是作为示例而举出的，并非意图限定发明的范围。这些新颖的实施方式能以其它各种方式实施，且可在不脱离发明主旨的范围内进行各种省略、替换、变更。这些实施方式或其变化包含在发明的范围或主旨中，并且包含在权利要求书所记载的发明及其均等的范围内。
[符号的说明]
1 半导体装置
11 衬底
11a 上表面
11b 下表面
11c 焊球
12 半导体芯片
12a 上表面
12b 接合线
13A、13B、13C、13D 间隔芯片
13Aa、13Ab、13Ba、13Bb、13Ca、13Cb、13Da、13Db 侧面
14、14A、14B 半导体芯片
14Aa、14Ba 侧面
14Ab、14Bb 下表面
14a、14b 接合线
15 半导体芯片
15a 接合线
15b 下表面
16 树脂
21 树脂阻力部
21a 接合线
22 阻焊剂部
23 灌封树脂部

Claims (7)

1.一种半导体装置，其特征在于具有：
衬底，具有第1面；
第1半导体芯片，搭载在所述衬底的所述第1面上，通过第1多条接合线与所述衬底连接；
多个间隔芯片，搭载在所述衬底的所述第1面上，多个间隔芯片中的每一个间隔芯片在所述第1半导体芯片与所述衬底的外缘之间，每一个间隔芯片与其他间隔芯片隔开；
第2半导体芯片，搭载在所述多个间隔芯片中的第1对间隔芯片上，所述第1对间隔芯片在第1方向相互隔开；以及
突出部，在所述衬底的所述第1面上，在所述第1方向在所述第1对间隔芯片之间，所述突出部在与所述第1方向垂直的第2方向在所述第1多条接合线与所述衬底的所述外缘之间，所述突出部从所述衬底的所述第1面朝上方突出；其中
所述第1半导体芯片从所述第1面延伸到第1高度；
所述多个间隔芯片中的每一个间隔芯片从所述第1面延伸到第2高度，所述第2高度比所述第1高度高。
2.根据权利要求1所述的半导体装置，其特征在于：还于所述衬底与所述第2半导体芯片之间具有树脂。
3.根据权利要求1所述的半导体装置，其特征在于：还具有第3半导体芯片，搭载在所述多个间隔芯片中的第2对间隔芯片上，所述第2对间隔芯片在所述第1方向相互隔开且在所述第2方向与所述第1对间隔芯片隔开。
4.根据权利要求1所述的半导体装置，其特征在于：所述突出部包含第2多条接合线，在所述第2多条接合线中的每一条接合线连接到所述衬底的所述第1面上的两相异点，并跨越在所述衬底的所述第1面上的所述两相异点之间。
5.根据权利要求1所述的半导体装置，其特征在于：所述突出部包含阻焊剂。
6.根据权利要求1所述的半导体装置，其特征在于：所述突出部包含灌封树脂。
7.一种半导体装置的制造方法，其特征在于具备以下步骤：
在衬底的面上形成第1对间隔件，所述第1对间隔件的所述间隔件具有第1高度，沿第1方向而彼此隔开第1距离；
将第1半导体芯片放置在所述衬底的所述面上；
利用第1多条接合线将所述第1半导体芯片连接到所述衬底的所述面；
将第2半导体芯片搭载在所述第1对间隔件上，所述第2半导体芯片跨越所述第1距离且在所述第1半导体芯片上；以及
在所述衬底的所述面上，在所述第1方向的所述第1对间隔件之间形成突出部，所述突出部在所述第1多条接合线与所述衬底的外缘之间且从所述面朝上方突出。
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