CN113053858A - 具有扇出边沿的面对面半导体装置 - Google Patents

具有扇出边沿的面对面半导体装置 Download PDF

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CN113053858A
CN113053858A CN202011547413.3A CN202011547413A CN113053858A CN 113053858 A CN113053858 A CN 113053858A CN 202011547413 A CN202011547413 A CN 202011547413A CN 113053858 A CN113053858 A CN 113053858A
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semiconductor device
substrate
active side
assembly
fan
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白宗植
高荣范
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本申请涉及具有扇出边沿的面对面半导体装置。半导体装置组合件可包含具有衬底接触件的衬底。所述组合件可包含布置成面对面配置的第一半导体装置和第二半导体装置。所述组合件可包含在所述衬底上在所述第一半导体装置的横向侧处且包含焊线接触件的扇出边沿，所述焊线接触件电耦合到所述第一半导体装置。所述组合件可包含将所述焊线接触件可操作地耦合到所述衬底接触件的焊线。所述组合件可包含将所述第一半导体装置的有源侧可操作地耦合到所述第二半导体装置的有源侧的支柱或凸块。在一些实施例中，所述焊线接触件可操作地耦合到所述第一半导体装置的所述有源侧。

Description

具有扇出边沿的面对面半导体装置
技术领域
本文中所描述的实施例涉及半导体装置、半导体装置组合件和提供此类半导体装置和半导体装置组合件的方法。
背景技术
包含但不限于存储器芯片、微处理器芯片、成像器芯片等的半导体装置组合件通常包含具有安装在衬底上的裸片的半导体装置。半导体装置可包含各种功能特征，例如存储器单元、处理器电路和成像器装置，以及电连接到功能特征的接合衬垫。半导体装置组合件可包含通过封装内的邻近装置之间的个别互连件堆叠在彼此上且电连接到彼此的若干半导体装置。
可采用各种方法和/或技术以电互连半导体装置组合件中的邻近半导体装置和/或衬底。例如，焊线可将各种裸片、衬底和其它部件上的衬垫彼此连接。焊线可将部件彼此串联和/或并联连接。
发明内容
在一方面，本公开提供一种半导体装置组合件，其包括：衬底，其具有第一侧、与所述第一侧相对的第二侧以及在所述第一侧上的衬底接触件；第一半导体装置，其在所述衬底的所述第一侧上，所述第一半导体装置包括——有源侧，其具有第一接合衬垫；以及背侧，其与所述有源侧相对且面向所述衬底的所述第一侧；第二半导体装置，其包括——有源侧，其具有第二接合衬垫且面向所述第一半导体装置的所述有源侧；以及背侧，其与所述有源侧相对；导电连接器，其将所述第一接合衬垫可操作地耦合到所述第二接合衬垫；扇出边沿，其在所述衬底上且邻近所述第一半导体装置的横向侧而定位；焊线接触件，其在所述扇出边沿上，电耦合到所述第一半导体装置，所述焊线接触件定位在所述第二半导体装置的覆盖面积之外，如垂直于所述第一半导体装置的所述有源侧所观察到的；以及焊线，其将所述焊线接触件连接到所述衬底接触件。
在另一方面，本公开提供一种半导体装置组合件，其包括：衬底，其具有衬底接触件；第一半导体装置，其包括——有源侧；以及背侧，其与所述有源侧相对；第二半导体装置，其包括——有源侧，其面向所述第一半导体装置的所述有源侧；以及背侧，其与所述第二半导体装置的所述有源侧相对；扇出边沿，其在所述衬底上在所述第一半导体装置的横向侧处且包含焊线接触件，所述焊线接触件电耦合到所述第一半导体装置；焊线，其将所述焊线接触件可操作地耦合到所述衬底接触件；以及支柱或凸块，其将所述第一半导体装置的所述有源侧可操作地耦合到所述第二半导体装置的所述有源侧。其中所述焊线接触件可操作地耦合到所述第一半导体装置的所述有源侧。
在另一方面，本公开提供一种组装半导体装置组合件的方法，所述方法包括：将第一半导体装置可操作地耦合到衬底；以面对面布置将第二半导体装置可操作地耦合到所述第一半导体装置，使得所述第一半导体装置的有源侧面向所述第二半导体装置的有源侧；在所述衬底上在所述第一半导体装置的横向边缘处形成扇出边沿；以及将焊线连接到所述衬底上的衬底接触件并且连接到所述扇出边沿上的焊线接触件。
附图说明
图1为示范性半导体装置组合件的横截面示意图。
图2为半导体装置组合件的实施例的横截面示意图。
图3为半导体装置组合件的实施例的横截面示意图。
图4A为半导体装置组合件的实施例的俯视平面图。
图4B为具有扇出边沿的图4A的半导体装置组合件的俯视平面图。
图4C为半导体装置组合件的实施例的俯视平面图。
图4D为具有扇出边沿的图4C的半导体装置组合件的俯视平面图。
图5为组装半导体装置组合件的方法的实施例的流程图。
图6为展示包含根据本发明技术配置的半导体装置组合件的系统的示意图。
下文关于借助于图式中的实例展示的特定实施例描述本发明技术，但本发明技术具有各种修改和替代形式。因此，以下公开内容并不意图限于所公开的特定实例。实际上，意在涵盖属于如由所附权利要求书限定的本公开的范围内的所有修改、等效物和替代方案。
具体实施方式
本文中描述了许多具体细节以提供对本公开的实施例的透彻且启发性的描述。所属领域的普通技术人员将认识到，可在并无具体细节中的一或多个的情况下实践本公开。通常与半导体装置相关联的众所周知的结构和/或操作可能不会展示和/或可能不会详细地描述以避免混淆本公开的其它方面。一般来说，除了本文中所公开的那些具体实施例之外，各种其它装置、系统和/或方法也可在本公开的范围内。
术语“半导体装置组合件”可指代一或多个半导体装置、半导体装置封装和/或衬底的组合件，其可包含内插物、支撑件和/或其它合适的衬底。半导体装置组合件可制造为但不限于离散封装形式、条带或矩阵形式和/或晶片面板形式。术语“半导体装置”通常是指包含半导体材料的固态装置。半导体装置可包含例如来自晶片或衬底的半导体衬底、晶片、面板或单个裸片。半导体装置在本文中可指半导体裸片，但半导体装置不限于半导体裸片。
术语“半导体装置封装”可指具有并入到共同封装中的一或多个半导体装置的布置。半导体封装可包含部分或完全囊封至少一个半导体装置的外壳或壳体。半导体封装还可包含承载一或多个半导体装置的衬底。衬底可附接到外壳或壳体或以其它方式并入在外壳或壳体内。
如在前述描述中所使用，鉴于图式中所展示的定向，术语“竖直”、“横向”、“上部”、和“下部”可指代半导体装置中的特征的相对方向或位置。例如，“上部”或“最上部”可指定位成比另一特征更接近页面顶部的特征。然而，这些术语应广泛地解释为包含具有其它定向的半导体装置，例如反转或倾斜定向，其中顶部/底部、上面/下面、上方/下方、向上/向下、左侧/右侧和远端/近端可取决于定向而互换。此外，为了易于参考，贯穿本公开使用相同附图标记来识别类似或相似部件或特征，但使用相同附图标记并不暗示特征应解释为相同的。实际上，在本文所描述的许多实例中，相同编号的特征具有结构和/或功能彼此不同的多个实施例。此外，除非本文中具体地标注，否则相同着色可用于指示横截面中的可在成分上类似的材料，但使用相同着色并不暗示材料应解释为相同的。
半导体装置(例如，裸片、模块、封装等)通常具有有源侧(例如，“前侧”或“正面”)和背侧。有源侧可包含有源电路(例如，提供例如存储器单元、处理器电路和/或成像器装置的功能特征)和/或无源特征(例如，电容器、电阻器、硅穿孔(TSV)等)以及电连接到电路的接合衬垫。背侧可为晶片、囊封体或另一特征。在一些实施例中，背侧囊封或部分囊封有源侧的有源和/或无源特征中的一或多个，且可包含至少部分地穿过其中的一或多个有源电路和/或无源特征。一些半导体装置可布置成所谓的“面对面”布置，其中两个堆叠式装置的有源侧面向彼此以允许堆叠式装置的有源侧之间存在较短连接器且减少TSV或其它穿孔将有源侧连接到彼此的需要。减少通孔的数目以促进半导体装置的有源侧之间的直接连接可降低半导体装置组合件的总成本和/或机械复杂度。
本公开的各种实施例涉及半导体装置、半导体装置组合件以及制造和/或操作半导体装置和/或在半导体装置之间具有减小的间距的半导体装置组合件的方法。更具体来说，本公开的实施例可包含在面对面半导体装置的周边之外间隔开的扇出边沿，所述扇出边沿允许在所公开的半导体装置组合件的基底衬底与邻近所述边沿的装置的有源侧之间形成焊线，而不需要所述焊线在面对面半导体装置之间延伸。在面对面半导体装置之间的空间外部形成焊线减小面对面半导体装置之间的间隙大小，因为所述间隙不需要容纳焊线(例如，由焊线形成的弯折部或环)。就此而言，本发明技术的若干实施例涉及半导体装置组合件，所述半导体装置组合件包含具有第一侧、与所述第一侧相对的第二侧以及在所述第一侧上的衬底接触件的衬底。所述组合件可包含衬底的第一侧上的第一半导体装置。所述第一半导体装置可包含具有第一接合衬垫的有源侧，以及与所述有源侧相对且面向衬底的第一侧的背侧。在一些实施例中，组合件包含具有有源侧以及与所述有源侧相对的背侧的第二半导体装置，所述有源侧具有第二接合衬垫且面向第一半导体装置的有源侧。组合件可包含将第一接合衬垫可操作地耦合到第二接合衬垫的导电连接器；在一些实施例中，组合件包含在衬底上且邻近第一半导体装置的横向侧而定位的扇出边沿。组合件可包含在扇出边沿上的电耦合到第一半导体装置的焊线接触件，所述焊线接触件定位在第二半导体装置的覆盖面积之外，如垂直于第一半导体装置的有源侧所观察到的。在一些实施例中，组合件包含将焊线接触件连接到衬底接触件的焊线。
在另外其它实施例中，半导体装置组合件可包含具有衬底接触件的衬底。组合件可包含具有有源侧和与有源侧相对的背侧的第一半导体装置。在一些实施例中，组合件包含第二半导体装置，所述第二半导体装置包括面向第一半导体装置的有源侧的有源侧和与第二半导体装置的有源侧相对的背侧。组合件可包含在第一半导体装置的横向侧的衬底上的扇出边沿且包含焊线接触件，所述焊线接触件电耦合到所述第一半导体装置。组合件可包含将焊线接触件可操作地耦合到衬底接触件的焊线，以及将第一半导体装置的有源侧可操作地耦合到第二半导体装置的有源侧的支柱或凸块。在一些实施例中，焊线接触件可操作地耦合到第一半导体装置的有源侧。
组装半导体装置组合件的方法可包含将第一半导体装置可操作地耦合到衬底。这些方法可包含以面对面布置将第二半导体装置可操作地耦合到第一半导体装置，使得第一半导体装置的有源侧面向第二半导体装置的有源侧。在一些实施例中，所述方法包含在衬底上在第一半导体装置的横向边缘处形成扇出边沿，且将焊线连接到所述衬底上的衬底接触件并且连接到所述扇出边沿上的焊线接触件。
图1为具有布置成面对面配置的第一半导体装置102(例如，上部半导体装置)和第二半导体装置104(例如，下部半导体装置)的示范性半导体装置组合件100的横截面示意图。第一半导体装置102包含具有导电部件的有源侧106和与有源侧106相对的背侧107。第一半导体装置102的有源侧106可包含一或多个裸片衬垫108、重布层(RDL)110和/或接合衬垫112。类似地，第二半导体装置104可包含有源侧114和背侧115、有源侧114处的裸片衬垫116、RDL 118和/或接合衬垫120。第一和第二半导体装置102、104的相应有源侧106、114面对彼此且可经由焊球120或其它连接器(例如，支柱)连接。焊球120可形成于接合衬垫112、120上。第一半导体装置102的RDL 110可连接到裸片衬垫108和接合衬垫112中的一者或两者。类似地，第二半导体装置104的RDL 118可连接到裸片衬垫116和接合衬垫120中的一者或两者。
面对面半导体装置102、104可布置在具有第一侧126(例如，顶面)和与第一侧126相对的第二侧128(例如，底面)的衬底124上。第二半导体装置104的背侧115可邻近衬底124的第一侧126或位于其上。衬底124的第一侧126可包含一或多个接合衬垫130。一或多个接合衬垫130可经由衬底124中的一或多个互连件134和/或通孔136(例如，TSV、穿晶片通孔或其它通孔)可操作地连接到衬底124的第二侧128上的一或多个衬垫132。焊球140和/或其它连接结构可形成于衬底124的第二侧128(例如，衬垫136上)上以将半导体组合件100连接到其它半导体装置或组合件。
第二半导体装置104可经由从衬底124的第一侧126上的衬底接触件144延伸的一或多个焊线142和第二半导体装置104的有源侧114上的接触件146可操作地耦合到衬底124。接触件146定位在第一与第二半导体装置102、104之间(例如，与第一和第二半导体装置102、104两者竖直对准)。为了在衬底接触件144与接触件146之间的焊线142中容纳弯折部150，间隙G1维持在第一半导体装置102的有源侧106与第二半导体装置104的有源侧114之间。可用于容纳弯折部150的最小间隙G1可大于65微米、大于70微米、大于75微米、大于80微米和/或大于90微米。半导体装置102、104之间的间隙G1的大小与第一半导体装置102的有源侧上的接合衬垫112和第二半导体装置104的有源侧114上的接合衬垫120之间的距离直接相关，该距离进一步与焊料凸块120、支柱或接合衬垫112、120之间的其它连接的所需大小/高度相关。
在一些实施例中，需要减小第一半导体装置102的有源侧106与第二半导体装置104的有源侧114之间的间隙G1以减小第一半导体装置102的有源侧上的接合衬垫112与第二半导体装置104的有源侧114上的接合衬垫120之间的连接结构的高度。例如，减小第一半导体装置102的有源侧上的接合衬垫112与第二半导体装置104的有源侧114上的接合衬垫120之间的铜柱或铜柱凸块的大小和/或高度可降低与那些支柱/凸块中的材料相关联的成本且增强支柱/凸块的机械耐久性。减小支柱/凸块的高度还可通过减小接合衬垫112、120之间的连接的长度来增强所述接合衬垫之间的可操作连接的质量。
图2说明半导体装置组合件200的实施例，所述半导体装置组合件包含与上文关于图1所描述的那些特征相同或类似的特征中的许多特征，如在使用相同附图标记时所反映，以识别半导体装置组合件100与半导体装置组合件200之间的相同部件。半导体装置组合件200包含邻近和/或接触第二半导体装置104的外边缘的扇出边沿202。如本文所使用，“边沿”可指横向邻近于衬底或其它半导体结构而定位且延伸超出定位于边沿上方的衬底或裸片的覆盖面积的材料的部分。扇出边沿202可邻近或位于衬底124的第一侧126上。扇出边沿202可具有垂直于衬底124的第一侧所测量的等于或大致等于第二半导体装置104的高度的高度，如垂直于衬底124的第一侧所测量。
扇出边沿202可由模制材料(例如，环氧树脂、树脂或一些其它材料或材料的组合)形成。此类模制材料可为低成本的。在将第一半导体装置102的有源侧上的接合衬垫112连接到第二半导体装置104的有源侧114上的接合衬垫120之前或之后，可将扇出边沿202添加到半导体装置组合件200。在一些实施例中，第二半导体装置104的有源侧114处的RDL 118延伸到扇出边沿202上(例如，在扇出边沿202的与衬底124相对的一侧上)。可在衬底124的第一侧126上的衬底接触件144和扇出边沿202的与衬底124相对的所述侧上的接触件256之间形成焊线连接142，由此将焊线142和弯折部150与第一半导体装置102和第二半导体装置104之间的空间横向分开定位。将焊线142横向地定位成离开第一半导体装置102与第二半导体装置104之间允许第一半导体装置102的有源表面106与第二半导体装置104的有源表面114之间存在较小间隙G2。例如，间隙G2可小于60微米、小于55微米、小于50微米、小于45微米、小于40微米、小于30微米和/或小于25微米。在一些实施例中，间隙G2在20到50微米之间、在24到40微米之间和/或在30到60微米之间。减小间隙G2可允许使用短/小铜柱258或铜柱凸块来经由接合衬垫112、120而将第一半导体装置102的RDL 110可操作地耦合到第二半导体装置104的RDL 118。如上文所解释，减小第一半导体装置102的有源侧上的接合衬垫112与第二半导体装置104的有源侧114上的接合衬垫120之间的铜柱或铜柱凸块的大小和/或高度(例如，如经由使用扇出边沿202来实现)可降低与那些支柱/凸块中的材料相关联的成本且增强支柱/凸块的机械耐久性。减小支柱/凸块的高度还可通过减小接合衬垫112、120之间的连接的长度来增强所述接合衬垫之间的可操作连接的质量。
将焊线142的接触件256从第一半导体装置102与第二半导体装置104之间的空间移出可在半导体装置102、104与周围环境之间的空间之间移动焊线142远离接口260。这可允许第一半导体装置102的有源侧106与第二半导体装置104的有源侧114之间的较快且更均匀的底部填充物或其它材料沉积(例如，通过避免焊线142)。
图3说明半导体装置组合件300的实施例，所述半导体装置组合件包含与上文关于图1所描述的那些特征相同或类似的特征中的许多特征，如在使用相同附图标记时所反映，以识别半导体装置组合件100与半导体装置组合件300之间的相同部件。半导体装置组合件300包含沿着第二半导体装置304的边缘的至少一部分从第一半导体装置102横向凹进的第二半导体装置304。凹部的横向宽度W可取决于第一半导体装置102相对于第二半导体装置304的相对大小和/或位置而变化。例如，第一半导体装置102可具有比第二半导体装置304大的总覆盖面积，如垂直于衬底124的第一侧126所观察到。在一些应用中，第一和第二半导体装置102、304布置成叠瓦式或其它偏移布置以在其间产生悬垂物。
如同上文所描述的扇出边沿202，可在将第一半导体装置102的有源侧上的接合衬垫112连接到第二半导体装置304的有源侧114上的接合衬垫120之前或之后，制造图3的扇出边沿302。扇出边沿302经制造/形成以具有足够宽度(如平行于衬底124的第一侧126所测量)以将扇出边沿302上的接触件256定位于第一半导体装置102与第二半导体装置304之间的空间之外(例如，与所述空间横向间隔开)。扇出边沿302可具有垂直于衬底124的第一侧而测量的等于或大致等于第二半导体装置304的高度的高度，如垂直于衬底124的第一侧所测量。
使用如本文中所描述的扇出边沿202、302可允许具有相应的未对准和/或不类似覆盖面积的半导体装置的面对面布置，同时将衬底124与半导体装置之间的焊线连接定位在半导体装置之间的空间之外。以这些方式使用扇出边沿202、302可减少或消除对半导体装置102、104、304进行后处理加工以将焊线从半导体装置之间的空间中移出的需要。在一些实施例中，扇出边沿202、302的使用促进具有定位在衬底与较大第一半导体装置(例如，存储器堆叠)之间的小第二半导体装置(例如，控制器)的半导体装置组合件的组装。此类布置可例如在高带宽存储器(HBM)半导体装置组合件中使用。
图4A说明不包含扇出边沿的半导体装置组合件100的俯视平面图。焊线142从衬底124上的衬底接触件144延伸到第一和第二半导体装置102、104之间的接触件156。虽然在半导体装置组合件100的单个横向侧上示出焊线142，但其它焊线142可定位在半导体装置组合件100的其它横向侧中的一或多个上而不改变本文中所描述的原理。如图4B中所说明，将扇出边沿202添加到半导体装置组合件200可将接触件156从第一半导体装置102下面移出。
图4C和4D分别说明具有和不具有扇出边沿302的半导体装置组合件300。如上文所描述，扇出边沿302的添加允许接触件156定位成离开第一半导体装置102的下面(即，离开两个半导体装置102、304之间)。虽然在半导体装置组合件300的单个横向侧上示出焊线142，但其它焊线142可定位在半导体装置组合件300的其它横向侧中的一或多个上而不改变本文中所描述的原理。
图5为组装半导体装置组合件的方法400的实施例的流程图。方法400可包含将第一半导体装置(例如，上文所描述的半导体装置102、104、304中的一个)可操作地耦合到衬底(例如，上文所描述的衬底124)(框402)。方法400可包含以面对面布置将第二半导体装置(例如，上文所描述的半导体装置102、104、304中的一个)可操作地耦合到第一半导体装置，使得第一半导体装置的有源侧面对第二半导体装置的有源侧(框404)。方法400可包含在衬底上在第一半导体装置的横向边缘处形成扇出边沿(例如，上文所描述的扇出边沿202、302中的一个)(框406)。在一些实施例中，方法400包含将焊线连接到衬底上的衬底接触件并且连接到扇出边沿上的焊线接触件(框408)。如上文所描述，焊线接触件可定位在第二半导体装置的覆盖面积外部，如垂直于第一半导体装置的有源表面所观察到。在一些实施例中，可按变化次序执行方法400的上述步骤中的一或多个。例如，可在框404中所描述的步骤之前或之后执行框406中所描述的步骤。在一些情况下，可在框402和406中所描述的步骤中的一者或两者之前或之后执行框404中所描述的步骤。
具有上文所描述的特征(例如，参考图1到4D)的半导体装置组合件中的任一者可并入到大量较大和/或更复杂系统中的任一者中，所述系统的代表性实例为图6中示意性地所展示的系统500。系统500可包含处理器502、存储器504(例如，SRAM、DRAM、闪存和/或其它存储器装置)、输入/输出装置505和/或其它子系统或部件508。上文所描述的半导体裸片和半导体裸片组合件可包含于图6中所展示元件的任一者中。所得系统500可被配置成执行广泛多种合适的计算、处理、存储、感测、成像和/或其它功能中的任一者。因此，系统500的代表性实例包含但不限于计算机和/或其它数据处理器，例如台式计算机、膝上计算机、因特网设备、手持式装置(例如，掌上计算机、可穿戴式计算机、蜂窝式或移动电话、个人数字助理、音乐播放器等)、平板计算机、多处理器系统、基于处理器或可编程消费型电子产品、网络计算机和微型计算机。系统500的额外代表性实例包含灯、摄像机、车辆等。关于这些和其它实例，系统500可容纳在单个单元中或分布在多个互连单元上，例如通过通信网络。系统500的部件可因此包含本地和/或远程存储器存储装置和广泛多种合适的计算机可读媒体中的任一个。
本技术的实施例的以上详细描述并不意图为详尽的或将技术限于上文所公开的确切形式。如相关领域的技术人员将认识到，尽管上文出于说明性目的描述了本技术的特定实施例和实例，但各种等效修改在本技术的范围内是可能的。例如，尽管以给定次序呈现步骤，但替代性实施例可按不同次序执行步骤。此外，也可组合本文中所描述的各种实施例以提供另外的实施例。本文提及“一些实施例”、“实施例”或类似表述意指结合实施例所描述的特定特征、结构、操作或特性可包含在本发明技术的至少一个实施例中。因此，此类短语或表述在本文中的出现未必都指同一实施例。
本发明技术的某些方面可呈计算机可执行指令的形式，所述计算机可执行指令包含由控制器或其它数据处理器执行的例程。在一些实施例中，控制器或其它数据处理器经专门编程、配置和/或构造以执行这些计算机可执行指令中的一或多个。此外，本发明技术的一些方面可呈存储或分布在计算机可读媒体上的数据(例如，非暂时性数据)的形式，包含磁性或光学可读和/或可移式计算机光盘以及电子地分布在网络上的媒体。因此，特定针对本发明技术的各方面的数据结构和数据传输涵盖在本发明技术的范围内。本发明技术还涵盖对计算机可读媒体进行编程以执行特定步骤和执行所述步骤两者的方法。
此外，除非词语“或”明确地限于指仅对参考两个或更多个项目的列表的其它项目排它的单个项目，否则在此列表中“或”的使用应解释为包含(a)列表中的任何单个项目，(b)列表中的所有项目，或(c)列表中的项目的任何组合。在上下文准许的情况下，单数或复数项还可分别包含复数或单数术语。另外，术语“包括”贯穿全文用以意指至少包含所叙述的特征，使得不排除任何较大数目的相同特征和/或额外类型的其它特征。另外，尽管已经在那些实施例的上下文中描述了与本技术的某些实施例相关联的优点，但其它实施例也可显示此类优点，且并非所有实施例都要显示此类优点以落入本技术的范围内。因此，本公开和相关联的技术可涵盖未明确地在本文中展示或描述的其它实施例。
前述公开内容还可参考数量和数目。除非特别说明，否则此类数量和数目不被视为限制性的，而是与新技术相关联的可能数量或数目的示范性的。并且，就此而言，本公开可使用术语“多个”来指代数量或数目。就此而言，术语“多个”意指多于一，例如二、三、四、五等的任何数目。出于本公开的目的，短语“A、B和C中的至少一个”例如意味着(A)、(B)、(C)、(A和B)、(A和C)、(B和C)或(A、B和C)，当列出多于三个元素时包含所有另外可能的排列。
从前述内容中将了解，尽管本文中已经出于说明的目的描述了新技术的特定实施例，但是可在不偏离本公开的情况下进行各种修改。因此，本发明不受除所附权利要求书之外的限制。此外，在具体实施例的上下文中所描述的新技术的某些方面也可在其它实施例中组合或去除。此外，尽管已经在那些实施例的上下文中描述了与新技术的某些实施例相关联的优点，但其它实施例也可显示此类优点，且并非所有实施例都要显示此类优点以落入本公开的范围内。因此，本公开和相关联的技术可涵盖未明确地在本文中展示或描述的其它实施例。

Claims (23)

1.一种半导体装置组合件，其包括：
衬底，其具有第一侧、与所述第一侧相对的第二侧以及在所述第一侧上的衬底接触件；
在所述衬底的所述第一侧上的第一半导体装置，所述第一半导体装置包括-
有源侧，其具有第一接合衬垫；以及
背侧，其与所述有源侧相对且面向所述衬底的所述第一侧；
第二半导体装置，其包括-
有源侧，其具有第二接合衬垫且面向所述第一半导体装置的所述有源侧；以及
背侧，其与所述有源侧相对；
导电连接器，其将所述第一接合衬垫可操作地耦合到所述第二接合衬垫；
扇出边沿，其在所述衬底上且邻近所述第一半导体装置的横向侧而定位；
焊线接触件，其在所述扇出边沿上，电耦合到所述第一半导体装置，所述焊线接触件定位在所述第二半导体装置的覆盖面积之外，如垂直于所述第一半导体装置的所述有源侧所观察到的；以及
焊线，其将所述焊线接触件连接到所述衬底接触件。
2.根据权利要求1所述的半导体装置组合件，其中所述导电连接器是铜柱或铜柱凸块。
3.根据权利要求1所述的半导体装置组合件，其中所述衬底进一步包括在所述衬底的所述第二侧处的一或多个接触衬垫，并且其中所述一或多个接触衬垫经由所述衬底内的一或多个互连件和/或通孔可操作地耦合到所述衬底接触件。
4.根据权利要求1所述的半导体装置组合件，其中所述扇出边沿具有基本上等于所述第一半导体装置的高度的高度，如垂直于所述衬底的所述第一表面所测量到的。
5.根据权利要求1所述的半导体装置组合件，其中所述第一半导体装置进一步包括-
裸片衬垫，其在所述第一半导体装置的所述有源侧；以及
重布层，其在所述第一半导体装置的所述有源侧；
其中所述重布层将所述裸片衬垫可操作地耦合到所述第一接合衬垫。
6.根据权利要求1所述的半导体装置组合件，其中所述第二半导体装置进一步包括--
裸片衬垫，其在所述第二半导体装置的所述有源侧；以及
重布层，其在所述第二半导体装置的所述有源侧；
其中所述重布层将所述裸片衬垫可操作地耦合到所述第二接合衬垫。
7.根据权利要求1所述的半导体装置组合件，其中第二半导体装置沿平行于所述第一半导体装置的所述有源侧的方向悬于所述第一半导体装置之上。
8.根据权利要求1所述的半导体装置组合件，其中所述第一半导体装置是控制器，并且所述第二半导体装置是存储器堆叠。
9.根据权利要求1所述的半导体装置组合件，其中所述半导体装置组合件是高带宽存储器装置。
10.一种半导体装置组合件，其包括：
衬底，其具有衬底接触件；
第一半导体装置，其包括-
有源侧；以及
背侧，其与所述有源侧相对；
第二半导体装置，其包括-
有源侧，其面向所述第一半导体装置的所述有源侧；以及
背侧，其与所述第二半导体装置的所述有源侧相对；
扇出边沿，其在所述衬底上在所述第一半导体装置的横向侧处且包含焊线接触件，所述焊线接触件电耦合到所述第一半导体装置；
焊线，其将所述焊线接触件可操作地耦合到所述衬底接触件；以及
支柱或凸块，其将所述第一半导体装置的所述有源侧可操作地耦合到所述第二半导体装置的所述有源侧；
其中所述焊线接触件可操作地耦合到所述第一半导体装置的所述有源侧。
11.根据权利要求10所述的半导体装置组合件，其中所述第一半导体装置进一步包括-裸片衬垫，其在所述第一半导体装置的所述有源侧；以及
重布层，其在所述第一半导体装置的所述有源侧；
其中所述重布层将所述裸片衬垫可操作地耦合到所述支柱或凸块。
12.根据权利要求10所述的半导体装置组合件，其中所述第二半导体装置进一步包括-裸片衬垫，其在所述第二半导体装置的所述有源侧；以及
重布层，其在所述第二半导体装置的所述有源侧；
其中所述重布层将所述裸片衬垫可操作地耦合到所述支柱或凸块。
13.根据权利要求10所述的半导体装置组合件，其中所述扇出边沿包括环氧树脂或树脂。
14.根据权利要求10所述的半导体装置组合件，其中所述衬底进一步包括一或多个接触衬垫，并且其中所述一或多个接触衬垫经由所述衬底内的一或多个互连件和/或通孔可操作地耦合到所述衬底接触件。
15.根据权利要求10所述的半导体装置组合件，其中第二半导体装置沿平行于所述第一半导体装置的所述有源侧的方向悬于所述第一半导体装置之上。
16.根据权利要求10所述的半导体装置组合件，其中所述第一半导体装置是控制器，并且所述第二半导体装置是存储器堆叠。
17.根据权利要求10所述的半导体装置组合件，其中所述半导体装置组合件是高带宽存储器装置。
18.一种组装半导体装置组合件的方法，所述方法包括：
将第一半导体装置可操作地耦合到衬底；
以面对面布置将第二半导体装置可操作地耦合到所述第一半导体装置，使得所述第一半导体装置的有源侧面向所述第二半导体装置的有源侧；
在所述衬底上在所述第一半导体装置的横向边缘处形成扇出边沿；以及
将焊线连接到所述衬底上的衬底接触件并且连接到所述扇出边沿上的焊线接触件。
19.根据权利要求18所述的方法，其中当垂直于所述第一半导体装置的所述有源侧观察时，所述扇出边沿上的所述焊线接触件定位于所述第二半导体装置的覆盖面积之外。
20.根据权利要求18所述的方法，其中在所述衬底上形成所述扇出边沿之前，执行将所述第二半导体装置可操作地耦合到所述第一半导体装置。
21.根据权利要求18所述的方法，其中当垂直于所述第一半导体装置的所述有源表面观察时，所述第二半导体装置具有比所述第一半导体装置更大的覆盖面积。
22.根据权利要求18所述的方法，其中在将所述第二半导体装置可操作地耦合到所述第一半导体装置之前，执行将所述焊线连接到所述衬底上的所述衬底接触件并且连接到所述扇出边沿上的所述焊线接触件。
23.根据权利要求18所述的方法，其进一步包括将所述第一半导体装置的所述有源侧上的重布层延伸到所述扇出边沿上。
CN202011547413.3A 2019-12-27 2020-12-24 具有扇出边沿的面对面半导体装置 Pending CN113053858A (zh)

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