CN105474354B - 半导体基板的制造方法 - Google Patents

半导体基板的制造方法 Download PDF

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Publication number
CN105474354B
CN105474354B CN201480038163.7A CN201480038163A CN105474354B CN 105474354 B CN105474354 B CN 105474354B CN 201480038163 A CN201480038163 A CN 201480038163A CN 105474354 B CN105474354 B CN 105474354B
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layer
uncrystalline
substrate
thickness
bonding
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Chinese (zh)
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CN105474354A (zh
Inventor
今冈功
小林元树
内田英次
八木邦明
河原孝光
八田直记
南章行
坂田丰和
牧野友厚
高木秀树
仓岛优
仓岛优一
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Sumitomo Metal Mining Co Ltd
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Toyota Industries Corp
National Institute of Advanced Industrial Science and Technology AIST
Sicoxs Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
CN201480038163.7A 2013-07-05 2014-07-03 半导体基板的制造方法 Active CN105474354B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013142151A JP6061251B2 (ja) 2013-07-05 2013-07-05 半導体基板の製造方法
JP2013-142151 2013-07-05
PCT/JP2014/067777 WO2015002266A1 (ja) 2013-07-05 2014-07-03 半導体基板の製造方法

Publications (2)

Publication Number Publication Date
CN105474354A CN105474354A (zh) 2016-04-06
CN105474354B true CN105474354B (zh) 2018-04-17

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US (1) US9761479B2 (enExample)
EP (1) EP3018696B8 (enExample)
JP (1) JP6061251B2 (enExample)
KR (1) KR101846299B1 (enExample)
CN (1) CN105474354B (enExample)
WO (1) WO2015002266A1 (enExample)

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JP2016139655A (ja) * 2015-01-26 2016-08-04 富士通株式会社 半導体装置及び半導体装置の製造方法
WO2016140229A1 (ja) * 2015-03-04 2016-09-09 有限会社Ｍｔｅｃ 半導体基板の製造方法及び半導体基板
JP6572694B2 (ja) 2015-09-11 2019-09-11 信越化学工業株式会社 ＳｉＣ複合基板の製造方法及び半導体基板の製造方法
JP6544166B2 (ja) * 2015-09-14 2019-07-17 信越化学工業株式会社 ＳｉＣ複合基板の製造方法
JP6515757B2 (ja) 2015-09-15 2019-05-22 信越化学工業株式会社 ＳｉＣ複合基板の製造方法
JP6582779B2 (ja) 2015-09-15 2019-10-02 信越化学工業株式会社 ＳｉＣ複合基板の製造方法
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KR102109292B1 (ko) 2016-04-05 2020-05-11 가부시키가이샤 사이콕스 다결정 ＳｉＣ 기판 및 그 제조방법
CN107958839B (zh) * 2016-10-18 2020-09-29 上海新昇半导体科技有限公司 晶圆键合方法及其键合装置
JP2020508564A (ja) * 2017-02-21 2020-03-19 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 基板を接合する方法および装置
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JP6854516B2 (ja) * 2017-07-19 2021-04-07 株式会社テンシックス 化合物半導体基板及びその製造方法
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JP2019210162A (ja) * 2018-05-31 2019-12-12 ローム株式会社 半導体基板構造体及びパワー半導体装置
JP2019210161A (ja) * 2018-05-31 2019-12-12 ローム株式会社 半導体基板構造体及びパワー半導体装置
JP7024668B2 (ja) * 2018-09-05 2022-02-24 株式会社Sumco Ｓｏｉウェーハ及びその製造方法
DE102018132447B4 (de) * 2018-12-17 2022-10-13 Infineon Technologies Ag Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung
CN109986191A (zh) * 2019-04-15 2019-07-09 上海交通大学 一种应用于金属/高分子连接的表面处理方法
JP6737378B2 (ja) * 2019-05-09 2020-08-05 信越化学工業株式会社 ＳｉＣ複合基板
CN114008871A (zh) * 2019-06-18 2022-02-01 大学共同利用机关法人自然科学研究机构 光学元件的制造方法及光学元件
JP6818964B1 (ja) 2020-06-01 2021-01-27 三菱電機株式会社 複合基板、複合基板の製造方法、半導体装置および半導体装置の製造方法
JP7625248B2 (ja) * 2021-01-20 2025-02-03 国立研究開発法人理化学研究所 接合体の製造方法および接合体
JP2023061509A (ja) 2021-10-20 2023-05-02 株式会社サイコックス 多結晶炭化珪素基板の製造方法
JP2023068782A (ja) * 2021-11-04 2023-05-18 株式会社サイコックス 半導体基板とその製造方法
FR3134228B1 (fr) 2022-03-30 2025-05-02 Mersen France Gennevilliers Procede de fabrication de carbure de silicium polycristallin utilisable pour la fabrication de substrats de circuits integres, et carbure de silicium ainsi obtenu
JP2024025064A (ja) 2022-08-10 2024-02-26 株式会社サイコックス ＳｉＣ単結晶転写用複合基板、ＳｉＣ単結晶転写用複合基板の製造方法、およびＳｉＣ接合基板の製造方法
JP2024073797A (ja) 2022-11-18 2024-05-30 株式会社サイコックス 研磨組成物
FR3146237A1 (fr) 2023-02-24 2024-08-30 Mersen France Gennevilliers Plaque en SiC polycristallin dopé à planéité et conductivité électrique améliorées, et procédé de fabrication d’une telle plaque
JP2024121436A (ja) 2023-02-27 2024-09-06 住友金属鉱山株式会社 ＳｉＣ半導体装置用基板、ＳｉＣ接合基板、ＳｉＣ多結晶基板およびＳｉＣ多結晶基板の製造方法
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Also Published As

Publication number Publication date
JP2015015401A (ja) 2015-01-22
US20160204023A1 (en) 2016-07-14
JP6061251B2 (ja) 2017-01-18
KR20160040565A (ko) 2016-04-14
EP3018696A4 (en) 2017-03-15
KR101846299B1 (ko) 2018-05-18
CN105474354A (zh) 2016-04-06
EP3018696A1 (en) 2016-05-11
EP3018696B1 (en) 2021-11-17
EP3018696B8 (en) 2022-02-23
US9761479B2 (en) 2017-09-12
WO2015002266A1 (ja) 2015-01-08

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