CN105247666B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN105247666B
CN105247666B CN201480029861.0A CN201480029861A CN105247666B CN 105247666 B CN105247666 B CN 105247666B CN 201480029861 A CN201480029861 A CN 201480029861A CN 105247666 B CN105247666 B CN 105247666B
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China
Prior art keywords
semiconductor
wire
layers
manufacture
alloy
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CN201480029861.0A
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English (en)
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CN105247666A (zh
Inventor
山崎浩次
荒木健
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三菱电机株式会社
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Priority to JP2013-144181 priority Critical
Priority to JP2013144181 priority
Application filed by 三菱电机株式会社 filed Critical 三菱电机株式会社
Priority to PCT/JP2014/058852 priority patent/WO2015004956A1/ja
Publication of CN105247666A publication Critical patent/CN105247666A/zh
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • B23K20/004Wire welding
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3006Ag as the principal constituent
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C5/00Alloys based on noble metals
    • C22C5/06Alloys based on silver
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Abstract

本发明的目的在于在将接合对象物之间接合了的接合部处,形成空隙少的高熔点的金属间化合物。本发明的半导体装置(30)的特征在于,具备在形成于安装基板(电路基板(12))的第一Ag层(4)与形成于半导体元件(9)的第二Ag层(10)之间挟持了的合金层(13),合金层(13)具有由第一Ag层(4)以及第二Ag层(10)的Ag成分和Sn形成了的Ag3Sn的金属间化合物,包含Ag的多根导线(5)从该合金层(13)的外周侧延伸地配置。

Description

半导体装置及其制造方法

技术领域

[0001] 本发明涉及半导体装置以及半导体装置的制造方法,特别涉及安装半导体元件的 安装基板与半导体元件等的金属接合、半导体元件和引线端等的金属接合。

背景技术

[0002] 近年来,针对半导体装置的可靠性的要求逐渐提高,特别强烈要求提高针对热膨 胀系数差大的半导体元件和电路基板的接合部的可靠性。以往,在半导体元件中,大量使用 以硅(Si)、砷化镓(GaAs)为基体材料的例子,其动作温度是100°C〜125°C。作为将半导体元 件接合到电子电路的电极的焊料材料,根据针对半导体元件与电路基板的热膨胀之差所引 起的反复热应力的抗裂性、用于应对组装时的多阶段焊料接合的高熔点、进而器件的污染 耐性等观点,在Si器件中使用了95Pb-5Sn (质量%),在砷化镓器件中使用了80Au-20Sn (质 量%)等。但是,根据降低环境负荷的观点,大量含有有害的铅(Pb)的95Pb-5Sn存在问题,并 且根据贵金属的价格上涨、埋藏量等观点,关于80Au-20Sn,强烈期望替代材料。

[0003] 另一方面,根据节能的观点,作为下一代器件,以碳化硅(SiC)、氮化镓(GaN)为基 体材料的器件的开发蓬勃发展。这些根据降低电力损失的观点,将其动作温度设为175°C以 上,将来还可以说达到300 °C。

[0004] 针对上述要求,需要熔点高而且耐热性优良的高温焊料材料(高温焊料合金)。这 样的焊料合金此前是熔融温度为300°C前后的基于Pb的焊料合金。例如,有Pb-IOSn (质 量%)、Pb-5Sn (质量%)、Pb-2Ag-8Sn (质量%)、Pb-5Ag (质量%)等,主要以Pb为主成分。Pb-IOSn的固相线温度是268°C,其液相线温度是302°(^Ρΐ3-55η的固相线温度是307°C,其液相 线温度是313 tCt3PbIAg-SSn的固相线温度是275 °C,其液相线温度是346 cC13Pb-SAg的固相 线温度是304°C,其液相线温度是365°C。

[0005] 但是,根据环境保护的观点,最近,在整个锡焊技术中,要求代替Pb系焊料合金,而 使用无Pb焊料合金。当然,关于在以往的半导体装置中使用了的上述那样的Pb-Sn系高温焊 料,也要求使用无Pb焊料合金。

[0006] 但是,关于无Pb焊料合金,此前提出了多种,但Sn是主成分,没有固相线温度是260 °C以上的高温焊料合金。例如,在固相线温度(共晶温度)是221°C的Sn-Ag系焊料合金中,如 果增加Ag,则液相线温度提高,但固相线温度不提高。在固相线温度227 °C的Sn-Sb系焊料合 金中,在为了提高固相线温度,极端地增加了Sb的情况下,液相线温度也极端地提高。另外, 即使对它们添加其他元素,也无法改变这样的特性。因此,以往,在无Pb焊料合金中,认为没 有即使在300°C下也不熔融的、可用作焊料的无Pb焊料合金。

[0007] 因此,研究了未使用高温焊料合金的接合技术。被作为未使用该高温焊料合金的 接合技术来研究的方法是指,使用熔融温度比Sn为主成分的无铅焊料更高的金属间化合物 来接合的方法。在其中,也特别期望是使用向Sn的扩散快、且在比较低的温度下能够形成金 属间化合物的Ag的通过Ag和Sn的金属间化合物(Ag3Sn)接合的方法。

[0008] 例如,在专利文献1中,记载了无Pb且能够用于温度等级连接的高温侧的焊料连接 的复合焊料。专利文献1的复合焊料通过由Cu构成的金属网被2张焊料箱夹持压接而得到的 结构来构成,这样,将金属网和焊料箱重叠乳制,从而焊料箱的Sn进入到金属网的间隙,在 加热之后,形成Cu和Sn的金属间化合物(Cu3 Sn、Cu6 Sn5),实现高耐热化。另外,在专利文献1 中,除了Cu以外,Ag网也同样地是有力候补,在作为高熔点的金属间化合物的Ag3Sn化合物 中,能够实现即使在280°C下也不熔融的连结连接。同样地,作为硬并且熔点低的合金系, Cu-Sn系(例如Cu6Sn5)也能够同样地应对。

[0009] 另外,在专利文献2中,记载了用于接合芯片(半导体元件)和管芯的接合片。专利 文献2的接合片是将有槽加工的Ag片、Ag导线纵横编织而得到的网格状片,针对该Ag片的表 面实施厚度〇. 3〜2. Ομπι的Sn镀层并进行加压、加热,从而在加热时,从Ag片的芯逐渐通过溶 解、扩散而供给Ag。因此,专利文献2的接合片能够将最终地形成的Ag-Sn层的熔点提高到 470 °C以上,能够做成耐热性高的接合部,并且,有槽空间的Ag片柔软并且吸收热应变,提高 可靠性。

[0010] 专利文献1:日本特开2004-174522号公报(第0024段〜0053段、第0069段、图1、图 8)

[0011] 专利文献2:日本特开2012-004594号公报(第0058段〜0060段、图13、图14)

发明内容

[0012] 但是,在专利文献1的复合焊料中,在使用Ag网的情况下,在Sn恪融了时,仅在有Ag 网的部位,Ag与Sn扩散,形成高熔点的Ag3Sn,在空间上四方被该Ag3Sn包围,在Sn熔融了时, 在一部分处卷入空气而熔融,所以在内部存在不少空隙。另外,在形成Ag3Sn时引起体积收 缩,所以难以完全去除空隙。关于该熔融Sn中的空隙,如果四方被高熔点的Ag3Sn包围,则被 壁包围而无法活动,所以即使在例如真空中接合电路基板和半导体元件等,也无法去除空 隙,形成空隙多的接合部。关于专利文献2也是同样的,如果四方被高熔点的Ag3Sn包围,则 无法确保去除空隙的路线,所以易于大量产生空隙。

[0013] 另外,为了在电路基板和半导体元件等的接合部处形成高熔点的金属间化合物, 还考虑不使用Ag网而使Ag粒微细地分散的方法等,但即使暂且Ag粒均匀地分布,在熔融时, 不少Sn流动,所以Ag粒移动,接合部易于变得不均勾。由此,在接合部的一部分形成Ag3Sn, 但在接合部的一部分处只有Sn的部位伸出,难以确保接合部的耐热性。

[0014] 本发明是为了解决上述那样的问题而完成的,其目的在于在将接合对象物之间接 合了的接合部处,形成空隙少的高熔点的金属间化合物。

[0015] 本发明提供一种半导体装置,其特征在于,具备在形成于安装基板的第一 Ag层和 形成于半导体元件的第二Ag层之间挟持了的合金层,合金层具有由第一 Ag层以及第二Ag层 的Ag成分和Sn形成了的Ag3Sn的金属间化合物,包含Ag的多根导线从该合金层的外周侧延 伸地配置。

[0016] 根据本发明的半导体装置,具备对具有Ag3Sn的金属间化合物的合金层连接了包 含Ag的多根导线的构造,所以在导线5之间确保能够去除在形成合金层13时不少产生的空 隙的路线,能够在将接合对象物之间接合了的接合部处,形成空隙少的高熔点的金属间化 合物。

附图说明

[0017] 图1是本发明的实施方式1的半导体装置的剖面图以及俯视图。

[0018] 图2是说明本发明的合金层的图。

[0019]图3是示出金属间化合物Ag3Sn的基本特性的图。

[0020] 图4是说明本发明的实施方式1的半导体装置的制造方法的图。

[0021] 图5是说明本发明的实施方式1的半导体元件和导线的位置的图。

[0022] 图6是说明本发明的实施方式1的半导体元件和导线的位置的图。

[0023] 图7是说明比较例的半导体元件和导线的位置的图。

[0024] 图8是说明比较例的半导体元件和导线的位置的图。

[0025] 图9是示出本发明的实施例所示的代表性的接合部的剖面图像以及组成分析结果 的图。

[0026] 图10是示出本发明的实施例以及比较例的特性的图。

[0027] 图11是示出本发明的实施例以及比较例的特性的图。

[0028] 图12是示出本发明的金属间化合物Ag3Sn中的每个温度以及每个时间下的厚度的 图。

[0029] 图13是示出本发明的实施方式2的导线的配置的图。

[0030] 图14是说明本发明的实施方式2的半导体元件和导线的位置的图。

[0031] 图15是本发明的实施方式2的半导体装置的剖面图。

[0032] 符号说明

[0033] 4: Ag层;5、5a、5b、5c、5d、5e、5f、5g:导线;5al、5a2、5a3、5a4、5bl、5b2、5b3、5b4、 5cl、5c2、5dl、5d2、5el、5e2:导线、8:311层;9:半导体元件;10:厶8层;11:弯曲部;12:电路基 板;13:合金层;20:导线构造体;30:半导体装置。

具体实施方式

[0034] 实施方式1.

[0035] 图1是本发明的实施方式1的半导体装置的剖面图以及俯视图。图1(a)是半导体装 置的剖面图,图I (b)是半导体装置的俯视图。半导体装置30具备形成于以硅(Si)、碳化硅 (SiC)等宽带隙半导体材料为基体材料的半导体元件9的Ag层10与形成于电路基板12的Ag 层4之间夹持了的合金层13,合金层13具有由Ag层4、Ag层10的Ag成分和Sn形成了的Ag3Sn的 金属间化合物,包含Ag的多根导线5从合金层13的外周侧延伸地配置。作为安装半导体元件 9的安装基板的电路基板12是DBC (Direct Bonded Cupper)基板,具备绝缘材料2、在绝缘材 料2的上侧形成了的上电极1以及在绝缘材料2的下侧形成了的下电极3。合金层13是金属间 化合物,是例如Ag3Sn。为了形成合金层13,在电路基板12的Ag层4处形成了配置有多根导线 5的导线构造体20。多根导线5在同一方向上从合金层13的外周侧延伸地配置。导线构造体 20形成于比半导体元件9的X方向的宽度cl、Z方向的宽度c2更宽的范围内。导线构造体20的 X方向的宽度是b3、Z方向的宽度是b2。在图1(b)中,明示地记载了多根导线5中的7根导线 5a、5b、5c、5d、5e、5f、5g。配置多根导线5的间距是bl。另外,导线的符号总体上使用5,在区 分说明的情况下使用5a至5g。

[0036] 构成导线构造体20的各导线5在图I (a)、图I (b)中的左侧设置了弯曲部11。在导线 5中,在从半导体元件9的搭载位置向左外侧离开了长度a2的位置,形成球形结合部6,在从 半导体元件9的搭载位置向右外侧离开了长度a3的位置,形成针脚式结合部7。另外,弯曲部 11能够是任意的高度,但在该弯曲部11最终地形成环路时成为最高的位置。长度al是对半 导体元件9的X方向的宽度cl加上长度a2以及长度a3而得到的长度。球形结合部6比导线5的 导线径更大,从球形结合部6的左外侧的端至针脚式结合部7的右外侧的端的长度是b3。

[0037] 接下来,在接合半导体元件9和电路基板12的接合部处形成合金层13时,在本发明 的接合方法中,理论上证明在合金层13中形成金属间化合物Ag3Sn,并且不残留Sn。为了使 得在接合部的内部不残留Sn,尽管有形成条件的最佳值,但在专利文献1、2中,仅示出了形 成Ag3Sn,未在理论上证明在接合部的内部不残留Sn。即,在专利文献1、2所示的数值限定的 范围中,证明Sn未残留的依据不足。

[0038] 图2是说明本发明的合金层的图,图3是示出金属间化合物Ag3Sn的基本特性的图。 最初,使用图3,说明Ag、Sn、Ag3Sn的基本的物性。在图3中,Ag列是关于Ag3Sn的Ag的数值,Sn 列是关于Ag3Sn的Sn的数值,合计列是关于Ag3Sn的数值。关于Ag3Sn,由于Ag和Sn的构成比 在原子% (at%)下是3:1,所以有Ag75at%:Sn25at%。如果为了将其设为质量% (wt%),将 Ag的原子量设为108g/mol、将Sn的原子量设为119g/mol来进行计算,贝Ij有Ag73wt % : Sn27wt%。进而,如果为了将其设为体积% (vol%),将Ag的密度设为10.5g/cm3、将Sn的密 度设为7.4g/cm3来进行计算,贝Ij有Ag66vol% : Sn34vol%。即,即使在Ag的周围无限地存在 Sn,形成Ag3Sn的是Ag的体积的约一半(34/66 = 0.52 N 〇. 5),这以外的Sn不扩散而残留。在 其他见解下,如果Ag形成Ag3Sn,则仅增大Ag的体积的约0.5倍(S卩变成约1.5倍)。

[0039] 使用关于本发明的接合半导体元件9和电路基板12的接合部的简单的模型,来说 明在接合部的内部不残留Sn。由Ag构成的导线(适当地称为Ag导线)5c、5d配置于Sn层8的内 部,在该Sn层8的上侧配置了 Ag层10,在Sn层8的下侧配置了 Ag层4。关于该模型,简单地示出 了如下结构,即对本发明的被接合材料(半导体元件9、上电极1)实施Ag镀层,Ag导线在面内 仅在一个方向上伸展,并且以在焊料熔融时不流过的方式被结合,从其上方使Sn熔融,形成 Ag3Sn (恪点470°C左右)。在包含了导线直径X的Ag导线5c、5d的Sn层8的上下有厚度z的Ag层 l〇、4,Ag导线5c、5d以某个间距y的间隔而排列。图2中的点a是Ag导线5c的圆和Ag层10的接 点,点c是Ag导线5 c的圆和Ag层4的接点。图2中的点b是Ag导线5 d的圆和Ag层10的接点,点d 是Ag导线5d的圆和Ag层4的接点。

[0040] Ag导线5的间距通过导线结合装置而在一定程度上被限制,相对于导线径x(导线 直径X),间距y存在y = 2.5x左右的界限。将间距y的装置上的界限值设为式(1)。间距y需要 式(2)的条件。如果使间距进一步变窄,则导线结合装置接触到邻接的导线。例如,如果是Φ 12μπΐ的Ag导线,则间距是30μΐΉ,如果是Φ 20μΐΉ,则间距是50μπΐ。

[0041] y = 2.5x · · · (1)

[0042] y 会 2 · 5x · · · (2)

[0043] 需要如图2那样,周边的Ag扩散到由点a、b、c、d包围的Sn层8的内部的区域Al,来形 成Ag3Sn。如上所述,如果Ag移动到Sn层8而形成Ag3Sn,则仅增大Ag的体积的约0.5倍,如果 考虑这样的结果,则关于针对Ag3Sn产生的界限值,以下的关系式成立。

[0044] Ag的供给量X0.5兰由abed包围了的区域Al ··· (3)

[0045] 关于图2的剖面具体地应用了该关系式⑶而得到的计算式如以下那样表示。

[0046] 0 · 5 X (2yz+Ji (χ/2)2)兰(xy-π (χ/2)2) · · · (4)

[0047] 此处,左边的2yz是区域Α2和区域A3的合计面积,左边的π (χ/2)2是半圆区域Α4和 半圆区域Α5的合计面积。右边是区域Al的面积。

[0048] 如果使式⑷变形,则经式⑸变成式⑹。

[0049] yz+l/83ix2^xy-2/83ix2 · · · (5)

[0050] yz+3/83ix2^xy · · · (6)

[0051] 此处,如果将表示上述间距y的装置上的界限值的式⑴应用于式(6),则经式(7) 〜(10)变成式(11)。

[0052] 2·5χζ+3/8πχ23 2·5χ2 · · · (7)

[0053] 2·5ζ+3/8πχ会2·5χ · · ·⑻

[0054] 2 · 5ζ 兰(2 · 5-3/8JT) X · · ·⑼

[0055] ((2.5-3/8JT)/2.5) X · · · (10)

[0056] ζ会〇.53χ · · · (11)

[0057] 如果在式(11)中应用表示上述间距y的装置上的界限值的式(1),则得到式(12)。

[0058] z 会 〇.21y · · · (12)

[0059]如果整合以上的结果,贝Ij在Ag导线直径X、间距y、Ag层的厚度z之间,以下的三个式 子成立。

[0060] y = 2.5x · · · (1)

[0061] ζ^Ο.53χ · · · (11)

[0062] z 会 〇.21y · · · (12)

[0063] 进而,还能够计算必要的Sn的量。如果作为Sn的供给方法考虑从箱状的Sn层8供 给,则如以下那样计算Sn层8的必要的厚度t。

[0064] t N (xy-ji (χ/2)2)/y · · · (13)

[0065] 如果在式(13)中应用式⑴来消去y或者x,则得到式(14)、式(15)。

[0066] tN〇.68x · · · (14)

[0067] tN〇.27y · · · (15)

[0068] 实际上,Sn向外浸润扩展,所以需要与上述式(14)、式(15)相比稍微厚地供给。

[0069] 根据上述结果,制作了改变Ag导线径X、间距y、Sn层的厚度z而得到的样品。使用图 1、图4,说明具体的样品制作方法。

[0070] 首先,作为电路基板12,准备市面销售的大小30mmX30mm、厚度1.12mm的DBC基板。 由Cu构成的上电极1、由Si3N4构成的绝缘材料2、由Cu构成的下电极3的厚度分别是0.4mm、 0 · 32mm、0 · 4mm。针对电路基板12,作为Ag层4施加了6 · 5μπι的Ag镀层。DBC基板能够从例如电 气化学工业株式会社购入。Ag镀层能够例如在株式会社太洋工作所中实施。接下来,作为Sn 层8,准备了市面销售的大小100mm X 100mm、厚度9μπι的纯度99 · 5wt %的Sn箱。Sn箱能够从例 如福田金属箱粉工业株式会社购入。接下来,作为半导体元件9,准备大小7mm X 7mm、厚度 0.25mm的SiC元件。在SiC元件的背面,6.5μηι的Ag被金属化,开$成了Ag层10。这样的SiC元件 能够从例如新日铁住金株式会社购入。

[0071] 接下来,准备了 Φ 12μηι、长度IOOm卷的纯度99.99wt%的Ag的导线5 Jg导线能够从 例如野毛电气工业购入。将该Ag导线通过市面销售的导线结合器结合到上述电路基板12上 的Ag层4。导线结合器是例如株式会社1^^〇生产的?8-910、株式会社新川生产的1]1'(:-5000。

[0072] 详细说明导线结合(导线连接工序)。最初,对导线5的前端喷吹氢5%的氮气,通过 放电,按导线径的1.5〜1.8倍左右来在能够稳定地形成完全球形的球的放电条件(放电电 流、时间、气体喷吹量)下制作球,对电路基板12上的Ag层4施加超声波和压力,在从半导体 元件9的搭载位置向外侧离开了 a2 = 2mm的位置,进行球形结合部6的形成。此时,如果完全 球形未稳定地形成而引起偏芯,则在进行了结合时,压力被不均匀地施加,所以不能紧密地 结合,因此需要注意。另外,在偏芯了的情况下,无法结合到目标的位置,间距不稳定,所以 需要注意。

[0073] 接下来,也可以设置弯曲部11,使导线5伸展至比半导体元件9的元件尺寸cl = 7mm 更长的长度al = IOmm,施加超声波和压力,在从半导体元件9的元件搭载位置离开了a3 = Imm的位置,实施针脚式结合部7的形成。另外,弯曲部11能够是任意的高度,但在该弯曲部 11最终地形成环路时,成为最高的位置,所以在市面销售的装置中以将环路高度dl调整到 作为界限的50μπι。另外,以使元件搭载位置处的环路高度d2为dl的80%以下的方式调整。这 样做的原因在于,如果在元件搭载位置内有最大环路高度的部分,则当在此后的接合中施 加了压力时,如图7、图8那样,导线16重叠而被压碎,所以不优选。图7以及图8是说明比较例 的半导体元件和导线的位置的图。图7示出半导体元件9接触到导线16之前的状态,图8示出 半导体元件9按压了导线16的状态。

[0074] 在实验上确认:为了使导线不重叠,避开最大环路高度的部分,只要是至少最大环 路尚度的80%以下的部位,就能够如图5、图6所不地抑制。图5以及图6是说明本发明的实施 方式1的半导体元件和导线的位置的图。图5示出半导体元件9接触到导线5之前的状态,图6 示出半导体元件9按压了导线5的状态。

[0075] 按照间距bl = 30ym,在Y方向上,反复进行以上的导线连接工序直至比元件尺寸c2 更长的b2的范围。于是,在电路基板12上的Ag层4上,在比半导体元件9的元件尺寸(芯片接 合区域15)更宽的区域(al、b2的范围)中,遍布Ag导线,能够形成导线构造体20 (导线构造体 形成工序)。将在电路基板12上的Ag层4上形成了导线构造体20的构造体称为带导线的电路 基板21。芯片接合区域15是与半导体元件9的安装面的面积相等的区域。

[0076] 接下来,在遍布了 Ag的导线5的带导线的电路基板21处的导线5的最大环路高度dl 的80%以下的部位,依次放置了Sn层8和形成有Ag层10的半导体元件9 (半导体元件搭载工 序)。针对该制造中间体,在蚁酸还原气氛中,进行180°C、10分钟的热处理,去除了各部件表 面的氧化膜。接下来,进行真空吸引,使用简易的加压工具,在IMPa下进行加压的同时,进行 了300°C、10分钟的热处理(合金层形成工序)。

[0077] 说明加压。在本次的情况下,施加I MPa的压力。半导体元件9的尺寸是7mm X 7mm,戶斤 以接合面积是49mm2,此处,为了施加IMPaS卩49N的载荷,施加4.9kgf N 5kg的载荷即可。如果 是该程度的载荷,则无需加压机等大型的装置,能够通过带停止器的带弹簧的简易工具容 易地执行。另外,例如,能够从东海弹簧工业进行弹簧的设计、购入。使用该弹簧的加压工具 能够通过例如岸田工程来制作。

[0078]接下来,使接合结束了的制造中间体冷却,取出该制造中间体,通过扫描型电子显 微镜(Scanning Electron Microscope,SEM)观察接合部剖面。其结果,接合部仅由Ag以及 Ag3Sn形成,确认了没有Sn单相。图9示出代表性的接合部的剖面图像以及组成分析结果。在 图9中,示出了接合部的剖面图像41、Ag元素分布42、Sn元素分布43。接合部的剖面图像41是 使包含合金层13的接合部的剖面SEM图像中的半导体元件9、合金层13、上电极1的边界变得 明确的图像。标尺45表示ΙΟμπι的长度。符号1^1丄2丄3丄4表示48元素或者511元素中的4个阶 段的检测水平区域,按照从检测量少的区域到多的区域的顺序为Ll〜L4。在Ag元素分布42 中,L4区域是Ag单相,L3区域是形成有Ag3Sn的Ag3Sn相。Ag单相在Sn元素分布43中,相应于 未检测到Sn元素的Ll区域。Ag3Sn相在Sn元素分布43中,相应于L2区域。另外,在Ag元素分布 42中,在上下的Ll区域和L4区域的间隙中薄薄地存在L3区域,但为了避免附图变得复杂而 省略。另外,在通过透射X线装置观察接合部,对透射X线图像进行2值化而计算出空隙率时, 相对于目标的空隙率10%以下,空隙率优选为4%。将这样制造了的样品作为实施例1。

[0079] 接下来,按照与上述相同的工艺,如图10所示,制造了9个将Ag的导线5的导线径 (导线直径)x设为12〜50μπι且变更了间距y的样品。将各个样品作为实施例2〜10。图10是示 出本发明的实施例以及比较例的特性的图。在实施例2〜10中,针对各导线径,将间距y设为 根据式⑴计算出的2.5x,将半导体元件9的Ag层10、带导线的电路基板21的Ag层4设为根据 式(11)、(12)计算出的范围内的厚度z。关于实施例2〜10,通过SEM观察合金形成状态,根据 透射X线图像计算出空隙率。其结果,如图10所示,在实施例2〜10中,合金形成状态良好,空 隙率是4%以下,为良好。

[0080] 在图10中,记载了各样品的制造条件以及作为检查结果的合金形成状态和空隙 率。导线拉伸方向表示1个方向或者2个方向以上的多个方向。必要镀层厚度是满足式(11) 以及式(12)的Ag层4、10的厚度z。实施的镀层厚度z是各样品的Ag层4、10的厚度。理论式的 符合表示满足(显示0K)或者不满足(显示NG)作为理论式的式(1)、式(11)、式(12)。必要Sn 箱厚是满足式(14)以及式(15)的Sn层8的厚度t。实际的Sn箱厚t是各样品的Sn层8的厚度。 合金形成表示接合部的合金层13是否良好。在合金形成良好的情况下,进行OK的显示,接合 部仅由Ag以及Ag3Sn形成,表示无Sn单相。在合金形成不良的情况下,进行NG的显示。

[0081] 通过如图10的实施例1〜10所示,Sn层8的厚度为必要厚度以上,并且满足式(1)、 式(11)、式(12)所示的条件,从而合金形成状态、空隙率全部良好。

[0082] 接下来,说明图10所示的比较例1〜4。按照与上述相同的工艺,制造了 4个将Ag的 导线5的导线径X设为12〜50μπι、将间距y设为根据式(1)计算出的30〜125μπι的样品。在比较 例1〜4中,针对各导线径,将间距y设为根据式(1)计算出的2.5χ,将半导体元件9的Ag层10、 带导线的电路基板21的Ag层4设为脱离了根据式(11)、(12)计算出的范围的厚度z。针对比 较例1〜4,通过SEM观察合金形成状态,根据透射X线图像计算出空隙率。其结果,如图10所 示,在比较例1〜4中,空隙率如果在目标的10%以下则为良好,但关于合金形成状态,由于 在一部分残留Sn单相,所以是不良(NG)。

[0083] 接下来,说明图11所示的实施例11〜14。图11是示出本发明的实施例以及比较例 的特性的图。按照与上述相同的工艺,制造了4个将Ag的导线5的导线径X设为12〜50μπι、将 间距y设为满足式⑵的40〜140μηι的样品。在实施例11〜14中,针对各导线径,将间距y设为 满足式⑵的比2.5x大的值,将半导体元件9的Ag层10、带导线的电路基板21的Ag层4设为根 据式(11)、(12)计算出的范围内的厚度z。关于实施例11〜14,通过SEM观察合金形成状态, 根据透射X线图像计算出空隙率。其结果,如图11所示,在实施例11〜14中,合金形成状态良 好,空隙率是4%以下,为良好。

[0084] 接下来,说明相当于专利文献1、2的比较例5、6。此前,在作为本发明的特征的在一 个方向上使Ag的导线5伸展的状态下进行了评价,但本次,制作了在2个方向(X方向、Y方向) 上使Ag的导线5伸展的样品。首先,按照与上述相同的工艺,与实施例7相同地,将导线径X设 为30μπι、将间距y设为75μπι、将Ag层4、10的厚度2设为16.5以111,在乂方向上使导线5伸展之后, 使电路基板12旋转90°C,并且在此基础上,以使导线彼此不接触的方式任意地调整,在Y方 向上结合导线5。接下来,在导线5的最大环路高度dl的80%以下的部位,依次放置Sn层8和 形成有Ag层10的半导体元件9 (半导体元件搭载工序)。针对该制造中间体,执行与实施例1 〜14相同的工艺,制造比较例5、6。比较例5和比较例6的差异是Sn层8的厚度,在比较例5的 情况下是50mi,在比较例6的情况下是40μπι。

[0085] 关于比较例5、6,通过SEM观察合金形成状态,根据透射X线图像,计算出空隙率。其 结果,在Sn层8的厚度是50μπι的比较例5中,存在Sn单相,合金形成状态不良,并且空隙率也 是15 %,无法解除目标的10 %以下这样的条件。在Sn层8的厚度是40μηι的比较例6中,合金形 成状态良好,但Sn的量不足,并且无法完全去除空隙,所以空隙率恶化为20%。

[0086] 在实施方式1的半导体装置30中,在电路基板12和半导体元件9等的接合部、即接 合对象物间被接合了的接合部处,形成即使在300 °C下也不熔融的、Ag和Sn的金属间化合物 Ag3Sn (熔点470°C左右),所以能够形成高熔点的合金层13。在实施方式1的半导体装置30 中,在电路基板12、半导体元件9等接合对象物处形成Ag层4、10,在作为一方的接合对象物 的电路基板12的Ag层4处,多个Ag的导线5在面内仅在一个方向上伸展,形成了以在接合时 使Ag的导线5不流过的方式结合了的导线构造体20。实施方式1的半导体装置30的特征在 于,在电路基板12上的Ag层4上形成了导线构造体20的带导线的电路基板21上,使Sn熔融, 具备由金属间化合物Ag3Sn (恪点470°C左右)和Ag构成的合金层13。在实施方式1的半导体 装置30中,能够在电路基板12和半导体元件9等的接合部、即接合对象物间被接合了的接合 部处,形成空隙少的高熔点的金属间化合物Ag3Sn。

[0087] 在实施方式1的半导体装置30中,通过在一个方向上使Ag的导线5伸展,在Sn熔融 而形成金属间化合物Ag3Sn时,确保能够去除不少产生的空隙的路线,所以与在X方向以及Y 方向上使Ag的导线伸展的导线网相比,能够降低空隙。另外,通过使用Ag的导线5,在电路基 板12和半导体元件9等的接合部处,从导线5、Ag层供给充分的量的Ag,所以能够以充分的厚 度形成金属间化合物Ag3Sn,能够使接合厚度、即合金层13的厚度变得均匀。在实施方式1的 半导体装置30中,在电路基板12和半导体元件9等的接合部处不形成接合厚度极端地薄的 部位,所以具有抑制在接合部处发生裂纹的效果。

[0088] 另外,接合时的气氛不限于蚁酸,而也可以是醋酸、柠檬酸、甲苯酸、氢。Ag导线径 (导线直径X)在本次的试验中设为12〜50μπι。但是,关于一般的导线结合器,将50μπι左右设 为界限,但只要能够定制成能够对大于50μηι的导线进行结合,则Ag导线径不限于12〜50μηι。 但是,如果使导线径大于50μπι,则间距y必然地变大,用Ag3Sn覆盖的体积增加,所以需要比 Ag层4、10更厚,成本增大,所以不优选。另外,为了形成Ag3Sn,必须提高温度且延长时间,制 造成本增大、生产节拍变长,所以不优选。相反地,在Ag导线径小于12μπι的情况下,难以稳定 地进行拉线,在拉线时或者导线结合时有断裂的可能性,所以不优选。因此,Ag导线径优选 为 12 〜50μηι。

[0089] 关于接合时的加压力,能够紧密地按压浮起的导线5即可,在0. IMPa以上时,得到 同样的效果。如果加压力小于O.IMPa,则无法紧密地施加载荷,接合厚度不稳定。另外,如果 在Ag导线结合之后、且在还原气氛中接合之前已经施加了一次IMPa左右的加压力,则在接 合时Ag导线的形状更稳定,所以优选。

[0090] 接合时的温度以及时间在Ag和Sn扩散完成之前是任意的条件。图12示出在实验中 也求出了 Ag3 Sn的成长速度的结果。图12是示出本发明的金属间化合物Ag3Sn的每个温度以 及每个时间下的厚度的图。在Imm厚且IOmm X IOmm的Ag板上,放置300μηι厚的Sn颗粒,在蚁酸 还原气氛下,在温度以及时间的任意的条件下进行热处理而制作样品。之后,如果通过SEM 观察剖面来调制Ag3Sn的厚度,则如图12那样,在250°C、1分钟的热处理条件的样品中还有 平均 3.8μηι。

[0091] 为了参考,在Imm厚且IOmmX IOmm的Cu板上放置300μπι厚的Sn颗粒,在蚁酸还原气 氛下,在任意的条件下进行热处理,之后,如果通过SEM观察剖面而调查Cu和Sn的合金层的 厚度,则是〇. 7μηι左右,确认了在Ag的情况下扩散快5〜6倍。

[0092] 关于箱状的Sn层8,在本次使用了SnlOO%,但不限于此。例如,也可以在Sn内包含 八8、(:11、513、81、111、211、]\%、51、?、6&、附、(:〇、66中的至少1种以上。

[0093] 导线5的材质优选为Ag,但除了 Ag以外,在听、(:11、?6、411下,也得到同样的效果。在 导线5的材质是Ag以外的情况下,Ag层4、Ag层10的材质采用相应的导线5的材质。另外,也可 以在导线5的Ag内,添加?(1、呢、(:1^6^11、?1六1、311、313、11、?中的至少1种以上。另外,接合 部不限于半导体元件9与电路基板12之间的接合,也可以用于电路基板12和在其下部配置 的散热板、半导体元件9和引线框架的接合部等。

[0094] 半导体元件9也可以是以硅晶片为基体材料的一般的元件,但在本发明中,能够应 用碳化硅(SiC)、氮化镓(GaN)系材料、或者金刚石这样的带隙比硅宽的所谓宽带隙半导体 材料。作为半导体元件9的器件种类,没有特别限定,能够搭载IGBT (Insulated Gate Bipolar Transistor,绝缘概双极型晶体管)、M0SFET (Metal Oxide Semiconductor Field-Effect-Transistor,金属氧化物半导体场效应晶体管)那样的开关元件、二极管那 样的整流元件。例如,在作为开关元件、整流元件发挥功能的半导体元件9中使用了碳化娃 (SiC)、氮化镓(GaN)系材料或者金刚石的情况下,相比于以往以来使用的由硅(Si)形成的 元件,电力损失更低,所以能够使功率模块高效化。另外,耐电压性高,且容许电流密度也 高,所以能够使功率模块小型化。进而,宽带隙半导体元件的耐热性高,所以能够进行高温 动作,还能够实现散热片的小型化、水冷部的空冷化,所以能够使具备散热片的功率模块进 一步小型化。

[0095] 如以上那样,根据实施方式1的半导体装置30,其特征在于,具备在安装基板(电路 基板12)处形成了的第一Ag层4、与在半导体元件9处形成了的第二Ag层10之间挟持了的合 金层13,合金层13具有由第一 Ag层以及第二Ag层的Ag成分和Sn形成了的Ag3Sn的金属间化 合物,从该合金层13的外周侧延伸地配置了包含Ag的多根导线5,即具备对具有Ag3Sn的金 属间化合物的合金层13连接了包含Ag的多根导线5的构造,所以在导线5之间确保能够去除 在形成合金层13时不少产生的空隙的路线,能够在将接合对象物之间接合了的接合部处, 形成空隙少的高熔点的金属间化合物。

[0096] 另外,根据实施方式1的半导体装置30的制造方法,其特征在于,包括:导线构造体 形成工序,在形成于安装基板(电路基板12)的第一Ag层4处形成平行或者放射状地配置了 包含Ag的多根导线5的导线构造体20;半导体元件搭载工序,在导线构造体20中,隔着Sn层 8,搭载安装面的面积比导线构造体20的外形面积更小并且在安装面形成了第二Ag层10的 半导体元件9;以及合金层形成工序,在半导体元件搭载工序之后,进行热处理,在接合了安 装基板(电路基板12)和半导体元件9的接合部处,形成具有Ag3Sn的金属间化合物的合金层 13,所以能够确保能够去除在合金层形成工序时不少产生的空隙的路线,所以能够在将接 合对象物之间接合了的接合部处,形成空隙少的高熔点的金属间化合物。

[0097] 实施方式2.

[0098] Ag的导线5的配置形状不限于在实施方式1中示出了的配置形状,也可以是例如如 图13那样放射状地配置了的配置形状。图13是示出本发明的实施方式2的导线的配置的图。 图13所示的导线构造体20是用4根导线5&1、5&2、5&3、5&4划分了的区域为相同的形状的例 子。为便于说明,将导线5al〜导线5a2称为第一区域,将导线5a2〜导线5a3称为第二区域, 将导线5a3〜导线5a4称为第三区域,将导线5a4〜导线5al称为第四区域。

[0099] 导线5al、导线5a3是按照同一直线状配置的,导线5a2、导线5a4是按照同一直线状 配置的。导线5a2是与导线5al以及导线5a3垂直地配置的,导线5a4也是与导线5al以及导线 5a3垂直地配置的。被配置为在第一区域中导线5bl与导线5al以及导线5a2的角度相等。同 样地,被配置为在第二区域中导线5b2与导线5a2以及导线5a3的角度相等,被配置为在第三 区域中导线5b3与导线5a3以及导线5a4的角度相等,被配置为在第四区域中导线5b4与导线 5a4以及导线5al的角度相等。

[0100] 以第一区域为例子,说明其他导线的配置。被配置为导线5cl与导线5al以及导线 5bl的角度相等。同样地,被配置为导线5c2与导线5bl以及导线5a2的角度相等。导线5dl配 置于导线5al与导线5cl之间,导线5d2配置于导线5c2与导线5a2之间。导线5el配置于导线 5cl与导线5bl之间,导线5e2配置于导线5bl与导线5c2之间。图13所示的导线构造体20成为 由32根导线5形成的外周形状带有圆角的四边形的形状。

[0101] 图14是说明本发明的实施方式2的半导体元件和导线的位置的图,图15是本发明 的实施方式2的半导体装置的剖面图。图14以及图15示出切断了导线5al以及导线5a3的情 况的剖面。图14示出半导体元件9接触到带导线的电路基板21的导线5之前的状态。另外,在 图14以及图15中,省略导线5al以及导线5a3以外的其他导线5。在实施方式2的半导体装置 30中,在导线构造体形成工序的导线连接工序中导线5从外侧朝向中心侧进行导线结合这 一点不同,但其他工序相同。在半导体元件搭载工序中,半导体元件9与实施方式1同样地, 搭载于元件搭载位置处的导线5的环路高度d2为dl的80%以下那样的位置。在半导体装置 30中,从合金层13的外周侧按照放射状延伸地配置了多根导线5。

[0102] 在实施方式2的导线构造体20中,在Sn熔融而形成金属间化合物Ag3Sn时,从中心 向外周侧去除不少产生的空隙。即便如图13所示,在Sn熔融而形成金属间化合物Ag3Sn时, 也确保了去除不少产生的空隙的路线,所以与实施方式1同样地,得到空隙少且良好的接 合。另外,在图13〜图15中,示出了针脚式结合部7处于导线构造体20的大致中央的例子,但 不限于此,针脚式结合部7处于导线构造体20的内侧即可。

[0103] 另外,本发明能够在该发明的范围内组合各实施方式、或者使各实施方式适当地 变形、省略。

Claims (19)

1. 一种半导体装置,将半导体元件与安装基板接合,所述半导体装置的特征在于, 具备在形成于所述安装基板的第一 Ag层和形成于所述半导体元件的第二Ag层之间挟 持了的合金层, 所述合金层具有由第一 Ag层以及第二Ag层的Ag成分和Sn形成了的Ag3Sn的金属间化合 物,包含Ag的多根导线从该合金层的外周侧延伸地配置。
2. 根据权利要求1所述的半导体装置,其特征在于, 所述导线是在同一方向上延伸地配置的。
3. 根据权利要求1所述的半导体装置,其特征在于, 所述导线是从所述合金层的外周侧按照放射状延伸地配置的。
4. 根据权利要求1至3中的任意一项所述的半导体装置,其特征在于, 在所述导线的材质中,除了Ag以外,还添加了Pd、Ni、Cu、Fe、Au、Pt、Al、Sn、Sb、Ti、P中的 至少1种以上。
5. 根据权利要求1至3中的任意一项所述的半导体装置,其特征在于, 所述半导体元件是宽带隙半导体材料,是碳化硅、氮化镓系材料或者金刚石中的某一 个。
6. 根据权利要求4所述的半导体装置,其特征在于, 所述半导体元件是宽带隙半导体材料,是碳化硅、氮化镓系材料或者金刚石中的某一 个。
7. —种半导体装置的制造方法,制造在安装基板上接合了半导体元件的半导体装置, 所述半导体装置的制造方法的特征在于,包括: 导线构造体形成工序,在形成于所述安装基板的第一 Ag层处,形成平行或者放射状地 配置了包含Ag的多根导线的导线构造体; 半导体元件搭载工序,在所述导线构造体中,隔着Sn层搭载安装面的面积比所述导线 构造体的外形面积更小并且在所述安装面形成了第二Ag层的所述半导体元件;以及 合金层形成工序,在所述半导体元件搭载工序之后,进行热处理,在接合了所述安装基 板和所述半导体元件的接合部处,形成具有Ag3Sn的金属间化合物的合金层。
8. 根据权利要求7所述的半导体装置的制造方法,其特征在于, 在所述导线构造体形成工序中,所述导线构造体被形成为在外周侧具有成为该导线构 造体的最大高度的弯曲部, 在所述半导体元件搭载工序中,所述半导体元件搭载于所述导线构造体中的比最大高 度的80%低的区域。
9. 根据权利要求7或者8所述的半导体装置的制造方法,其特征在于, 所述导线构造体形成工序包括将所述导线以相互平行的方式连接到所述第一 Ag层的 导线连接工序。
10. 根据权利要求7或者8所述的半导体装置的制造方法,其特征在于, 所述导线构造体形成工序包括在使所述导线从所述导线构造体的外侧向内侧延伸的 同时连接到所述第一 Ag层的导线连接工序。
11. 根据权利要求9所述的半导体装置的制造方法,其特征在于, 在将所述第一 Ag层以及所述第二Ag层的厚度设为z、将所述导线的导线直径设为X、将 配置所述导线的间距设为y的情况下,满足y = 2.5x、z>0.53x、zX).21y。
12. 根据权利要求11所述的半导体装置的制造方法,其特征在于, 在将所述Sn层的厚度设为t的情况下,满足
Figure CN105247666BC00031
13. 根据权利要求7或者8所述的半导体装置的制造方法,其特征在于, 所述导线的导线直径是12mi以上且50μπι以下。
14. 根据权利要求7或者8所述的半导体装置的制造方法,其特征在于, 所述第一 Ag层以及所述第二Ag层的厚度是6 · 3μηι以上且26 · 3μηι以下。
15. 根据权利要求9所述的半导体装置的制造方法,其特征在于, 配置所述导线的间距是30μι以上且125μπι以下。
16. 根据权利要求11所述的半导体装置的制造方法,其特征在于, 配置所述导线的间距是30μι以上且125μπι以下。
17. 根据权利要求12所述的半导体装置的制造方法,其特征在于, 配置所述导线的间距是30μι以上且125μπι以下。
18. 根据权利要求12所述的半导体装置的制造方法,其特征在于, 所述Sn层的厚度是9μηι以上且35μηι以下。
19. 根据权利要求7或8所述的半导体装置的制造方法,其特征在于, 所述Sn层除了 Sn以外,还包含六8、〇1、513、8丨、111、211、]\%、3丨、?、63、附、(:〇、66中的至少1种 以上。
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