CN105097710A - 薄膜晶体管阵列基板及其制造方法 - Google Patents

薄膜晶体管阵列基板及其制造方法 Download PDF

Info

Publication number
CN105097710A
CN105097710A CN201410170902.XA CN201410170902A CN105097710A CN 105097710 A CN105097710 A CN 105097710A CN 201410170902 A CN201410170902 A CN 201410170902A CN 105097710 A CN105097710 A CN 105097710A
Authority
CN
China
Prior art keywords
layer
insulating barrier
electrode
igzo
array substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410170902.XA
Other languages
English (en)
Inventor
辛龙宝
黄添旺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EverDisplay Optronics Shanghai Co Ltd
Original Assignee
EverDisplay Optronics Shanghai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EverDisplay Optronics Shanghai Co Ltd filed Critical EverDisplay Optronics Shanghai Co Ltd
Priority to CN201410170902.XA priority Critical patent/CN105097710A/zh
Priority to TW103119659A priority patent/TWI556415B/zh
Priority to KR1020140139744A priority patent/KR101659466B1/ko
Priority to JP2014213643A priority patent/JP2015211212A/ja
Priority to US14/669,809 priority patent/US20150311233A1/en
Publication of CN105097710A publication Critical patent/CN105097710A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明提出一种薄膜晶体管阵列基板及其制造方法，包括：在透光的基板上形成栅极，并在所述栅极上方设置覆盖所述栅极和透光基板的第一绝缘层；在所述第一绝缘层的上方形成IGZO层；对所述IGZO层进行处理，以形成源极和漏极；在经过步骤S3处理后的所述IGZO层的上方设置第二绝缘层，对所述IGZO层进行绝缘保护，并在所述第二绝缘层中开设连通至所述IGZO层的接触孔以及在所述接触孔形成电极。由于本发明不需要形成第二金属层，因而避免了形成第二金属层中进行光刻工艺的过程，缩减了工艺流程、提高了工作效率，并减小TFT尺寸。

Description

薄膜晶体管阵列基板及其制造方法
技术领域
本发明涉及薄膜晶体管(TFT)阵列基板及其制造方法，可用于有源矩阵有机发光二极管(AMOLED)。
背景技术
现行制造有源矩阵有机发光二极管(ActiveMatrixOrganicLightEmittingDiode，AMOLED)的薄膜场效应晶体管(ThinFilmTransistor，TFT)阵列基板主要是以低温多晶硅(LTPS)、非晶硅(a-Si)作为半导体材料。制作方法以镀膜、光刻、蚀刻为主。制作流程如图1和图2所示。
如图1，LTPS作为半导体材料的TFT阵列基板制作流程为：
S1’：在玻璃基板上形成LTPS半导体层；
S2’：在LTPS半导体层上形成栅绝缘层和具有栅极(Gate)的第一金属层；
S3’：在第一金属层上形成第一绝缘层，以对第一金属层进行绝缘保护，并在第一绝缘层上形成贯穿第一绝缘层的两个第一接触孔；
S4’：在第一绝缘层的上方形成具有源极(Sourceelectrode)和漏极(Drainelectrode)的第二金属层；
S5’：在第二金属层上形成第二绝缘层，对第二金属层进行绝缘保护，并在第二绝缘层上对应于两个第一接触孔的位置形成与第一接触孔连通的两个第二接触孔；
S6’：在第一和第二接触孔中沉积金属材料以制作电极；
S7’：在电极的上方形成第三绝缘层，对该电极进行绝缘保护。
如图2，a-Si作为半导体材料的TFT阵列基板的制作流程为：
S1”：在玻璃基板上形成具有栅极(Gate)的第一金属层，并在第一金属层上方形成第一绝缘层，对第一金属层进行绝缘保护；
S2”：在第一绝缘层上形成a-Si半导体层；
S3”：在a-Si半导体层上形成具有源极(Source)和漏极(Drain)的第二金属层；
S4”：在第二金属层的上方形成第二绝缘层，对第二金属层进行绝缘保护，并在第二绝缘层上开孔，形成接触源极和漏极的两个接触孔；
S5”：在两个接触孔中沉积金属材料以制作电极；
S6”：在电极的上方形成第三绝缘层，对该电极进行绝缘保护。
现有制造AMOLED的TFT阵列基板的技术均需要重复上述制作流程，不仅需要长时间的制作，而且非常耗费人力及影响设备的稼动率。
发明内容
本发明的目的是提出一种TFT阵列基板及其制造方法，能够缩短制造流程，提高设备稼动率，并减小TFT阵列基板的尺寸。
为实现上述目的，本发明提出一种TFT阵列基板的制造方法，包括步骤：
S1：在透光基板上形成栅极，并在所述栅极的上方设置覆盖所述栅极和所述透光基板的第一绝缘层；
S2：在所述第一绝缘层的上方形成图案化的IGZO层；
S3：对所述IGZO层进行处理，以形成源极和漏极；
S4：在经过步骤S3处理后的所述IGZO层的上方设置第二绝缘层，对所述IGZO层进行绝缘保护；
S5：在所述第二绝缘层中开设连通至所述源极/漏极的接触孔，并在所述接触孔中沉积电极。
在本发明一实施例中，在所述步骤S2中，所述IGZO层是呈岛状覆盖在所述第一绝缘层上，并具有位于所述栅极上方并对应所述栅极位置的第一区域和相邻于所述第一区域的第二区域。
在本发明一实施例中，所述步骤S3包括：
S3-1：形成IGZO材料层，对IGZO材料层进行光刻工艺和蚀刻工艺，形成位于栅极上方的图案化的IGZO层；
S3-2：从所述透光基板下方照射光，使所述第二区域在光照之后具有导电特性，从而以自对准方式形成源极和漏极。
在本发明一实施例中，所述第一区域在光照之后保留半导体特性。
在本发明一实施例中，，在所述步骤3-2中，是利用UV光或近UV频段的光进行光照。
在本发明一实施例中，所述步骤S1中是在所述透光基板上形成第一金属层，并通过光刻工艺和蚀刻工艺形成所述栅极。
在本发明一实施例中，所述步骤S5中是在所述接触孔中沉积金属材料以形成所述电极。
在本发明一实施例中，还包括：
在设置第二绝缘层之后，从基板的上方对所述IGZO层的一部分照射光，从而形成用于电容器的一个电极。
在本发明一实施例中，所述透光基板为玻璃基板。
本发明还提出一种TFT阵列基板，包括
透光基板；
栅极；
设置在所述栅极上方的第一绝缘层；
设置在所述第一绝缘层上方的用于TFT的IGZO层；
设置在所述IGZO层上方的第二绝缘层，所述第二绝缘层上开设有连通所述IGZO层的接触孔；
设置在所述接触孔中的电极；
其中，所述IGZO层包括沟道区以及与栅极自对准的源极和漏极，所述源极和漏极的电阻小于所述沟道区的电阻。
在本发明一实施例中，所述源极和漏极是通过以UV光或近UV频段的光照射所述IGZO层而形成。
在本发明一实施例中，还包括电容器，该电容器的一个电极与栅极(G)位于同一金属层，另一个电极由IGZO层形成并与用于TFT的IGZO层位于同一层。
在本发明一实施例中，所述透光基板为玻璃基板。在本发明TFT阵列基板的一实施例中，所述基板为玻璃基板。
本发明使用铟镓锌氧化物(IGZO)作为半导体层，利用IGZO材料在紫外线的照射下能够具有导体特性的性能，可以在制作源极、漏极以及其他金属走线的同时完成欧姆接触，可以省略现有技术中形成具有源极和漏极的第二金属层的步骤。由于本发明不需要形成第二金属层，因而避免了形成第二金属层中进行光刻工艺过程，缩减了工艺流程、提高了工作效率，并减小TFT尺寸。
附图说明
图1所示为现有的LTPS作为半导体材料的TFT阵列基板制作流程图；
图2所示为现有的a-Si作为半导体材料的TFT阵列基板制作流程图；
图3所示为本发明一实施例中TFT阵列基板的制造方法的流程图；
图4所示为图3的具体步骤流程图。
图5A至图5F为图3中步骤S1至步骤S6的示意图。
具体实施方式
图3所示为本发明一实施例中TFT阵列基板的制造方法的流程图，如图3所示，TFT阵列基板的制造方法包含如下步骤：
S1：在透光的基板10上形成具有栅极G的图案化的第一金属层，并在第一金属层的上方设置第一绝缘层20，第一绝缘层20覆盖具有栅极G的第一金属层；第一金属层可为Mo层、Al层、Ti层、Ag层或ITO层，或上述层的组合。
S2：在第一绝缘层20的上方形成图案化的铟镓锌氧化物(IGZO)层30；
S3：对IGZO层30进行处理，在IGZO层30上形成源极和漏极；
S4：在上一步骤处理后的IGZO层30的上方设置第二绝缘层40，对IGZO层30进行绝缘保护，并在第二绝缘层40上开设连通至IGZO层的接触孔41；
S5：在接触孔41中沉积金属材料制作电极50；电极50为Mo、Al、Ti、Ag或ITO材料制成，或上述材料堆叠形成的组合。
S6：在电极50的上方形成第三绝缘层60，以对电极50进行绝缘。
在一实施例中，如图4所示，对IGZO层30进行处理的步骤S3可包括：
S3-1：形成IGZO材料层，对IGZO材料层进行光刻工艺和蚀刻工艺，形成位于栅极G上方的图案化的IGZO层30。
S3-2：利用UV光或者近UV频段的光从基板10下方进行照射，由于栅极G的阻挡，使得栅极G上方未被照射到的IGZO区域仍具有半导体特性，而被照射的其他IGZO区域具有导体特性。这一步骤可在IGZO图案中形成源极和漏极。
这里，光刻工艺是指将光罩(Mask)上的主要图案先转移至感光材料上，利用光线透过光罩照射在感光材料上，再以溶剂浸泡将感光材料受光照射到的部份加以溶解或保留，如此所形成的光阻图案会和光罩完全相同或呈互补。由于光刻工艺是本领域普通技术人员所公知的工艺，在此不再赘述。
图5A至图5E所示为对应于图3中的S1至S6的示意图，显示了图3所示实施例的TFT阵列基板制作的每一步骤，以下分别进行说明。
如图5A所示，在步骤S1中，首先在基板10上形成第一金属层，再通过光刻工艺和蚀刻工艺对第一金属层进行图案化处理，形成栅极G。在第一金属层的上方设置第一绝缘层20，第一绝缘层20覆盖基板10和栅极G；
接着，如图5B所示，在第一金属层的上方通过沉积、光刻和蚀刻工艺形成图案化的IGZO层30。IGZO层30呈岛状位于第一绝缘层20上，并具有位于栅极G正上方并对应栅极G位置的第一区域31和相邻于第一区域31并且未对应于栅极G位置的第二区域32。
接着，如图5C所示，利用UV光或者近UV频段的光从基板10的下方进行照射，使得IGZO层30中位于栅极G上方的第一区域31由于被栅极G阻挡而不能被照射到，从而保留半导体特性；而未对应于栅极G位置的第二区域32被照射到而具有导体特性。因此，这一步骤可通过自对准方式形成源极和漏极。所述第一区域31和所述第二区域32中一者形成源极，另一者形成漏极。例如，当所述第一区域31形成源极，则所述第二区域32形成漏极；当所述第二区域32形成源极，则所述第一区域31形成漏极。
在上述实施例中，近UV频段的光是指波长在350um至450um范围内的光，并且UV光或者近UV频段的光仅是举例说明，本领域技术人员应当了解，也可以使用其他能够使IGZO材料层被照射而具有导电特性的光照进行替代。
接着，如图5D所示，对上一步骤经过照射的IGZO层30的上方设置第二绝缘层40，对IGZO层30进行绝缘保护，并在第二绝缘层40上开设连通至IGZO层30的源极和漏极的接触孔41，其中接触孔41贯通第二绝缘层40，并连通IGZO层30中的源极和漏极。
接着，如图5E所示，在接触孔41中制作电极50，在本实施例中，是通过沉积金属材料进行制作。
接着，如图5F所示，在电极50的上方形成第三绝缘层60，以对电极50进行绝缘保护。
另外，根据一实施方式，在设置第二绝缘层40之后，可以在第二绝缘层40上形成覆盖用于TFT的IGZO层30的阻挡UV光的掩模，并暴露用于电容器的IGZO层。利用UV光或者近UV频段的光从基板10的上方进行照射，使得用于电容器的IGZO层被照射到而具有导体特性，从而作为电容器的一个电极。
上述实施例中，第一、第二和第三绝缘层材料可以为SiOx、SiNx、SiOxNy或有机材料，本发明并不作出限制。同时，第一、第二和第三绝缘层材料不需要完全相同，例如第一绝缘层材料为SiOx、第二绝缘层材料为SiOx加SiNx,第三绝缘层材料为SiNx。
如图5F所示，根据本发明实施方式制造的TFT阵列基板包括基板10、具有栅极G的第一金属层、设置在栅极G上方的第一绝缘层20、设置在第一绝缘层20上方的包括沟道区、源极和漏极的IGZO层30、设置在IGZO层30上方的第二绝缘层40、和电极50。第二绝缘层40中形成有连通IGZO层30的接触孔41，电极50设置在接触孔41中。
另外，该TFT阵列基板还包括电容器，该电容器的一个电极与栅极G位于同一金属层，另一个电极由IGZO层形成并与用于TFT的IGZO层位于同一层。
根据本发明的实施方式IGZO层30中形成有源极和漏极。在一示例实施例中，IGZO层30包括位于栅极G上方并对应于栅极G位置的第一区域31和相邻于第一区域31的第二区域32。经过UV光或光波长小于420nm的近UV频段的光进行光照，使源极图案和漏极图案导电化，形成源极和漏极。由于栅极G的阻挡，未被照射到的第一区域31保留半导体特性。
在本发明TFT阵列基板的一实施例中，电极50是通过金属沉积的方式制作在接触孔41中。TFT阵列基板还包括设置在电极50上方的第三绝缘层60。
综上所述，在本发明一实施例中，使用铟镓锌氧化物(IGZO)作为半导体层，利用IGZO材料在紫外线的照射下能够具有导体特性的性能，可以同时实现源极、漏极、欧姆接触以及其他导电布线，可以省略现有技术中形成具有源极和漏极的第二金属层的步骤。由于本发明不需要形成第二金属层，因而避免了形成第二金属层时进行的光刻工艺和蚀刻工艺，缩减了工艺流程、提高了工作效率，并减小TFT尺寸。另外，可以同时形成TFT和电容器，缩减了工艺流程、提高了工作效率。
虽然已参照几个典型实施例描述了本发明，但应当理解，所用的术语是说明和示例性、而非限制性的术语。由于本发明能够以多种形式具体实施而不脱离本发明的精神或实质，所以应当理解，上述实施例不限于任何前述的细节，而应在所附权利要求所限定的精神和范围内广泛地解释，因此落入权利要求或其等效范围内的全部变化和改型都应为所附权利要求所涵盖。

Claims (11)

1.一种TFT阵列基板的制造方法，包括步骤：
S1：在透光基板上形成栅极，并在所述栅极的上方设置覆盖所述栅极和所述透光基板的第一绝缘层；
S2：在所述第一绝缘层的上方形成图案化的IGZO层；
S3：对所述IGZO层进行处理，以形成源极和漏极；
S4：在经过步骤S3处理后的所述IGZO层的上方设置第二绝缘层，对所述IGZO层进行绝缘保护；
S5：在所述第二绝缘层中开设连通至所述源极/漏极的接触孔，并在所述接触孔中沉积电极。
2.如权利要求1所述的TFT阵列基板的制造方法，其中，在所述步骤S2中，所述IGZO层是呈岛状覆盖在所述第一绝缘层上，并具有位于所述栅极上方并对应所述栅极位置的第一区域和相邻于所述第一区域的第二区域。
3.如权利要求2所述的TFT阵列基板的制造方法，其中，所述步骤S3包括：
S3-1：形成IGZO材料层，对IGZO材料层进行光刻工艺和蚀刻工艺，形成位于栅极上方的图案化的IGZO层；
S3-2：从所述透光基板下方照射光，使所述第二区域在光照之后具有导电特性，从而以自对准方式形成源极和漏极。
4.如权利要求3所述的TFT阵列基板的制造方法，其中，所述第一区域在光照之后保留半导体特性。
5.如权利要求4所述的TFT阵列基板的制造方法，其中，在所述步骤3-2中，是利用UV光或近UV频段的光进行光照。
6.如权利要求1所述的TFT阵列基板的制造方法，还包括：
在设置第二绝缘层之后，从基板的上方对所述IGZO层的一部分照射光，从而形成用于电容器的一个电极。
7.如权利要求1所述的TFT阵列基板的制造方法，其特征在于，所述透光基板为玻璃基板。
8.一种TFT阵列基板，包括
透光基板；
栅极；
设置在所述栅极上方的第一绝缘层；
设置在所述第一绝缘层上方的用于TFT的IGZO层；
设置在所述IGZO层上方的第二绝缘层，所述第二绝缘层上开设有连通所述IGZO层的接触孔；
设置在所述接触孔中的电极；
其中，所述IGZO层包括沟道区以及与栅极自对准的源极和漏极，所述源极和漏极的电阻小于所述沟道区的电阻。
9.如权利要求8所述的TFT阵列基板，其中，所述源极和漏极是通过以UV光或近UV频段的光照射所述IGZO层而形成。
10.如权利要求8所述的TFT阵列基板，还包括电容器，该电容器的一个电极与栅极位于同一金属层，另一个电极由IGZO层形成并与用于TFT的IGZO层位于同一层。
11.如权利要求8所述的TFT阵列基板，其中，所述透光基板为玻璃基板。
CN201410170902.XA 2014-04-25 2014-04-25 薄膜晶体管阵列基板及其制造方法 Pending CN105097710A (zh)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN201410170902.XA CN105097710A (zh) 2014-04-25 2014-04-25 薄膜晶体管阵列基板及其制造方法
TW103119659A TWI556415B (zh) 2014-04-25 2014-06-06 薄膜電晶體陣列基板及其製造方法
KR1020140139744A KR101659466B1 (ko) 2014-04-25 2014-10-16 Tft 어레이기판 및 그 제조방법
JP2014213643A JP2015211212A (ja) 2014-04-25 2014-10-20 Ｔｆｔアレイ基板、及びその製造方法
US14/669,809 US20150311233A1 (en) 2014-04-25 2015-03-26 Tft array substrate and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410170902.XA CN105097710A (zh) 2014-04-25 2014-04-25 薄膜晶体管阵列基板及其制造方法

Publications (1)

Publication Number Publication Date
CN105097710A true CN105097710A (zh) 2015-11-25

Family

ID=54335503

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410170902.XA Pending CN105097710A (zh) 2014-04-25 2014-04-25 薄膜晶体管阵列基板及其制造方法

Country Status (5)

Country Link
US (1) US20150311233A1 (zh)
JP (1) JP2015211212A (zh)
KR (1) KR101659466B1 (zh)
CN (1) CN105097710A (zh)
TW (1) TWI556415B (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105529366A (zh) * 2016-02-05 2016-04-27 深圳市华星光电技术有限公司 金属氧化物薄膜晶体管及其制造方法
CN109037076A (zh) * 2018-08-16 2018-12-18 北京大学深圳研究生院 金属氧化物薄膜晶体管制备的方法
CN109841687A (zh) * 2017-11-29 2019-06-04 乐金显示有限公司 薄膜晶体管及其制造方法和包括该薄膜晶体管的显示设备
CN111599686A (zh) * 2020-05-29 2020-08-28 福建华佳彩有限公司 一种具有双层绝缘层的面板结构及制作方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104637950A (zh) * 2013-11-14 2015-05-20 上海和辉光电有限公司 薄膜晶体管驱动背板及其制造方法
JP6645160B2 (ja) 2015-12-11 2020-02-12 三菱電機株式会社 表示装置用基板およびその製造方法ならびに表示装置およびその製造方法
JP6739198B2 (ja) 2016-03-18 2020-08-12 三菱電機株式会社 表示装置用アレイ基板、表示装置、表示装置用アレイ基板の製造方法、および、表示装置の製造方法
CN105895534B (zh) * 2016-06-15 2018-10-19 武汉华星光电技术有限公司 薄膜晶体管的制备方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100109004A1 (en) * 2008-11-05 2010-05-06 Sony Corporation Thin film transistor substrate and display device
JP2010165961A (ja) * 2009-01-19 2010-07-29 Videocon Global Ltd 薄膜トランジスタ、表示装置及びこれらの製造方法
CN102906804A (zh) * 2010-05-24 2013-01-30 夏普株式会社 薄膜晶体管基板及其制造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5268132B2 (ja) * 2007-10-30 2013-08-21 富士フイルム株式会社 酸化物半導体素子とその製造方法、薄膜センサおよび電気光学装置
TWI467761B (zh) * 2008-01-17 2015-01-01 Idemitsu Kosan Co Field effect transistor, semiconductor device and manufacturing method thereof
KR101374816B1 (ko) * 2009-09-04 2014-03-17 주식회사 엘지화학 박막 트랜지스터의 제조 방법
TW201145398A (en) * 2010-06-03 2011-12-16 Univ Nat Sun Yat Sen Method of reducing photo-leakage of the thin film transistors
WO2012060362A1 (ja) * 2010-11-04 2012-05-10 シャープ株式会社 半導体装置、表示装置、ならびに半導体装置および表示装置の製造方法
JP5979781B2 (ja) * 2012-06-07 2016-08-31 パナソニック液晶ディスプレイ株式会社 表示装置及び表示装置の製造方法
JP2014029976A (ja) * 2012-07-06 2014-02-13 Nippon Hoso Kyokai <Nhk> 薄膜デバイスの製造方法
KR101998124B1 (ko) * 2012-07-24 2019-07-09 엘지디스플레이 주식회사 어레이 기판 및 그 제조방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100109004A1 (en) * 2008-11-05 2010-05-06 Sony Corporation Thin film transistor substrate and display device
JP2010165961A (ja) * 2009-01-19 2010-07-29 Videocon Global Ltd 薄膜トランジスタ、表示装置及びこれらの製造方法
CN102906804A (zh) * 2010-05-24 2013-01-30 夏普株式会社 薄膜晶体管基板及其制造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105529366A (zh) * 2016-02-05 2016-04-27 深圳市华星光电技术有限公司 金属氧化物薄膜晶体管及其制造方法
WO2017133145A1 (zh) * 2016-02-05 2017-08-10 深圳市华星光电技术有限公司 金属氧化物薄膜晶体管及其制造方法
CN109841687A (zh) * 2017-11-29 2019-06-04 乐金显示有限公司 薄膜晶体管及其制造方法和包括该薄膜晶体管的显示设备
CN109037076A (zh) * 2018-08-16 2018-12-18 北京大学深圳研究生院 金属氧化物薄膜晶体管制备的方法
CN111599686A (zh) * 2020-05-29 2020-08-28 福建华佳彩有限公司 一种具有双层绝缘层的面板结构及制作方法

Also Published As

Publication number Publication date
JP2015211212A (ja) 2015-11-24
US20150311233A1 (en) 2015-10-29
TW201541615A (zh) 2015-11-01
KR101659466B1 (ko) 2016-09-23
KR20150123685A (ko) 2015-11-04
TWI556415B (zh) 2016-11-01

Similar Documents

Publication Publication Date Title
CN105097710A (zh) 薄膜晶体管阵列基板及其制造方法
CN104332477B (zh) 薄膜晶体管组件、阵列基板及其制作方法、和显示装置
CN103745978B (zh) 显示装置、阵列基板及其制作方法
US10707236B2 (en) Array substrate, manufacturing method therefor and display device
CN104752343A (zh) 双栅极氧化物半导体tft基板的制作方法及其结构
CN101556968B (zh) 薄膜晶体管和其制造方法以及有机发光二极管显示装置
CN107204309B (zh) 双栅极金属氧化物半导体tft基板的制作方法及其结构
CN103745955B (zh) 显示装置、阵列基板及其制造方法
CN105304500B (zh) N型tft的制作方法
CN104900654A (zh) 双栅极氧化物半导体tft基板的制作方法及其结构
CN104867959A (zh) 双栅极氧化物半导体tft基板的制作方法及其结构
KR20070031165A (ko) 투명 박막 트랜지스터 및 그의 제조방법
EP2953165B1 (en) Oxide thin film transistor array substrate, manufacturing method thereof, and display panel
CN104977764A (zh) 一种阵列基板及其制作方法、液晶显示器
CN105390443B (zh) Tft基板的制作方法
CN103383989B (zh) 像素结构的制造方法及其结构
CN104867870A (zh) 双栅极氧化物半导体tft基板的制作方法及其结构
CN103489921B (zh) 一种薄膜晶体管及其制造方法、阵列基板及显示装置
US9214476B1 (en) Pixel structure
CN107316874B (zh) 阵列基板及其制作方法、显示装置
KR20150004536A (ko) 박막 트랜지스터를 포함하는 표시 기판 및 이의 제조 방법
CN104409416A (zh) 用于制作阵列基板的方法及阵列基板
CN104241394A (zh) 一种薄膜晶体管及相应的制备方法、显示基板和显示装置
CN105932067A (zh) 一种顶栅型薄膜晶体管、制备方法、阵列基板及显示面板
CN104218019A (zh) 薄膜晶体管阵列基板及其制造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20151125

RJ01 Rejection of invention patent application after publication