CN104064472A - 薄膜晶体管及其制作方法、显示装置 - Google Patents

薄膜晶体管及其制作方法、显示装置 Download PDF

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CN104064472A
CN104064472A CN201410265114.9A CN201410265114A CN104064472A CN 104064472 A CN104064472 A CN 104064472A CN 201410265114 A CN201410265114 A CN 201410265114A CN 104064472 A CN104064472 A CN 104064472A
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layer
photoresist
grid
gate metal
heavily doped
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CN104064472B (zh
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卜倩倩
郭炜
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to CN201410265114.9A priority Critical patent/CN104064472B/zh
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Priority to US14/443,882 priority patent/US9748398B2/en
Priority to PCT/CN2014/087629 priority patent/WO2015188522A1/zh
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Abstract

本发明提供一种薄膜晶体管及其制备方法、显示装置，所述方法包括：形成栅极金属层，所述形成栅极金属层之后，还包括：通过一次构图工艺形成台阶型栅结构；进行第一次离子注入程序，形成第一重掺杂区和第二重掺杂区，所述第一重掺杂区和所述第二重掺杂区相距第一长度；将所述台阶型栅结构形成栅极；进行第二次离子注入程序，形成第一轻掺杂区和第二轻掺杂区，所述第一轻掺杂区和所述第二轻掺杂区相距第二长度，所述第一长度小于第二长度。上述方法可以简化现有技术中制备轻掺杂源漏极结构的LPTS TFT的工艺过程。

Description

薄膜晶体管及其制作方法、显示装置
技术领域
本发明涉及薄膜晶体管制造工艺领域，尤其涉及一种薄膜晶体管及其制作方法。
背景技术
常见的低温多晶硅薄膜晶体管(Low Temperature Poly Silicon Thin Film Transistor，简称LTPS TFT)的制备过程包括：在玻璃基板上沉积一层缓冲层，然后对缓冲层上的非晶硅(a-Si)层进行晶化处理，得到多晶硅(p-Si)，在多晶硅层上涂覆栅极绝缘层，图案化栅极图形并以其为掩膜对P-Si进行离子注入，控制注入量能够得到所需的重掺杂源漏极结构，之后进行层间绝缘层，源漏极及平坦化处理即可得到LTPS TFT结构。上述方式获取的LTPS TFT结构，由于两个重掺杂区的掺杂浓度较高，且两个重掺杂区与栅极导体之间的间距非常小，导致源漏极附近的电场太强，因而产生热电子效应，使得LTPS TFT的稳定性受到严重的影响。
为此，业内人士采用轻掺杂源漏极结构的LTPS TFT改善上述的LTPS TFT的热电子效应。如图1A至图1F所示，采用的轻掺杂源漏极结构的LTPS的制作工艺包括：形成低温多晶硅层11，并在低温多晶硅层11上形成一层栅极绝缘层13。通过一次构图工艺在栅极绝缘层13上形成栅极导体14，之后利用栅极导体14为掩膜板实施第一次离子注入程序，得到重掺杂源漏极的结构12；之后利用光刻胶15进行第二次的离子注入程序，将光刻胶去除即可得到含有轻掺杂源漏极的结构16，再依次形成层间绝缘层17，源漏极18，获得含有轻掺杂源漏极结构的LTPS TFT。
上述方法可以改善当前LTPS TFT结构中的热电子效应，但是在获取轻掺杂源漏极结构的LTPS TFT的过程中需要两次以上的图案化 过程，导致获取轻掺杂源漏极结构的LTPS TFT的制备工艺过程繁琐。
发明内容
本发明提供一种薄膜晶体管及其制作方法、显示装置，用于简化现有技术中制备轻掺杂源漏极结构的LPTS TFT的工艺过程。
第一方面，本发明提供一种薄膜晶体管的制作方法，包括：
形成栅极金属层，所述形成栅极金属层之后，还包括：
通过一次构图工艺形成台阶型栅结构；
进行第一次离子注入程序，形成第一重掺杂区和第二重掺杂区，所述第一重掺杂区和所述第二重掺杂区相距第一长度；
将所述台阶型栅结构形成栅极；
进行第二次离子注入程序，形成第一轻掺杂区和第二轻掺杂区，所述第一轻掺杂区和所述第二轻掺杂区相距第二长度，所述第一长度小于第二长度。
可选地，所述形成栅极金属层，包括：
提供一衬底基板；
在所述衬底基板上形成半导体层；
在所述半导体层上形成栅绝缘层；
在所述栅绝缘层上形成栅极金属层。
可选地，所述形成第一轻掺杂区和第二轻掺杂区之后，所述方法还包括：
在形成栅极的基板上形成包括有接触孔的层间介质层；
在所述层间介质层上形成源极、漏极和数据线的图形，所述源极通过贯穿所述栅绝缘层和所述层间介质层的接触孔与所述第一重掺杂区连接，所述漏极通过贯穿所述栅绝缘层和所述层间介质层的接触孔与所述第二重掺杂区连接。
可选地，通过一次构图工艺形成台阶型栅结构，包括：
在所述栅极金属层上形成光刻胶层；
采用半色调相移掩膜板/灰色调相移掩膜板曝光所述光刻胶层，形成台阶型结构，所述台阶型结构包括：第一部分光刻胶和第二部分光刻胶，所述第一部分光刻胶的高度大于第二部分光刻胶的高度；
湿法刻蚀所述栅极金属层未被所述台阶型结构覆盖的区域，形成矩形栅结构，所述矩形栅结构位于所述台阶型结构的下方；
灰化处理所述台阶型结构的第二部分光刻胶，形成光刻胶结构，所述光刻胶结构包括所述第一部分光刻胶；
湿法刻蚀所述栅金属层未被所述光刻胶结构覆盖的区域，形成台阶型栅结构，所述台阶型栅结构具有第一高度和第二高度，所述第一高度大于第二高度，所述台阶型栅结构的第一高度区域位于所述光刻胶结构的下方；
去除所述台阶型栅结构上方的光刻胶结构。
可选地，所述形成栅极金属层，包括：
提供一衬底基板；
在所述衬底基板上形成缓冲层；
在所述缓冲层上形成非晶硅层；
将所述非晶硅层转化为多晶硅层；
在所述多晶硅层上形成栅绝缘层；
在所述栅绝缘层上形成栅极金属层。
可选地，所述将所述非晶硅层转化为多晶硅层，包括：
在预设温度下对所述非晶硅进行激光退火，形成多晶硅层。
可选地，所述在所述缓冲层上形成非晶硅层，包括：
在所述缓冲层上，采用等离子体增强化学气相沉积法沉积所述非晶硅层。
可选地，所述第一次离子注入程序和第二次离子注入程序中的离子为下述的一种或多种：
B离子、P离子、As离子、PHx离子。
可选地，所述将所述台阶型栅结构形成栅极，包括：
湿法刻蚀所述台阶型栅结构，形成栅极，所述栅极的厚度范围为1000埃至3000埃。
第二方面，本发明提供一种薄膜晶体管，所述薄膜晶体管采用上述任一方法制备。
第三方面，本发明提供一种显示装置，所述显示装置包括如上所述的薄膜晶体管。
由上述技术方案可知，本发明的薄膜晶体管及其制作方法、显示装置，在形成栅极金属层的基板通过一次构图工艺形成台阶型栅结构，进而进行第一次离子注入程序和第二次离子注入程序，得到轻掺杂的薄膜晶体管，本发明的LTPS TFT的制作在获取轻掺杂源漏区和重掺杂源漏区的过程中只进行了一次构图工艺，因此，与现有技术相比，简化了LTPS TFT的制作流程，节省了生产时间，提高了电子元器件的稳定性。
附图说明
图1A至图1F为现有技术中LPTS TFT的制作工艺步骤流程图；
图2为本发明一实施例提供的LPTS TFT的制作方法的流程示意图；
图3A至图3G为本发明一实施例提供的LPTS TFT的制作工艺步骤流程图；
图3H至图3J为图3G之后的LPTS TFT的制作工艺步骤流程图。
附图标记：
11多晶硅层、12重掺杂区、13栅极绝缘层、14栅极金属、15光刻胶、16轻掺杂区、17层间绝缘层、18源漏极；
33多晶硅层、34栅极绝缘层、35栅极金属、36光刻胶、38轻掺杂区、39重掺杂区、310源漏极、311层间绝缘层/层间介质层。
具体实施方式
下面结合附图和实施例，对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明，但不用来限制本发明的范围。
本发明的基本思想是：为了减少现有技术的LPTS TFT制备工艺中在获取轻掺杂源漏区和重掺杂源漏区的过程中多次图案化的过程，采用半色调相移掩膜板或灰色调相移掩膜版通过一次构图工艺实现栅极的结构，通过两次离子注入程序得到轻掺杂区和重掺杂区。
本发明的薄膜晶体管采用下面图2及图3A至图3G所示的方法制备，具体地，通过图2以及图3A至图3G所示方法制备的LPTS TFT可包括：
一半导体层；
一栅绝缘层，覆盖于该半导体层的一表面；
两个重掺杂区，两个轻掺杂区，重掺杂区与轻掺杂区相邻且两个轻掺杂区间隔一个沟道；
一栅极金属，位于该绝缘层上，且覆盖与该沟道所对应的区域。
可选地，薄膜晶体管还可包括：层间介质层，层间介质层覆盖于栅极金属与栅绝缘层上，以及一漏极接线与一源极接线，贯穿栅绝缘层与该层间介质层分别于两个重掺杂区接触。
在具体应用中，前述的半导体层可为多晶硅层。本实施例中的轻掺杂区与重掺杂区分别通过两次离子注入程序实现。
针对现有技术中的图案化次数较多，且工艺繁琐的问题，本发明实施例提供一种减少图案化过程的LPTS TFT的制备方法如图2所示，该制备方法包括：
A01、形成栅金属层；
A02、通过一次构图工艺形成台阶型栅结构(如图3F所示)；
A03、进行第一次离子注入程序，形成第一重掺杂区和第二重掺杂区，所述第一重掺杂区和所述第二重掺杂区相距第一长度；
A04、将所述台阶型栅结构形成栅极(如图3H所示)；
A05进行第二次离子注入程序，形成第一轻掺杂区和第二轻掺杂区，所述第一轻掺杂区和所述第二轻掺杂区相距第二长度，所述第一长度小于第二长度。
进一步地，在形成栅极的基板上形成包括有接触孔的层间介质层；在所述层间介质层上形成源极、漏极和数据线的图形，所述源极通过贯穿栅绝缘层和所述层间介质层的接触孔与所述第一重掺杂区连接，所述漏极通过贯穿栅绝缘层和所述层间介质层的接触孔与所述第二重掺杂区连接。
也就是说，上述方法是在衬底基板上沉积缓冲层，在缓冲层上形成a-Si薄膜，使用晶化方式使a-Si转化为p-Si，然后沉积栅极绝缘层；之后在栅极绝缘层上沉积栅极金属，栅极金属上涂覆光刻胶，利用半色调相移掩膜板工艺将栅极金属修饰成为具有梯度的图形(如图3F所示的台阶型栅结构)，进行离子注入工艺形成重掺杂区域，完成后将栅极金属继续蚀刻形成栅极，之后进行第二次离子注入工艺形成轻掺杂区域；此时，栅极金属层仅剩余栅极结构，在其上进行层间绝缘层，源漏极，平坦层等工艺，制备完成具有轻掺杂源漏极结构的低温多晶硅薄膜晶体管。
上述方法只使用一次图案化的过程，进而可降低现有技术中制备LTPS TFT的工艺复杂度，简化了LTPS TFT的制作流程，节省了生产时间，提高了电子元器件的稳定性。
下面结合图3A至图3G及具体实施例对本发明的LPTS TFT的制作方法进行详细介绍。
首先，提供一衬底基板如玻璃基板或石英基板，在衬底基板上形成缓冲层；图3A至图3G所述的结构均形成于包括缓冲层的衬底基板上，为此，图3A至图3G中未示出包括缓冲层的衬底基板。应说明的是，若衬底基板的洁净度不满足要求时，可首先对衬底基板进行预清洗，进而在衬底基板上形成缓冲层。
优选地，采用等离子体增强化学气相沉积法(Plasma Enhanced Chemical Vapor Deposition，简称PECVD)在衬底基板上沉积缓冲层。缓冲层的厚度约为2000埃至6000埃，缓冲层材料可选用氧化物、氮化物或者氮氧化物等。缓冲层可以为单层、双层或者多层结构。具体 地，缓冲层可以是SiNx，SiOx或Si(ON)x。在具体实现过程中，为节省作业时间，可不沉积缓冲层。
其次，在所述缓冲层上形成非晶硅层，本实施例中可以采用等离子体增强化学气相沉积法沉积所述非晶硅层。
另外，将所述非晶硅层转化为多晶硅层33；例如，在预设温度下对所述非晶硅层进行多次激光退火，形成多晶硅层33。例如，采用准分子激光器进行激光退火处理。
在具体应用中，还可对非晶硅层进行高温处理，根据非晶硅层的厚度分布情况分为多个能量区进行激光退火处理，对不同的能量进行不同的激光退火处理，实现把非晶硅层转变为多晶硅层33。该处高温处理非晶硅层是为了使非晶硅层脱氢，防止在激光退火时发生氢爆。
前述衬底基板上的缓冲层的作用是：防止衬底基板中的金属离子扩散至LTPS TFT的有源区，降低缺陷和减少漏电流的产生。合适的缓冲层可以改善多晶硅背面界面的质量，防止在多晶硅背面界面出产生漏电流；进一步地，适当的缓冲层可以降低热传导，减缓被激光加热的硅的冷却速率。
再者，在所述多晶硅层33上形成栅绝缘层34；以及在所述栅绝缘层34上形成栅极金属层35，在所述栅极金属层35上形成光刻胶层36，如图3A所示。
例如，多晶硅层上涂覆一层栅极绝缘层34，溅射栅极金属层35，在栅极金属层35上涂覆光刻胶36。具体地，可以采用PEVCD方法，在多晶硅层33上沉积栅绝缘层34，栅绝缘层34可以选用氧化物、氮化物或氮氧化物等。另外，栅绝缘层34可以使单层、双层或多层结构等。进一步地，在栅绝缘层34上采用磁控溅射、热蒸发、PEVCD等方法形成栅极金属层35。在栅极金属层35上采用涂覆一层光刻胶。
本实施例中的栅极金属层35的金属可为Pt、Ru、Au、Ag、Mo、Cr、Al、Ta、Ti、W中的一种或多种。
在其他实施例中，形成栅极金属层35的过程还可以是：例如，提 供一衬底基板；在所述衬底基板上形成多晶硅层；在所述多晶硅层上形成栅绝缘层；在所述栅绝缘层上形成栅极金属层等。该处的半导体成为多晶硅层，本实施例仅为举例说明，不限定形成栅极金属层的过程。
进一步地，通过一次构图工艺形成台阶型栅结构，如图3B至图3F所示。
如图3B所示，采用半色调相移掩膜板/灰色调相移掩膜板曝光所述光刻胶层36，形成台阶型结构(如图3B中虚线中的台阶型结构)，举例来说，该处的台阶型结构沿着图3B中的虚线对称轴对称分布。所述台阶型结构包括：第一部分光刻胶和第二部分光刻胶，所述第一部分光刻胶的高度大于第二部分光刻胶的高度。在图3B中台阶型结构区域的36表示的是光刻胶层。
可理解的是，采用半色调相移掩膜板将光刻胶曝光为台阶型结构中掩膜板的形状。当然，还可采用其他形式的掩膜板(如灰色调掩膜板)曝光上述的光刻胶层36形成上述的台阶型结构，本实施例不对其进行限定。本实施例中的半色调相移掩膜板为一种特制掩膜板，这种掩膜板可以最终实现两种高度的台阶型栅结构的形成；
如图3C所示，湿法刻蚀所述栅极金属层35未被所述台阶型结构覆盖的区域，形成矩形栅结构，所述矩形栅结构位于所述台阶型结构的下方。应说明的是，在图3C中湿法刻蚀的是栅极金属层35的部分层结构，且未完全将覆盖在栅绝缘层34上方的栅极金属层35刻蚀。矩形栅结构是指该结构在剖视图中呈矩形。
如图3D所示，灰化处理所述台阶型结构的第二部分光刻胶，形成光刻胶结构，所述光刻胶结构包括所述第一部分光刻胶。
可理解的是，灰化处理包括玻璃基板上除台阶型结构的第一部分光刻胶之外的所有区域，以去除所述玻璃基板上较薄层的光刻胶即台阶型结构的第二部分光刻胶。
如图3E所示，湿法刻蚀所述栅金属层未被所述光刻胶结构覆盖的 区域，形成台阶型栅结构，所述台阶型栅结构具有第一高度d1和第二高度d2，所述第一高度d1大于第二高度d2，所述台阶型栅结构的第一高度d1区域位于所述光刻胶结构的下方。举例来说，图3E中所示的台阶型栅结构可为对称分布的台阶型栅结构。在图3E中，36表示的部分属于光刻胶层，35表示的部分属于栅极金属层。
如图3F所示，去除所述台阶型栅结构上方的光刻胶结构，得到最终的台阶型栅结构。
然后，进行第一次离子注入程序，形成第一重掺杂区39a和第二重掺杂区39b，如图3G所示的重掺杂区39，所述第一重掺杂区39a和所述第二重掺杂区39b相距第一长度。
举例来说，所述第一次离子注入程序中的离子可为下述的一种或多种：B离子、P离子、As离子、PHx离子。
再者，将所述台阶型栅结构形成栅极，如图3H所示。举例来说，湿法刻蚀所述台阶型栅结构，形成栅极，栅极的厚度范围为1000埃至3000埃。本实施例中栅极的剖视图中的形状为矩形结构。
应说明的是，该步骤中的湿法刻蚀工艺需要严格控制关键尺寸(CD)的大小，以降低偏差。
进一步地，进行第二次离子注入程序，形成第一轻掺杂区38a和第二轻掺杂区38b，如图3I所示，所述第一轻掺杂区38a和所述第二轻掺杂区38b相距第二长度，所述第一长度小于第二长度。
举例来说，所述第二次离子注入程序中的离子可为下述的一种或多种：B离子、P离子、As离子、PHx离子。
应说明的是，第一次离子注入程序与第二次离子注入程序需控制离子注入量。
此外，在形成栅极的基板上形成包括有接触孔的层间介质层311，如图3J所示。在所述层间介质层上形成源极310、漏极310和数据线的图形，所述源极通过贯穿栅绝缘层34和所述层间介质层311的接触孔与所述第一重掺杂区连接，所述漏极通过贯穿栅绝缘层和所述层间 介质层的接触孔与所述第二重掺杂区连接。
上述方法在轻掺杂区38与重掺杂区39的两次离子注入程序之间增加一栅极金属35的湿法刻蚀工艺，且在工艺过程中严格控制关键尺寸的大小，同时降低了现有技术中LPTS TFT的热电子效应，提高了制备的电子元器件的可靠性。
上述实施例制备的LTPS TFT可应用于液晶显示器、OLED等相关领域。
本发明还可提供一种显示装置，该显示装置可包括通过上述方法制备的薄膜晶体管，由此，本实施例的显示装置具有较好的显示质量。显示装置可以为：显示面板、电子纸、电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明权利要求所限定的范围。

Claims (11)

1.一种薄膜晶体管的制备方法，包括：形成栅极金属层，其特征在于，所述形成栅极金属层之后，还包括：
通过一次构图工艺形成台阶型栅结构；
进行第一次离子注入程序，形成第一重掺杂区和第二重掺杂区，所述第一重掺杂区和所述第二重掺杂区相距第一长度；
将所述台阶型栅结构形成栅极；
进行第二次离子注入程序，形成第一轻掺杂区和第二轻掺杂区，所述第一轻掺杂区和所述第二轻掺杂区相距第二长度，所述第一长度小于第二长度。
2.根据权利要求1所述的方法，其特征在于，所述形成栅极金属层，包括：
提供一衬底基板；
在所述衬底基板上形成半导体层；
在所述半导体层上形成栅绝缘层；
在所述栅绝缘层上形成栅极金属层。
3.根据权利要求2所述的方法，其特征在于，所述形成第一轻掺杂区和第二轻掺杂区之后，所述方法还包括：
在形成栅极的基板上形成包括有接触孔的层间介质层；
在所述层间介质层上形成源极、漏极和数据线的图形，所述源极通过贯穿所述栅绝缘层和所述层间介质层的接触孔与所述第一重掺杂区连接，所述漏极通过贯穿所述栅绝缘层和所述层间介质层的接触孔与所述第二重掺杂区连接。
4.根据权利要求1所述的方法，其特征在于，通过一次构图工艺形成台阶型栅结构，包括：
在所述栅极金属层上形成光刻胶层；
采用半色调相移掩膜板/灰色调相移掩膜板曝光所述光刻胶层，形成台阶型结构，所述台阶型结构包括：第一部分光刻胶和第二部分光刻胶，所述第一部分光刻胶的高度大于第二部分光刻胶的高度；
湿法刻蚀所述栅极金属层未被所述台阶型结构覆盖的区域，形成矩形栅结构，所述矩形栅结构位于所述台阶型结构的下方；
灰化处理所述台阶型结构的第二部分光刻胶，形成光刻胶结构，所述光刻胶结构包括所述第一部分光刻胶；
湿法刻蚀所述栅金属层未被所述光刻胶结构覆盖的区域，形成台阶型栅结构，所述台阶型栅结构具有第一高度和第二高度，所述第一高度大于第二高度，所述台阶型栅结构的第一高度区域位于所述光刻胶结构的下方；
去除所述台阶型栅结构上方的光刻胶结构。
5.根据权利要求1所述的方法，其特征在于，所述形成栅极金属层，包括：
提供一衬底基板；
在所述衬底基板上形成缓冲层；
在所述缓冲层上形成非晶硅层；
将所述非晶硅层转化为多晶硅层；
在所述多晶硅层上形成栅绝缘层；
在所述栅绝缘层上形成栅极金属层。
6.根据权利要求5所述的方法，其特征在于，所述将所述非晶硅层转化为多晶硅层，包括：
在预设温度下对所述非晶硅进行激光退火，形成多晶硅层。
7.根据权利要求5所述的方法，其特征在于，所述在所述缓冲层上形成非晶硅层，包括：
在所述缓冲层上，采用等离子体增强化学气相沉积法沉积所述非晶硅层。
8.根据权利要求1所述的方法，其特征在于，所述第一次离子注入程序和第二次离子注入程序中的离子为下述的一种或多种：
B离子、P离子、As离子、PHx离子。
9.根据权利要求1所述的方法，其特征在于，所述将所述台阶型栅结构形成栅极，包括：
湿法刻蚀所述台阶型栅结构，形成栅极，所述栅极的厚度范围为1000埃至3000埃。
10.一种薄膜晶体管，其特征在于，所述薄膜晶体管采用如上权利要求1至9任一项所述的方法制备。
11.一种显示装置，其特征在于，所述显示装置包括如权利要求10所述的薄膜晶体管。
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