CN105702687A - Tft基板及其制作方法 - Google Patents

Tft基板及其制作方法 Download PDF

Info

Publication number
CN105702687A
CN105702687A CN201610228341.3A CN201610228341A CN105702687A CN 105702687 A CN105702687 A CN 105702687A CN 201610228341 A CN201610228341 A CN 201610228341A CN 105702687 A CN105702687 A CN 105702687A
Authority
CN
China
Prior art keywords
layer
active layer
tft
hole
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610228341.3A
Other languages
English (en)
Inventor
王涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to CN201610228341.3A priority Critical patent/CN105702687A/zh
Priority to PCT/CN2016/081967 priority patent/WO2017177498A1/zh
Priority to US15/039,853 priority patent/US20180083047A1/en
Publication of CN105702687A publication Critical patent/CN105702687A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0335—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G02F1/13685—Top gates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/104—Materials and properties semiconductor poly-Si

Abstract

本发明提供一种TFT基板及其制作方法，该TFT基板通过对TFT(400)中的有源层(410)的结构进行改进，使得有源层(410)的两侧均具有至少一个台阶，相比于现有技术中的有源层，能够有效减弱有源层(410)两侧的尖端电场集中效应，使有源层(410)中载流子的浓度均匀，控制TFT(400)的输出电性，TFT(400)的质量高，TFT基板的工作稳定性强。本发明的TFT基板的制作方法，能够有效减弱TFT(400)中有源层(410)两侧的尖端电场集中效应，使有源层(410)中的载流子浓度均匀，控制TFT(400)的输出电性，TFT(400)的质量高，TFT基板的工作稳定性强。

Description

TFT基板及其制作方法
技术领域
本发明涉及液晶显示技术领域，尤其涉及一种TFT基板及其制作方法。
背景技术
液晶显示器(LiquidCrystalDisplay，LCD)是目前最广泛使用的平板显示器之一，液晶面板是液晶显示器的核心组成部分。
传统的液晶显示面板通常是由一彩色滤光片(ColorFilter，CF)基板、一薄膜晶体管阵列基板(ThinFilmTransistorArraySubstrate，TFTArraySubstrate)以及一配置于两基板间的液晶层(LiquidCrystalLayer)所构成，其工作原理是在两片平行的玻璃基板当中放置液晶分子，两片玻璃基板中间有许多垂直和水平的细小电线，通过通电与否来控制液晶分子改变方向，将背光模组的光线折射出来产生画面。其中薄膜晶体管阵列基板上制备薄膜晶体管阵列，用于驱动液晶的旋转，控制每个像素的显示，而彩色滤光片基板上设有彩色滤光层，用于形成每个像素的色彩。
请参阅图1，为现有的TFT基板的结构示意图，包括衬底基板100’及在衬底基板100’上由下而上依次设置的遮光层(LightshieldingLayer)200’、缓冲层300’、TFT400’、平坦化层500’、底层电极600’、钝化层700’、及顶层电极800’。其中，TFT400’包括由下至上依次设置的有源层410’、栅极绝缘层420’、栅极430’、层间介电层440’、源极450’、及漏极460’，源极450’与漏极460’分别通过贯穿栅极绝缘层420’、及层间介电层440的第一通孔910’及第二通孔920’与有源层410’的两端连接。
请参阅图2，为图1的TFT基板中的TFT的俯视示意图，该TFT400’为顶栅结构，有源层410’设置在栅极430’的下方，所述有源层410’的制作是通过在有源层410’上涂布掩膜光刻胶并进行干蚀刻而完成的。请参阅图3，为图1的TFT基板中的TFT沿图2中的A’-A’线的剖视示意图，从图3中可以看出，沿所述栅极430’的长度方向，所述有源层410’的两侧均具有一尖端415’，在TFT400’工作时，有源层410’两侧的尖端415’会产生电场集中效应，使尖端415’处感应出的载流子的浓度增大，形成侧面寄生TFT，从而使TFT400’的输出电性改变，产生TFT提前打开的现象，影响液晶显示面板正常的显示工作。
发明内容
本发明的目的在于提供一种TFT基板，避免有源层结构对TFT输出电性的影响，TFT质量高，工作稳定性强。
本发明的另一目的在于提供一种TFT基板的制作方法，避免有源层结构对TFT输出电性的影响，提升TFT质量，增强TFT基板的工作稳定性。
为实现上述目的，本发明首先提供一种TFT基板，包括：衬底基板、及设置在所述衬底基板上的TFT；
所述TFT包括：有源层、设置在所述有源层上的栅极绝缘层、设置在所述栅极绝缘层上且水平位置与有源层对应的栅极、设置在所述栅极及栅极绝缘层上的层间介电层、及设置在所述层间介电层上的源极及漏极；
沿栅极的长度方向，所述有源层至少包括位于中间的第一区域、及位于所述第一区域两侧的第二区域，所述第一区域的厚度大于第二区域的厚度，使得所述有源层的两侧均具有至少一个台阶。
所述步骤2制得的有源层的两侧均具有一个台阶。
所述TFT基板还包括：设置在所述衬底基板与TFT之间的遮光层与缓冲层、设置在所述TFT上的平坦化层、设置在所述平坦化层上的底层电极、设置在所述底层电极上的钝化层、及设置在所述钝化层上的顶层电极。
所述有源层与遮光层相对应，且所述遮光层在水平方向上完全覆盖所述有源层。
所述栅极绝缘层和层间介电层上对应有源层两端的位置设有第一通及第二通孔，所述源极与漏极分别通过第一通孔及第二通孔与有源层的两端连接；
所述平坦化层上对应漏极的位置设有第三通孔，所述顶层电极通过第三通孔与漏极连接。
本发明还提供一种TFT基板的制作方法，包括以下步骤：
步骤1、提供一衬底基板，在所述衬底基板上形成半导体材料层，并在所述半导体材料层上形成光刻胶层，采用一道灰阶光罩对所述光刻胶层进行曝光、显影，得到光刻胶图案，沿栅极的长度方向，所述光刻胶图案至少包括位于中间的第一光刻胶段、及位于两侧的第二光刻胶段，且所述第一光刻胶段的厚度大于所述第二光刻胶段的厚度；
步骤2、采用对所述光刻胶图案与半导体材料层均能进行蚀刻的气体对所述光刻胶图案与半导体材料层进行至少两步蚀刻：
第一步蚀刻是将所述半导体材料层上位于所述第二光刻胶段外侧的部分变薄，同时将所述光刻胶图案的第一光刻胶段变薄，将所述光刻胶图案的第二光刻胶段完全蚀刻掉；
第二步蚀刻是将所述光刻胶图案的第一光刻胶段完全蚀刻掉，将所述半导体材料层上位于所述第二光刻胶段外侧的部分完全蚀刻掉，同时将所述半导体材料层上对应于第二光刻胶段的部分变薄，得到有源层，所述有源层至少包括位于中间且对应于第一光刻胶段的第一区域、及位于所述第一区域两侧且对应于第二光刻胶段的第二区域，所述第一区域的厚度大于第二区域的厚度，使得所述有源层的两侧均具有至少一个台阶；
步骤3、在所述有源层上形成栅极绝缘层，在所述栅极绝缘层上对应有源层的位置形成栅极，在所述栅极及栅极绝缘层上形成层间介电层，在所述层间介电层上形成源极及漏极，完成TFT的制作。
所述步骤2制得的有源层的两侧均具有一个台阶。
所述步骤1还包括在所述衬底基板与半导体材料层之间形成遮光层与缓冲层的步骤；
所述TFT基板的制作方法还包括：步骤4、在所述TFT上形成平坦化层，在所述平坦化层上形成底层电极，在所述底层电极上形成钝化层，在所述钝化层上形成顶层电极。
所述步骤2制得的有源层与遮光层相对应，且所述遮光层在水平方向上完全覆盖所述有源层。
所述步骤3还包括在所述栅极绝缘层和层间介电层上对应有源层两端的位置形成第一通孔及第二通孔的步骤；所述源极与漏极分别通过第一通孔及第二通孔与有源层的两端连接；
所述步骤4还包括一在平坦化层上对应漏极的位置形成第三通孔的步骤，所述顶层电极通过第三通孔与漏极连接。
本发明的有益效果：本发明提供的TFT基板，包括：衬底基板、及设置在所述衬底基板上的TFT，该TFT基板通过对TFT中的有源层的结构进行改进，使得有源层的两侧均具有至少一个台阶，相比于现有技术中侧面为单个台阶的有源层，能够有效减弱有源层侧面台阶的尖端电场集中效应，使有源层中载流子的浓度均匀，使TFT的输出电性稳定，TFT的质量高，TFT阵列基板的工作稳定性强。本发明提供的TFT阵列基板的制作方法，能够有效减弱TFT中有源层侧面台阶的尖端电场集中效应，使有源层中的载流子浓度均匀，使TFT的输出电性稳定，提升TFT的质量，进而增强TFT阵列基板的工作稳定性。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的TFT基板的结构示意图；
图2为图1的TFT基板中的TFT的俯视示意图；
图3为图1的TFT基板中的TFT沿图2中的A’-A’线的剖视示意图；
图4为本发明的TFT基板的结构示意图；
图5为图4的TFT基板中的TFT的俯视示意图；
图6为图4的TFT基板中的TFT沿图5中的A-A线的剖视示意图；
图7为本发明的TFT基板的制作方法的流程图；
图8-9为本发明的TFT基板的制作方法的步骤1的示意图；
图10-11为本发明的TFT基板的制作方法的步骤2的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图4至图6，本发明提供一种TFT基板，包括：衬底基板100、及设置在所述衬底基板100上的TFT400；
所述TFT400包括：有源层410、设置在所述有源层410上的栅极绝缘层420、设置在所述栅极绝缘层420上且水平位置与有源层410对应的栅极430、设置在所述栅极430及栅极绝缘层420上的层间介电层440、及设置在所述层间介电层440上的源极450及漏极460；
如图5至图6所示，沿所述栅极430的长度方向，所述有源层410至少包括位于中间的第一区域411、及位于所述第一区域411两侧的第二区域412，所述第一区域411的厚度大于第二区域412的厚度，使得所述有源层410的两侧均具有至少一个台阶。
优选的，所述第二区域412的宽度为所述第一区域411的宽度的二十分之一至十分之一。
优选的，所述有源层410的两侧均具有一个台阶。
具体的，所述TFT基板还包括：设置在所述衬底基板100与TFT400之间的遮光层200与缓冲层300、设置在所述TFT400上的平坦化层500、设置在所述平坦化层上500上的底层电极600、设置在所述底层电极600上的钝化层700、及设置在所述钝化层700上的顶层电极800。
具体的，所述有源层410与遮光层200相对应，且所述遮光层200在水平方向上完全覆盖所述有源层410，从而能够对有源层410进行遮光，防止光电效应使TFT产生漏电流影响显示效果。
具体的，所述栅极绝缘层420和层间介电层440上对应有源层410两端的位置设有第一通孔910及第二通孔920，所述源极450与漏极460分别通过第一通孔910及第二通孔920与有源层410的两端连接；
所述平坦化层500上对应漏极460的位置设有第三通孔930，所述顶层电极800通过第三通孔930与漏极460连接。
优选的，所述衬底基板100为玻璃基板。
具体的，所述底层电极600和顶层电极800分别为公共电极与像素电极，所述底层电极600与顶层电极800的材料均为透明导电材料，所述透明导电材料优选为氧化铟锡(IndiumTinOxides，ITO)。
具体的，所述有源层410的材料为多晶硅(Poly-Si)。
上述TFT基板通过对TFT400中的有源层410的结构进行改进，使得有源层400的两侧均具有至少一个台阶，相比于现有技术中的有源层，有源层410两侧的电场集中效应减弱，使有源层410内部的载流子浓度均匀，防止有源层410的侧面与其上部的栅极430形成侧面寄生TFT，有效地控制TFT400的输出电性，提升TFT400的质量，进而使TFT基板的工作的稳定性增强。
请参阅图7，基于上述TFT基板，本发明还提供一种TFT基板的制作方法，包括以下步骤：
步骤1、如图8-9所示，提供一衬底基板100，在所述衬底基板100上形成半导体材料层10，并在所述半导体材料层10上形成光刻胶层11，采用一道光罩15对所述光刻胶层11进行曝光、显影，得到光刻胶图案20，沿栅极的长度方向，所述光刻胶图案20至少包括位于中间的第一光刻胶段21、及位于两侧的第二光刻胶段22，且所述第一光刻胶段21的厚度大于所述第二光刻胶段22的厚度。
具体的，如图8所示，所述步骤1还包括在所述衬底基板100与半导体材料层10之间形成遮光层200与缓冲层300的步骤。
步骤2、如图10-11所示，采用对所述光刻胶图案20及半导体材料层10均能进行蚀刻的气体对所述光刻胶图案20与半导体材料层10进行至少两步蚀刻：
如图10所示，第一步蚀刻是将所述半导体材料层10上位于所述第二光刻胶段22外侧的部分变薄，同时将所述光刻胶图案20的第一光刻胶段21变薄，将所述光刻胶图案20的第二光刻胶段22完全蚀刻掉；
如图11所示，第二步蚀刻是将所述光刻胶图案20的第一光刻胶段21完全蚀刻掉，将所述半导体材料层10上位于所述第二光刻胶段22外侧的部分完全蚀刻掉，同时将所述半导体材料层10上对应于第二光刻胶段22的部分变薄，得到有源层410，所述有源层410至少包括位于中间且对应于第一光刻胶段21的第一区域411、及位于所述第一区域411两侧且对应于第二光刻胶段22的第二区域412，所述第一区域411的厚度大于第二区域412的厚度，使得所述有源层410的两侧均具有至少一个台阶。
优选的，所述步骤2制得的有源层410的两侧均具有一个台阶。
具体的，所述步骤2中，所述光罩15为灰阶光罩(GrayToneMask，GTM)、半色调光罩(HalfToneMask，HTM)、或单缝光罩(SingleSlitMask，SSM)。
具体的，所述步骤2采用的蚀刻气体由多种气体组分组成，通过调节各气体组分的比例，可使得所述蚀刻气体对半导体材料层10的刻蚀速率与所述蚀刻气体对光刻胶图案20的刻蚀速率之间保持一定的比例。
具体的，所述第一步蚀刻与第二步蚀刻均为干蚀刻。
具体的，所述步骤2制得的有源层410与遮光层200相对应，且所述遮光层200在水平方向上完全覆盖所述有源层410，从而能够对有源层410进行遮光，防止光电效应使TFT产生漏电流影响显示效果。
步骤3、如图4所示，在所述有源层410上形成栅极绝缘层420，在所述栅极绝缘层420上对应有源层410的位置形成栅极430，在所述栅极430及栅极绝缘层420上形成层间介电层440，在所述层间介电层440上形成源极450及漏极460，完成TFT400的制作。
具体的，如图4所示，所述TFT基板的制作方法还包括：步骤4、在所述TFT400上形成平坦化层500，在所述平坦化层上500上形成底层电极600，在所述底层电极600上形成钝化层700，在所述钝化层700上形成顶层电极800。
具体的，如图4所示，所述步骤3还包括在所述栅极绝缘层420和层间介电层440上对应有源层410两端的位置形成第一通孔910及第二通孔920的步骤；所述源极450与漏极460分别通过第一通孔910及第二通孔920与有源层410的两端连接；
所述步骤4还包括一在平坦化层500上对应漏极460的位置形成第三通孔930的步骤，所述顶层电极800通过第三通孔930与漏极460连接。
优选的，所述衬底基板100为玻璃基板。
具体的，所述底层电极600和顶层电极800分别为公共电极与像素电极，所述底层电极600与顶层电极800的材料均为透明导电材料，所述透明导电材料优选为氧化铟锡(IndiumTinOxides，ITO)。
具体的，所述有源层410的材料为多晶硅(Poly-Si)。
上述TFT基板的制作方法，通过对TFT400中的有源层410的结构进行改进，使得有源层410的两侧均具有至少一个台阶，相比于现有技术中的有源层，有源层410两侧的电场集中效应减弱，使有源层410内部的载流子浓度均匀，防止有源层410的侧面与其上部的栅极430形成侧面寄生TFT，有效地控制TFT400的输出电性，提升TFT400的质量，进而使TFT基板的工作的稳定性增强。
综上所述，本发明的TFT基板，包括：衬底基板、及设置在所述衬底基板上的TFT，该TFT基板通过对TFT中的有源层的结构进行改进，使得有源层的两侧均具有至少一个台阶，相比于现有技术中的有源层，能够有效减弱有源层两侧的尖端电场集中效应，使有源层中载流子的浓度均匀，使TFT的输出电性稳定，TFT的质量高，TFT基板的工作稳定性强。本发明的TFT基板的制作方法，能够有效减弱TFT中有源层侧面的尖端电场集中效应，使有源层中的载流子浓度均匀，使TFT的输出电性稳定，提升TFT的质量，进而增强TFT基板的工作稳定性。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种TFT基板，其特征在于，包括：衬底基板(100)、及设置在所述衬底基板(100)上的TFT(400)；
所述TFT(400)包括：有源层(410)、设置在所述有源层(410)上的栅极绝缘层(420)、设置在所述栅极绝缘层(420)上且水平位置与有源层(410)对应的栅极(430)、设置在所述栅极(430)及栅极绝缘层(420)上的层间介电层(440)、及设置在所述层间介电层(440)上的源极(450)及漏极(460)；
沿所述栅极(430)的长度方向，所述有源层(410)至少包括位于中间的第一区域(411)、及位于所述第一区域(411)两侧的第二区域(412)，且所述第一区域(411)的厚度大于第二区域(412)的厚度，使得所述有源层(410)的两侧均具有至少一个台阶。
2.如权利要求1所述的TFT基板，其特征在于，所述有源层(410)的两侧均具有一个台阶。
3.如权利要求1所述的TFT基板，其特征在于，还包括：设置在所述衬底基板(100)与TFT(400)之间的遮光层(200)与缓冲层(300)、设置在所述TFT(400)上的平坦化层(500)、设置在所述平坦化层上(500)上的底层电极(600)、设置在所述底层电极(600)上的钝化层(700)、及设置在所述钝化层(700)上的顶层电极(800)。
4.如权利要求3所述的TFT基板，其特征在于，所述有源层(410)与遮光层(200)相对应，且所述遮光层(200)在水平方向上完全覆盖所述有源层(410)。
5.如权利要求3所述的TFT基板，其特征在于，所述栅极绝缘层(420)和层间介电层(440)上对应有源层(410)两端的位置设有第一通孔(910)及第二通孔(920)，所述源极(450)与漏极(460)分别通过第一通孔(910)及第二通孔(920)与有源层(410)的两端连接；
所述平坦化层(500)上对应漏极(460)的位置设有第三通孔(930)，所述顶层电极(800)通过第三通孔(930)与漏极(460)连接。
6.一种TFT基板的制作方法，其特征在于，包括以下步骤：
步骤1、提供一衬底基板(100)，在所述衬底基板(100)上形成半导体材料层(10)，并在所述半导体材料层(10)上形成光刻胶层(11)，采用一道光罩(15)对所述光刻胶层(11)进行曝光、显影，得到光刻胶图案(20)，沿栅极的长度方向，所述光刻胶图案(20)至少包括位于中间的第一光刻胶段(21)、及位于两侧的第二光刻胶段(22)，且所述第一光刻胶段(21)的厚度大于所述第二光刻胶段(22)的厚度；
步骤2、采用对所述光刻胶图案(20)与半导体材料层(10)均能进行蚀刻的气体对所述光刻胶图案(20)与半导体材料层(10)进行至少两步蚀刻：
第一步蚀刻是将所述半导体材料层(10)上位于所述第二光刻胶段(22)外侧的部分变薄，同时将所述光刻胶图案(20)的第一光刻胶段(21)变薄，将所述光刻胶图案(20)的第二光刻胶段(22)完全蚀刻掉；
第二步蚀刻是将所述光刻胶图案(20)的第一光刻胶段(21)完全蚀刻掉，将所述半导体材料层(10)上位于所述第二光刻胶段(22)外侧的部分完全蚀刻掉，同时将所述半导体材料层(10)上对应于第二光刻胶段(22)的部分变薄，得到有源层(410)，所述有源层(410)至少包括位于中间且对应于第一光刻胶段(21)的第一区域(411)、及位于所述第一区域(411)两侧且对应于第二光刻胶段(22)的第二区域(412)，所述第一区域(411)的厚度大于第二区域(412)的厚度，使得所述有源层(410)的两侧均具有至少一个台阶；
步骤3、在所述有源层(410)上形成栅极绝缘层(420)，在所述栅极绝缘层(420)上对应有源层(410)的位置形成栅极(430)，在所述栅极(430)及栅极绝缘层(420)上形成层间介电层(440)，在所述层间介电层(440)上形成源极(450)及漏极(460)，完成TFT(400)的制作。
7.如权利要求1所述的TFT基板的制作方法，其特征在于，所述步骤2制得的有源层(410)的两侧均具有一个台阶。
8.如权利要求6所述的TFT基板的制作方法，其特征在于，所述步骤1还包括在所述衬底基板(100)与半导体材料层(10)之间形成遮光层(200)与缓冲层(300)的步骤；
还包括：步骤4、在所述TFT(400)上形成平坦化层(500)，在所述平坦化层上(500)上形成底层电极(600)，在所述底层电极(600)上形成钝化层(700)，在所述钝化层(700)上形成顶层电极(800)。
9.如权利要求8所述的TFT基板的制作方法，其特征在于，所述步骤2制得的有源层(410)与遮光层(200)相对应，且所述遮光层(200)在水平方向上完全覆盖所述有源层(410)。
10.如权利要求8所述的TFT基板的制作方法，其特征在于，所述步骤3还包括在所述栅极绝缘层(420)和层间介电层(440)上对应有源层(410)两端的位置形成第一通孔(910)及第二通孔(920)的步骤；所述源极(450)与漏极(460)分别通过第一通孔(910)及第二通孔(920)与有源层(410)的两端连接；
所述步骤4还包括一在平坦化层(500)上对应漏极(460)的位置形成第三通孔(930)的步骤，所述顶层电极(800)通过第三通孔(930)与漏极(460)连接。
CN201610228341.3A 2016-04-13 2016-04-13 Tft基板及其制作方法 Pending CN105702687A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201610228341.3A CN105702687A (zh) 2016-04-13 2016-04-13 Tft基板及其制作方法
PCT/CN2016/081967 WO2017177498A1 (zh) 2016-04-13 2016-05-13 Tft基板及其制作方法
US15/039,853 US20180083047A1 (en) 2016-04-13 2016-05-13 Tft substrate and manufacture method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610228341.3A CN105702687A (zh) 2016-04-13 2016-04-13 Tft基板及其制作方法

Publications (1)

Publication Number Publication Date
CN105702687A true CN105702687A (zh) 2016-06-22

Family

ID=56218685

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610228341.3A Pending CN105702687A (zh) 2016-04-13 2016-04-13 Tft基板及其制作方法

Country Status (3)

Country Link
US (1) US20180083047A1 (zh)
CN (1) CN105702687A (zh)
WO (1) WO2017177498A1 (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106601755A (zh) * 2017-01-10 2017-04-26 北京理工大学 一种避免像素电极open的结构设计及其制备工艺
CN108022978A (zh) * 2016-11-04 2018-05-11 三星显示有限公司 薄膜晶体管及其制造方法
CN110993620A (zh) * 2019-12-05 2020-04-10 深圳市华星光电半导体显示技术有限公司 阵列基板及其制备方法、显示面板
WO2020082459A1 (zh) * 2018-10-22 2020-04-30 惠科股份有限公司 一种显示面板的制作方法和显示面板

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109920856B (zh) * 2019-02-27 2021-03-19 合肥鑫晟光电科技有限公司 薄膜晶体管及其制造方法、阵列基板和显示装置
CN111029342B (zh) * 2019-11-07 2024-04-16 深圳市华星光电半导体显示技术有限公司 显示面板及其制备方法、显示装置
CN111697008B (zh) * 2020-06-22 2023-07-14 成都京东方显示科技有限公司 阵列基板及阵列基板制作方法

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101067701A (zh) * 2006-05-03 2007-11-07 Lg.菲利浦Lcd株式会社 液晶显示装置及其制造方法
CN101419973A (zh) * 2008-11-13 2009-04-29 信利半导体有限公司 一种三次光刻实现的tft像素结构及其制作方法
JP2010129733A (ja) * 2008-11-27 2010-06-10 Seiko Epson Corp 薄膜トランジスタ及び電気光学装置並びに電子機器
CN102376893A (zh) * 2010-08-06 2012-03-14 索尼公司 半导体装置、显示装置和电子装置
KR20120042173A (ko) * 2010-10-22 2012-05-03 엘지디스플레이 주식회사 박막 트랜지스터 및 그 제조방법
CN102629573A (zh) * 2011-07-11 2012-08-08 北京京东方光电科技有限公司 一种薄膜晶体管液晶显示器阵列基板及制作方法
CN103762245A (zh) * 2013-12-13 2014-04-30 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制备方法、显示装置
CN104064472A (zh) * 2014-06-13 2014-09-24 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、显示装置
CN105047567A (zh) * 2015-08-19 2015-11-11 武汉华星光电技术有限公司 一种薄膜晶体管及其制作方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW546846B (en) * 2001-05-30 2003-08-11 Matsushita Electric Ind Co Ltd Thin film transistor and method for manufacturing the same
US6908306B2 (en) * 2001-11-15 2005-06-21 American Orthodontics Corp. Orthodontic distalizing apparatus
JP4459547B2 (ja) * 2003-04-15 2010-04-28 独立行政法人科学技術振興機構 光パルス圧縮器および光関数発生器、光パルス圧縮方法および光関数発生方法
CN103700665B (zh) * 2013-12-13 2016-03-02 京东方科技集团股份有限公司 金属氧化物薄膜晶体管阵列基板及其制作方法、显示装置
CN104409413B (zh) * 2014-11-06 2017-12-08 京东方科技集团股份有限公司 阵列基板制备方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101067701A (zh) * 2006-05-03 2007-11-07 Lg.菲利浦Lcd株式会社 液晶显示装置及其制造方法
CN101419973A (zh) * 2008-11-13 2009-04-29 信利半导体有限公司 一种三次光刻实现的tft像素结构及其制作方法
JP2010129733A (ja) * 2008-11-27 2010-06-10 Seiko Epson Corp 薄膜トランジスタ及び電気光学装置並びに電子機器
CN102376893A (zh) * 2010-08-06 2012-03-14 索尼公司 半导体装置、显示装置和电子装置
KR20120042173A (ko) * 2010-10-22 2012-05-03 엘지디스플레이 주식회사 박막 트랜지스터 및 그 제조방법
CN102629573A (zh) * 2011-07-11 2012-08-08 北京京东方光电科技有限公司 一种薄膜晶体管液晶显示器阵列基板及制作方法
CN103762245A (zh) * 2013-12-13 2014-04-30 京东方科技集团股份有限公司 薄膜晶体管、阵列基板及其制备方法、显示装置
CN104064472A (zh) * 2014-06-13 2014-09-24 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、显示装置
CN105047567A (zh) * 2015-08-19 2015-11-11 武汉华星光电技术有限公司 一种薄膜晶体管及其制作方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108022978A (zh) * 2016-11-04 2018-05-11 三星显示有限公司 薄膜晶体管及其制造方法
CN108022978B (zh) * 2016-11-04 2023-11-17 三星显示有限公司 薄膜晶体管及其制造方法
CN106601755A (zh) * 2017-01-10 2017-04-26 北京理工大学 一种避免像素电极open的结构设计及其制备工艺
WO2020082459A1 (zh) * 2018-10-22 2020-04-30 惠科股份有限公司 一种显示面板的制作方法和显示面板
CN110993620A (zh) * 2019-12-05 2020-04-10 深圳市华星光电半导体显示技术有限公司 阵列基板及其制备方法、显示面板

Also Published As

Publication number Publication date
US20180083047A1 (en) 2018-03-22
WO2017177498A1 (zh) 2017-10-19

Similar Documents

Publication Publication Date Title
CN105702687A (zh) Tft基板及其制作方法
CN103268878B (zh) Tft阵列基板、tft阵列基板的制作方法及显示装置
CN103472646A (zh) 一种阵列基板及其制备方法和显示装置
CN102709326B (zh) 薄膜晶体管及其制造方法、阵列基板和显示装置
CN105652541B (zh) 阵列基板的制作方法及液晶显示面板
CN103489922A (zh) 薄膜晶体管及制备方法、阵列基板及制备方法和显示装置
CN109728050A (zh) 一种阵列基板及其制备方法、显示面板和显示装置
CN107093583A (zh) 一种阵列基板及其制备方法、显示装置
KR20200034792A (ko) Oled 디스플레이 패널의 가요성 기판 및 이의 제조 방법
WO2019052043A1 (zh) 显示面板及其制造方法
CN104733456A (zh) 一种阵列基板及其制备方法、显示装置
CN103346159B (zh) 一种阵列基板及其制造方法、显示装置
KR20190131582A (ko) Tft 기판의 제조 방법 및 tft 기판
CN104779301B (zh) 一种薄膜晶体管及其制作方法、阵列基板、显示装置
CN203480182U (zh) 一种阵列基板和显示装置
CN103715135A (zh) 一种过孔及其制作方法、阵列基板
CN103676390A (zh) 一种阵列基板及其制作方法、显示装置
CN103681514A (zh) 阵列基板及其制作方法、显示装置
WO2021120378A1 (zh) 一种阵列基板及其制作方法
CN105185786A (zh) 一种阵列基板及其制作方法
CN105870132A (zh) Tft阵列基板及其制作方法
CN100353244C (zh) 液晶显示器及其制作方法及其晶体管数组基板及制作方法
CN104701254B (zh) 一种低温多晶硅薄膜晶体管阵列基板的制作方法
KR102227519B1 (ko) 표시 기판 및 그의 제조방법
CN101692439A (zh) 薄膜晶体管数组基板的制作方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20160622