CN105870132A - Tft阵列基板及其制作方法 - Google Patents

Tft阵列基板及其制作方法 Download PDF

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Publication number
CN105870132A
CN105870132A CN201610240476.1A CN201610240476A CN105870132A CN 105870132 A CN105870132 A CN 105870132A CN 201610240476 A CN201610240476 A CN 201610240476A CN 105870132 A CN105870132 A CN 105870132A
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China
Prior art keywords
protection layer
passivation protection
tft
data wire
array substrate
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CN201610240476.1A
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English (en)
Inventor
宋文庆
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to CN201610240476.1A priority Critical patent/CN105870132A/zh
Priority to PCT/CN2016/082411 priority patent/WO2017181464A1/zh
Priority to US15/115,687 priority patent/US20180182779A1/en
Publication of CN105870132A publication Critical patent/CN105870132A/zh
Pending legal-status Critical Current

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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/104—Materials and properties semiconductor poly-Si

Abstract

本发明提供一种TFT阵列基板及其制作方法。该TFT阵列基板将TFT(200)的源极(240)和漏极(250)设置在栅极绝缘层(220)上，将数据线(400)设置在覆盖TFT(200)的源极(240)和漏极(250)的第一钝化保护层(300)上，使得数据线(400)与TFT(200)的源极(240)和漏极(250)位于不同的层别，能够通过调整第一钝化保护层(300)的厚度来灵活调整数据线(400)与栅极(210)之间的间距，与现有技术相比，增大了数据线(400)与栅极(210)之间的间距，减小了数据线(400)与栅极(210)之间的寄生电容，降低了数据线(400)的功耗，同时，栅极绝缘层(220)的厚度不受影响，TFT(200)的源极(240)与漏极(250)的位置不变，能够维持TFT特性的稳定。

Description

TFT阵列基板及其制作方法
技术领域
本发明涉及液晶显示技术领域，尤其涉及一种TFT阵列基板及其制作方法。
背景技术
液晶显示器(Liquid Crystal Display，LCD)是目前最广泛使用的平板显示器之一，液晶显示面板是液晶显示器的核心组成部分。
液晶显示面板通常是由一彩色滤光片(Color Filter，CF)基板、一薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFT Array Substrate)以及一配置于两基板间的液晶层(Liquid Crystal Layer)所构成，其中TFT阵列基板上制备有呈阵列式排布的TFT，用于驱动液晶的旋转，控制每个像素的显示，而CF基板上设置有彩色滤光层，用于形成每个像素的色彩。液晶显示面板的工作原理是通过在TFT阵列基板与CF基板上施加驱动电压来控制液晶层的液晶分子的旋转，将背光模组的光线折射出来产生画面。
目前，液晶显示器的技术发展日趋成熟，现阶段以降低液晶显示面板的功耗为主要发展方向。
请参阅图1，为一种现有的TFT阵列基板的结构示意图，包括：衬底基板100’、设置在衬底基板100’上的栅极200’、设置在栅极200’上的栅极绝缘层300’、设置在栅极绝缘层300’上且位置与栅极200’对应的有源层400’，设置在栅极绝缘层300’和有源层400’上分别与有源层400’两端接触的源极500’和漏极600’、设置在栅极绝缘层300’上与所述源极500’和漏极600’位于同一层的数据线700’、覆盖所述栅极绝缘层300’、源极500’、漏极600’、与数据线700’的钝化保护层800’、以及设置在钝化保护层800’上的像素电极900’，其中像素电极900’通过贯穿钝化保护层800’的过孔810’与源极500’接触。
该现有的TFT阵列基板的数据线700’与栅极200’之间会产生寄生电容Cgd，公式为：Cgd＝ε0εr s/d，其中，ε0为真空介电常数，εr为材料的相对介电常数，s为数据线700’与栅极200’的正对面积，d为数据线700’与栅极200’的间距，即栅极绝缘层300’的厚度。
为降低数据线700’的功耗，需要减少寄生电容Cgd的值。由于寄生电容Cgd与数据线700’和栅极200’的间距成反比，可以通过增加栅极绝缘层300’的厚度使数据线700’和栅极200’的间距增加，进而减少寄生电容Cgd，但是，TFT的源极500’、漏极600’、及数据线700’位于同一层，均设置在栅极绝缘层300’上，在改变栅极绝缘层300’的厚度控制寄生电容Cgd的同时，不可避免地使得源极500’及漏极600’的位置改变，影响到TFT特性，因此，图1所示的现有TFT阵列基板不能灵活地调整寄生电容Cgd。
发明内容
本发明的目的在于提供一种TFT阵列基板，能够在保证TFT特性的前提下，灵活调整数据线与栅极之间的间距，减小数据线与栅极之间的寄生电容，降低数据线的功耗。
本发明的另一目的在于提供一种TFT阵列基板的制作方法，既能够保证TFT特性，又能够减小数据线与栅极之间的寄生电容，降低数据线的功耗。
为实现上述目的，本发明首先提供一种TFT阵列基板，包括：衬底基板、设置在所述衬底基板上的TFT、覆盖所述TFT的第一钝化保护层、设置在所述第一钝化保护层上的数据线、覆盖所述第一钝化保护层和数据线的第二钝化保护层、及设置在所述第二钝化保护层上的像素电极；
所述TFT包括：设置在衬底基板上的栅极、覆盖所述栅极与衬底基板的栅极绝缘层、于所述栅极上方设置在所述栅极绝缘层上的有源层、及设置在所述栅极绝缘层上分别接触有源层两端的源极和漏极；
在所述漏极上方设有贯穿第一钝化保护层第一过孔；所述数据线通过所述第一过孔与漏极接触。
所述源极、漏极、及数据线的材料为相同的金属材料。
所述源极、漏极、及数据线的材料同为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述衬底基板为玻璃基板；所述像素电极的材料为ITO；所述栅极绝缘层、第一钝化保护层、与第二钝化保护层的材料为氮化硅、氧化硅、或二者的组合。
在所述源极上方设有贯穿第一钝化保护层与第二钝化保护层的第二过孔，所述像素电极通过所述第二过孔与源极接触。
本发明还提供一种TFT阵列基板的制作方法，包括以下步骤：
步骤1、提供一衬底基板，在所述衬底基板上沉积并图案化第一金属层，形成栅极；
步骤2、在所述栅极与衬底基板上沉积栅极绝缘层；
步骤3、于所述栅极上方在所述栅极绝缘层上形成有源层；
步骤4、在所述栅极绝缘层与有源层上第一次沉积并图案化第二金属层，形成分别与有源层两端接触的源极和漏极，至此完成TFT的制作；
步骤5、在所述源极、漏极、与栅极绝缘层上沉积覆盖第一钝化保护层，并对第一钝化保护层进行图案化处理，在所述漏极上方形成贯穿第一钝化保护层的第一过孔；
步骤6、在所述第一钝化保护层上第二次沉积并图案化第二金属层，形成数据线，所述数据线通过所述第一过孔与漏极接触；
步骤7、在所述第一钝化保护层、与数据线上沉积覆盖第二钝化保护层，并进行图案化处理，在所述源极上方形成贯穿第二钝化保护层与第一钝化保护层的第二过孔；
步骤8、在所述第二钝化保护层上沉积并图案化透明导电薄膜，形成像素电极，所述像素电极通过所述第二过孔与源极接触。
所述第二金属层的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述衬底基板为玻璃基板；所述透明导电薄膜为ITO薄膜；所述栅极绝缘层、第一钝化保护层、与第二钝化保护层的材料为氮化硅、氧化硅、或二者的组合。
本发明的有益效果：本发明提供的TFT阵列基板，将TFT的源极和漏极设置在栅极绝缘层上，将数据线设置在覆盖TFT的源极和漏极的第一钝化保护层上，使得数据线与TFT的源极和漏极位于不同的层别，能够通过调整第一钝化保护层的厚度来灵活调整数据线与栅极之间的间距，与现有技术相比，增大了数据线与栅极之间的间距，减小了数据线与栅极之间的寄生电容，降低了数据线的功耗，同时，栅极绝缘层的厚度不受影响，TFT的源极与漏极的位置不变，能够维持TFT特性的稳定。本发明提供的TFT阵列基板的制作方法，先将TFT的源极和漏极制作在栅极绝缘层上，再将数据线制作在覆盖TFT的源极和漏极的第一钝化保护层上，既能够保证TFT特性，又能够减小数据线与栅极之间的寄生电容，降低数据线的功耗。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为一种现有的TFT阵列基板的结构示意图；
图2为本发明的TFT阵列基板的结构示意图；
图3为本发明的TFT阵列基板的制作方法的流程图；
图4为本发明的TFT阵列基板的制作方法的步骤1的示意图；
图5为本发明的TFT阵列基板的制作方法的步骤2的示意图；
图6为本发明的TFT阵列基板的制作方法的步骤3的示意图；
图7为本发明的TFT阵列基板的制作方法的步骤4的示意图；
图8为本发明的TFT阵列基板的制作方法的步骤5的示意图；
图9为本发明的TFT阵列基板的制作方法的步骤6的示意图；
图10为本发明的TFT阵列基板的制作方法的步骤7的示意图；
图11为本发明的TFT阵列基板的制作方法的步骤8的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明首先提供一种TFT阵列基板，包括：衬底基板100、设置在所述衬底基板100上的TFT 200、覆盖所述TFT 200的第一钝化保护层300、设置在所述第一钝化保护层300上的数据线400、覆盖所述第一钝化保护层300和数据线400的第二钝化保护层500、及设置在所述第二钝化保护层500上的像素电极600。
所述TFT 200包括：设置在衬底基板100上的栅极210、覆盖所述栅极210与衬底基板100的栅极绝缘层220、于所述栅极210上方设置在所述栅极绝缘层220上的有源层230、及设置在所述栅极绝缘层220上分别接触有源层230两端的源极240和漏极250。
在所述漏极250上方设有贯穿第一钝化保护层300的第一过孔310，所述数据线400通过所述第一过孔310与漏极250接触。
在所述源极240上方设有贯穿第一钝化保护层300与第二钝化保护层500的第二过孔350，所述像素电极600通过所述第二过孔350与源极240接触。
具体地，所述衬底基板100为透明基板，优选玻璃基板。
所述源极240、漏极250、及数据线400使用相同的金属材料制作，所述金属材料优选为钼(Mo)、钛(Ti)、铝(Al)、铜(Cu)中的一种或多种的堆栈组合。
所述栅极绝缘层220、第一钝化保护层300、与第二钝化保护层500的材料可为氮化硅(SiNx)、氧化硅(SiOx)、或二者的组合。
所述像素电极600为透明电极，材料优选氧化铟锡(Indium Tin Oxides，ITO)。
进一步地，数据线400、与栅极210可以看作是两相对设置的金属电极板，二者之间存在寄生电容Cgd。由电容的计算公式知：
Cgd＝ε0εr s/d (1)
其中，ε0为真空介电常数，εr为材料的相对介电常数，s为数据线400与栅极210的正对面积，d为数据线400与栅极210之间的间距。
本发明的TFT阵列基板中，由于TFT 200的源极240和漏极250设置在栅极绝缘层220上，数据线400设置在覆盖TFT 200的源极240和漏极250的第一钝化保护层300上，即数据线400与TFT 200的源极240和漏极250位于不同的层别，所述数据线400与栅极210之间的间距为第一钝化保护层300的厚度与栅极绝缘层220的厚度之和，相较于传统的TFT阵列基板，所述数据线400与栅极210之间的间距增加了第一钝化保护层300的厚度。根据公式(1)可知寄生电容Cgd与数据线400和栅极210之间的间距成反比，数据线400与栅极210之间的间距增大使得寄生电容Cgd减小，能够有效地降低数据线400的功耗，进而降低TFT阵列基板的功耗；另外，本发明的TFT阵列基板能够通过调整第一钝化保护层300的厚度来灵活调整数据线400与栅极210之间的间距，进而灵活调整寄生电容Cgd，如通过增大第一钝化保护层300的厚度来增大数据线400与栅极210之间的间距，减小寄生电容Cgd。值得注意的是，由于数据线400与栅极210之间的间距增大的原因是将数据线400所在的层别升至第一钝化保护层300上，栅极绝缘层220的厚度不受影响，TFT 200的源极240与漏极250的位置不变，能够使TFT 200的特性保持稳定。
请参阅图3，基于同一发明构思，本发明还提供一种TFT阵列基板的制作方法，包括以下步骤：
步骤1、如图4所示，提供一衬底基板100，在所述衬底基板100上沉积并图案化第一金属层，形成栅极210。
具体地，所述衬底基板100为透明基板，优选为玻璃基板。
该步骤1使用第一道光罩通过蚀刻工艺来图案化第一金属层。
步骤2、如图5所示，在所述栅极210与衬底基板100上沉积栅极绝缘层220。
具体地，所述栅极绝缘层220的材料为氮化硅、氧化硅、或二者的组合。
步骤3、如图6所示，于所述栅极210上方在所述栅极绝缘层220上形成有源层230。
具体地，该步骤3形成有源层230的详细过程为：首先沉积非晶硅层，然后进行晶化处理得到多晶硅层，接着进行离子掺杂，最后使用第二道光罩通过蚀刻工艺进行图案化处理，得到源层230。
步骤4、如图7所示，在所述栅极绝缘层220与有源层230上第一次沉积并图案化第二金属层，形成分别与有源层230两端接触的源极240和漏极250，至此完成TFT 200的制作。
具体地，所述第二金属层的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
该步骤4使用第三道光罩通过蚀刻工艺来对第二金属层进行第一次图案化处理得到源极240和漏极250。
步骤5、如图8所示，在所述源极240、漏极250、与栅极绝缘层220上沉积覆盖第一钝化保护层300，并对第一钝化保护层300进行图案化处理，在所述漏极250上方形成贯穿第一钝化保护层300的第一过孔310。
具体地，所述第一钝化保护层300的材料为氮化硅、氧化硅、或二者的组合。
该步骤5使用第四道光罩通过蚀刻工艺来图案化第一钝化保护层300。
步骤6、如图9所示，在所述第一钝化保护层300上第二次沉积并图案化第二金属层，形成数据线400，所述数据线400通过所述第一过孔310与漏极250接触。
具体地，该步骤6中所述的第二金属层与上述步骤4中的第二金属层的材料相同，仍为钼、钛、铝、铜中的一种或多种的堆栈组合。
该步骤6使用第五道光罩通过蚀刻工艺来对第二金属层进行第二次图案化处理得到数据线400。
步骤7、如图10所示，在所述第一钝化保护层300、与数据线400上沉积覆盖第二钝化保护层500，并进行图案化处理，在所述源极240上方形成贯穿第二钝化保护层500与第一钝化保护层300的第二过孔350。
具体地，所述第二钝化保护层500的材料为氮化硅、氧化硅、或二者的组合。
该步骤7使用第六道光罩通过蚀刻工艺来图案化第二钝化保护层500与第一钝化保护层300，形成第二过孔350。
步骤8、如图11所示，在所述第二钝化保护层500上沉积并图案化透明导电薄膜，形成像素电极600，所述像素电极600通过所述第二过孔350与源极240接触。
具体地，所述透明导电薄膜为ITO薄膜。
该步骤8使用第七道光罩通过蚀刻工艺来图案化透明导电薄膜形成像素电极600。
本发明的TFT阵列基板的制作方法，先将TFT 200的源极240和漏极250制作在栅极绝缘层220上，再将数据线400制作在覆盖TFT 200的源极240和漏极250的第一钝化保护层300上，使得数据线400与TFT 200的源极240和漏极250位于不同的层别。
数据线400、与栅极210可以看作是两相对设置的金属电极板，二者之间存在寄生电容Cgd。由电容的计算公式知：
Cgd＝ε0εr s/d (1)
其中，ε0为真空介电常数，εr为材料的相对介电常数，s为数据线400与栅极210的正对面积，d为数据线400与栅极210之间的间距。
通过本发明的阵列基板的制作方法制得的TFT阵列基板，由于其数据线400与TFT 200的源极240和漏极250位于不同的层别，所述数据线400与栅极210之间的间距为第一钝化保护层300的厚度与栅极绝缘层220的厚度之和，相较于传统的TFT阵列基板，所述数据线400与栅极210之间的间距增加了第一钝化保护层300的厚度。根据公式(1)可知寄生电容Cgd与数据线400和栅极210之间的间距成反比，数据线400与栅极210之间的间距增大使得寄生电容Cgd减小，能够有效地降低数据线400的功耗，进而降低TFT阵列基板的功耗；另外，还能够通过调整第一钝化保护层300的厚度来灵活调整数据线400与栅极210之间的间距，进而灵活调整寄生电容Cgd，如通过增大第一钝化保护层300的厚度来增大数据线400与栅极210之间的间距，减小寄生电容Cgd。值得注意的是，由于数据线400与栅极210之间的间距增大的原因是将数据线400所在的层别升至第一钝化保护层300上，栅极绝缘层220的厚度不受影响，TFT 200的源极240与漏极250的位置不变，能够使TFT 200的特性保持稳定。
综上所述，本发明的TFT阵列基板，将TFT的源极和漏极设置在栅极绝缘层上，将数据线设置在覆盖TFT的源极和漏极的第一钝化保护层上，使得数据线与TFT的源极和漏极位于不同的层别，能够通过调整第一钝化保护层的厚度来灵活调整数据线与栅极之间的间距，与现有技术相比，增大了数据线与栅极之间的间距，减小了数据线与栅极之间的寄生电容，降低了数据线的功耗，同时，栅极绝缘层的厚度不受影响，TFT的源极与漏极的位置不变，能够维持TFT特性的稳定。本发明的TFT阵列基板的制作方法，先将TFT的源极和漏极制作在栅极绝缘层上，再将数据线制作在覆盖TFT的源极和漏极的第一钝化保护层上，既能够保证TFT特性，又能够减小数据线与栅极之间的寄生电容，降低数据线的功耗。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (8)

1.一种TFT阵列基板，其特征在于，包括：衬底基板(100)、设置在所述衬底基板(100)上的TFT(200)、覆盖所述TFT(200)的第一钝化保护层(300)、设置在所述第一钝化保护层(300)上的数据线(400)、覆盖所述第一钝化保护层(300)和数据线(400)的第二钝化保护层(500)、及设置在所述第二钝化保护层(500)上的像素电极(600)；
所述TFT(200)包括：设置在衬底基板(100)上的栅极(210)、覆盖所述栅极(210)与衬底基板(100)的栅极绝缘层(220)、于所述栅极(210)上方设置在所述栅极绝缘层(220)上的有源层(230)、及设置在所述栅极绝缘层(220)上分别接触有源层(230)两端的源极(240)和漏极(250)；
在所述漏极(250)上方设有贯穿第一钝化保护层(300)的第一过孔(310)；所述数据线(400)通过所述第一过孔(310)与漏极(250)接触。
2.如权利要求1所述的TFT阵列基板，其特征在于，所述源极(240)、漏极(250)、及数据线(400)的材料为相同的金属材料。
3.如权利要求2所述的TFT阵列基板，其特征在于，所述源极(240)、漏极(250)、及数据线(400)的材料同为钼、钛、铝、铜中的一种或多种的堆栈组合。
4.如权利要求1所述的TFT阵列基板，其特征在于，所述衬底基板(100)为玻璃基板；所述像素电极(600)的材料为ITO；所述栅极绝缘层(220)、第一钝化保护层(300)、与第二钝化保护层(500)的材料为氮化硅、氧化硅、或二者的组合。
5.如权利要求1所述的TFT阵列基板，其特征在于，在所述源极(240)上方设有贯穿第一钝化保护层(300)与第二钝化保护层(500)的第二过孔(350)，所述像素电极(600)通过所述第二过孔(350)与源极(240)接触。
6.一种TFT阵列基板的制作方法，其特征在于，包括以下步骤：
步骤1、提供一衬底基板(100)，在所述衬底基板(100)上沉积并图案化第一金属层，形成栅极(210)；
步骤2、在所述栅极(210)与衬底基板(100)上沉积栅极绝缘层(220)；
步骤3、于所述栅极(210)上方在所述栅极绝缘层(220)上形成有源层(230)；
步骤4、在所述栅极绝缘层(220)与有源层(230)上第一次沉积并图案化第二金属层，形成分别与有源层(230)两端接触的源极(240)和漏极(250)，至此完成TFT(200)的制作；
步骤5、在所述源极(240)、漏极(250)、与栅极绝缘层(220)上沉积覆盖第一钝化保护层(300)，并对第一钝化保护层(300)进行图案化处理，在所述漏极(250)上方形成贯穿第一钝化保护层(300)的第一过孔(310)；
步骤6、在所述第一钝化保护层(300)上第二次沉积并图案化第二金属层，形成数据线(400)，所述数据线(400)通过所述第一过孔(310)与漏极(250)接触；
步骤7、在所述第一钝化保护层(300)、与数据线(400)上沉积覆盖第二钝化保护层(500)，并进行图案化处理，在所述源极(240)上方形成贯穿第二钝化保护层(500)与第一钝化保护层(300)的第二过孔(350)；
步骤8、在所述第二钝化保护层(500)上沉积并图案化透明导电薄膜，形成像素电极(600)，所述像素电极(600)通过所述第二过孔(350)与源极(240)接触。
7.如权利要求6所述的TFT阵列基板的制作方法，其特征在于，所述第二金属层的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
8.如权利要求6所述的TFT阵列基板的制作方法，其特征在于，所述衬底基板(100)为玻璃基板；所述透明导电薄膜为ITO薄膜；所述栅极绝缘层(220)、第一钝化保护层(300)、与第二钝化保护层(500)的材料为氮化硅、氧化硅、或二者的组合。
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