CN103972115A - 半导体器件以及制造半导体器件的方法 - Google Patents

半导体器件以及制造半导体器件的方法 Download PDF

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CN103972115A
CN103972115A CN201310594257.XA CN201310594257A CN103972115A CN 103972115 A CN103972115 A CN 103972115A CN 201310594257 A CN201310594257 A CN 201310594257A CN 103972115 A CN103972115 A CN 103972115A
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splicing ear
film
semiconductor device
electrode
barrier metal
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CN103972115B (zh
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清水浩三
作山诚树
宫岛丰生
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Fujitsu Ltd
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Fujitsu Ltd
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
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    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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Abstract

本发明涉及半导体器件以及制造半导体器件的方法。一种制造半导体器件的方法，包括：在布线板的第一电极和半导体元件的第二电极中的至少一者的表面上形成阻挡金属膜；在第一电极与第二电极之间设置连接端子，连接端子由含锡、铋和锌的钎料制成；以及通过加热连接端子并且将连接端子的温度保持在不低于钎料熔点的恒定温度下一定时间段，来将连接端子接合至阻挡金属膜。

Description

半导体器件以及制造半导体器件的方法
技术领域
本文讨论的实施方案涉及半导体器件以及制造半导体器件的方法。
背景技术
对于安装在布线板上的半导体元件，其连接端子的数目在增加，因此连接端子中的每个之间的间距也越来越缩小。倒装芯片安装是一种解决这样的连接端子数目增加且间距缩小的安装技术。
在倒装芯片安装中，使由钎料凸点等制成的连接端子回流，由此通过连接端子使布线板和半导体元件的电极彼此连接。
连接端子的回流涉及半导体元件和布线板的加热。然而，半导体元件与布线板之间的热膨胀系数的差异可导致半导体元件在回流期间受损。
为了抑制这样的损害，使用具有尽可能低熔点的材料作为用于由钎料凸点等制成的连接端子的材料是有效的，由此降低在回流期间的加热温度。
无铅钎料被广泛地用作用于连接端子的材料，但由于其高熔点而不适合这样的低温回流。Sn-Ag-Cu基无铅钎料例如具有217℃的高熔点。
因此，通常使用具有139℃的低熔点并且具有共晶点组成的Sn-Bi基钎料作为用于连接端子的材料。
然而，使用Sn-Bi基钎料形成的连接端子在与电极的接合强度的提高方面仍然具有改进余地。
注意，日本公开特许公报第2012-157873号和第2010-167472号中公开了涉及本申请的技术。
本发明的一个目的是提高半导体器件中连接端子与电极之间的接合强度以及制造该半导体器件的方法。
发明内容
根据以下公开内容的一个方面，提供了一种制造半导体器件的方法，包括：在布线板的第一电极和半导体元件的第二电极中的至少一者的表面上形成阻挡金属膜；在第一电极与第二电极之间设置连接端子，连接端子由含锡、铋和锌的钎料制成；以及通过加热连接端子并且将连接端子的温度保持在不低于钎料的固相线温度的恒定温度下恒定时间段，来将连接端子接合至阻挡金属膜。
根据本公开内容的另一方面，提供了一种半导体器件，包括：包括第一电极的布线板；包括第二电极的半导体元件；设置在第一电极和第二电极中的任一者的表面上的阻挡金属膜；以及设置在第一电极与第二电极之间的连接端子，连接端子接合至阻挡金属膜并由含锡、铋和锌的钎料制成，其中在阻挡金属膜与连接端子之间形成有由阻挡金属膜的材料和锌制成的合金层。
根据以下公开内容，当熔化连接端子时，连接端子的材料中包含的锌抑制了连接端子中的铋的偏析。因而，可以防止由于机械脆性的铋而导致的连接端子与阻挡金属膜之间接合强度的降低。
附图说明
图1A和图1B为用于研究的半导体器件在其制造过程中的放大横截面图；
图2A和图2B为根据一个实施方案的半导体器件在其制造过程中的放大横截面图；
图3为根据本实施方案的半导体器件的整体横截面图；
图4为通过研究连接端子的接合强度得到的曲线图；
图5A为根据本实施方案的第一实施例的第一阻挡金属膜的横截面图，图5B为根据本实施方案的第二实施例的第一阻挡金属膜的横截面图；
图6A和图6B为当将连接端子接合至根据图5A和图5B的各自实施例的第一阻挡金属膜时，基于横截面BF STEM(明场扫描透射电子显微镜)的图像而绘制的图；
图7为示出根据本实施方案的回流温度曲线的曲线图；
图8为用于说明实验中所使用的第一阻挡金属膜的样品的层结构的表；
图9为用于说明实验中所使用的回流温度曲线的表；
图10为示出实验中所使用的第一阻挡金属膜的样品和回流温度曲线的组合的表；
图11为示出用作实验中的连接端子的材料的钎料样品的组成的表。
具体实施方式
在描述实施方案之前，将描述由本申请的本发明人进行的研究。
如上所述，为了减少对半导体元件的损害，使用具有尽可能低熔点的钎料作为用于将半导体元件连接至布线板的连接端子的材料是有效的。
因此，在该研究中，将作为低熔点钎料使用的Sn-Bi基钎料用作连接端子的材料以研究电极与连接端子之间的接合强度。
图1A和图1B为在研究过程中制造半导体器件的放大横截面图。
首先，如图1A所示，制备电路板1和半导体元件10如LSI(大规模集成电路)。
在布线板1的表面上设置由铜制成的第一电极2，并通过将镍膜3和金膜4以此顺序层叠来在第一电极2上形成第一阻挡金属膜5。
镍膜3通过非电解镀覆形成为约4μm至6μm的厚度，并且包含镀覆液中含有的少量磷。另外，金膜4通过非电解镀覆形成为约0.1μm至0.3μm的厚度。
同时，在半导体元件10的表面上，设置由铜制成的第二电极11。在第二电极11上，通过将镍膜12和金膜13以此顺序层叠来形成第二阻挡金属膜14。具体地，镍膜12通过电解镀覆形成为约1μm至2μm的厚度，并且金膜13通过电解镀覆形成为约0.1μm至0.3μm的厚度。
预先将连接端子8接合至第二阻挡金属膜14。连接端子8的材料为Sn-57Bi钎料，Sn-57Bi钎料为Sn-Bi钎料的一个实例，其固相线温度低至139℃。
然后，使连接端子8与第一阻挡金属膜5进行接触，并且将连接端子8加热至熔化。在此情况下，作为各自阻挡金属膜5和阻挡金属膜14的最上层而形成的金膜4和金膜13使阻挡金属膜5和阻挡金属膜14的表面具有Sn-57Bi钎料的良好润湿性。
此外，形成在由铜制成的第一电极2上的第一阻挡金属膜5防止铜从第一电极2扩散出而进入连接端子8中。
在所保持的该状态下，如图1B所示，在熔化的连接端子8中的锡与在阻挡金属膜5和阻挡金属膜14中的每个中的镍反应。因此，在阻挡金属膜5和阻挡金属膜14中的每个中形成锡和镍的合金层7，并且连接端子8经由合金层7接合至电极2和电极11两者。
因而，得到了具有安装在布线板1上的半导体元件10的半导体器件15的基本结构。
这里，在图1B的步骤中，在合金层7的形成期间，在连接端子8中的比铋更具反应性的锡优先与阻挡金属膜5和阻挡金属膜14反应。因此，未反应的铋可留在连接端子8与阻挡金属膜5和阻挡金属膜14之间的界面X周围，这进而导致铋的局部偏析。
铋有助于降低连接端子8的熔点，但在机械上是硬且脆性的。如上所述，当铋在界面X上偏析时，降低了连接端子8与电极2和电极11之间的接合强度，因而降低了半导体器件15的可靠性。
在下文中，将描述即使当使用铋作为用于连接端子的材料时也能防止半导体器件的可靠性降低的实施方案。
(实施方案)
在本实施方案中，如下所述，通过将与阻挡金属膜具有良好反应性的锌添加至连接端子来防止连接端子中的铋的偏析。
图2A和图2B为根据本实施方案的半导体器件在其制造过程中的放大横截面图。
首先，如图2A所示，制备布线板21和半导体元件25如LSI。
在布线板21的表面上设置由铜制成的第一电极22，并且在第一电极22上形成第一阻挡金属膜23。另外，在半导体元件25的表面上设置由铜制成的第二电极26，并且在第二电极26上形成第二阻挡金属膜27。
注意，后续将描述第一阻挡金属膜23和第二阻挡金属膜27的优选层结构。
预先将具有约0.6mm直径的钎料凸点作为连接端子24接合至第二阻挡金属膜27。
作为用于连接端子24的材料的钎料主要由锡和铋制成，并包含作为附加材料的锌。钎料的成分组成没有特别限制。本实施方案使用由具有锡和铋的共晶组成的Sn-57Bi-xZn(0.1≤x≤1)所表示的钎料。铋的包含将钎料的固相线温度降低至约139℃。
然后，在第一阻挡金属膜23与第二阻挡金属膜27之间设置有连接端子24的情况下，通过回流将连接端子24加热至熔化。后续将描述用于回流的优选条件。
如上所述，作为连接端子24的材料的钎料具有约139℃的低固相线温度。因此，能够降低用于熔化连接端子24的温度，并且因此减少了在回流期间对半导体元件25所造成的损害。
此后，通过保持连接端子24的熔化状态，形成了连接端子24与阻挡金属膜23和阻挡金属膜27的材料的合金层30。因而，连接端子24经由合金层30接合至电极22和电极26。
这里，在熔化的连接端子24中，其中所含的锌的反应性远高于剩余的锡。因此，在合金层30的形成期间，锌比锡更优先与阻挡金属膜23和阻挡金属膜27反应。因此，合金层30主要由锡合金形成。
此外，与锌相比具有较低反应性的锡和铋的大部分以未反应状态共存于连接端子24中。因而，防止了在连接端子24与阻挡金属膜23和阻挡金属膜27之间的界面Y处的单独的铋的偏析。因此，可以防止由于机械上脆性的铋而导致连接端子24与电极22和电极26之间的接合强度的降低。
如上所述，通过抑制连接端子24中的锡与阻挡金属膜23和阻挡金属膜27反应，添加至连接端子24的锌起着使得锡和铋共存于连接端子24中的作用。
然而，由于锌比锡更容易氧化，因此添加至连接端子24的大量锌导致在连接端子24的表面上形成氧化物层。这可妨碍电极22和电极26通过连接端子24的良好电连接。为了防止在连接端子24上形成氧化物层，优选地，将连接端子24中的锌的浓度设置为1重量％或更小。
另一方面，当锌的浓度太低时，这样低浓度的锌难以抑制连接端子24中铋的偏析。因此，优选地，通过将连接端子24中的锌浓度设置为0.1重量％或更大来有效地抑制铋的偏析。
此外，为了防止连接端子24通过回流被氧化，优选在氧浓度降低至1000ppm或更小的氮气氛中执行回流。
此外，第一阻挡金属膜23的设置抑制了铜从第一电极22扩散进连接端子24中。这防止了由于锡与铜之间的反应而导致的连接端子24中的铋浓度的相对增加，并且抑制了连接端子24中的铋的偏析。因此，提高了连接端子24与第一电极22之间的接合强度。类似地，第二阻挡金属膜27也防止了铜从第二电极26扩散进连接端子24中。
因而，实现了具有安装在布线板21上的半导体元件25的半导体器件31的基本结构。
图3为半导体器件31的整体横截面图。
如图3所示，在布线板21的主表面上设置有由铜制成的多个焊垫34，布线板21的主表面是与安装有半导体元件25的一侧相反的一侧。此外，作为外部连接端子，钎料凸点36接合至焊垫34。这样配置的半导体器件31也被称为BGA(球栅阵列)半导体器件。
注意，为了提高布线板21与半导体元件25之间的机械连接强度，可以在它们之间设置底部填充树脂。
在如上所述的本实施方案中，将与阻挡层金属膜23和阻挡层金属膜27的反应性比锡高的锌添加至连接端子24，从而防止了连接端子24中的铋的偏析。因而，提高了连接端子24与电极22和电极26之间的接合强度。
本申请的发明人研究了连接端子24的接合强度被提高了多少。
图4示出了研究结果。
在此研究中，在如上所述的在连接端子24被接合至电极22和电极26之后，将连接端子24加热至125℃以加快铋的偏析，并且因而进行了加速试验。
在图4中，横轴表示如上所述加热连接端子24的时间，而纵轴表示第一电极22与连接端子24之间的接合强度。注意，接合强度被定义为在沿连接端子24从布线板21剥离的方向增加力时，连接端子24从第一电极22剥离时所施加的力。
在将Sn-57Bi-1.0Zn用作用于连接端子24的材料和将Sn-57Bi-0.5Zn用作用于连接端子24的材料的情况中的每个情况下研究接合强度。注意，将镍用作用于第一阻挡金属膜23的材料。
此外，在研究中，还将图1B所示的连接端子8与第一电极2之间的接合强度作为比较例来研究。如上所述，在比较例中，将未添加锌的Sn-57Bi钎料用作用于连接端子8的材料。
如图4所示，在比较例中，接合强度随着时间突然下降。这被认为是由于连续加热连接端子8并且因此加快了连接端子8中的铋的偏析而导致的。
在本实施方案中，另一方面，在Sn-57Bi-1.0Zn和Sn-57Bi-0.5Zn两者的情况下，均抑制了接合强度的降低。这证实了，通过将锌添加至主要由锡和铋制成的钎料中并且将所述钎料用作用于连接端子24的材料，实际保持了连接端子24与第一电极22之间的接合强度。
接着，将描述上述的第一阻挡金属膜23的优选层结构。
图5A为在接合连接端子24之前的状态下根据第一实施例的第一阻挡金属膜23的横截面图。
在此实施例中，将镍膜23a和金膜23b以此顺序形成在第一电极22上，并且这些金属层被用作第一阻挡金属膜23。
在这些膜中，镍膜23a具有优良的防止铜扩散的能力。因此，镍膜23a抑制了铜从第一电极22扩散进连接端子24中。
对于形成镍膜23a的方法，存在电解镀覆和非电解镀覆。当镍膜23a通过非电解镀覆形成时，镍膜23a包含镀覆液中含有的微量磷。如上所述的含磷的镍也被称为NiP。
此外，镍膜23a的厚度没有特别限制。当镍膜23a通过非电解镀覆形成时，膜23a的厚度为例如约4μm至6μm。另一方面，当通过电解镀覆形成NiP膜作为镍膜23a时，膜23a的厚度为例如1μm至2μm。
同时，第一阻挡金属膜23的最上层中的金膜23b起着改善第一阻挡金属膜23上的连接端子24的润湿性的作用。金膜23b例如通过非电解镀覆形成，并且厚度为约0.3μm。
图5B为在接合连接端子24之前的状态下根据第二实施例的第一阻挡金属膜23的横截面图。
在第二实施例中，在第一实施例中所述的镍膜23a与金膜23b之间设置有钯膜23c。
与金膜23b的情况一样，钯膜23c具有改善连接端子24的润湿性的功能。因而，在通过减少金膜23b的厚度而减少了用于形成昂贵金膜23b成本的同时，保持了连接端子24的润湿性。
虽然钯膜23c的厚度没有特别限制，但在此实施例中，钯膜23c通过非电解镀覆而形成约0.05μm的厚度。
另外，在第二实施例中，如上所述，可以减小金膜23b的厚度。因而，在本实施方案中，通过闪镀来形成约0.075μm厚度的金膜23b。
注意，形成镍膜23a的方法与第一实施例中的方法相同。镍膜23a可以通过电解镀覆形成，或者镍膜23a可以通过非电解镀覆形成为NiP膜。当镍膜23a通过非电解镀覆形成时，镍膜23的厚度为例如约4μm至6μm。另一方面，当镍膜23a通过非电解镀覆形成为NiP膜时，镍膜23a的厚度为例如1μm至2μm。
虽然如上描述第一阻挡金属膜23的层结构，但第二阻挡金属膜27也可以采用与图5A和图5B中所示的层结构相同的层结构。
图6A和图6B为当连接端子24接合至根据图5A和图5B的各自实施例的第一阻挡金属膜23时，根据横截面BF STEM(明场扫描透射电子显微镜)图像所绘制的图。注意，在图6A和图6B的实施例中的每个中，镍膜23a通过非电解镀覆形成为NiP膜。
在第一实施例中，如图6A所示，镍膜23a的表面层部分与连接端子24中的锌之间的反应导致在第一阻挡金属膜23与连接端子24之间的界面处形成主要由NiZn制成的合金层30。注意，在第一阻挡金属膜23的最上层中形成的金膜23b是薄的并且因而不会出现在BF STEM图像中。
同时，在第二实施例中，如图6B所示，形成包含AuZn和PbZn的合金层30。通过金膜23b和钯膜23c的表面层部分与包含在连接端子24中的锌的反应来形成合金层30。
在第一实施例和第二实施例两者中，不与第一阻挡金属膜23反应的未反应的锡、铋和锌共存在于合金层30上方的连接端子24中。
接着，将描述根据本实施方案的用于连接端子24的优选回流条件。
如上所述，在本实施方案中，通过图2B的步骤中的回流来熔化连接端子24。
图7为示出在回流期间的温度曲线的曲线图。横轴表示回流时间，并且纵轴表示连接端子24的温度。
另外，在图7中，由实线所示的曲线A表示本实施方案的温度曲线，而由虚线所示的曲线B表示根据比较例的温度曲线。
注意，如上所述，在此实施例中，为了防止连接端子24在回流期间被氧化，在氧浓度降低至1000ppm或更小的氮气氛中执行回流。
如曲线A所示，在本实施方案中的温度曲线分为第一时段41至第五时段45。
在第一时段41中，开始回流以提高连接端子24的温度，然后在连接端子24的温度达到其固相线温度Tmp之前停止温度上升。
在下个第二时段42中，通过将连接端子24保持在恒定温度下来将布线板21和半导体元件25两者的构成成分保持在温热的状态。
然后，在第三时段43中，恢复连接端子24的温度上升以将连接端子24加热至等于或高于连接端子24的固相线温度Tmp的温度，因而熔化连接端子24。
这里，在本实施方案中，当连接端子24达到比固相线温度Tmp高预定温度ΔT的温度时，再次停止温度上升。然后，在第四时段44中，将连接端子24保持在恒定温度T0(＝Tmp+ΔT)下。
如上所述，通过将连接端子24保持在不低于固相线温度Tmp的温度T0下，确保了第一阻挡金属膜23有足够时间与熔化的连接端子24接触。因此，促进了上述合金层30的形成。因而，合金层30被形成为在第一阻挡金属膜23的整个表面上具有均匀厚度。因此，提高了第一阻挡金属膜23与连接端子24之间的接合强度。
虽然不特别限制如上所述的预定温度ΔT，但优选采用在连接端子24中共存有固相钎料和液相钎料的温度ΔT。这样固相钎料和液相钎料的共存使得合金层30形成的进度比整个连接端子24在液相的情况下慢。因而，更容易形成具有均匀厚度的合金层30，并且通过稳定形状的合金层30来实现上述接合强度的有效改善。
注意，上述共存有固相钎料和液相钎料的温度ΔT的范围为例如0℃≤ΔT≤10℃。
当第四时段44的时间t较短时，合金层30的形成就变得困难。因而，优选地，通过将时间t设置为15秒或更多来形成具有足够厚度的合金层30以改善接合强度。
之后，在第五时段45中，恢复连接端子24的温度上升来将连接端子24加热至回流的最高温度Tmax(约180℃)，从而大致将整个连接端子24设置在液相下。因而，减少了连接端子24中元素的组成变化。因此，较有效地抑制了连接端子24中铋的偏析。因此，进一步改善了连接端子24与电极22和电极26之间的接合强度。
随后，将连接端子24冷却至室温以被凝固。因而，布线板21和半导体元件25经由连接端子24机械地连接。
在本实施方案中，如上所述，通过将连接端子24保持在不低于第四时段44中的固相线温度Tmp的温度T0下，促进了合金层30的形成以改善连接端子与第一电极22之间的接合强度24。
注意，比较例的曲线B不具有连接端子被保持在恒定温度T0的时段。因而，合金层30的快速形成使得合金层30的厚度不均匀。因此，利用合金层30改善连接端子24与第一电极22之间的接合强度被认为是困难的。
接着，将描述本申请的发明人所进行的实验。
图8为用于说明实验中所用的第一阻挡金属膜23的样品P1到样品P4的层结构的表。
如参照图5A和图5B所述，存在用于第一阻挡金属膜23的第一实施例和第二实施例。此外，在第一实施例和第二实施例两者中，在第一阻挡金属膜23中形成镍膜23a。如上所述，存在两种方法即电解镀覆和非电解镀覆作为形成镍膜23a的方法。
在此实验中，在第一实施例和第二实施例中的每个中，电解镀覆和非电解镀覆被用作形成镍膜23a的方法，如图8所示。因而，共形成四个样品P1至P4。
同时，使用图9所示的四个温度曲线作为回流温度曲线。
温度曲线中的每个均具有与图7所示的曲线A相同的形状。然而，在此实验中，通过采用固相线温度和150℃作为第四时段44中的恒定温度T0(见图7)并且还采用15秒和30秒作为第四时段44中的时间t来总共使用四个温度曲线1至4。
注意，在将“固相线温度”设置为温度T0情况下的温度曲线1和温度曲线2中，采用连接端子24的固相线温度Tmp(约139℃)作为第四时段44中的恒定温度T0。同时，在将“150℃”设置为温度T0情况下的温度曲线3和温度曲线4中，采用比连接端子24的固相线温度Tmp(约139℃)高约10℃的150℃作为第四时段44中的恒定温度T0。
图8中的四个样品P1至P4和图9中的四个温度曲线对应于第一阻挡金属膜23和温度曲线的总共十六个(4×4)组合。
图10为示出上述十六个组合的表。
在此实验中，对于所有的十六个组合，使用具有以下组成的钎料来测量第一电极22与连接端子24之间的接合强度。
图11为示出在实验中用作用于连接端子24的材料的钎料样品S1至钎料样品S21的组成的表。注意，在图11中由质量百分比来表示钎料组成。此外，空白单元格表示不存在对应于这些单元格的组成。并且锡浓度“Bal.”表示平衡锡浓度以使整个钎料的质量百分比成为100重量％。
所有钎料样品S1至钎料样品S24主要由锡和铋制成，并且使用锌作为附加材料。
注意，在样品S1至样品S3中，只有锌被用作附加材料并且没有使用除锌以外的其它附加材料。
此外，还使用银(Ag)作为样品S4至样品S6中的附加材料，并且还使用锑(Sb)作为样品S7至样品S9中的附加材料。此外，还使用钴(Co)作为样品S10至样品S12中的附加材料，并且还使用镍(Ni)作为样品S13至样品S15中的附加材料。此外，还使用铝(Al)作为样品S16至样品S18中的附加材料，并且还使用锗作为样品S19至样品S21中的附加材料。在样品S22至样品S24中，还使用磷作为附加材料。
作为实验的结果，在含有作为附加材料的锌的样品S1到样品S24中，第一电极22与连接端子24之间的接合强度为20N或更大，即使针对图10中的所有十六个组合使第一电极22和连接端子24两者接合然后在125℃下加热这两者达500小时之后也是如此。
上述结果表明，锌有效地改善了接合强度并且即使当除锌以外的银、锑、钴、镍、铝、磷和锗中的任一种添加到钎料中时，接合强度也得到了改善。
还证实了，在图8中的样品P3和P4的情况下，特别是当第一阻挡金属膜23包括钯膜23c时，接合强度是其他样品P1和P2的1.2倍或更多倍。
另一方面，如图4所示，在将未添加锌的Sn-57Bi钎料用作连接端子24的比较例中，当在相同的实验条件下将加热时间设置为500小时时，接合强度降低至本实施方案中的接合强度的约一半。
这证实了，对于图8中的第一阻挡金属膜23的四个层结构，图9中的四个温度曲线以及图10中的钎料组成的所有二十一种组合，与比较例相比，均改善了第一电极22与连接端子24之间的接合强度。
此外，本申请的发明人进行如下测试以评估根据本实施方案的半导体器件31(见图3)的可靠性。
所述测试是将半导体器件31在-25℃与125℃之间重复冷却和加热500个周期的温度周期测试。在温度周期测试之后，根据本实施方案的半导体器件31具有电极22与电极26之间的电阻的10％或更小的良好上升率。此外，即使当半导体器件31留在具有121℃温度和85％湿度的热且潮湿的条件下达1000小时时，电阻的上升率仍保持在低至温度周期测试情况下的电阻的上升率的10％或更小。
另一方面，在将未添加锌的Sn-57Bi钎料用作连接端子24的比较例中，在相同的温度周期测试之后，电阻的上升率超过10％。此外，当根据比较例的半导体器件留在具有121℃温度和85％湿度的热且潮湿的条件下达1000小时时，电阻的上升率超过10％。
此结果证实，本实施方案在改善半导体器件的可靠性上也是有效的。
虽然上面详细描述了本实施方案，但本实施方案并不限于上述内容。
例如，虽然在图11中银、锑、钴、镍、铝、锗和磷中的任一种单独添加至钎料来作为用于连接端子24的材料，但其任意组合均可以添加至钎料。在此情况下，如上所述，也改善了连接端子24与电极22和电极26中的每个电极之间的接合强度。
此外，虽然在图3中，根据实施方案，布线板21和半导体元件25经由连接端子24连接，但任意有源元件或无源元件均可以经由连接端子24连接至布线板21。此外，也不特别限制布线板21的使用。布线板21可以用于任意电子设备如服务器和个人计算机。

Claims (16)

1.一种制造半导体器件的方法，包括：
在布线板的第一电极和半导体元件的第二电极中的至少一者的表面上形成阻挡金属膜；
在所述第一电极与所述第二电极之间设置连接端子，所述连接端子由含锡、铋和锌的钎料制成；以及
通过加热所述连接端子并且将所述连接端子的温度保持在不低于所述钎料的固相线温度的恒定温度下一定时间段，来将所述连接端子接合至所述阻挡金属膜。
2.根据权利要求1所述的制造半导体器件的方法，其中所述阻挡金属膜为包含镍膜的金属层。
3.根据权利要求2所述的制造半导体器件的方法，其中所述金属层为通过按叙述顺序层叠所述镍膜和金膜而得到的层叠膜。
4.根据权利要求2所述的制造半导体器件的方法，其中所述金属层为通过按叙述顺序层叠所述镍膜、钯膜和金膜而得到的层叠膜。
5.根据权利要求1至4中任一项所述的制造半导体器件的方法，其中所述恒定温度为固相钎料和液相钎料在所述连接端子中共存的温度。
6.根据权利要求5所述的制造半导体器件的方法，其中所述恒定温度为不高于通过将所述固相线温度加10℃所得到的温度的温度。
7.根据权利要求1至4中任一项所述的制造半导体器件的方法，其中所述一定时间段为15秒或更多。
8.根据权利要求1至4中任一项所述的制造半导体器件的方法，其中在所述连接端子的加热中，在所述一定时间段过去之后，将所述连接端子的温度升至比所述恒定温度高的温度。
9.根据权利要求1至4中任一项所述的制造半导体器件的方法，其中所述钎料的主要组分为所述锡和所述铋。
10.根据权利要求1至4中任一项所述的制造半导体器件的方法，其中在所述钎料中的所述锌的浓度为不小于0.1重量％并且不大于1重量％。
11.一种半导体器件，包括：
包括第一电极的布线板；
包括第二电极的半导体元件；
设置在所述第一电极和所述第二电极中的任一者的表面上的阻挡金属膜；以及
设置在所述第一电极与所述第二电极之间的连接端子，所述连接端子接合至所述阻挡金属膜并由含锡、铋和锌的钎料制成，其中，
在所述阻挡金属膜与所述连接端子之间形成有由所述阻挡金属膜的材料和所述锌制成的合金层。
12.根据权利要求11所述的半导体器件，其中所述阻挡金属膜为包含镍膜的金属层。
13.根据权利要求12所述的半导体器件，其中所述金属层为通过按叙述顺序层叠所述镍膜和金膜而得到的层叠膜。
14.根据权利要求12所述的半导体器件，其中所述金属层为通过按叙述顺序层叠所述镍膜、钯膜和金膜而得到的层叠膜。
15.根据权利要求11至14中任一项所述的半导体器件，其中所述钎料的主要组分为所述锡和所述铋。
16.根据权利要求11至14中任一项所述的半导体器件，其中所述钎料中的所述锌的浓度为不小于0.1重量％并且不大于1重量％。
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