CN103325733B - 基板的分离方法以及分离装置 - Google Patents

基板的分离方法以及分离装置 Download PDF

Info

Publication number
CN103325733B
CN103325733B CN201310063932.6A CN201310063932A CN103325733B CN 103325733 B CN103325733 B CN 103325733B CN 201310063932 A CN201310063932 A CN 201310063932A CN 103325733 B CN103325733 B CN 103325733B
Authority
CN
China
Prior art keywords
substrate
circumference
bond layer
semiconductor wafer
peel ply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201310063932.6A
Other languages
English (en)
Other versions
CN103325733A (zh
Inventor
清水纪子
田久真也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japanese Businessman Panjaya Co ltd
Kioxia Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of CN103325733A publication Critical patent/CN103325733A/zh
Application granted granted Critical
Publication of CN103325733B publication Critical patent/CN103325733B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02021Edge treatment, chamfering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C65/00Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor
    • B29C65/02Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C65/00Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor
    • B29C65/48Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor using adhesives, i.e. using supplementary joining material; solvent bonding
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C66/00General aspects of processes or apparatus for joining preformed parts
    • B29C66/004Preventing sticking together, e.g. of some areas of the parts to be joined
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/26Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer which influences the bonding during the lamination process, e.g. release layers or pressure equalising layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/0004Cutting, tearing or severing, e.g. bursting; Cutter details
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/10Removing layers, or parts of layers, mechanically or chemically
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/18Handling of layers or the laminate
    • B32B38/1825Handling of layers or the laminate characterised by the control or constructional features of devices for tensioning, stretching or registration
    • B32B38/1833Positioning, e.g. registration or centering
    • B32B38/1841Positioning, e.g. registration or centering during laying up
    • B32B38/185Positioning, e.g. registration or centering during laying up combined with the cutting of one or more layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B43/00Operations specially adapted for layered products and not otherwise provided for, e.g. repairing; Apparatus therefor
    • B32B43/006Delaminating
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04Interconnection of layers
    • B32B7/06Interconnection of layers permitting easy separation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/11Methods of delaminating, per se; i.e., separating at bonding face
    • Y10T156/1111Using solvent during delaminating [e.g., water dissolving adhesive at bonding face during delamination, etc.]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/11Methods of delaminating, per se; i.e., separating at bonding face
    • Y10T156/1168Gripping and pulling work apart during delaminating
    • Y10T156/1189Gripping and pulling work apart during delaminating with shearing during delaminating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/19Delaminating means
    • Y10T156/1994Means for delaminating from release surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

提供一种能够不损伤各基板并在短时间内将经由粘接剂贴合的2张基板分离的方法以及装置。实施方式的基板分离方法,是将在表面的除了周缘部的区域形成有剥离层(16)的第1基板(10)与经由粘接剂层(12)贴合于第1基板(10)的表面的至少包含剥离层(16)的区域的第2基板(14)分离的方法。该方法包括:除去工序,该工序以至少第2基板(14)周缘部正下的粘接剂层(12)表面露出并且在第1基板(10)的周缘部与第2基板(14)之间残存有粘接剂层(12)而保持第1以及第2基板(10、14)之间的粘接的方式,将该第2基板(14)周缘部物理性除去;和溶解工序,该工序在所述除去工序后,将粘接剂层(12)溶解。

Description

基板的分离方法以及分离装置
技术领域
本申请主张基于2012年3月23日申请的日本专利申请第2012-68287号的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
本发明的实施方式涉及基板的分离方法以及分离装置。
背景技术
作为将半导体晶片薄片化的方法,将半导体晶片通过粘接剂贴合于较厚的支撑基板而切削的方法众所周知。能够良好地保持通过贴合于较厚的支撑基板而切削时的半导体晶片的平坦度,能够将半导体晶片均匀地薄片化为50~100μm的厚度。薄片化后的半导体晶片在贴合于支撑基板的状态下,对切削面实施形成电路图形等所需的加工,然后从支撑基板剥离,经切割,芯片化。
这样,在上述方法中,需要在薄片化后将半导体晶片从支撑基板分离。但是,薄片化后的半导体晶片当然机械强度较小,容易破损。因此,要求能够不使其破损地将半导体晶片分离的技术。另一方面,该分离作业较大影响半导体芯片的生产性,如果作业花时间则生产性下降。因此,要求有能够短时间将半导体晶片分离的技术。
另外,这样通过粘接剂将2张基板贴合的后再次分离为各基板的技术并不限定于上述半导体晶片与支撑基板的例子,能够在各种领域中广泛使用,对于其也同样,要求有能够不损伤基板并在短时间内分离的技术。
发明内容
本发明的目的在于提供一种能够不损伤各基板并在短时间内将经由粘接剂贴合的2张基板分离的方法以及装置。
实施方式的基板分离方法,是将在表面的除了周缘部的区域形成有剥离层的第1基板与经由粘接剂层贴合于所述第1基板的表面的至少包含所述剥离层的区域的第2基板分离的基板分离方法,其中,包括:除去工序,该工序以至少所述第2基板周缘部正下的所述粘接剂层表面露出并且在所述第1基板的周缘部与所述第2基板之间残存有所述粘接剂层而保持所述第1以及第2基板之间的粘接的方式,将所述第2基板周缘部物理性除去;和溶解工序,该工序在所述除去工序后,将所述粘接剂层溶解。
实施方式的基板分离装置,是将在表面的除了周缘部的区域形成有剥离层的第1基板与经由粘接剂层贴合于所述第1基板的表面的至少包含所述剥离层的区域的第2基板分离的基板分离装置,其中,包括:除去单元,其将所述第2基板周缘部物理性除去;和供给单元,其向通过所述除去单元将周缘部除去的第2基板的周围供给将所述粘接剂层溶解的溶解液。
附图说明
图1是表示第1实施方式中的基板分离方法的概略剖视图。
图2是表示第1实施方式的变形例的概略剖视图。
图3是表示第1实施方式的变形例的概略剖视图。
图4是表示第1实施方式的变形例的概略剖视图。
图5是表示第2实施方式中的基板分离方法的概略剖视图。
图6是表示第2实施方式的变形例的概略剖视图。
符号说明
10:支撑基板
12:粘接剂层
14:半导体晶片
16:剥离层
20:贴合基板
21:剥离层形成区域
23:剥离层非形成区域
30:刀片
具体实施方式
以下,参照附图对实施方式进行说明。另外,在以下的附图的记载中,对于同一要素或者具有同一功能的要素付与同一符号,将重复的说明省略。另外,在以下进行说明的实施方式中,都以进行分离的2张基板的一方为半导体晶片另一方为支撑半导体晶片的支撑基板的情况为例进行说明,但不用说,只要是需要通过粘接剂将2张基板贴合、然后对这些基板实施所需的处理后、再次分离为2张基板,并不限定于半导体晶片以及支撑基板的例子,能够广泛适用。
(第1实施方式)
图1是顺序表示第1实施方式的基板分离方法的工序的概略剖视图。另外,图1以及以后表示的附图都仅表示分离的2张基板(半导体晶片以及支撑基板)的周缘部及其附近。
本实施方式的基板分离方法如图1(a)所示,是将由玻璃、硅等构成的支撑基板(第1基板)10与经由粘接剂12表面性贴合于该支撑基板10的半导体晶片(第2基板)14分离的基板分离方法。
支撑基板10具有下述功能:在对半导体晶片实施薄片化和/或形成电路图形等加工时,或者为了加工而搬运半导体晶片时,对半导体晶片14的机械强度等进行加强补充,另外确保其平坦度;作为其材质,除了上述的玻璃、硅,还能够列举铝、碳化硅、氧化铝、不锈钢、树脂等。支撑基板10的形状根据所支撑的半导体晶片14的形状而适当确定,另外,其厚度根据材质和/或所要求的强度等而适当确定。
在支撑基板10的一方的主面(表面)的中央区域(也称为剥离层形成区域)21,设有由相对于粘接剂层12不显示粘接性的非剥离性树脂等构成的剥离层16。即,支撑基板10的表面含有中央部的形成有剥离层16的剥离层形成区域21与周缘部的剥离层非形成区域23。
剥离层16在通过粘接剂层12贴合于支撑基板10的表面的半导体晶片14在薄片化等加工时和/或搬运时不会剥离的范围内,优选以尽可能宽的面积形成。虽然也与粘接剂的与半导体晶片14和/或支撑基板10相对的粘接力等有关,但通常从其外边缘到粘接剂层12的外边缘的距离(D)优选为1.0~4.0mm左右的范围,更优选为2.0~3.5mm左右的范围,更优选为2.5~3.0mm左右。在距离(D)小于1.0mm时,在加工和/或搬运时具有半导体晶片14从支撑基板10剥离的危险,如果距离(D)超过4.0mm,则后述的除去工序中的半导体晶片14周缘部的除去宽度变宽,半导体晶片14的半导体元件或者电路图形的形成区域变窄。另外,结果,从1张半导体晶片14取出的半导体芯片的个数变少。
半导体晶片14没有特别限定,具有定向平面的或者具有凹口的均可。另外,周缘部的形状也没有特别限定,以平面、曲面或者它们的组合的任意一种形成均可。作为半导体晶片14的材质,可以列举例如硅、蓝宝石、GaAs(砷化镓)等半导体材料。半导体晶片14在与支撑基板10相向的面(表面)上,虽然图示省略,但也可以形成有电路图形或者电路图形与半导体元件。这些电路图形与半导体元件形成于比在后述的除去工序中除去的周缘部靠内侧的区域。
在粘接剂层12的材料中,使用将能够溶解于有机溶剂的例如丙烯系树脂、烃系树脂(聚环烯烷树脂、萜烯树脂、石油树脂等)、线型的酚醛树脂等设为主成分的粘接剂。通过将这样的粘接剂涂布于半导体晶片14或支撑基板10优选半导体晶片14的表面而形成粘接剂层12。粘接剂的涂布例如能够一边使半导体晶片14(或支撑基板10)旋转一边使用旋转涂布机等涂布装置而进行。由此,例如能够形成5~100μm左右的厚度的均匀的粘接剂层12。粘接剂可以单独使用一种也可以将2种以上混合而使用。从防止加工时和/或搬运时的半导体晶片14的破损的观点,粘接剂层12优选形成于半导体晶片14的表面整体。
本实施方式的基板分离方法相对于上述那样的在支撑基板10的表面经由粘接剂层12贴合有半导体晶片14的基板(以下,称为贴合基板20),如下进行。
首先,如图1(b)所示,一边使上述贴合基板20旋转,一边使用切割刀片等刀片30,将半导体晶片14的周缘部,以至少其正下的粘接剂层12表面露出、并且在支撑基板10的周缘部与半导体晶片14之间残存有粘接剂层12而保持支撑基板10与半导体晶片14之间的粘接的方式除去。在本实施方式中,在半导体晶片14周缘部且俯视上的剥离层16的外侧,从剥离层16的外边缘,使例如0.5mm的宽度(w)的部分残存,与其正下的粘接剂一起除去。
另外,在图1(b)所示的例子中,粘接剂通过刀片30将除去的半导体晶片14周缘部正下的粘接剂大致完全除去,直至大致到达支撑基板10的表面,但如上所述,粘接剂层12至少其表面露出即可。因此,例如,如图2所示,也可以不除去粘接剂而仅除去半导体晶片14的周缘部,另外如图3所示,也可以将粘接剂层12的厚度的例如一半左右除去。从缩短分离时间的观点,优选将半导体晶片14周缘部正下的粘接剂大致完全除去。
进而,如图4所示,也可以通过刀片30切入到支撑基板10。该方法不能适用于支撑基板10由玻璃类构成的情况,另外支撑基板10的一部分被削去,所以不能如其他的例子那样再利用支撑基板10,但在粘接剂层12的厚度较薄(例如20μm以下)、难以有选择地除去半导体晶片14或者粘接剂层12与半导体晶片14的情况下有用。通过刀片30切入的深度优选设为支撑基板10不会破损的深度。
接下来,如图1(c)所示,将粘接支撑基板10与半导体晶片14的粘接剂层12溶解。溶解例如能够通过用喷嘴等将溶解粘接剂的有机溶剂向粘接剂层12的周围、详细地说通过除去半导体晶片14周缘部而露出的粘接剂层的露出面附近供给而进行。此时,优选一边以缓慢的速度使贴合基板20旋转一边进行。通过以缓慢的速度使贴合基板20旋转,能够防止溶解的粘接剂的滞留,高效地溶解粘接剂。
作为在粘接剂的溶解中使用的有机溶剂,例如,可以列举:p-薄荷烷、d-柠檬烯、p-薄荷烷、丙酮、甲乙酮、环己酮、甲基异戊基酮、2-庚酮、N-甲基-2-吡咯烷酮等酮类;乙二醇、乙二醇单乙酸酯、二甘醇、二甘醇单乙酸酯、丙二醇、丙二醇单乙酸酯、二丙二醇或者二丙二醇单乙酸酯的单甲基醚、单乙基醚、单丙基醚、单丁基醚或者单苯基醚等多元醇类及其衍生物;二恶烷那样的环式醚类;以及乳酸甲酯、乳酸乙酯、醋酸甲酯、醋酸乙酯、醋酸丁酯、丙酮酸甲酯、丙酮酸乙酯、甲氧基丙酸甲酯、乙氧基丙酸甲酯等酯类、均三甲苯等烃类等。从其中根据所使用的粘接剂而适当选择使用1种以上即可。
在该溶解工序中,不需要将存在于支撑基板10与半导体晶片14之间的粘接剂层12全部溶解,只要将残存于剥离层16的外侧的部分的粘接剂即残存于支撑基板10的剥离层非形成区域23上的粘接剂溶解即可。粘接剂层12与剥离层16没有粘接在一起,所以通过使剥离层16的外侧部分的粘接剂溶解,如图1(d)所示,能够将贴合基板20在粘接剂层12与剥离层16界面分离。另外,只要能够分离,剥离层非形成区域23上的粘接剂的溶解也可以是部分溶解。因此,在这里,所谓“溶解”的用于也包含这样的部分溶解。
在这样分离的半导体晶片14上,附着有粘接剂和/或粘接剂的溶解物,另一方面,在支撑基板10的表面,包含剥离层16的表面,也多少附着有粘接剂溶解物,有时还附着有粘接剂,所以在上述溶解工序后,根据需要,分别清洗半导体晶片14与支撑基板10,将,附着的粘接剂和/或粘接剂溶解物除去。由此,能够得到将粘接剂和/或粘接剂溶解物除去的半导体晶片以及具备剥离层的支撑基板,半导体晶片向后面的半导体芯片的制造工序输送。另外,具备剥离层的支撑基板能够再次作为半导体晶片的支撑基板而使用。另外,在粘接剂和/或粘接剂溶解物的清洗中,能够使用与在溶解工序中使用的同样的有机溶剂。
在本实施方式中,通过刀片30物理性地,以至少半导体晶片14周缘部正下的粘接剂层12表面露出并且在支撑基板10的周缘部与半导体晶片14之间残存有粘接剂层12而保持支撑基板10与半导体晶片14之间的粘接的方式,将支撑基板10的表面的剥离层16的外侧区域、剥离层非形成区域23上的半导体晶片14周缘部除去,然后使存在于支撑基板10与半导体晶片14之间的粘接剂层12溶解,所以能够同时不使它们破损地将支撑基板10以及半导体晶片14短时间分离。
即,在对上述贴合基板20不除去半导体晶片14周缘部而进行粘接剂层12的溶解工序的情况下,需要使溶解粘接剂的有机溶剂从在贴合基板20的周面露出的很小厚度的粘接剂层12的周面向内部浸透直至至少到达剥离层16的外边缘,虽然与粘接剂和/或有机溶剂的种类有关,但非常花费时间。根据本发明者实际进行的实验,例如,在粘接剂层12的厚度为30μm、从其外边缘到剥离层16的外边缘的距离为3mm的情况下,从有机溶剂供给开始到粘接剂层12变为能够分离的溶解状态为止需要20~30小时。与此相对,在本实施方式(将粘接剂层的距剥离层16外边缘的残存宽度(W)设为越0.5mm、在除去工序中将其外侧的粘接剂大致完全除去的情况下)中,粘接剂层12在25~35分钟内溶解。
另外,在半导体晶片14周缘部的除去工序中,能够使用在半导体晶片的加工中一般所使用的切割刀片等刀片,所以没有使半导体晶片14与支撑基板10破损的危险。
进而,这样没有支撑基板10的破损的危险,所以除了图4所示的情况,能够充分地再利用。
另外,在除去工序中通过刀片30将半导体晶片14的周缘部除去,能够得到与实施边缘修整加工同样的效果,所以能够省去其他工序中的对半导体晶片的边缘修整加工。即,不使用预先边缘修整加工的半导体晶片,也能够抑制分离后的晶片破损、晶片缺陷。
另外,在本实施方式中,作为半导体晶片14周缘部的除去单元使用刀片30,但只要能够不使半导体晶片14损伤地将其周缘部物理性除去即可,不特别限定于刀片。
(第2实施方式)
图5是顺序表示第2实施方式的基板分离方法的工序的概略剖视图。
本实施方式的基板分离方法如图5(a)所示,与第1实施方式同样,是将在支撑基板10的表面经由粘接剂12贴合有半导体晶片14的贴合基板20分离的方法。
另外,在本实施方式中,在除去工序中,与第1实施方式同样,一边使上述贴合基板20旋转,一边使用切割刀片等刀片30,将半导体晶片14的周缘部,以至少其正下的粘接剂层12表面露出、并且在支撑基板10的周缘部与半导体晶片14之间残存有粘接剂层12而保持支撑基板10与半导体晶片14之间的粘接的方式除去。
然而,在第1实施方式中,将半导体晶片14周缘部且俯视上比剥离层16靠外侧的部分除去,与此相对,在本实施方式中,在剥离层16的内侧,从剥离层16的外边缘,从例如内侧0.5mm的部位将外侧部分与其正下的粘接剂一起除去。而且,为了确保支撑基板10与半导体晶片14之间的粘接,粘接剂残余粘接剂层12的厚度的一半左右而除去。
另外,只要能够确保支撑基板10与半导体晶片14之间的粘接,残余的粘接剂层12的厚度可以更薄,相反也可以加厚。即,例如,如图6所示,也可以不除去粘接剂而仅除去半导体晶片14的周缘部。然而,为了确保支撑基板10与半导体晶片14之间的粘接,与第1实施方式不同,需要在支撑基板10上残余粘接剂。因此,虽与粘接剂的种类有关,但粘接剂层12一般优选厚度为20μm以上。
这样的除去工序后的工序即图5(c)以后的工序与第1实施方式的图1(c)以后的工序同样,将说明省略。
在第2实施方式中也,通过刀片30物理性地,以至少半导体晶片14周缘部正下的粘接剂层12表面露出并且在支撑基板10的周缘部与半导体晶片14之间残存有粘接剂层12而保持支撑基板10与半导体晶片14之间的粘接的方式,将半导体晶片14周缘部除去,然后使存在于支撑基板10与半导体晶片14之间的粘接剂层溶解,所以能够同时不使它们破损地将支撑基板10以及半导体晶片14短时间分离。
特别,在本实施方式中,将半导体晶片14周缘部除去直至剥离层16的内侧,所以能够比第1实施方式更加缩短粘接剂的溶解时间,能够更短时间将支撑基板10以及半导体晶片14分离。根据本发明者实际进行的实验,在粘接剂层12的厚度为30μm、从其外边缘到剥离层16的外边缘的距离为3.0mm的情况下,从溶剂供给开始仅10~15分钟的时间内粘接剂层12就变为能够分离的溶解状态。在粘接剂中,使用与在上述的第1实施方式的实验中使用的同样的粘接剂,通过同样的方法供给。
另外,在本实施方式中,分离后的支撑基板10也能够再次作为半导体晶片的支撑基板而使用。
进而,在除去工序中通过刀片30将半导体晶片的周缘部除去,能够得到与实施边缘修整加工同样的效果,所以能够省去其他工序中的对半导体晶片的边缘修整加工。
根据上面说明的至少一个实施方式,通过刀片物理性地,以至少半导体晶片周缘部正下的粘接剂层表面露出并且在支撑基板的周缘部与半导体晶片之间残存有粘接剂层而保持支撑基板与半导体晶片之间的粘接的方式,将支撑基板的剥离层的外侧区域、剥离层非形成区域上的半导体晶片周缘部除去,然后使存在于支撑基板与半导体晶片之间的粘接剂层溶解,所以能够同时不使它们破损地将支撑基板以及半导体晶片短时间分离。另外,在除去工序中,将半导体晶片的周缘部除去,能够得到与实施边缘修整加工同样的效果,所以能够省去其他工序中的对半导体晶片的边缘修整加工。
对本发明的几个实施方式进行了说明,但这些实施方式是作为例子而提出的,意图并非限定发明的范围。这些新的实施方式能够以其他的各种形态实施,在不脱离发明的宗旨的范围内,能够进行各种省略、置换、变更。这些实施方式及其变形包含于发明的范围及宗旨,并且包含于权利要求所记载的发明和与其相等的范围。

Claims (6)

1.一种基板分离方法,该基板分离方法将在表面的除了周缘部的区域形成有剥离层的第1基板与经由粘接剂层贴合于所述第1基板的表面的至少包含所述剥离层的区域的第2基板分离,其特征在于,包括:
除去工序,该工序以至少所述第2基板周缘部正下的所述粘接剂层表面露出并且在所述第1基板的周缘部与所述第2基板之间残存有所述粘接剂层而保持所述第1以及第2基板之间的粘接的方式,将所述第2基板周缘部物理性除去;和
溶解工序,该工序在所述除去工序后,将所述粘接剂层溶解。
2.如权利要求1所述的基板分离方法,其特征在于:
以除去后的所述第2基板的外边缘俯视时位于比所述剥离层的外边缘靠外侧的位置的方式,在所述除去工序中将所述第2基板周缘部除去。
3.如权利要求2所述的基板分离方法,其特征在于:
在所述除去工序中,将所述第2基板周缘部上的粘接剂除去直至所述第1基板附近。
4.如权利要求1所述的基板分离方法,其特征在于:
以除去后的所述第2基板的外边缘俯视时位于比所述剥离层的外边缘靠内侧的位置的方式,在所述除去工序中将所述第2基板周缘部除去。
5.如权利要求1至4的任意一项所述的基板分离方法,其特征在于:
所述粘接剂层的厚度为5~100μm。
6.一种基板分离装置,该基板分离装置将在表面的除了周缘部的区域形成有剥离层的第1基板与经由粘接剂层贴合于所述第1基板的表面的至少包含所述剥离层的区域的第2基板分离,其特征在于,包括:
除去单元,其以至少所述第2基板周缘部正下的所述粘接剂层表面露出并且在所述第1基板的周缘部与所述第2基板之间残存有所述粘接剂层而保持所述第1以及第2基板之间的粘接的方式,将所述第2基板周缘部物理性除去;和
供给单元,其向通过所述除去单元将周缘部除去的第2基板的周围供给将所述粘接剂层溶解的溶解液。
CN201310063932.6A 2012-03-23 2013-02-28 基板的分离方法以及分离装置 Active CN103325733B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012068287A JP5591859B2 (ja) 2012-03-23 2012-03-23 基板の分離方法及び分離装置
JP068287/2012 2012-03-23

Publications (2)

Publication Number Publication Date
CN103325733A CN103325733A (zh) 2013-09-25
CN103325733B true CN103325733B (zh) 2016-09-28

Family

ID=49194403

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310063932.6A Active CN103325733B (zh) 2012-03-23 2013-02-28 基板的分离方法以及分离装置

Country Status (4)

Country Link
US (1) US8771456B2 (zh)
JP (1) JP5591859B2 (zh)
CN (1) CN103325733B (zh)
TW (1) TWI529799B (zh)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013008915A (ja) * 2011-06-27 2013-01-10 Toshiba Corp 基板加工方法及び基板加工装置
CN104412369B (zh) * 2012-06-29 2017-05-24 日立化成株式会社 半导体装置的制造方法
KR101773651B1 (ko) * 2013-04-09 2017-08-31 주식회사 엘지화학 적층체 및 이를 이용하여 제조된 기판을 포함하는 소자
FR3015110B1 (fr) * 2013-12-17 2017-03-24 Commissariat Energie Atomique Procede de fabrication d’un substrat-poignee destine au collage temporaire d’un substrat
CN105206506B (zh) * 2014-06-30 2018-06-29 中芯国际集成电路制造(上海)有限公司 晶圆的处理方法
JP6457223B2 (ja) * 2014-09-16 2019-01-23 東芝メモリ株式会社 基板分離方法および半導体製造装置
DE102014113361A1 (de) * 2014-09-17 2016-03-17 Ev Group E. Thallner Gmbh Vorrichtung und Verfahren zum Ablösen eines Produktsubstrats von einem Trägersubstrat
JP2016063012A (ja) 2014-09-17 2016-04-25 株式会社東芝 半導体装置の製造方法
US10522383B2 (en) 2015-03-25 2019-12-31 International Business Machines Corporation Thermoplastic temporary adhesive for silicon handler with infra-red laser wafer de-bonding
DE102015006971A1 (de) * 2015-04-09 2016-10-13 Siltectra Gmbh Verfahren zum verlustarmen Herstellen von Mehrkomponentenwafern
KR102385339B1 (ko) * 2015-04-21 2022-04-11 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법
CN104992944B (zh) * 2015-05-26 2018-09-11 京东方科技集团股份有限公司 一种柔性显示母板及柔性显示面板的制作方法
CN108231646A (zh) * 2016-12-13 2018-06-29 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
US10446431B2 (en) * 2017-12-27 2019-10-15 Micron Technology, Inc. Temporary carrier debond initiation, and associated systems and methods
CN108687816B (zh) 2018-05-18 2019-08-02 合肥京东方显示光源有限公司 膜材裁切方法、裁切装置、复合膜材、背光模组和显示装置
KR102454447B1 (ko) * 2018-05-25 2022-10-17 세메스 주식회사 기판 처리 장치 및 방법
CN110838462B (zh) * 2018-08-15 2022-12-13 北科天绘(合肥)激光技术有限公司 一种器件阵列的巨量转移方法及系统
JP7182975B2 (ja) * 2018-09-26 2022-12-05 キヤノン株式会社 液体吐出ヘッド用基板の製造方法
JP7349784B2 (ja) * 2018-12-26 2023-09-25 東京エレクトロン株式会社 基板処理システム、および基板処理方法
JP7242362B2 (ja) * 2019-03-18 2023-03-20 キオクシア株式会社 半導体装置の製造方法
JP7362378B2 (ja) * 2019-09-12 2023-10-17 株式会社東芝 キャリア及び半導体装置の製造方法
FR3103313B1 (fr) * 2019-11-14 2021-11-12 Commissariat Energie Atomique Procédé de démontage d’un empilement d’au moins trois substrats
CN111755377B (zh) * 2020-06-29 2022-02-11 西安微电子技术研究所 一种晶圆解键合方法
CN111834280A (zh) * 2020-07-24 2020-10-27 武汉新芯集成电路制造有限公司 临时键合方法
CN115140700A (zh) * 2021-03-30 2022-10-04 诺思(天津)微系统有限责任公司 半导体组件及其切割方法、滤波器及电子设备

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101997087A (zh) * 2009-08-17 2011-03-30 财团法人工业技术研究院 应用于软性电子器件的基板及其制造方法

Family Cites Families (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6342434B1 (en) * 1995-12-04 2002-01-29 Hitachi, Ltd. Methods of processing semiconductor wafer, and producing IC card, and carrier
US6380132B1 (en) * 1999-01-28 2002-04-30 Dai Nippon Printing Co., Ltd. Thermal transfer image-receiving sheet and process for producing the same
JP2001185519A (ja) * 1999-12-24 2001-07-06 Hitachi Ltd 半導体装置及びその製造方法
JP3768069B2 (ja) * 2000-05-16 2006-04-19 信越半導体株式会社 半導体ウエーハの薄型化方法
JP2002075937A (ja) * 2000-08-30 2002-03-15 Nitto Denko Corp 半導体ウエハの加工方法
DE60128306T2 (de) * 2000-09-14 2008-01-10 Dai Nippon Printing Co., Ltd. Zwischentransferaufzeichnungsmedium und Verfahren zur Bildabbildung
DE10048881A1 (de) * 2000-09-29 2002-03-07 Infineon Technologies Ag Vorrichtung und Verfahren zum planen Verbinden zweier Wafer für ein Dünnschleifen und ein Trennen eines Produkt-Wafers
EP1207015A3 (en) * 2000-11-17 2003-07-30 Keltech Engineering, Inc. Raised island abrasive, method of use and lapping apparatus
DE10122324A1 (de) * 2001-05-08 2002-11-14 Philips Corp Intellectual Pty Flexible integrierte monolithische Schaltung
JP4565804B2 (ja) * 2002-06-03 2010-10-20 スリーエム イノベイティブ プロパティズ カンパニー 被研削基材を含む積層体、その製造方法並びに積層体を用いた極薄基材の製造方法及びそのための装置
US7534498B2 (en) * 2002-06-03 2009-05-19 3M Innovative Properties Company Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body
JP4107417B2 (ja) * 2002-10-15 2008-06-25 日東電工株式会社 チップ状ワークの固定方法
TWI327336B (en) * 2003-01-13 2010-07-11 Oc Oerlikon Balzers Ag Arrangement for processing a substrate
US20060194412A1 (en) * 2004-04-07 2006-08-31 Takehito Nakayama Method and device for sticking tape
JP4447280B2 (ja) * 2003-10-16 2010-04-07 リンテック株式会社 表面保護用シートおよび半導体ウエハの研削方法
JP2006316078A (ja) * 2003-10-17 2006-11-24 Lintec Corp 接着テープの剥離方法及び剥離装置
JP2006032506A (ja) 2004-07-14 2006-02-02 Taiyo Yuden Co Ltd 半導体ウェハの剥離方法および剥離装置
JP4642436B2 (ja) * 2004-11-12 2011-03-02 リンテック株式会社 マーキング方法および保護膜形成兼ダイシング用シート
JP2006288887A (ja) * 2005-04-13 2006-10-26 Nitto Denko Corp 貼付製剤
US7462552B2 (en) * 2005-05-23 2008-12-09 Ziptronix, Inc. Method of detachable direct bonding at low temperatures
US20070004171A1 (en) * 2005-06-30 2007-01-04 Arana Leonel R Method of supporting microelectronic wafer during backside processing using carrier having radiation absorbing film thereon
GB0602410D0 (en) * 2006-02-07 2006-03-15 Filtronic Compound Semiconduct A method of bonding a semiconductor wafer to a support substrate
JP2007251080A (ja) * 2006-03-20 2007-09-27 Fujifilm Corp プラスチック基板の固定方法、回路基板およびその製造方法
US20080014532A1 (en) * 2006-07-14 2008-01-17 3M Innovative Properties Company Laminate body, and method for manufacturing thin substrate using the laminate body
JP5027460B2 (ja) * 2006-07-28 2012-09-19 東京応化工業株式会社 ウエハの接着方法、薄板化方法、及び剥離方法
JP4847255B2 (ja) * 2006-08-30 2011-12-28 株式会社テオス 半導体ウエーハの加工方法
US7691225B2 (en) * 2007-01-15 2010-04-06 Nitto Denko Corporation Thermal-release double-coated pressure-sensitive adhesive tape or sheet and method of processing adherend
KR101161600B1 (ko) * 2007-10-22 2012-07-03 가부시키가이샤 닛폰 쇼쿠바이 편광판, 그 제조 방법, 광학 필름 및 화상 표시 장치
US7566632B1 (en) * 2008-02-06 2009-07-28 International Business Machines Corporation Lock and key structure for three-dimensional chip connection and process thereof
TW201004528A (en) * 2008-03-28 2010-01-16 Hitachi Chemical Co Ltd Method of fabricating wiring board, photo-electrical composite parts and photo-electrical composite substrate
JP4723614B2 (ja) * 2008-06-06 2011-07-13 リンテック株式会社 シート貼付装置及び貼付方法
JP2010114306A (ja) * 2008-11-07 2010-05-20 Disco Abrasive Syst Ltd ウェーハの移し替え方法
JP5555430B2 (ja) 2009-01-28 2014-07-23 新日本無線株式会社 半導体装置の製造方法
JP2010225852A (ja) 2009-03-24 2010-10-07 Panasonic Corp 半導体素子及びその製造方法
US8950459B2 (en) * 2009-04-16 2015-02-10 Suss Microtec Lithography Gmbh Debonding temporarily bonded semiconductor wafers
EP2419928A2 (en) * 2009-04-16 2012-02-22 Süss Microtec Lithography GmbH Improved apparatus for temporary wafer bonding and debonding
US8366873B2 (en) * 2010-04-15 2013-02-05 Suss Microtec Lithography, Gmbh Debonding equipment and methods for debonding temporary bonded wafers
US8871609B2 (en) * 2009-06-30 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Thin wafer handling structure and method
US8072044B2 (en) * 2009-09-17 2011-12-06 Fairchild Semiconductor Corporation Semiconductor die containing lateral edge shapes and textures
JP5010668B2 (ja) * 2009-12-03 2012-08-29 信越化学工業株式会社 積層型半導体集積装置の製造方法
EP2513960A4 (en) * 2009-12-15 2014-10-08 Solexel Inc MOBILE EMPTY MEDIA FOR PROCESSING A FINE PLATE
JP5448860B2 (ja) 2010-01-13 2014-03-19 東京応化工業株式会社 分離方法及び分離装置
US9064686B2 (en) * 2010-04-15 2015-06-23 Suss Microtec Lithography, Gmbh Method and apparatus for temporary bonding of ultra thin wafers
US8574398B2 (en) * 2010-05-27 2013-11-05 Suss Microtec Lithography, Gmbh Apparatus and method for detaping an adhesive layer from the surface of ultra thin wafers
JP5744434B2 (ja) * 2010-07-29 2015-07-08 日東電工株式会社 加熱剥離シート一体型半導体裏面用フィルム、半導体素子の回収方法、及び半導体装置の製造方法
JP5334135B2 (ja) * 2010-08-20 2013-11-06 ニチゴー・モートン株式会社 積層装置
JP2012064710A (ja) * 2010-09-15 2012-03-29 Asahi Glass Co Ltd 半導体素子の製造方法
EP2434528A1 (en) * 2010-09-28 2012-03-28 Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO An active carrier for carrying a wafer and method for release
WO2012118700A1 (en) * 2011-02-28 2012-09-07 Dow Corning Corporation Wafer bonding system and method for bonding and debonding thereof
US8450188B1 (en) * 2011-08-02 2013-05-28 Micro Processing Technology, Inc. Method of removing back metal from an etched semiconductor scribe street
JP5762213B2 (ja) * 2011-08-15 2015-08-12 株式会社ディスコ 板状物の研削方法
US8865507B2 (en) * 2011-09-16 2014-10-21 Sionyx, Inc. Integrated visible and infrared imager devices and associated methods
US8696864B2 (en) * 2012-01-26 2014-04-15 Promerus, Llc Room temperature debonding composition, method and stack
KR20140140053A (ko) * 2012-02-26 2014-12-08 솔렉셀, 인크. 레이저 분할 및 디바이스 층 전사를 위한 시스템 및 방법
US9096032B2 (en) * 2012-04-24 2015-08-04 Shin-Etsu Chemical Co., Ltd. Wafer processing laminate, wafer processing member, temporary bonding arrangement, and thin wafer manufacturing method
JP5360260B2 (ja) * 2012-05-08 2013-12-04 Jsr株式会社 基材の処理方法、積層体および半導体装置
JP5767161B2 (ja) * 2012-05-08 2015-08-19 信越化学工業株式会社 ウエハ加工用仮接着材、それを用いたウエハ加工用部材、ウエハ加工体、及び薄型ウエハの作製方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101997087A (zh) * 2009-08-17 2011-03-30 财团法人工业技术研究院 应用于软性电子器件的基板及其制造方法

Also Published As

Publication number Publication date
JP2013201251A (ja) 2013-10-03
US8771456B2 (en) 2014-07-08
US20130248099A1 (en) 2013-09-26
JP5591859B2 (ja) 2014-09-17
TWI529799B (zh) 2016-04-11
CN103325733A (zh) 2013-09-25
TW201347034A (zh) 2013-11-16

Similar Documents

Publication Publication Date Title
CN103325733B (zh) 基板的分离方法以及分离装置
KR102436342B1 (ko) 웨이퍼의 가공 방법
US11264295B2 (en) Integrated circuit substrate for containing liquid adhesive bleed-out
CN106231796A (zh) 内层开窗的多层软板开盖方法
CN109559983A (zh) 晶圆的切割方法
CN109968552A (zh) 一体化晶圆切割刀及晶圆切割方法
JP2015502662A (ja) プリント回路基板の部分領域を取り出してプリント回路基板を製造する方法ならびにそのような種類の方法の使用
CN103709950A (zh) 双面胶型材及其加工方法
CN102664220B (zh) Led晶片的切割方法和该方法所用保护片
JP4246758B2 (ja) Fpdの製造方法
CN109407372B (zh) 柔性基板的预处理方法
JP2009283802A (ja) 半導体装置の製造方法
CN105990100B (zh) 半导体装置的制造方法
JP6657020B2 (ja) ウェーハの加工方法
KR101747561B1 (ko) 웨이퍼를 다이로 분할하는 방법
US10636707B2 (en) Method of manufacturing a semiconductor device
US8956954B2 (en) Method of processing wafers for saving material and protecting environment
CN103999195B (zh) 将粘合膜在切割带上制备成预切割的半导体晶圆形状的方法
CN210627669U (zh) 一种用于标识飞机外表缺陷的标签
CN113172781A (zh) 一种超薄晶圆的划切方法
US20060281282A1 (en) Method for maching a wafer
CN104760145A (zh) 一种晶棒的粘接方法
CN115383868B (zh) 一种ltcc生瓷带及其制造方法
KR102104138B1 (ko) 가공 방법
CN115020339A (zh) 一种晶圆的切割方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20170804

Address after: Tokyo, Japan

Patentee after: TOSHIBA MEMORY Corp.

Address before: Tokyo, Japan

Patentee before: Toshiba Corp.

TR01 Transfer of patent right
CP01 Change in the name or title of a patent holder

Address after: Tokyo, Japan

Patentee after: TOSHIBA MEMORY Corp.

Address before: Tokyo, Japan

Patentee before: Japanese businessman Panjaya Co.,Ltd.

Address after: Tokyo, Japan

Patentee after: Kaixia Co.,Ltd.

Address before: Tokyo, Japan

Patentee before: TOSHIBA MEMORY Corp.

CP01 Change in the name or title of a patent holder
TR01 Transfer of patent right

Effective date of registration: 20220113

Address after: Tokyo, Japan

Patentee after: Japanese businessman Panjaya Co.,Ltd.

Address before: Tokyo, Japan

Patentee before: TOSHIBA MEMORY Corp.

TR01 Transfer of patent right