CN103201826A - 用于半导体处理的具有平面加热器区域的加热板 - Google Patents

用于半导体处理的具有平面加热器区域的加热板 Download PDF

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CN103201826A
CN103201826A CN2011800540536A CN201180054053A CN103201826A CN 103201826 A CN103201826 A CN 103201826A CN 2011800540536 A CN2011800540536 A CN 2011800540536A CN 201180054053 A CN201180054053 A CN 201180054053A CN 103201826 A CN103201826 A CN 103201826A
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哈梅特·辛格
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Abstract

一种用于半导体处理装置中衬底支撑组件的加热板,其包括以可扩展的多路布置方案设置的多个独立可控的平面加热器区域,以及独立控制平面加热器区域并给平面加热器区域提供功率的电子器件。每个平面加热器区域包括由绝缘体-导体复合材料制成的一个或多个加热器元件。包含加热板的衬底支撑组件包括静电夹持电极和温度可控的基板。制备所述加热板的方法包括将具有平面加热器区域、功率供给线、功率回线和通孔的陶瓷板结合在一起。

Description

用于半导体处理的具有平面加热器区域的加热板
背景技术
随着每一后继的半导体技术的产生,衬底直径趋向于增加而晶体管尺寸减小,从而导致在衬底处理中需要更高程度的精度和可重复性。半导体衬底材料,如硅衬底,通过使用包含真空室的技术进行处理。这些技术包括诸如电子束沉积之类非等离子体应用,以及诸如溅射沉积、等离子体增强化学气相沉积(PECVD)、抗蚀剂剥离、和等离子体蚀刻之类等离子体应用。
半导体制造工具中目前可用的等离子体处理系统面临提高精度和可重复性的日益增加的需求。等离子体处理系统的一个度量是改进的均匀性,该均匀性包括在半导体衬底的表面上的结果工艺均匀性以及用标称相同的输入参数处理的一连串的衬底的工艺结果的均匀性。衬底上均匀性的持续改进是合乎期望的。除其他以外,这还需要具有改进的均匀性、一致性和自诊断性的等离子体室。
发明内容
本文描述了一种在半导体处理装置中用于支撑半导体衬底的衬底支撑组件的加热板,所述加热板包括:电绝缘层;平面加热器区域,其至少包括第一、第二、第三和第四平面加热器区域,每个平面加热器区域包括一个或多个由绝缘体-导体复合材料制成的加热器元件,所述平面加热器区域横向分布在整个电绝缘层并可操作地调节半导体衬底上的空间温度分布;功率供给线,其至少包括电连接到所述第一和第二平面加热器区域的第一导电的功率供给线,和电连接到所述第三和第四平面加热器区域的第二导电的功率供给线;功率回线,其至少包括电连接到所述第一和第三平面加热器区域的第一导电的功率回线,和电连接到所述第二和第四平面加热器区域的第二导电的功率回线。
附图说明
图1是其中包括具有成阵列的平面加热器区域的加热板的衬底支撑组件的示意性剖视图,该衬底支撑组件还包括静电卡盘(ESC)。
图2示出了可包含于衬底支撑组件中的加热板中的成阵列的平面加热器区域的功率供给线和功率回线的电连接。
图3示出了包含加热板的衬底支撑组件的剖面示意图,该衬底支撑组件进一步包括主加热器层。
图4是示例性等离子体处理室的示意图,该等离子体处理室可包括具有本文所描述的加热板的衬底支撑组件。
具体实施方式
在半导体处理装置中控制径向和方位角的衬底温度以实现期望的在所述衬底上的关键尺寸(CD)均匀性变得越来越迫切。即使是很小的温度变化可能影响CD到无法接受的程度,尤其是当在半导体制造工艺中CD接近亚100nm时。
衬底支撑组件可被配置用于处理过程中的各种功能,如支撑衬底、调节衬底温度、并供给射频功率。衬底支撑组件可以包括用于在处理过程中将衬底夹持到衬底支承组件上的静电卡盘(ESC)。该ESC可以是可调式ESC(T-ESC)。T-ESC在共同转让的美国专利No.6,847,014和6,921,724中得到描述,其通过引用并入本文。衬底支撑组件可包括陶瓷衬底支架、流体冷却的散热器(以下简称为冷却板)和多个同心的平面加热器区域以实现逐步和径向的温度控制。通常情况下,冷却板保持在-20℃和80℃之间。加热器位于该冷却板上,两者之间具有热绝缘体层。加热器可以保持衬底支撑组件的支撑表面的温度高于冷却板的温度约0℃到90℃。通过改变多个平面加热器区域内的加热器功率,衬底支撑件的温度分布可以变化。另外,平均的衬底支撑件的温度可以在高于冷却板的温度0℃到90℃的温度运行范围内逐渐地进行变化。由于CD随半导体技术的进步而减小,小的方位角温度变化带来更大的挑战。
由于以下几个原因,控制温度不是简单的任务。首先,许多因素会影响热传递,如热源和散热片的位置,介质的运动、材料和形状。其次,热传递是动态过程。除非考虑的系统处于热平衡,否则会发生热传递,并且温度分布和热传递会随时间变化。第三,非平衡现象,如等离子体,其在等离子体处理中当然是始终存在的,使得任何实际的等离子体处理装置的热传递性能的理论预测即使有可能的话,也是非常困难的。
等离子体处理装置中的衬底的温度分布受许多因素的影响,如等离子体密度分布、RF功率分布和卡盘中的各种加热和冷却元件的详细结构,因此衬底的温度分布往往是不均匀的,并且用少数加热器元件或冷却元件难以控制该温度分布。这种缺陷转变成整个衬底的处理速率的非均匀性,以及衬底上的器件管芯的关键尺寸的非均匀性。
根据温度控制的复杂特性,在衬底支撑组件中引入多个独立可控的平面加热器区域以使得装置能够有效地产生并保持合乎期望的时间和空间的温度分布,并补偿影响CD均匀性的其他不利因素,这将是有利的。
本文描述了一种在半导体处理装置中用于衬底支撑组件的加热板,其中加热板具有多个独立可控的平面加热器区域,该平面加热器区域包括由绝缘体-导体复合材料制成的加热器元件。该加热板包括平面加热器区域、功率供给源和功率回线(总称功率线)的可扩展的多路布置方案。通过调节平面加热器区域的功率,处理过程中的温度分布可以在径向方向和方位角方向同时成形。更多的细节在共同拥有的美国公布专利申请No.2011/092072中得到公开,其公开内容通过引用并入本文。虽然该加热板的主要描述用于等离子体处理装置,但该加热板还可以用于不使用等离子体的其他的半导体处理装置。
该加热板中的平面加热器区域优选地布置成确定的图案,例如,矩形网格、六角形网格、极性阵列、同心环或任何所需的图案。每个平面加热器区域可以具有任何合适的尺寸,并且可以具有一个或多个加热器元件。当平面加热器区域接通时,其中的所有加热器元件一起接通;当平面加热器区域未接通时,其中的所有加热器元件一起未接通。为了将电连接的数量降到最低,布置功率供给线和功率回线使得每个功率供给线连接到不同组的平面加热器区域,并且每个功率回线连接到不同组的平面加热器区域,其中每个平面加热器区域是在连接到特定的功率供给线的若干所述组中的一组中和连接到特定的功率回线的若干所述组中的一组中。没有两个平面加热器区域连接到相同的成对的功率供给线和功率回线。平面加热器区域可以通过将电流引导通过与该特定的平面加热器区域连接的成对的功率供给线和功率回线来激活。加热器元件的功率密度优选小于10W/cm2,更优选小于5W/cm2。在一种实施方式中,每个平面加热器区域不大于半导体衬底上制造的4个器件管芯,或者不大于半导体衬底上制造的2个器件管芯,或者不大于半导体衬底上制造的1个器件管芯,或对应于衬底上的器件管芯每个平面加热器区域的面积在16至100cm2之间,或面积在1至15cm2之间,或面积在2至3cm2之间。加热板可以包括任何合适数量的加热器区域,诸如100至1000个平面加热器区域。加热器元件的厚度的范围可从2微米至1毫米,优选5-80微米。为了允许平面加热器区域和/或功率供给线和功率回线之间有空间,平面加热器区域的总面积可以高达衬底支撑组件的上表面的面积的99%,例如所述面积的50-99%。可以将功率供给线或功率回线布置在平面加热器区域之间的范围从1至10毫米的间隙中,或布置在通过电绝缘层与平面加热器区域平面分开的单独的平面中。为了运载大电流并减少焦耳热,优选地制备功率供给线和功率回线达到在空间所允许的最大宽度。在一种实施方式中,其中的功率线与平面加热器区域是在相同的平面,功率线的宽度优选为在0.3毫米和2毫米之间。在另一种实施方式中,其中的功率线与平面加热器区域是在不同的平面,功率线的宽度可以宽达平面加热器区域,例如对于300毫米的卡盘,该宽度可以是1至2英寸。优选地,功率供给线和功率回线的材料是具有低电阻率的材料,如Cu、Al、W、
Figure BDA00003165011900041
或Mo。
常规的电阻加热器元件通常包括由具有低电阻率的导体制成的曲折线路,该导体如Al、Cu、W、
Figure BDA00003165011900042
或Mo。在固定的输入电压V下,电阻加热器元件的加热功率P是V2/R,其中R是其电阻。R可表示为(ρ·L)/(W·T),其中ρ是制成曲折线路的材料的电阻率;L、W和T分别是曲折线路的总线路的长度(即跟随曲折线路测量的长度)、宽度和厚度。曲折线路的几何因子L、W和T由其中包含电阻加热器元件的加热器区域的物理尺寸限制。由于在平面加热器区域中可用的面积,L具有上限;由于制备技术,W和T具有下限。因此,R具有上限而P具有下限。符合功率密度需求(优选小于10W/cm2,更优选小于5W/cm2)日益困难。如下所述,增加电阻率ρ可以缓解这个问题。
图1示出了衬底支撑组件,其包含具有电绝缘层103的加热板的一种实施方式。层103可以具有由以下材料制成的一层或多层:聚合物材料,无机材料,如氧化硅、氧化铝、氧化钇、氮化铝等陶瓷或其它合适的材料。衬底支撑组件进一步包括(a)嵌入到层103中的至少一个ESC(静电夹持)电极102(例如单极或双极)以用DC电压静电夹持衬底到层103的表面,(b)热阻挡层107,(c)含有用于冷却剂流通的通道106的冷却板105。为清晰起见,未示出功率供给线和功率回线。
如图2所示,平面加热器区域101中的每一个连接到功率供给线201中的一个和功率回线202中的一个。没有两个平面加热器区域101共用相同成对的功率供给线201和功率回线202。通过合适的电气开关配置,可以将成对的功率供给线201和功率回线202连接到功率源(图中未示出),从而仅仅接通连接到该成对的线的平面加热器区域。每个平面加热器区域的时间平均的加热功率可以单独由时域多路传送来调节。为了防止不同的平面加热器区域之间的串扰,整流器250(例如二极管)可以被串联连接在每个平面加热器区域与连接该平面加热器区域的功率供给线之间(如在图2中所示),或串联连接在每个平面加热器区和连接该平面加热器区域的功率回线之间(图中未示出)。整流器物理上位于平面加热器区域或任何合适的位置。替代地,诸如固态开关等任何电流阻挡配置可以用于防止串扰。
每个平面加热器区域101包括由绝缘体-导体复合材料制成的至少一个加热器元件。在一种实施方式中,绝缘体-导体复合材料包括选自由Al2O3、SiO2、Y2O3、Si3N4、AlN组成的群组中的一种或多种绝缘体材料和选自由Al、Cu、Mo、W、Au、Ag、Pt、Pd、C、MoSi2、WC、SiC组成的群组中的一种或多种导体材料。可通过用合适的液体(如甲醇、乙醇、丙酮、异丙醇、水、矿物油、或它们的混合物)将绝缘体和导体的粉末(优选具有0.2至20微米的颗粒大小)混合成浆料,丝网印刷该浆料并烧结该浆料,以制成绝缘体-导体复合材料。在一种优选的实施方式中,绝缘体-导体复合材料包括高达30wt%的Al2O3,且余量(balance)为W。
加热板的层103优选由陶瓷制成。可以通过示例性方法制备加热板,该方法包括:将陶瓷粉末、粘合剂和液体的混合物压成片材;干燥该片材;通过在片材中冲孔在片材中形成通孔;通过丝网印刷导电粉末(如W,WC,掺杂SiC或MoSi2)的浆料、冲压预切割的金属箔、喷涂导电粉末的浆料或任何其它合适的技术,在片材上形成功率供给线和功率回线;通过丝网印刷或喷涂绝缘体和导体粉末的浆料,形成加热器元件;对准片材;通过烧结将片材结合以形成层103;用导电粉末的浆料填充孔。片材厚度可以是约0.3毫米。
图3示出了图1的衬底支撑组件,其进一步包括主加热器层601。优选地,所述主加热器层601包括至少两个独立可控的高功率加热器。所述主加热器的功率介于100和10000W之间,优选在1000和5000W之间。所述主加热器可以被配置为矩形网格、同心环形区域、径向区域或环形区域和径向区域的结合。主加热器可用于改变衬底上平均温度,调节衬底上径向温度分布,或在衬底上逐步温度控制。主加热器在热阻挡层107上方且可位于加热器区101的上方或下方。
作为等离子体处理室如何操作的概述,图4示出了等离子体处理室的示意图,其包括室713,在室713中设置有上部喷头电极703和衬底支撑组件704。衬底712通过装载通道711装载到衬底支撑组件704上。气体管线709供给处理气体到上部喷头电极703,上部喷头电极703输送该处理气体到室中。气源708(例如,供给合适的气体混合物的质量流量控制器)连接到气体管线709。RF功率源702连接到上部喷头电极703。在操作中,室通过真空泵710抽空且RF功率电容地耦合在上部喷头电极703和衬底支撑组件704中的下部电极之间,以在衬底712与上部喷头电极703之间的空间中激励处理气体成等离子体。可以使用等离子体蚀刻器件管芯特征到衬底712上的层中。衬底支撑组件704包含如上所述的加热板。如上所述的,应当理解,虽然等离子体处理室的详细设计可能会有所不同,但是RF功率是通过衬底支撑组件704耦合到等离子体的。
用于衬底支撑组件的制造的合适的绝缘材料和导电材料的实施例在共同转让的美国专利No.6,483,690中得到公开,其公开的内容通过引用并入本文。
虽然已经参照其具体实施方案详细描述了加热板、制造加热板的方法、以及包括加热板的衬底支撑组件,但对本领域技术人员而言,显而易见,在不脱离所附的权利要求的范围的情况下,可以做出各种改变和修改、以及采用等同方案。

Claims (19)

1.一种在半导体处理装置中用于支撑半导体衬底的衬底支撑组件的加热板,所述加热板包括:
电绝缘层;
平面加热器区域,其至少包括第一、第二、第三和第四平面加热器区域,每个平面加热器区域包括由绝缘体-导体复合材料制成的一个或多个加热器元件,所述平面加热器区域横向分布在整个所述电绝缘层,并能操作地调节所述半导体衬底上的空间温度分布;
功率供给线,其至少包括电连接到所述第一和第二平面加热器区域的第一导电的功率供给线,以及电连接到所述第三和第四平面加热器区域的第二导电的功率供给线;
功率回线,其至少包括电连接到所述第一和第三平面加热器区域的第一导电的功率回线,和电连接到所述第二和第四平面加热器区域的第二导电的功率回线。
2.如权利要求1所述的加热板,其中,所述绝缘体-导体复合材料包括选自由Al2O3、SiO2、Y2O3、Si3N4、AlN组成的群组中的一种或多种绝缘体材料,以及选自由Al、Cu、Mo、W、Au、Ag、Pt、Pd、C、MoSi2、WC、SiC组成的群组中的一种或多种导体材料。
3.如权利要求2所述的加热板,其中,所述绝缘体-导体复合材料包括高达30wt%的Al2O3,且余量为W。
4.如权利要求1所述的加热板,其中,所述平面加热器区域其尺寸被配置成使得:
(a)每个平面加热器区域不大于所述半导体衬底上制造的4个器件管芯,
(b)每个平面加热器区域不大于所述半导体衬底上制造的2个器件管芯,
(c)每个平面加热器区域不大于所述半导体衬底上制造的1个器件管芯,或
(d)每个平面加热器区域的尺寸随着所述半导体衬底上的器件管芯的尺寸和所述半导体衬底的整个尺寸缩放。
5.如权利要求1所述的加热板,其中,所述平面加热器区域其尺寸被配置成使得:
(a)每个平面加热器区域是在0.1至1cm2之间,
(b)每个平面加热器区域是在1至3cm2之间,
(c)每个平面加热器区域是在3至15cm2之间,或
(d)每个平面加热器区域是在15至100cm2之间。
6.如权利要求1所述的加热板,其中,所述加热板包括100至1000个平面加热器区域,其中每个加热器元件具有曲折形状。
7.如权利要求1所述的加热板,其中,所述电绝缘层包括聚合物材料、陶瓷材料、玻璃纤维复合材料、或它们的组合材料。
8.如权利要求1所述的加热板,其中,所述功率供给线和所述功率回线的总数量等于或小于所述平面加热器区域的总数量。
9.如权利要求1所述的加热板,其中,所述平面加热器区域的总面积是所述加热板的上表面的50%至99%。
10.如权利要求1所述的加热板,其中,所述平面加热器区域布置成矩形网格、六角形网格、或同心环;以及所述平面加热器区域以至少1毫米宽和至多10毫米宽的间隙彼此分隔开。
11.一种衬底支撑组件,其包括:
静电卡盘(ESC),其包括配置为静电夹持所述衬底支撑组件上的半导体衬底的至少一个静电夹持电极;
如权利要求1所述的加热板;以及
通过热阻挡层连接到所述加热板的下侧的冷却板。
12.如权利要求11所述的衬底支撑组件,其进一步包括布置在所述加热板的所述平面加热器区域的上方或下方的至少一个主加热器层,其中,所述主加热器层与所述加热板的所述平面加热器区域、所述功率供给线、和所述功率回线电绝缘;所述主加热器层包括提供所述半导体衬底的平均温度控制的至少一个加热器;以及在所述半导体衬底的处理期间所述平面加热器区域提供所述半导体衬底的径向和方位角温度分布控制。
13.如权利要求12所述的衬底支撑组件,其中,所述主加热器层包括两个或两个以上的主加热器,该主加热器具有至少100W的功率以及所述平面加热器区域在10W/cm2以下被供电。
14.一种制备如权利要求1所述的加热板的方法,所述方法包括:用液体(如甲醇、乙醇、丙酮、异丙醇、水、矿物油)将绝缘体和导体粉末混合成浆料,在所述电绝缘层上丝网印刷所述浆料,并烧结所述浆料。
15.根据权利要求14所述的方法,其中,所述液体选自由甲醇、乙醇、丙酮、异丙醇、水、矿物油及它们的混合物组成的群组。
16.根据权利要求14所述的方法,其中,所述粉末具有0.2至20微米之间的颗粒尺寸。
17.一种制备如权利要求1所述的加热板的方法,其包括:
将陶瓷粉末、粘合剂和液体的混合物压成片材;
干燥所述片材;
通过在所述片材中冲孔而在所述片材中形成通孔;
在所述片材上形成所述功率供给线和功率回线;
通过丝网印刷或喷涂绝缘体和导体粉末的浆料来形成所述加热器元件;
对准所述片材;
通过烧结将所述片材结合在一起以形成所述电绝缘层;
用导体粉末的浆料填充所述通孔。
18.根据权利要求17所述的方法,其中,通过丝网印刷导体粉末的浆料、冲压预切割的金属箔、或喷涂导体粉末的浆料形成所述功率供给线和功率回线。
19.一种对包含如权利要求11所述的衬底支撑组件的半导体处理室中的半导体衬底进行等离子体处理的方法,其包括:
(a)将半导体衬底加载到所述处理室,并安置所述半导体衬底在所述衬底支撑组件上;
(b)确定温度分布,该温度分布用于补偿影响关键尺寸(CD)均匀性的处理条件;
(c)使用所述衬底支撑组件加热所述半导体衬底,以符合所述温度分布;
(d)点燃等离子体并处理所述半导体衬底,同时通过所述平面加热器区域的独立受控的加热控制所述温度分布;
(e)从所述处理室卸载所述半导体衬底,并对不同的半导体衬底重复步骤(a)-(e)。
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