CN102623440B - 半导体装置、制造半导体装置的方法和电子装置 - Google Patents

半导体装置、制造半导体装置的方法和电子装置 Download PDF

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Publication number
CN102623440B
CN102623440B CN201110460504.8A CN201110460504A CN102623440B CN 102623440 B CN102623440 B CN 102623440B CN 201110460504 A CN201110460504 A CN 201110460504A CN 102623440 B CN102623440 B CN 102623440B
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semiconductor element
hole
projection electrode
substrate
semiconductor device
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CN102623440A (zh
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赤松俊也
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Fujitsu Ltd
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Fujitsu Ltd
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Abstract

公开了一种半导体装置、制造半导体装置的方法和电子装置。该半导体装置包括半导体元件和电子元件。半导体元件具有第一突出电极，并且电子元件具有第二突出电极。基底被布置在半导体元件与电子元件之间。基底具有通孔，第一和第二突出电极配合在通孔中。第一和第二突出电极在基底的通孔内连接到一起。基底具有绝缘膜，绝缘膜覆盖第一通孔的侧壁并且暴露在第一通孔内，并且第一突出电极的直径和第二突出电极的直径小于第一通孔的直径。

Description

半导体装置、制造半导体装置的方法和电子装置
技术领域
这里讨论的实施例涉及半导体装置、制造半导体装置的方法和使用半导体装置的电子装置。
背景技术
倒装芯片键合(flip-chip bonding)是一种将半导体元件(半导体芯片)连接到电路板的方法。在倒装芯片键合中，例如，诸如焊料凸起的突出电极(连接端子)形成在半导体元件和电路板中的任一或两者上，以使用突出电极将半导体元件和电路板连接到一起。近来，这样的倒装芯片键合已应用于具有叠片(chip-on-chip)结构的半导体装置，在叠片结构中，芯片被堆叠并连接到另一个芯片上。
对于具有叠片结构的半导体装置，具有连接端子的芯片可以以倒装芯片的方式键合到具有馈通过孔(feedthrough via)的另一个芯片，使得连接端子连接到馈通过孔(参见例如日本公开专利公布第2007-180529号)。
在用于将半导体元件的突出电极连接到电路板的突出电极或诸如半导体元件的电子元件的突出电极的倒装芯片键合中，会发生突出电极的位移，这进而导致诸如未连接状态和短路的连接故障。例如，这样的连接故障会由于半导体元件与连接至该半导体元件的电子元件之间的横向位移(也就是，半导体元件和电子元件中的一个元件的突出电极向另一个元件的突出电极的边侧的位移、以及在平行于元件的表面的方向上的半导体元件与电子元件之间的旋转位移)而发生。
发明内容
根据本发明的一个方面，半导体装置包括具有第一突出电极的第一半导体元件、具有第二突出电极的电子元件、以及布置在第一半导体元件与电子元件之间的基底。基底具有第一通孔，并且第一突出电极和第二突出电极在第一通孔内连接到一起。基底具有绝缘膜，绝缘膜覆盖第一通孔的侧壁并且暴露在第一通孔内。第一突出电极的直径和第二突出电极的直径小于第一通孔的直径。
根据本发明的另一个方面，制造半导体装置的方法包括：将具有第一通孔的基底放置在具有第一突出电极的电子元件上，使得第一突出电极配合在第一通孔中；将具有第二突出电极的半导体元件放置在基底上，使得第二突出电极配合在第一通孔中；以及在第一通孔内将第一突出电极和第二突出电极连接到一起。其中，基底具有绝缘膜，绝缘膜覆盖第一通孔的侧壁并且暴露在第一通孔内。第一突出电极的直径和第二突出电极的直径小于第一通孔的直径。
根据本发明的又一个方面，电子装置包括半导体装置以及电路板。电路板上安装有该半导体装置。其中半导体装置包括具有第一突出电极的半导体元件、具有第二突出电极的电子元件以及布置在半导体元件与电子元件之间的基底。基底具有通孔，并且第一突出电极和第二突出电极在通孔内连接到一起。基底具有绝缘膜，绝缘膜覆盖通孔的侧壁并且暴露在通孔内。并且第一突出电极的直径和第二突出电极的直径小于通孔的直径。
通过权利要求中具体指出的元件和组合，将会理解和实现本发明的目的和优点。
应理解，前述总体描述和以下详细描述均是示例性的和说明性的，并且不限制本发明，如所描述的那样。
附图说明
图1图示了半导体装置的示例性结构；
图2A至2C图示了根据第一实施例的第一示例性半导体装置；
图3图示了突出电极及其附近的示例性结构；
图4A和4B图示了未使用中间半导体元件的第一情形；
图5图示了未使用中间半导体元件的第二情形；
图6A和6B图示了未使用中间半导体元件的第三情形；
图7图示了根据第一实施例的第二示例性半导体装置；
图8图示了根据第一实施例的第三示例性半导体装置；
图9图示了第一电子装置的示例性结构；
图10图示了第二电子装置的示例性结构；
图11A和11B图示了根据第二实施例的示例性半导体装置；
图12图示了根据第三实施例的第一示例性半导体装置；
图13图示了根据第三实施例的第二示例性半导体装置；
图14图示了根据第三实施例的半导体装置的示例性结构；
图15A至15D图示了形成根据第三实施例的半导体装置的示例性方法；
图16A至16C图示了图15A至15D所示的形成根据第三实施例的半导体装置的示例性方法的后续步骤；
图17A和17B图示了根据第四实施例的示例性半导体装置；
图18图示了根据第四实施例的半导体装置的示例性结构；
图19A至19C图示了具有通孔的示例性半导体元件的第一形成过程；
图20A至20C图示了具有通孔的示例性半导体元件的第二形成过程；
图21A至21C图示了具有通孔的示例性半导体元件的第三形成过程；
图22A至22C图示了具有通孔的另一个示例性半导体元件的第一形成过程；
图23A至23C图示了具有通孔的另一个示例性半导体元件的第二形成过程；
图24A至24C图示了具有通孔的另一个示例性半导体元件的第三形成过程；
图25A至25C图示了具有通孔的另一个示例性半导体元件的第四形成过程；
图26A至26C图示了具有通孔的另一个示例性半导体元件的第五形成过程；
图27A至27C图示了具有通孔的另一个示例性半导体元件的第六形成过程；
图28A至28C图示了具有通孔和凹入部分的示例性半导体元件的第一形成过程；
图29A至29C图示了具有通孔和凹入部分的示例性半导体元件的第二形成过程；
图30A至30C图示了具有通孔和凹入部分的示例性半导体元件的第三形成过程；
图31A至31C图示了具有通孔和凹入部分的示例性半导体元件的第四形成过程；
图32A至32C图示了具有通孔和凹入部分的示例性半导体元件的第五形成过程；
图33A和33B图示了第一修改；
图34图示了第二修改；
图35A和35B图示了第三修改；
图36A至36C图示了第四修改；以及
图37A和37B图示了第五修改。
具体实施方式
下面将参照附图来说明本发明的实施例，其中在附图中相似的附图标记表示相似的元件。
图1图示了半导体装置的示例性结构。图1是半导体装置的主要部分的示意性截面。
图1所示的半导体装置1包括半导体元件2、电子元件3和基底4。
半导体元件2是例如半导体芯片，并在其至少一个表面上具有突出电极2a。电子元件3是例如半导体元件(半导体芯片)或电路板，并在其至少一个表面上具有突出电极3a。
基底4是板状构件，并且由例如半导体元件、电路板、树脂基底或陶瓷基底形成。基底4在其预定位置处具有通孔4a，并且通孔4a对于要配合到通孔4a中的突出电极2a和3a而言是充分大的。
通过诸如焊料的连接部分5，在基底4的通孔4a内将半导体元件2的突出电极2a和电子元件3的突出电极3a连接到一起。
基底4的通孔4a内的相对突出电极2a和3a之间的连接减小了半导体装置1中突出电极2a和3a关于彼此的横向位移的风险。通孔4a内的相对突出电极2a和3a之间的连接甚至在邻近突出电极2a和3a形成其它电极时还减小了突出电极2a和3a与其它电极之间的短路的风险，。
由于如上所述减小了半导体元件2与电子元件3之间的横向位移和短路的风险，所以改进了半导体装置1中的半导体元件2与电子元件3之间的连接的可靠性。
现在，将更详细地描述半导体装置。
首先，将描述第一实施例。
这里，将参照附图详细地描述具有所谓的叠片结构的半导体装置，在叠片结构中，两个半导体元件的突出电极连接到一起。
图2A至2C图示了根据第一实施例的示例性半导体装置。图2A和2B是图示了在将突出电极连接到一起之前的示例性状态的主要部分的示意性截面，并且图2C是图示了在将突出电极连接到一起之后的示例性状态的主要部分的示意性截面。
图2C所示的半导体装置10包括两个半导体元件20和30、以及布置在它们之间的半导体元件40。半导体元件20和30分别具有要连接到一起的突出电极21和31。
如图2A所示，半导体元件20具有在预定位置处在一个表面上形成的至少一个突出电极21，这里是三个突出电极21。在连接到半导体元件30的相对突出电极31之前的突出电极21均具有柱部分21a和焊料部分21b，柱部分21a由例如铜(Cu)构成并从半导体元件20的表面延伸，并且焊料部分21b形成在柱部分21a的末端处。焊料部分21b被热处理以具有半球形。
类似地，半导体元件30具有形成在一个表面上的至少一个突出电极31，这里是三个突出电极31。在连接到半导体元件20的相对突出电极21之前的突出电极31均具有柱部分31a和焊料部分31b，柱部分31a由例如Cu构成并从半导体元件30的表面延伸，并且焊料部分31b形成在柱部分31a的末端处。焊料部分31b被热处理以具有半球形。半导体元件30的突出电极31被形成在与半导体元件20的突出电极21的位置对应的位置处。
半导体元件20的突出电极21和半导体元件30的突出电极31是所谓的柱电极(柱形电极)。
图3图示了突出电极之一及其附近的示例性结构。图3示意性图示了图2A所示的半导体元件20的X部分的示例性结构。
半导体元件20包括诸如硅(Si)基底的半导体基底61、形成在半导体基底61的最外层上的元件区域62。在元件区域62中形成诸如晶体管的元件。布线层63被布置在半导体基底61上，其间夹有元件区域62。布线层63包括电气连接到元件区域62中形成的元件的导电部分(布线线路、过孔)63a、以及覆盖导电部分63a的绝缘部分63b。这里，布线层63是例如第一布线层64、第二布线层65、第三布线层66和第四布线层67的层压件。由例如铝(Al)构成的电极68、以及由一个或更多个层形成且部分覆盖电极68的保护膜69被布置在布线层63上，其间夹有绝缘部分63c。绝缘部分63c包括导电部分63d，并且电极68被布置在导电部分63d上。包括柱部分21a和焊料部分21b的突出电极21被形成为连接到通过保护膜69暴露的电极68。
虽然图3仅图示了图2A中的X部分的结构，但是包括半导体元件20的另一突出电极21的其它部分也可以具有相似结构。此外，包括半导体元件30的突出电极31的部分也可以具有相似结构。
如图2A所示，布置在半导体元件20与30之间的半导体元件40在与突出电极21和31的位置对应的位置处具有通孔41(这里为三个)。此外，半导体元件40具有多个凸起42，凸起42例如由焊料构成并形成在与半导体元件30相对的表面上。这里凸起42具有例如半球形。
半导体元件40不一定起到半导体装置10中的电路的部分的作用。当半导体元件40没有起到电路的部分的作用时，也就是，当半导体元件40是伪元件时，半导体元件40的凸起42不用作用于电气连接的端子(在图2A至2C所示的示例中为连接到下半导体元件30的端子)。
为了形成图2C所示的半导体装置10，首先准备如图2A所示的上半导体元件20、下半导体元件30和中间半导体元件40。
随后，中间半导体元件40被定位为使得形成有凸起42的表面与下半导体元件30的形成有突出电极31的表面相对，并且将半导体元件30的突出电极31和半导体元件40的通孔41对准。对准之后，半导体元件40被安装在半导体元件30上，使得突出电极31配合到通孔41中，如图2B所示。
包括凸起42的厚度的半导体元件40的厚度被设置为使得当如上所述将半导体元件40安装到半导体元件30上时，突出电极31的柱部分31a的端部和焊料部分31b容纳在通孔41中而不从通孔41伸出。替选地，柱部分31a的高度和焊料部分31b的高度被设置为使得柱部分31a的端部和焊料部分31b容纳在通孔41中而不从通孔41伸出。
半导体元件40的全部凸起42可以与半导体元件30的表面接触。替选地，可以将一个或更多个凸起42与半导体元件30的表面分开。在该示例中，所有凸起42与半导体元件30的表面接触。由于凸起42，使得半导体元件40在凸起42的位置处与半导体元件30点接触。与在没有凸起42的情况下将整个突出电极31配合到半导体元件40的通孔41中的情形相比，这有助于将突出电极31插入通孔41，使得包括焊料部分31b的突出电极31的端部容纳在通孔41中。例如，突出电极31被容易地配合到通孔41中，使得甚至当半导体元件30的平坦度与半导体元件40不同或一些通孔41的形状与其它通孔41的形状稍微不同时，包括焊料部分31b的突出电极31的端部容纳在通孔41中。
在半导体元件40安装到半导体元件30上后，半导体元件20被定位为使得形成有突出电极21的表面与通孔41和半导体元件30的形成有突出电极31的表面相对，并且如图2B所示将突出电极31、通孔41和半导体元件20的突出电极21对准。对准之后，半导体元件20被安装在半导体元件30和40上以使得半导体元件20的突出电极21配合到通孔41中。
半导体元件40被布置为使得突出电极31不从通孔41伸出，并且突出电极21配合到通孔41内剩余的上空间中。包括凸起42的厚度的半导体元件40的厚度被设置为使得突出电极21的柱部分21a的端部和焊料部分21b容纳在通孔41的空间中。替选地，柱部分21a的高度和焊料部分21b的高度被设置为使得柱部分21a的端部和焊料部分21b容纳在通孔41中。通过这样，包括焊料部分21b的突出电极21的端部和包括焊料部分31b的突出电极31的端部容纳在通孔41中。
焊料部分21b和31b在这种状态下回流以与连接部分50一体化，并且半导体元件20和30通过连接部分50和柱部分21a和31a而连接到一起。此时，柱部分21a和31a的端部与连接部分50位于布置在半导体元件20和30之间的半导体元件40的通孔41内。
在上述形成半导体装置10的方法中，在将半导体元件30的突出电极31布置为不从通孔41伸出的情况下，将半导体元件20的突出电极21配合到半导体元件40的通孔41中。这允许突出电极21和31在通孔41内彼此相对，并减小焊料部分回流之前突出电极21和31的横向位移的风险。此外，还减小回流焊之前的半导体元件20和30的旋转位移(如图5所示的θ方向)的风险。
图4A至6B图示了未使用中间半导体元件的情形。图4A、4B、6A和6B是要连接的半导体元件的主要部分的示意性截面，并且图5是要连接的半导体元件的主要部分的示意性平面视图。
当没有使用具有上述通孔41的半导体元件40时，首先如图4A所示将半导体元件20的突出电极21和半导体元件30的突出电极31对准。随后，使突出电极21的焊料部分21b和突出电极31的焊料部分31b彼此接触，并使它们回流。由于突出电极21的末端处的焊料部分21b和突出电极31的末端处的焊料部分31b是例如半球形，因此在使突出电极21和31的凸表面彼此接触且在回流焊期间焊料熔化之前，由于半导体元件20的重量、振动、或其它原因而如图4B所示会在半导体元件20和30之间发生横向位移。除了横向位移之外，会在半导体元件20和30(用虚线表示半导体元件30)之间发生如图5所示的θ方向上的位移。
当分别在半导体元件20和30两者上形成具有小高度的突出电极23和33(诸如所谓的微凸起)(如图6A所示)时，也会发生横向位移或θ方向上的位移。此外，当在半导体元件20或半导体元件30上(例如，如图6B所示在半导体元件30上)形成具有小高度的突出电极33时，也会发生上述位移。甚至当突出电极21的焊料部分21b和突出电极31的焊料部分31b不是半球形时，如上所述由于例如振动也会发生半导体元件20和30之间的位移。
相比之下，上述半导体装置10使用具有通孔41的半导体元件40，并且半导体元件20和30被定位为使得突出电极21和31配合到通孔41中并且在半导体装置10的形成期间在通孔41内连接突出电极21和31。这有效地减小了在焊料部分回流之前的突出电极21和31的横向位移以及半导体元件20和30在θ方向上的位移的风险。
此外，通孔41内的突出电极21和31的连接减小了在焊料部分回流之后的彼此相邻放置的柱部分21a、柱部分31a与连接部分50的相邻组之间的短路的风险。
此外，由于半导体装置10使用柱电极作为突出电极21和31，所以连接部分50与半导体元件20和30的表面分别彼此分开了与突出电极21和31的长度对应的距离。结果，在回流焊期间或在半导体装置10正工作时施加于连接部分50的剪切应力减小。
虽然以上已描述了半导体装置10的示例性结构和形成半导体装置10的示例性方法，但是半导体装置10中使用的半导体元件20、30和40的结构不限于以上描述的结构。例如，半导体元件20和30的尺寸以及半导体元件20的突出电极21和半导体元件30的突出电极31的数目和布局不限于以上描述的尺寸、数目和布局。半导体元件40的尺寸、通孔41的数目和布局、以及凸起42的数目和布局也不限于以上描述的尺寸、数目和布局。虽然未示出，但是连接到突出电极21和31的重新布线线路可以形成在半导体元件20和30的表面上。
下面将更详细地描述半导体装置10中使用的半导体元件40。
图7图示了根据第一实施例的另一示例性半导体装置。图7是根据第一实施例的示例性半导体装置的主要部分的示意性截面。
半导体元件40的通孔41被形成为具有等于或大于半导体元件20的突出电极21的直径和半导体元件30的突出电极31的直径的直径，使得突出电极21和31配合到通孔41中。当通孔41的直径大于突出电极21和31的直径时，在通孔41的侧壁(内壁)与柱部分21a和31a和连接部分50之间留下间隙。这些间隙防止柱部分21a和31a和连接部分50与通孔41的侧壁接触。
如果通孔41的侧壁具有导电区并且柱部分21a和31a和连接部分50与导电区接触，则半导体装置10会发生故障。从这一观点来看，半导体元件40的通孔41的侧壁可以电气绝缘。例如，如图7所示可以用绝缘膜43覆盖通孔41的侧壁。这有效地减小了半导体元件40与柱部分21a和31a和连接部分50的电气连接的风险。
虽然图7图示了在通孔41的侧壁上以及在半导体元件40的前表面和后表面的部分上形成绝缘膜43的情形，但是绝缘膜43可以被形成为至少覆盖通孔41的侧壁。此外，绝缘膜43可以形成在半导体元件40的除了形成有诸如连接端子(例如，凸起42)的导电部分的导电区之外的整个前表面或后表面上。
此外，半导体装置10的半导体元件20和30之间的空间可以填充有树脂，诸如底部填充剂(underfill)。
图8图示了根据第一实施例的另一示例性半导体装置。图8是根据第一实施例的示例性半导体装置的主要部分的示意性截面。
如图8所示，在半导体元件40的通孔41内(这里，在其侧壁覆盖有绝缘膜43的通孔41内)连接的半导体元件20和30之间的空间可以填充有树脂70。树脂70可以是例如常常用作底部填充剂的环氧树脂。包括在连接突出电极21和31之后通孔41内剩余的间隙的半导体元件20和30之间的空间例如填充有树脂70。树脂70进一步改进半导体装置10相对于热和物理应力的连接可靠性。
上述半导体装置10可以安装在电路板上。
图9和10图示了包括安装有根据第一实施例的半导体装置的电路板的装置(电子装置)的示例性结构。图9和10是根据第一实施例的示例性电子装置的主要部分的示意性截面。
图9所示的电子装置100包括电路板(基部基底)101和线键合在电路板101上的半导体装置10。在该电子装置100中，连接到半导体元件20的半导体元件30(其间夹有半导体元件40)使用由例如金(Au)构成的线102而电气连接到电路板101。半导体元件30包括例如连接到半导体元件30的突出电极31和内部电路的布线线路34，并且布线线路34连接到线102的一端。
这里半导体元件40可以是例如伪元件(dummy element)。在这种情况下，凸起42没有起到连接到半导体元件30的端子的作用。替选地，半导体元件40可以是起到半导体装置10中的电路的部分的作用的半导体元件(有源元件)。在这种情况下，凸起42可以起到连接到半导体元件30的端子的作用。当有源元件被用作半导体元件40时，根据例如半导体元件40的功能或凸起42的布局，在半导体元件30上形成布线线路34的预定图案。
在图9中，半导体元件40的通孔41的侧壁覆盖有绝缘膜43。半导体元件20和30之间的空间可以填充有树脂，诸如底部填充剂。此外，半导体装置10和电路板101上的线102(包括当空间未填充有树脂时的半导体元件20和30之间的空间)可以使用诸如密封树脂的树脂来密封。
图10所示的电子装置110包括电路板(基部基底)111和使用焊料球112连接到电路板111的半导体装置10。半导体元件30包括例如诸如硅通孔(TSV)的馈通电极35，并且馈通电极35经由焊料球112电气连接到电路板111。
与图9所示的电子装置100一样，图10所示的电子装置110中的半导体元件40可以是伪元件或有源元件。当半导体元件40是有源元件时，凸起42起到连接到半导体元件30的端子的作用。根据半导体元件40的形式在半导体元件30上形成预定图案。例如，在半导体元件30上形成如图10所示连接凸起42和馈通电极35的布线线路36。
在图10中，半导体元件40的通孔41的侧壁也覆盖有绝缘膜43。此外，半导体元件20和30之间的空间或半导体元件30和电路板111之间的空间可以填充有树脂，诸如底部填充剂。此外，电路板111上的半导体装置10(当空间未填充有树脂时包括半导体元件20和30之间的空间以及半导体30和电路板111之间的空间)可以使用树脂来密封。
接下来，将描述第二实施例。
在以上的描述中，半导体元件20和30被连接到一起，其间夹有半导体元件40。半导体元件40可以并入将半导体元件和诸如电路板的电子元件连接到一起的结构中。
图11A和11B图示了根据第二实施例的示例性半导体装置。图11A是图示了在将突出电极连接到一起之前的示例性状态的主要部分的示意性截面，图11B是图示了在将突出电极连接到一起之后的示例性状态的主要部分的示意性截面。
图11A和11B所示的半导体装置140包括半导体元件20、电路板(基部基底)150、以及布置在半导体元件20与电路板150之间的半导体元件40。具有在基底内和基底的表面上形成的导电部分的预定图案的树脂基底、陶瓷基底、半导体基底等可以用作电路板150。如图11A所示，在与突出电极21的位置(或者半导体元件40的通孔41的位置)对应的位置处，在电路板150上形成要连接到半导体元件20的突出电极21的突出电极151。在连接到突出电极21之前的突出电极151包括柱部分151a和在柱部分151a的末端处形成的半球形焊料部分151b。类似地，突出电极21包括柱部分21a和在柱部分21a的末端处形成的半球形焊料部分21b。
半导体元件40被安装在电路板150上，使得突出电极151配合到通孔41中，并且随后半导体元件20的突出电极21配合到通孔41中。在将突出电极21和151配合到通孔41中的同时，通过使焊料部分21b和151b回流，利用如图11B所示的连接部分(与焊料部分21b和151b一体化的部分)160将突出电极21的柱部分21a和突出电极151的柱部分151a连接到一起。
由于在通孔41内连接突出电极21和151，所以减小了突出电极21和151的位移的风险。此外，也减小了突出电极21和151的相邻组之间的短路的风险。
电子装置140中的半导体元件40可以是伪元件或有源元件。图11A和11B图示了半导体元件40是有源元件并且凸起42用作连接到电路板150上形成的电极152的端子的情形。
在图11A和11B中，半导体元件40的通孔41的侧壁覆盖有绝缘膜43。半导体元件20与电路板150之间的空间可以填充有树脂，诸如底部填充剂。
接下来，将描述第三实施例。
虽然以上描述中使用诸如具有通孔41的半导体元件40(伪元件或有源元件)的基底，但是可以使用具有相似通孔的不同类型的基底。
图12和13图示了根据第三实施例的示例性半导体装置。图12和13是根据第三实施例的示例性半导体装置的主要部分的示意性截面。
图12所示的半导体装置170包括在半导体元件20和30之间的、具有通孔181的诸如树脂基底或陶瓷基底的基底180。图13所示的半导体装置190包括半导体元件20与电路板150之间的基底180。
在基底180的与图12中的半导体元件30和图13中的电路板150相对的表面上形成凸起182。然而，不一定形成这些凸起182。基底180可以是例如单个树脂基底或单个陶瓷基底。此外，基底180可以是具有在基底内和基底的表面上形成的导电部分的预定图案(即，电路板)的树脂基底、陶瓷基底等。在当简单形成通孔181时由于基底180的形式而在通孔181的侧壁处暴露导电部分的情况下，侧壁可以覆盖有上述的绝缘膜43。
当使用这样的基底180时，以与上述方式相似的方式在通孔181内连接图12所示的半导体装置170中的突出电极21和31以及图13所示的半导体装置190中的突出电极21和151。这减小了上述位移和短路的风险。
图12所示的半导体元件20和30之间的空间和图13所示的半导体元件20和电路板150之间的空间可以填充有树脂，诸如底部填充剂。
图14图示了根据第三实施例的半导体装置的示例性结构。图14是根据第三实施例的示例性半导体装置的主要部分的示意性截面。
图14所示的半导体装置170A包括半导体元件20A和30A以及夹在半导体元件20A和30A之间的具有通孔181A的树脂基底180A。在通孔181A内连接突出电极21A和31A。在半导体装置170A中，半导体元件20A是例如存储器元件(存储器芯片)，并且半导体元件30A是例如逻辑元件(逻辑芯片)。
树脂基底180A在其内部和其表面上具有导电部分的预定图案，并具有电路板的功能。在导电部分之中，图14中图示了在预定位置处在树脂基底180A的一个表面上形成的布线线路183A。布线线路183A连接到焊料球184A。
在树脂基底180A的与半导体元件30A相对的表面上形成凸起182A。凸起182A连接到树脂基底180A内的导电部分并连接到树脂基底180A的表面上的布线线路183A。同时，半导体元件30A具有在与树脂基底180A相对的表面上形成的布线线路37A。布线线路37A连接到半导体元件30A内的元件和突出电极31A。布线线路37A连接到树脂基底180A的凸起182A。
半导体元件20A和30A之间的空间，也就是，半导体元件20A与树脂基底180A之间的、半导体元件30A与树脂基底180A之间的、以及通孔181A内的空间填充有树脂70A。
包括该半导体装置170A的电子装置可以通过使用焊料球184A将半导体装置170A连接到电路板而获得。
可以使用例如图15A至15D和16A至16C中示出的方法来形成如图14所示的半导体装置170A。
图15A至15D和16A至16C图示了形成根据第三实施例的半导体装置的示例性方法。图15A至15D和16A至16C是每个形成步骤中的主要部分的示意性截面。
首先，准备半导体元件20A和30A以及树脂基底180A。随后，如图15A所示，将树脂基底180A的通孔181A和半导体元件30A的突出电极31A对准。对准之后，半导体元件30A被安装在树脂基底180A上，使得突出电极31A配合到通孔181A中，如图15B所示。此时，树脂基底180A的凸起182A连接到半导体元件30A的布线线路37A。
接下来，如图15C所示以倒转的方式使其上安装有半导体元件30A的树脂基底180A的取向颠倒。随后，半导体元件20A的突出电极21A与通孔181A对准。对准之后，半导体元件20A安装到树脂基底180A上，使得突出电极21A配合到已经配合了突出电极31A的通孔181A中，如图15D所示。通过使焊料部分回流，在通孔181A内将突出电极21A和31A连接到一起。也就是，通过连接部分50A，在通孔181A内将柱部分21Aa和31Aa连接到一起，将焊料部分21Ab和31Ab(如图15A至15D所示)与连接部分50A一体化，如图16A所示。
在将半导体元件20A和30A连接到一起(其间夹有树脂基底180A)之后，半导体元件20A与树脂基底180A之间的以及半导体元件30A与树脂基底180A之间的空间填充有树脂70A，如图16B所示。此时，通孔181A中剩余的间隙内的空间也填充有树脂70A。
在用树脂70A填充空间之后，焊料球184A连接到树脂基底180A的布线线路183A，如图16C所示。这完成了如图14所示的半导体装置170A的形成。
为了通过将半导体装置170A安装在电路板上来形成电子装置，可以使用焊料球184A以将半导体装置170A连接到电路板。
接下来，将描述第四实施例。
在以上描述中，在布置在两个半导体元件之间的基底的通孔内将这两个半导体元件的突出电极连接到一起。该结构可以应用于使用三个或更多个半导体元件的情况。
图17A和17B图示了根据第四实施例的示例性半导体装置。图17A是图示了在连接半导体元件之前的示例性状态的主要部分的示意性截面，并且图17B是图示了在连接半导体元件之后的示例性状态的主要部分的示意性截面。
如图17B所示，半导体装置200包括连接到一起的四个半导体元件210、220、230和240的层压件。
如图17A所示，第一层的半导体元件210具有在上表面形成的突出电极211和在上表面中形成的凹入部分212。突出电极211均包括柱部分211a和在柱部分211a的末端处形成的半球形焊料部分211b。在凹入部分212的底表面上形成电极212a。
第二层的半导体元件220具有在上表面和下表面上形成的突出电极221、在上表面中形成的凹入部分222、以及穿过半导体元件220的通孔223。突出电极221均包括柱部分221a和在柱部分221a的末端处形成的半球形焊料部分221b。在凹入部分222的底表面上形成电极222a。
第三层的半导体元件230具有在下表面上形成的突出电极231、在上表面中形成的凹入部分232、以及穿过半导体元件230的通孔233。突出电极231均包括柱部分231a和在柱部分231a的末端处形成的半球形焊料部分231b。在凹入部分232的底表面上形成电极232a。
第四层的半导体元件240具有在下表面上形成的突出电极241。突出电极241均包括柱部分241a和在柱部分241a的末端处形成的半球形焊料部分241b。
当将这些半导体元件210、220、230和240堆叠和连接时，例如第二层的半导体元件220安装在半导体元件210上以使得第一层的半导体元件210的突出电极211配合在通孔223中。此时，半导体元件220的下表面上的突出电极221配合到半导体元件210的凹入部分212中。半导体元件210和220被形成为使得当半导体元件220被安装在半导体元件210上时，突出电极211不从通孔223伸出。
接着，第三层的半导体元件230被安装到半导体元件220上以使得第二层的半导体元件220的上表面上的突出电极221配合在通孔233中。此时，半导体元件230的一些突出电极231被配合到配合了突出电极211的半导体元件220的通孔223中，并且其余突出电极231被配合到半导体元件220的凹入部分222中。半导体元件220和230被形成为使得当半导体元件230安装在半导体元件220上时，突出电极221不从通孔233伸出。
接着，第四层的半导体元件240安装在第三层的半导体元件230上。此时，半导体元件240的一些突出电极241被配合到配合了突出电极221的半导体元件230的通孔233中，并且其余突出电极241被配合到半导体元件230的凹入部分232中。
在以这种方式堆叠半导体元件210、220、230和240之后，使焊料部分回流。由此，在通孔223内将突出电极211和231连接到一起，并且在通孔233内将突出电极221和241连接到一起，如图17B所示。也就是，通过连接部分251将柱部分211a和231a连接到一起，焊料部分211b和231b与连接部分251一体化，并且通过连接部分252将柱部分221a和241a连接到一起，焊料部分221b和241b与连接部分252一体化。在回流焊期间，突出电极221连接到凹入部分212上的电极212a，突出电极231连接到凹入部分222上的电极222a，并且突出电极241连接到凹入部分232上的电极232a，如图17B所示。
以这种方式，将半导体元件210、220、230和240连接到一起，从而得到如图17B所示的半导体装置200。
半导体元件220的通孔223的侧壁和半导体元件230的通孔233的侧壁可以覆盖有绝缘膜。半导体元件210和220之间的、半导体元件220和230之间的、以及半导体元件230和240之间的空间可以填充有树脂，诸如底部填充剂。
虽然以上描述的半导体装置200包括连接到一起的四个半导体元件210、220、230和240的层压件，但是可以根据上述示例形成包括五个或更多个半导体元件的半导体装置。
通孔或凹入部分内的不同半导体元件的连接减小了上述位移和短路的风险，从而得到具有高连接可靠性的半导体装置200。此外，在突出电极配合在通孔和凹入部分中之后的突出电极的连接减小了突出电极的位移的风险，并允许在一次回流焊中同时连接三个或更多个半导体元件。也就是，如果例如半导体元件没有通孔或凹入部分，则每次堆叠和连接半导体元件时需要回流焊，并且在所有这样的场合下会发生半导体元件之间的位移。相比之下，当半导体元件具有如上所述的通孔和凹入部分时，通过一次回流焊高效地形成半导体装置，同时减小半导体元件的位移的风险。
虽然在以上描述中层压件仅包括半导体元件，但是层压件可以包括诸如电路板的电子元件。甚至当用电路板替换四个半导体元件210、220、230和240当中的半导体元件210、220和230中的任一个时，包括层压件的电子装置产生与上述效果相似的效果。
图18图示了根据第四实施例的半导体装置的示例性结构。图18是根据第四实施例的示例性半导体装置的主要部分的示意性截面。
图18所示的半导体装置300包括连接到一起的四个半导体元件310、320、330和340的层压件。
第一层的半导体元件310和第二层的半导体元件320被布置为使得具有区域(电路区域)310a的半导体元件310的上表面和具有电路区域320a的半导体元件320的下表面彼此相对。电路区域包括诸如晶体管的元件和其中形成的布线层。第三层的半导体元件330和第四层的半导体元件340被布置为使得具有电路区域330a的半导体元件330的上表面和具有电路区域340a的半导体元件340的下表面彼此相对。
第一层的半导体元件310具有突出电极311、凹入部分312、以及形成在具有电路区域310a的上表面上的电极312a。突出电极311连接到重新布线线路314(一些重新布线线路连接到电极312a)。
第二层的半导体元件320具有在其上表面和下表面两者上形成的电极321、以及在没有形成电路区域320a的上表面上形成的凹入部分322和电极322a。突出电极321连接到重新布线线路324(一些重新布线线路连接到电极322a)。此外，半导体元件320具有通孔323。
第三层的半导体元件330具有在没有形成电路区域330a的下表面上形成的突出电极331、以及在具有电路区域330a的上表面上形成的凹入部分332和电极332a。突出电极331和电极332a连接到重新布线线路334。此外，半导体元件330具有通孔333。
第四层的半导体元件340具有在具有电路区域340a的下表面上形成的突出电极341。突出电极341连接到重新布线线路344。
在第一层的半导体元件310与第三层的半导体元件330之间彼此相对的突出电极311和331被配合到第二层的半导体元件320的通孔323中，并在通孔323内将它们连接到一起。也就是，在通孔323内，通过连接部分351连接柱部分311a和331a。
在第二层的半导体元件320与第四层的半导体元件340之间彼此相对的突出电极321和341被配合到第三层的半导体元件330的通孔333中，并在通孔333内将它们连接到一起。也就是，在通孔333内，通过连接部分352连接柱部分321a和341a。
具有电路区域320a的第二层的半导体元件320的下表面上的突出电极321被配合到第一层的半导体元件310的凹入部分312中，并被连接到电极312a。也就是，柱部分321a经由焊料部分连接到电极312a。
第三层的半导体元件330的一些突出电极331被配合到第二层的半导体元件320的凹入部分322中，并被连接到电极322a。也就是，柱部分331a经由焊料部分连接到电极322a。
第四层的半导体元件340的一些突出电极341被配合到第三层的半导体元件330的凹入部分332中，并被连接到电极332a。也就是，柱部分341a经由焊料部分连接到电极332a。
在一次回流焊中可以同时将四个半导体元件310、320、330和340连接到一起。
图18中用虚箭头表示具有上述结构的半导体装置300中的信号传播路径的示例。在半导体装置300中，如以上那样连接的四个半导体元件310、320、330和340彼此协作以实现预定处理功能。
在如以上那样形成的半导体装置300中，通孔323和333和凹入部分312、322和332能够减小半导体元件310、320、330和340的位移和短路的风险。此外，利用一次回流焊高效地形成半导体装置300。
随后，将描述形成仅具有通孔或具有通孔和凹入部分两者的半导体元件的示例性方法。
首先，将参照图19A至21C按顺序描述形成具有通孔的半导体元件的示例性方法。图19A至21C是每个形成步骤中的主要部分的示意性截面。
图19A至19C图示了具有通孔的示例性半导体元件的第一形成过程。
如图19A所示，使用粘附剂500将支撑基底501粘附到半导体元件400的后表面。这里，在半导体元件400的与后表面相反的前表面上形成突出电极401，突出电极401均包括柱部分401a和在柱部分401a的末端处形成的焊料部分401b。半导体元件400是有源元件，并且在具有电路区域(形成诸如晶体管的元件和布线层的区域)的前表面上形成突出电极401。接下来，如图19B所示在半导体元件400的前表面上形成抗蚀剂502。随后，在要形成通孔的区域处，使用光刻技术在抗蚀剂502中形成开口502a，如图19C所示。
图20A至20C图示了具有通孔的示例性半导体元件的第二形成过程。
在抗蚀剂502中形成开口502a之后，使用抗蚀剂502作为掩模，通过干法刻蚀在半导体元件400中形成孔403a，如图20A所示。随后，如图20B所示从半导体元件400移除抗蚀剂502，并且如图20C所示，使用粘附剂503将支撑基底504粘附到半导体元件400的前表面。
图21A至21C图示了具有通孔的示例性半导体元件的第三形成过程。
在粘附了支撑基底504之后，执行背部研磨，使得半导体元件400减小到预定厚度，如图21A所示。此时，在半导体元件400的前表面中预先形成的孔403a出现在后表面中，从而得到半导体元件400中形成的通孔403。在背部研磨之后，如图21B所示形成由例如二氧化硅(SiO2)构成的绝缘膜404。绝缘膜404可以通过例如热氧化或化学气相沉积(CVT)形成。在绝缘膜404的形成之后，移除粘附剂503和支撑基底504。这完成了如图21C所示的半导体元件400a的形成。其它电子元件的突出电极配合到半导体元件400a的通孔403中。
虽然上述半导体元件400a(400)是有源元件，但是也可以以类似的方式形成伪元件的半导体元件。
此外，以上描述的形成具有突出电极401(包括柱部分401a)的半导体元件400a的方法也可以用于在没有这样的柱电极的半导体元件中形成通孔。例如，也可以根据如图19A至21C所示的方法形成在第一和第二实施例中描述的、布置在要连接的两个半导体元件之间的半导体元件40(伪元件或有源元件)。
接着，将参照图22A至27C按顺序描述形成具有通孔的半导体装置的另一个示例性方法。图22A至27C是每个形成步骤中的主要部分的示意性截面。
图22A至22C图示了具有通孔的另一个示例性半导体元件的第一形成过程。
如图22A和22B所示，使用粘附剂700将支撑基底701粘附到半导体元件600的前表面，在该前表面上形成有突出电极601。这里，突出电极601均包括柱部分601a和在柱部分601a的末端处形成的焊料部分601b。半导体元件600是具有突出电极601(形成在具有电路区域的表面上)的有源元件，并且减小到预定厚度。在支撑基底701粘附之后，抗蚀剂702形成在半导体元件600的与形成有突出电极601的前表面相反的后表面上，如图22C所示。
图23A至23C图示了具有通孔的另一示例性半导体元件的第二形成过程。
在抗蚀剂702的形成之后，在要形成通孔的区域处，使用光刻技术在抗蚀剂702中形成开口702a，如图23A所示。在开口702a的形成之后，使用抗蚀剂702作为掩模，通过干法刻蚀在半导体元件600中形成通孔603，如图23B所示。在通孔603的形成之后，从半导体元件600移除抗蚀剂702，如图23C所示。
图24A至24C图示了具有通孔的另一示例性半导体元件的第三形成过程。
在抗蚀剂702的移除之后，通过例如热氧化或CVD形成由例如SiO2构成的绝缘膜604，如图24A所示。在绝缘膜604的形成之后，如图24B所示形成种子层605，并且如图24C所示形成抗蚀剂703。
图25A至25C图示了具有通孔的另一示例性半导体元件的第四形成过程。
在抗蚀剂703的形成之后，在要形成重新布线线路的区域中形成开口703a，如图25A所示。随后，通过电镀在开口703a中在种子层605上形成重新布线线路606，如图25B所示。在重新布线线路606的形成之后，如图25C所示移除抗蚀剂703。
图26A至26C图示了具有通孔的另一示例性半导体元件的第五形成过程。
在抗蚀剂703的移除之后，如图26A所示形成另一抗蚀剂704，并如图26B所示在要形成突出电极的区域中形成开口704a。随后，通过电镀在开口704a中在重新布线线路606上形成柱部分607a，此外，在柱部分607a上形成焊料部分607b，使得形成突出电极607，如图26C所示。突出电极607的高度可以通过控制例如抗蚀剂704的厚度和电镀条件(电镀时间、电流密度和其它参数)来调节。
图27A至27C图示了具有通孔的另一示例性半导体元件的第六形成过程。
在突出电极607的形成之后，如图27A所示移除抗蚀剂704。随后，通过刻蚀移除在抗蚀剂704的移除之后出现的种子层605的部分，如图27B所示。在刻蚀之后，焊料部分607b通过回流而成形，移除粘附剂700和支撑基底701。这完成了如图27C所示的半导体元件600a的形成。其它电子元件的突出电极配合到半导体元件600a的通孔603。
虽然上述半导体元件600a(600)是有源元件，但是也可以以类似方式形成伪元件的半导体元件。
此外，以上描述的形成在前表面具有突出电极601的且在后表面具有突出电极607的半导体元件600a的方法也可用于根据图22A至27C所示的示例形成仅在后表面具有突出电极607的半导体元件。也就是，可以使用不具有突出电极601的半导体元件600来进行如图22A至27C所示的方法。
接下来，将描述形成具有通孔和凹入部分的示例性半导体元件的方法。
能够以与图22A至22C和图23A至23C所示的方式相似的方式执行方法，直到形成通孔为止。这里，将参照图28A至32C按顺序描述后续步骤的示例。图28A至32C是每个形成步骤中的主要部分的示意性截面。
图28A至28C图示了具有通孔和凹入部分的示例性半导体元件的第一形成过程。
在如图22A至22C和图23A至23C所示形成通孔603和移除抗蚀剂702之后，如图28A所示形成另一抗蚀剂705，并且如图28B所示在要形成凹入部分的区域中形成开口705a。在开口705a的形成之后，如图28C所示，使用抗蚀剂705作为掩模，通过干法刻蚀在半导体元件600中形成凹入部分608。
图29A至29C图示了具有通孔和凹入部分的示例性半导体元件的第二形成过程。
在凹入部分608的形成之后，如图29A所示移除抗蚀剂705，并且如图29B所示通过例如热氧化或CVD形成绝缘膜604。在绝缘膜604的形成之后，如图29C所示形成种子层605。
图30A至30C图示了具有通孔和凹入部分的示例性半导体元件的第三形成过程。
在种子层605的形成之后，如图30A所示形成抗蚀剂703，并且如图30B所示在要形成重新布线线路的区域中以及凹入部分608中形成开口703a。随后，如图30C所示通过电镀在开口703a中在种子层605中形成重新布线线路606和凹入部分608内的电极609。随后，移除抗蚀剂703。
图31A至31C图示了具有通孔和凹入部分的示例性半导体元件的第四形成过程。
在重新布线线路606和电极609的形成之后，如图31A所示形成另一抗蚀剂704，并且如图31B所示在要形成突出电极的区域中形成开口704a。随后，通过电镀在开口704a中在重新布线线路606上形成柱部分607a，此外，在柱部分607a上形成焊料部分607b，使得形成突出电极607，如图31C所示。
图32A至32C图示了具有通孔和凹入部分的示例性半导体元件的第五形成过程。
在突出电极607的形成之后，如图32A所示移除抗蚀剂704。随后，如图32B所示通过刻蚀移除在移除抗蚀剂704之后出现的种子层605的部分。在刻蚀之后，焊料部分607b通过回流而成形，并且移除粘附剂700和支撑基底701。这完成了如图32C所示的半导体元件600b的形成。其它电子元件的突出电极配合到半导体元件600b的通孔603和凹入部分608中。
半导体元件600b(600)可以是有源元件或伪元件。
此外，以上描述的形成在前表面具有突出电极601和在后表面具有突出电极607的半导体元件600b的方法也可以用于根据如图28A至32C所示的示例形成仅在后表面具有突出电极607的半导体元件。
虽然以上描述了包括连接到一起的多个电子元件的层压件的半导体装置，但是半导体装置的形式不限于以上描述的形式，并且可以适当地改变。
图33A和33B图示了第一修改。图33A和33B是半导体元件、电子元件和基底的主要部分的示意性截面。
如图33A和33B所示，要连接到一起的、半导体元件810的突出电极811和电子元件(半导体元件、电路板等)820的相对突出电极821不一定分别包括形成在突出电极811和821两者上的焊料部分811b和821b。例如，如图33A所示，半导体元件810的突出电极811仅可以包括柱部分811a和形成在柱部分811a上的焊料部分811b，并且电子元件820的突出电极821可以仅包括柱部分821a。替选地，如图33B所示，仅电子元件820的突出电极821可以包括柱部分821a和形成在柱部分821a上的焊料部分821b，并且半导体元件810的突出电极811可以仅包括柱部分811a。在图33A或33B所示的任一结构中在基底(半导体元件、树脂基底、陶瓷基底等)830的通孔831内可以将突出电极811和821连接到一起。
图34图示了第二修改。图34是半导体元件、电子元件和基底的主要部分的示意性截面。
如图34所示，布置在半导体元件810与电子元件820之间的基底830可以在两个表面上具有凸起832。例如，当在通孔831内将突出电极811和821连接时，可以使上表面的凸起832与半导体元件810接触，并且可以使下表面的凸起832与电子元件820接触。当基底830是有源元件时，上表面和下表面的凸起832可以用作连接到半导体元件810和电子元件820的端子。
图35A和35B图示了第三修改。图35A和35B是基底的主要部分示意性平面视图。
可以如图35A和35B那样布置基底830的通孔831和凸起832(换言之，半导体元件810的突出电极811、电子元件820的突出电极821、以及基底830的凸起832)。例如，如图35A所示可以交替地布置通孔831和凸起832。此外，如图35B所示可以围绕布置在中心区域处的凸起832的外圆周布置通孔831。在任一情况下，可以有效地减小在半导体元件810和电子元件820的连接期间的位移和短路的风险。
通孔831不一定形成在整个基底830中，并且基底830中形成的两个或更多个通孔831对诸如位移的问题产生一些积极的效果。
图36A至36C图示了第四修改。图36A至36C是半导体元件、电子元件和基底的主要部分的示意性截面。
基底830中形成的通孔831不一定是圆柱形的。例如，通孔831可以是锥形的，使得与半导体元件810相邻的开口的直径大于远离半导体元件810的开口的直径，如图36A所示的通孔831A那样。替选地，通孔831可以是锥形的，使得与电子元件820相邻的开口的直径大于远离电子元件820的开口的直径，如图36B所示的通孔831B那样。此外，通孔831可以在与半导体元件810相邻的开口和与电子元件820相邻的开口之间收缩，收缩部分的直径小于开口的直径，如图36C所示的通孔831C那样。
圆柱形、锥形或收缩的通孔831的最小直径优选地被设置为等于或大于突出电极811和821的直径的一倍且小于两倍。这有效地减小了当突出电极配合到通孔831中时的诸如突出电极811和821的位移的问题。
图37A和37B图示了第五修改。图37A和37B是半导体元件、电子元件和基底的主要部分的示意性截面。
半导体元件810的突出电极811和电子元件820的突出电极821不限于柱电极。例如，由例如Au构成的螺柱凸起811A可以用作半导体元件810的突出电极，并且如图37A和37B所示，经由焊料部分821b在通孔831内可以将螺柱凸起811A和用作电子元件820的柱电极的突出电极821连接到一起。
替选地，用作柱电极的突出电极811被用于半导体元件810，并且螺柱凸起可以用作电子元件820的突出电极。此外，螺柱凸起可以用于半导体元件810和电子元件820两者。
现在将描述上述实施例的示例。
[示例1]
准备了其上形成有突出电极的、尺寸为3.5mm×7mm的半导体元件(下文中称为“第一半导体元件”)。突出电极均包括直径为30μm、高度为35μm的Cu柱部分、以及形成在柱的末端上的、高度为10μm的锡银(SnAg)焊料，并且以50μm的间距来布置突出电极。
此外，准备了其上形成有突出电极的、尺寸为15mm×15mm的、由Si构成的基部基底(下文中称为“Si基部基底”)。突出电极具有与第一半导体元件相同的尺寸和结构，并且以与第一半导体元件相同的图案来布置。
此外，不具有有源层的Si基底被用作具有通孔的半导体元件(下文中称为“第二半导体元件”)。如下形成第二半导体元件。首先，以与第一半导体元件的突出电极相同的图案，通过干法刻蚀在Si基底的表面中形成直径为35μm的孔。随后，通过背部研磨Si基底的后表面将Si基底的厚度减小到50μm。此时，在前表面中预先形成的孔出现在后表面中，从而产生通孔。随后，通过低温CVD或热氧化在Si基底的后表面(接地表面)上和通孔内形成绝缘膜。这完成了第二半导体元件的形成。当在该第二半导体元件上形成连接端子时，在如上形成通孔和绝缘膜之前在Si基底上可以形成电路图案、凸起等。
为了将第一半导体元件安装在Si基部基底上，首先，使用倒装芯片键合器将形成有通孔的第二半导体元件安装在Si基部基底上，使得第二半导体元件的通孔和Si基部基底的突出电极对准。接着，第一半导体元件的突出电极和第二半导体元件的通孔对准，并且使用倒装芯片键合器安装第一半导体元件。随后，在氮气下在回流炉中将层压件加热到240℃，使得Si基部基底和第一半导体元件连接到一起。
相比较，在不使用具有通孔的第二半导体元件的情况下，将第一半导体元件安装在Si基部基底上，并且在回流炉中加热层压件，使得第一半导体元件和Si基部基底连接到一起。
在利用和不利用第二半导体元件的情况下来造样本。具体地，以使用第二半导体元件连接Si基部基底和第一半导体元件的方式来制造十个样本。以不使用第二半导体元件连接Si基部基底和第一半导体元件的方式来制造另外十个样本。然后，测量它们的电气连接。结果，使用第二半导体元件的样本没有电气连接故障，意味着在所有十个样本中Si基部基底和第一半导体元件能够连接到一起。同时，在不使用第二半导体元件形成的十个样本中的两个样本中发现电气连接故障。该结果证实了使用第二半导体元件连接Si基部基底和第一半导体元件的优点。
[示例2]
准备了其上形成有突出电极的、尺寸为35mm×35mm的、由树脂构成的基部基底(下文中称为“树脂基部基底”)。突出电极具有与第一半导体元件相同的尺寸和结构，并以与第一半导体元件相同的图案来布置。使用上述第二半导体元件将上述第一半导体元件安装在树脂基部基底上。
为了这样做，首先，使用倒装芯片键合器将形成有通孔的第二半导体元件安装在树脂基部基底上，使得第二半导体元件的通孔和树脂基部基底的突出电极对准。接下来，使第一半导体元件的突出电极和第二半导体元件的通孔对准，并且使用倒装芯片键合器安装第一半导体元件。随后，在氮气下在回流炉中将层压件加热到240℃，使得树脂基部基底和第一半导体元件连接到一起。
相比较，不使用具有通孔的第二半导体元件将第一半导体元件安装在树脂基部基底上，并且在回流炉中加热层压件，使得第一半导体元件和树脂基部基底连接到一起。
在利用和不利用第二半导体元件的情况下来制造样本。具体地，以使用第二半导体元件连接树脂基部基底和第一半导体元件的方式来制造十个样本。以不使用第二半导体元件连接树脂基部基底和第一半导体元件的方式来制造另外十个样本。然后，测量它们的电气连接。结果，使用第二半导体元件的样本没有电气连接故障，意味着在所有十个样本中树脂基部基底和第一半导体元件能够连接到一起。同时，在不使用第二半导体元件形成的十个样本中的两个样本中发现电气连接故障。该结果证实了使用第二半导体元件连接树脂基部基底和第一半导体元件的优点。
如上所述，形成有通孔的基底(半导体元件、树脂基底、陶瓷基底等)夹在两个电子元件(半导体元件、电路板等)之间，并且在通孔内将这两个电子元件的突出电极连接到一起。这减小了安装期间的位移的风险并改进了电子元件之间的连接的可靠性。
此外，甚至在堆叠和连接三个或更多个电子元件的情况下，介入的电子元件(基底)的通孔具有引导的功能，并减小由在电子元件的堆叠期间的负载、振动以及其它原因导致的下电子元件的位移的风险。这允许通过一次回流焊连接三个或更多个堆叠的电子元件，从而导致生产率的改进。
这里提到的所有示例和条件语言旨在用于帮助读者理解发明人贡献的促进技术的发明和概念的教导目的，并且应理解为不限于这样特别提到的示例和条件，说明书中的这样的示例的组织也与本发明的优越和低劣的呈现无关。虽然已经详细描述了本发明的实施例，但是应理解在不背离本发明的精神和范围的情况下可以对本发明进行各种修改、替代和变更。

Claims (16)

1.一种半导体装置，包括：
具有第一突出电极的第一半导体元件；
具有第二突出电极的电子元件；以及
布置在所述第一半导体元件与所述电子元件之间的基底，其中
所述基底具有第一通孔，
所述第一突出电极和所述第二突出电极在所述第一通孔内连接到一起，
所述基底具有绝缘膜，所述绝缘膜覆盖所述第一通孔的侧壁并且暴露在所述第一通孔内，并且
所述第一突出电极的直径和所述第二突出电极的直径小于所述第一通孔的直径。
2.根据权利要求1所述的半导体装置，其中
所述第一半导体元件具有第二通孔，并且
所述基底具有配合在所述第二通孔中的第三突出电极。
3.根据权利要求1所述的半导体装置，其中
所述电子元件具有凹入部分，并且
所述基底具有配合在所述凹入部分中的第四突出电极。
4.根据权利要求1所述的半导体装置，其中
所述第一突出电极具有第一柱部分，
所述第二突出电极具有第二柱部分，并且
将所述第一柱部分的末端和所述第二柱部分的末端连接到一起的连接部分存在于所述第一通孔内。
5.根据权利要求1所述的半导体装置，其中所述电子元件是第二半导体元件。
6.根据权利要求1所述的半导体装置，其中所述电子元件是电路板。
7.根据权利要求1所述的半导体装置，其中所述基底是第三半导体元件。
8.根据权利要求1所述的半导体装置，其中所述基底是电路板、树脂基底、或陶瓷基底。
9.根据权利要求1所述的半导体装置，其中所述第一半导体元件与所述电子元件之间的空间和所述第一通孔内的空间填充有绝缘构件。
10.根据权利要求1所述的半导体装置，其中所述第一突出电极和所述第二突出电极之一或两者是螺柱凸起。
11.根据权利要求1所述的半导体装置，其中所述基底具有电气连接到所述第一半导体元件和所述电子元件之一或两者的导电部分。
12.一种制造半导体装置的方法，所述方法包括：
将具有第一通孔的基底放置在具有第一突出电极的电子元件上，使得所述第一突出电极配合在所述第一通孔中；
将具有第二突出电极的半导体元件放置在所述基底上，使得所述第二突出电极配合在所述第一通孔中；以及
在所述第一通孔内将所述第一突出电极和所述第二突出电极连接到一起，
其中，所述基底具有绝缘膜，所述绝缘膜覆盖所述第一通孔的侧壁并且暴露在所述第一通孔内，并且
其中，所述第一突出电极的直径和所述第二突出电极的直径小于所述第一通孔的直径。
13.根据权利要求12所述的方法，其中
所述半导体元件具有第二通孔，
所述基底具有第三突出电极，并且
将所述半导体元件放置在所述基底上包括：在将所述第二突出电极配合到所述第一通孔中的同时，将所述第三突出电极配合到所述第二通孔中。
14.根据权利要求12所述的方法，其中
所述电子元件具有凹入部分，
所述基底具有第四突出电极，并且
将所述基底放置在所述电子元件上包括：在将所述第一突出电极配合到所述第一通孔中的同时，将所述第四突出电极配合到所述凹入部分中。
15.根据权利要求12所述的方法，其中
将所述第一突出电极和所述第二突出电极连接到一起包括：通过连接部分，在所述第一通孔内将所述第一突出电极中包括的第一柱部分的末端和所述第二突出电极中包括的第二柱部分的末端连接到一起。
16.一种电子装置，包括：
半导体装置；以及
电路板，其上安装有所述半导体装置，其中
所述半导体装置包括
具有第一突出电极的半导体元件；
具有第二突出电极的电子元件；以及
布置在所述半导体元件与所述电子元件之间的基底，
所述基底具有通孔，
所述第一突出电极和所述第二突出电极在所述通孔内连接到一起，
所述基底具有绝缘膜，所述绝缘膜覆盖所述通孔的侧壁并且暴露在所述通孔内，并且
所述第一突出电极的直径和所述第二突出电极的直径小于所述通孔的直径。
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