CN102484100A - 在晶片上接合芯片的方法 - Google Patents

在晶片上接合芯片的方法 Download PDF

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Publication number
CN102484100A
CN102484100A CN2010800414172A CN201080041417A CN102484100A CN 102484100 A CN102484100 A CN 102484100A CN 2010800414172 A CN2010800414172 A CN 2010800414172A CN 201080041417 A CN201080041417 A CN 201080041417A CN 102484100 A CN102484100 A CN 102484100A
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chip
basic wafer
wafer
stacked
basic
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CN102484100B (zh
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M.温普林格
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EV Group E Thallner GmbH
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EV Group E Thallner GmbH
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    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C

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Abstract

用于将多个芯片（3）接合到在前侧包含芯片（3’）的基础晶片（1）上的方法，其中在基础晶片（1）的背侧以至少一个层堆叠芯片（3），并且在垂直相邻的芯片（3，3’）之间建立导电连接（7），所述方法具有以下的步骤：a）将基础晶片（1）的前侧（2）固定在载体(5)上，b）将至少一层芯片（3）放置在基础晶片（1）的背侧（6）上的定义位置中，和c）在与载体(5)固定的基础晶片（1）上热处理芯片（3，3’），其特征在于，在步骤c）之前，将基础晶片（1）的芯片（3’）至少部分地分隔成基础晶片（1）的分离的芯片堆叠片段（1c）。

Description

在晶片上接合芯片的方法
技术领域
本发明涉及一种根据权利要求1的方法。
背景技术
由于在半导体工业中占优势的微型化压力，需要可以用来制造所谓的“3D集成芯片”（3D IC）的方法。3D IC由芯片堆叠构成，在所述芯片堆叠中，多个芯片互相垂直地堆叠，并且存在着穿过硅通向垂直相邻芯片的连接。这些连接被称为“Through Silicon Via（穿过硅的通孔）”（TSV）。
人们期望这种芯片在较低成本的情况下具有更高的封装密度以及更高的效率。除此之外，可以由此制造新的类型和形式的芯片。对于3D IC的制造原则上考虑不同的方法，也就是将单个芯片很费时地堆叠到单个芯片上，也称为“芯片到芯片”（C2C）方法，或将晶片堆叠到晶片上，也称为“晶片到晶片”（W2W）方法。最后还讨论了所谓的芯片到晶片方法，“Chip to Wafer（芯片到晶片）”（C2W）。由于显著的技术问题，合理的技术转化迄今没有成功。本发明涉及一种用于制造3D IC的技术上可实施的C2W方法。
C2C方法由于低的生产量引起了较高的生产成本，并且因此在大规模生产中可能得不到应用。
W2W方法要求两个晶片具有同样的大小并且在两个晶片上的芯片具有同样的大小。在此的问题是，尤其是在较高芯片堆叠中的硅利用率低于平均水平（所谓的“产率”）。工作芯片处的可达到的芯片产率也比在C2C方法或C2W方法情况下的低。
在转化制造芯片堆叠或3D IC的C2W方法时的技术问题是：对尤其是其上堆叠有芯片的晶片的操作，以及对于堆叠过程和对于在印制电路板上或原则上在上级封装单元上用于安装的芯片连接器（接口）的不同要求，尤其是温度。
基础晶片的操作因此具有重要的意义，因为在分离晶片上的多个芯片堆叠之前不久的基础晶片的断裂可能导致上千个昂贵芯片的报废。基础晶片越薄和/或面积越大，对其上固定/接合有多个芯片堆叠的基础晶片的操作则越困难。将在其上以C2W方法堆叠芯片的晶片称为基础晶片。
US2007/001281 A1涉及一种用于制造半导体存储器的方法，其中为了简化生产物流，在制造存储器芯片时将芯片堆叠在基础晶片上并然后以树脂浇铸。在浇铸之后，将存储器芯片与其相邻的存储器芯片分离。在制造时，尤其是在浇入存储器芯片时以及在从载体脱开时和在可能的随后的过程步骤中，成问题的尤其是各种构件的存在于芯片堆叠中的不同材料的不同热膨胀。
发明内容
本发明的任务是，说明一种以尽可能高的生产量来制造尽可能准确定位的芯片堆叠（3D IC）的尽可能没有废品的方法。
该任务用权利要求1的特征来解决。在从属权利要求中说明了本发明的有利的改进方案。由至少两个在说明书中、在权利要求和/或附图中所说明的特征构成的所有组合也落入本发明的范围。在所说明的数值范围的情况下，位于所述极限内的值显然也应视作为极限值，并且可以以任意的组合要求保护。
本发明所基于的思想在于，至少在基础晶片上堆叠芯片期间和在芯片的热处理期间，对基础晶片进行固定以在载体上接合晶片或将基础晶片与载体连接，并且最晚在热处理之前至少部分地分隔基础晶片，尤其是分隔成优选互相分离的芯片堆叠片段。
通过在载体上固定基础晶片，可以用C2W方法的令人惊奇的生产量优点将芯片堆放或将芯片放置在基础晶片上的定义位置中的方法步骤与将芯片热处理或接合在基础晶片上的（一个或多个）方法步骤分离。当热处理或接合步骤—根据所使用的材料—可能持续很长时间时，芯片在基础晶片上的定位或堆叠和放置是可以很顺畅运行的方法步骤，例如以每小时若千个芯片运行。此外，如果基础晶片在热处理时还以分隔成较小部分的方式存在，则不同构件/材料的热膨胀显然较少影响芯片堆叠的质量。芯片堆叠由于分隔的原因较少地由于不同的膨胀而受到应力。
由此可以提高生产量，其方式是设置多个热处理室/接合站，和/或在一个热处理室/接合站中加工具有堆叠的芯片的多个基础晶片。作为热处理室考虑热板、直通式加热炉或类似物。可以用允许在热处理过程期间施加压力到芯片上的修改过的晶片接合室来实现特别有利的过程。
与另外的方法相比较，特别有利的是在本方法中可以堆叠不同大小的芯片的可能性。
此外，通过使用不仅仅松散地与基础晶片相连接的载体可以补偿基础晶片的应力或翘曲，或抵制这些应力或翘曲。
所述操作还被进一步简化，其方式是，载体至少部分地由硅和/或玻璃构成，并且基本上对应于基础晶片的大小，尤其是在半径上偏离该基础晶片不多于10 mm、尤其是5 mm、优选2 mm、更优选1 mm。
特别有利的固定装置是负压或真空、静电装置、机械夹具和/或粘合剂，其中优选使用耐热的粘合剂，以便在热处理时的高温情况下也确保将基础晶片可靠地固定在载体上。不同的固定装置或效应的组合在此—根据要建立连接的方式或芯片堆叠的高度或由于其它的因素—可以导致进一步改善的操作。
在本发明的一种优选的实施形式中，对施加到垂直相邻芯片上的导电薄片的对准和接触直接在定义位置中放置芯片时分别用相对应的位于其下的芯片层的导电连接来进行。
芯片产率可以在本方法中有利地通过如下方式来改进，即在放置芯片时注意将芯片仅放置到位于其下层的工作的芯片上。更优选的是，检查所有与要放置的芯片在工作时相连接的芯片的功能，并且只有在所有在工作时与该芯片要连接的芯片起作用时才放置芯片。
在热处理时或在接合步骤中，在晶片和放置在其上的芯片之间或在所放置的芯片之间产生导电连接。在此情况下有利的是，在优选没有氧气的合适气氛中进行加热，以便避免金属接触面的氧化。这尤其是可通过采用氮气气氛或另一种例如氩的惰性气氛来达到，其中对于有些应用特别有利的是不仅惰性的而且也还原的气氛。这种特性例如可以通过氮氢混合气或蚁酸蒸气来达到。氮氢混合气在此可以通过H2与N2的混合—尤其是在2% H2对98% N2和15% H2对85% N2之间的混合—形成。在该混合物中，也可以由另外的惰性气体来代替N2。
为了在放置芯片之后更好地操作芯片并且芯片不滑动，有利的是将芯片在放置之后预固定，尤其是优选用在随后的接合步骤期间蒸发的有机粘合剂来粘合芯片。替代地可以通过有利地自发地在室温下例如在Si面、SiO2面或SiN面之间形成的分子连接来固定芯片。一种另外的替代方案是超声焊接。
有利地在温度＜2800C、尤其是＜2500C、优选＜2200C的情况下尤其是连续地（durchgängig）进行热处理。根据本发明所采用的粘合剂必须适用于上述的温度，其中这样的粘合剂在不久前才完全可供使用。这种粘合剂的示例是美国Brewer-Science公司的HAT系列。
在本发明的一种特别的扩展方案中，基础晶片尤其是通过背面研磨（Rückdünnen）具有少于200μm、尤其是少于100μm、优选少50μm、更优选少于20μm的厚度。
特别是许多芯片容纳在具有至少200 mm、尤其是至少300 mm、优选至少450 mm的直径的基础晶片上。
在本发明的一种特别的实施形式中，由于本发明才可以在步骤b或c之后施加焊珠（所谓的“solder bump（焊料块）”或“C4-bump（C4块）”）以将每个芯片堆叠与电路板或原则上与上一级的封装单元相连接。
焊珠由具有低熔点的金属合金构成，并且一般用来将芯片/芯片堆叠与另外的电气/电子构件相连接。
尤其是在使用具有贯穿基础晶片的导电连接（TSV）的基础晶片时有利的是，将在步骤b或c之后的芯片或芯片堆叠浇入到尤其是通过高的热稳定性和/或机械稳定性和/或排水特性表征的物质中，所述物质尤其是由有机材料和/或由陶瓷材料构成。特别优选一种实施形式，在该实施形式中，在所述物质中至少部分地包含环氧树脂，或者所述物质完全由环氧树脂构成。在本发明的一种特别的实施形式中，包含环氧树脂的物质可以用纤维强化。有利地，在室温下或在更高的温度下来浇入液态形式的物质。
在本发明的一种有利的实施形式中，在浇入之后对所述物质施加压力，这尤其是通过在大气压力下、优选在真空中执行浇入之后卸压到大气压力来进行。此外，由此达到了用所述物质来充填可能的缝隙和/或空腔，这有益于芯片堆叠的长时间可靠性。
通过优选热固性物质的作用，可以有利地在浇入之后从载体上取下基础晶片。
在本发明的一种优选的实施形式中如此加工所述物质，即在浇入之后或在浇入期间将所述物质放入与基础晶片相对应的基本模型中和/或将物质剥离、尤其是磨削至芯片的最上层。由此进一步简化了对由基础晶片、所浇入的芯片和所述物质构成的物体的继续操作，并且尤其是可以动用对于操作已知的设计。通过剥离所述物质，可以有利地将冷却体施加到最上层上，其方式是提供精确平整的表面。
本发明的一种特别优选的实施形式在于，基础晶片和/或载体由硅构成，也就是载体同样是晶片。该载体可用已知的设计来操作并且具有以下的附加优点，即只要基础晶片和载体由硅构成，则载体的热膨胀系数是同样的。
附图说明
由优选实施例的以下描述以及借助附图得出了本发明的其它的优点、特征和细节。所述附图在如下图中示出：
图1：用于实施本发明方法的设备的构造，
图2a：本发明基础晶片的示意图，
图2b：本发明的临时接合步骤的示意图，
图2c：本发明背面研磨步骤的示意图，
图2d：用于构成基础晶片中的导电连接的本发明步骤的示意图，
图2e：背侧金属化、尤其是将导电薄片施加到基础晶片的表面上的本发明步骤的示意图，
图2f：本发明的定位步骤和热处理步骤的示意图，
图2g：本发明浇入步骤的示意图，
图2h：用于将载体与基础晶片脱开的本发明脱开步骤的示意图，
图2i：本发明清洁步骤的示意图，
图2k：用于施加焊珠的本发明步骤的示意图，
图2l：本发明的施加到薄膜框架上的示意图，
图2m：本发明分离步骤的示意图，
图2n：本发明芯片堆叠的示意图。
具体实施方式
在这些图中用相同的附图标记标明相同的构件和具有相同功能的构件。
在图1中示出了用于实施本发明方法的设备的示意性构造，其中在将基础晶片1在站B.1上安装或以其它方式例如预安装到载体5上并且在薄膜揭除站B.2上揭下了从以前的背面研磨过程中存在的背面研磨薄膜（back grinding tape（背面研磨带））之后，在区域A中进行根据图2f的将芯片层放置在基础晶片1上。
经由具有机器人臂R的机器人B.3进行对具有基础晶片1的载体5的操作。
在操作模块B上设置了盒式站B.4，从该盒式站B.4中提取或再次输出对于制造芯片堆叠16的方法所需要的材料和/或构件。
在芯片放置系统A中放置了芯片之后，将具有基础晶片1和在基础晶片1上堆叠的必要时经由粘合剂固定的芯片9的载体5引导到接合站C以用于热处理或用于将芯片接合到基础晶片1上。在热处理期间或在接合期间，已经可以用芯片9装配下一个基础晶片1。接合站C也可以由多个接合单元构成，因为接合—按照要求概况—尤其是与芯片的放置相比可能需要大量的时间。
对于接合在基础晶片1上的芯片堆叠16的其它处理步骤—诸如在切割（Dicing）模块中分离芯片堆叠16—在附图1中没有示出，但是这些其它处理步骤可以连接到接合站C上，或优选设置在操作模块B的区域中，也就是在图1中设置在操作模块B之上，以便可以通过机器人臂R来操作芯片堆叠16。在本发明的一种优选的实施形式中，载体5也还可以在切割模块中采用，由此在与基础晶片1接合之后也可以继续可靠地操作芯片堆叠16。
在图2a中示出了由硅构成的基础晶片1，该基础晶片1的前侧2通过以前的处理步骤装配有导电薄片3’，这些导电薄片3’探出了前侧2的表面。
基础晶片1由放入到前侧2中的分隔槽17划分成芯片堆叠片段1c。分隔槽17以有利的方式仅在基础晶片1的一部分厚度上延伸，也就是延伸到基础晶片在稍后的步骤中从其背侧进行背面研磨的那样深。
基础晶片1根据图2b经由连接剂4与载体5—在这里同样是由硅构成的晶片—相连接，以便可以从基础晶片1的背侧6来背面研磨（参阅图2c）。在此，基础晶片1以及因此芯片堆叠片段1c在背面研磨时被准自动地分隔，由此稍后的、尤其是不同的热膨胀对于芯片堆叠的质量具有显著较小的影响。
根据图2d，在基础晶片1背侧6的每个薄片3’的区域中，建立了从基础晶片1的背侧6达到相应薄片3’的电连接7。
在基础晶片1的背侧6上，为了电接触设置在芯片9处的导电薄片3，将导电薄片8施加到导电连接7上（参阅图2c）。 在本发明的特定实施形式中，芯片9也可以直接与导电连接7接触，或建立另外的导电连接点。
根据图2f，芯片9以其设置在下侧10处的薄片3被施加到导电薄片8上。该过程顺序可以在各个放置步骤之间有或没有热处理步骤或接合步骤的情况下来进行。将芯片9放置在基础晶片1上在芯片放置站A上进行。
在根据图2g的方法步骤中，芯片9被浇入到在本实施例中为环氧树脂的物质11中。由于在浇铸步骤之前的本发明之前的分隔，可能的热膨胀尤其是在材料的热膨胀系数不同的情况下产生显著较少的影响。
有利地通过合适的材料选择或材料配对，可以借助毛细管作用，必要时通过施加压力辅助地来充填如在图2n中可明显看到的空腔18。
在接合芯片9和使物质11固化之后可以除去载体5，因为通过物质11实现了薄的基础晶片1的足够的稳定化。载体5的脱开可以自动地通过在根据图2g的浇入步骤中溶解连接剂4来（与热有关地）进行。此外可能有利的是，在后面的过程步骤中单独地执行脱开步骤，其中可以要么以热学、化学方式要么通过外部能量源（例如UV光、红外光、激光或微波）的作用来触发脱开步骤。
在图2h中脱开了载体5，并且在图2i中，尤其是通过在清洁步骤中的清洁除去了连接剂4。
在根据图2k的方法步骤中，旋转基础晶片1以将焊珠12施加到薄片3’上（参阅图2i），使得前侧2从现在起指向上方。焊珠12用来将芯片堆叠16（3D IC）在稍后连接到电路板或高一级的封装单元/芯片层上。
作为在薄片3，3’，8和/或芯片9之间连接的材料有一系列的变型可以考虑。原则上可以在金属化合物、有机化合物、无机化合物和混合化合物之间进行区分。在金属化合物的范围中可以考虑金属扩散化合物、在接合期间形成的共晶化合物、以及在接合之前已经存在的和在接合期间实现了合金熔化的共晶体。后面的这些也是以球的形式施加到薄片3，3’上并且能够在实际上不施加压力的情况下建立连接的焊珠12。还可以考虑传导的聚合物。
在根据图2l的方法步骤中，具有芯片堆叠16和焊珠12的基础晶片1被放在固定在分割框架13（Dicing Frame（分割框架））处的薄膜14上，以便随后根据图2m将芯片堆叠16互相分离（分割）。在分隔槽17的区域中，尤其是与基础晶片1正交地进行分离。作为结果获得了在图2n中示出的分隔开的芯片堆叠16（3D IC），该芯片堆叠16（3D IC）由基础晶片1的芯片堆叠片段1c构成，该芯片堆叠片段1c具有贯穿基础晶片1的导电连接7（通孔）、经由导电薄片3，8连接到通孔7的芯片9、以及安放到薄片3’处的焊珠12和物质11。
附图标记列表
A 芯片放置站
B 操作模块
B.1 转送站
B.2 薄膜揭除站
B.3 具有机器人臂的机器人
B.4 盒式站
C 接合站
R 机器人臂
1 基础晶片
1c 芯片堆叠片段
2 前侧
3，3’导电薄片
4 连接剂
5 载体
6 背侧
7 导电连接
8 导电薄片
9 芯片
10 下侧
11 物质
12 焊珠
13 分离框架
14 薄膜
16 芯片堆叠
17 分隔槽
18 空腔

Claims (15)

1.用于将多个芯片（9）接合到基础晶片（1）上的方法，其中将芯片（9）以至少一层堆叠在基础晶片（1）上，并且建立用于连接其它垂直相邻芯片的导电连接（7），所述方法具有以下的步骤：
a）将基础晶片（1）固定在载体（5）上；
b）将至少一层芯片（9）放置在基础晶片（1）上的定义位置中，和
c）在与载体（5）固定的基础晶片（1）上对芯片（9）进行热处理,
其特征在于，在步骤c）之前，将基础晶片（1）至少部分地分隔成基础晶片（1）的分离的芯片堆叠片段（1c）。
2.按照权利要求1的方法，其中在不同的设备中实施步骤b）和c）。
3.按照以上权利要求之一的方法，其中为了固定使用固定装置，尤其是真空、静电装置、机械夹具和/或粘合剂，优选耐热的粘合剂。
4.按照以上权利要求之一的方法，其中在将芯片（9）放置在定义位置中时，将施加在芯片（9）上的导电薄片（3）分别与相对应的导电薄片（8）对准和接触以连接位于其下的芯片层。
5.按照以上权利要求之一的方法，其中在放置之后，优选用有机粘合剂来粘接芯片（9），或通过分子连接来固定芯片（9）。
6.按照以上权利要求之一的方法，其中在温度＜2800C、尤其是＜2500C、优选＜2200C的情况下，尤其是连续地进行热处理。
7.按照以上权利要求之一的方法，其中在步骤b）或c）之后，将芯片（9）或芯片堆叠（16）浇入到尤其是通过高的热稳定性和/或机械稳定性和/或化学稳定性和/或排水特性来表征的物质（11）中，所述物质（11）尤其是由有机材料、优选环氧树脂构成或由陶瓷材料构成。
8.按照权利要求7的方法，其中在浇入之后从载体（5）取下基础晶片（1）。
9.按照权利要求7或8的方法，其中在浇入之后或在浇入期间，将具有物质（11）和浇入在物质（11）中的芯片（9）的基础晶片（1）放入到与基础晶片（1）相对应的基本模型中，和/或将物质（11）剥离、尤其是磨削至芯片（9）的最上层。
10.按照以上权利要求之一的方法，其中在步骤b）或c）之后，尤其是在浇入之后，施加焊珠（12）以将每个芯片堆叠（16）与电路板或另一芯片相连接。
11.按照以上权利要求之一的方法，其中基础晶片（1）和/或载体(5)至少绝大部分由硅构成。
12.按照以上权利要求之一的方法，其中将至少两层芯片（9）施加到基础晶片（1）上。
13.按照权利要求1至6之一的方法，其中在步骤b）或c）之后，用物质（11）、尤其是热塑性材料来热压印芯片（9）或芯片堆叠。
14.按照以上权利要求之一的方法，其中在将芯片堆叠（16）与相邻的芯片堆叠（16）分离之前，将具有堆叠在其上的芯片（9）的基础晶片（1）固定在分离框架（13）上。
15.按照以上权利要求之一的方法，其中在背面研磨时对基础晶片（1）进行分隔。
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