TWI512940B - 將晶片接合於晶圓上之方法 - Google Patents

將晶片接合於晶圓上之方法 Download PDF

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Publication number
TWI512940B
TWI512940B TW099131886A TW99131886A TWI512940B TW I512940 B TWI512940 B TW I512940B TW 099131886 A TW099131886 A TW 099131886A TW 99131886 A TW99131886 A TW 99131886A TW I512940 B TWI512940 B TW I512940B
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Taiwan
Prior art keywords
wafer
wafers
stack
substrate
carrier
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TW099131886A
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English (en)
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TW201133772A (en
Inventor
Markus Wimplinger
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Ev Group E Thallner Gmbh
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Publication of TW201133772A publication Critical patent/TW201133772A/zh
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Publication of TWI512940B publication Critical patent/TWI512940B/zh

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Description

將晶片接合於晶圓上之方法
本發明係關於一種如請求項1中所主張的方法。
由於半導體產業中盛行的小型化壓力，需要可用於生產所謂「三維積體晶片」(3D IC)的方法。3D IC由晶片堆疊組成，其中若干晶片垂直堆疊於彼此頂部上且存在穿過矽之至垂直鄰近晶片之連接。稱該等連接為「穿矽導通體」(TSV)。
此等晶片確保高封裝密度及在較低成本下的較高效能。此外，以此方式可生產新穎類型及新穎形式之晶片。完全不同之方法可用於生產3D IC，尤其是頗為耗時地將個別晶片堆疊於個別晶片上(亦稱為「晶片至晶片」(C2C)方法)，或將晶圓堆疊於晶圓上(亦稱為「晶圓至晶圓」(W2W)方法)。最後，亦討論所謂的「晶片至晶圓(C2W)」方法。由於主要技術問題，迄今為止尚未達成一合理的技術實施方案。本發明係關於用於生產3D IC之一技術上可行C2W方法。
由於低產出量，C2C方法導致較高的生產成本且因此可能難以用於大量生產。
W2W方法需要兩個晶圓具有相同尺寸且在該兩個晶圓上的晶片具有相同尺寸。此處問題在於尤其對於較高晶片堆疊的矽利用率在平均值以下(所謂良率)。可獲得之功能性晶片的良率低於C2C或C2W方法中的良率。
在實施用於生產晶片堆疊或3D IC的一C2W方法中的技術問題在於晶圓(尤其係其等上堆疊有晶片之晶圓)的處置，以及對於堆疊製程及對於將晶片安裝至電路板上或基本上較高階封裝單元的連接器(介面)的變動需求，尤其是溫度。
由於在晶圓上的複數個晶片堆疊分離之前不久基底晶圓之破裂可導致報廢數千個昂貴晶片，因此基底晶圓之處置獲得高度重視。基底晶圓愈薄及/或面積愈大，具有複數個晶片堆疊固定/接合於其上的基底晶圓之處置變得愈困難。基底晶圓係以C2W方法將晶片堆疊於其上之晶圓。
US 2007/001281 A1係關於一種用於生產一半導體記憶體的方法，其中將晶片堆疊於基底晶圓上且接著罐封於樹脂中以簡化記憶體晶片生產中的生產運籌(production logistics)。在罐封之後，使記憶體晶片從其等鄰近的記憶體晶片分離。特定而言，在生產期間(主要在罐封記憶體晶片時及在從載體釋放及可能後續製程步驟中)，存在於晶片堆疊中的相異組件之不同材料的不同熱膨脹成為一問題。
本發明目的在於設計一種用於生產儘可能準確定位之晶片堆疊(3D IC)而產出量儘可能高的儘可能無報廢之方法。
此目的係藉由請求項1之特徵達成。本發明之有利發展在附屬項中給定。說明書中、申請專利範圍中及/或圖式中給定的特徵之至少兩者的所有組合落於本發明架構中。對於給定的值範圍，在所指示之限制內的值亦將被認為揭示為邊界值且可在任何組合中主張。
本發明係基於下列思想：至少在將晶片堆疊於基底晶圓上期間固定該基底晶圓，且在熱處理晶片以用於接合期間將晶圓固定於一載體上或將其連接至該載體，以及最遲在熱處理之前至少部分地分離基底晶圓，尤其分離為較佳已彼此分離的晶片堆疊區段。
藉由將基底晶圓固定在載體上，可在對於C2W方法之產出量擁有一令人驚訝之優點的情況下使將晶片堆疊或放置於基底晶圓上之預定義位置中的製程步驟與熱處理或接合基底晶圓上之晶片之(若干)製程步驟分離。在熱處理或接合步驟時，取決於所使用材料，可能花費極長時間，晶片在基底晶圓上之定位或堆疊及放置係可極迅速進行(例如以每小時幾千個晶片)的一製程步驟。當在熱處理期間基底晶圓此外呈現為分離成較小部分時，不同組件/材料之熱膨脹對晶片堆疊品質具有一小得多之影響。由於分離，晶片堆疊較不會因不同膨脹而應變。
以此方式，可藉由存在若干熱處理腔室/接合台及/或藉由在一熱處理腔室/接合台中處理具有堆疊晶片的若干基底晶圓而增加產出量。熱處理腔室可為熱板、連續式爐或類似物。一尤其有利的製程可用經修改之晶圓接合腔室實施，此致使可在熱處理製程期間施加壓力至晶片。
與其他方法相比較，在此方法中能夠堆疊不同尺寸之晶片的可能性尤其有利。
藉由使用並非僅鬆散地接合至基底晶圓的一載體，可等化或抵消基底晶圓之應力及曲度。
藉由至少部分由矽及/或玻璃組成且實質上對應於基底晶圓之尺寸的載體可再進一步簡化處置，特定而言使載體在半徑上與基底晶圓偏離不大於10毫米，特定而言不大於5毫米，較佳不大於2毫米，甚至更佳不大於1毫米。
尤其較佳的固定構件為一負壓或真空靜電構件、機械夾箝及/或黏著劑，較佳為經使用以便確保在熱處理中即使在高溫下亦穩固地將基底晶圓固定於載體上的耐熱黏著劑。取決於將建立之連接類型或晶片堆疊之高度或者歸因於其他因素，不同固定構件或效果之組合可導致進一步改良處置。
在本發明的一較佳實施例中，施覆至垂直鄰近之晶片的導電薄層之對準及接觸形成直接在將晶片放置於預定義位置中時與晶片下伏層之對應導電連接同時發生。
此方法中的晶片良率可有利地改良，因為在晶片放置期間觀察到晶片僅放置於晶片下伏層之功能性晶片上。甚至更佳地，檢查功能性接合至待放置的晶片之所有晶片之功能，且一晶片經放置僅具有功能性接合至該晶片之所有晶片的功能。
在熱處理或接合步驟中，在晶圓與放置於該晶圓上之晶片之間或所放置的晶片之間產生導電連接。此處有利的是在一適當氛圍較佳為無氧之氛圍中進行加熱，因此避免金屬接觸表面氧化。特定而言此可藉由使用氮氣氛圍或另一惰性氛圍(例如氬氣)達成，對於許多應用，不僅惰性氛圍而且還原性氛圍均為尤其有利的。此性質例如可藉由合成氣體或甲酸蒸汽達成。合成氣體可藉由混合H2與N2形成，特定而言為2%之H2至98%之N2與15%之H2至85%之N2之間。在此混合物中，N2亦可由其他惰性氣體代替。
因此晶片可經更好地處置且在其等放置之後不會滑動，有利的是在放置之後預固定該等晶片，特定而言固定該等晶片，較佳使用在隨後接合步驟期間蒸發的一有機黏著劑而固定。或者晶片可藉由有利地在室溫下例如介於Si表面、SiO2表面或SiN表面之間自發形成的分子連接而固定。另一替代為超音波焊接。
有利地，熱處理尤其連續地在小於280℃、尤其小於250℃、較佳小於220℃之一溫度下發生。如本發明中主張使用的黏著劑必須適用於前述溫度，此等黏著劑僅在最近才可完全獲得。此等黏著劑之一實例為來自美國的Brewer-Science公司之HAT系列。
在本發明的一特定組態中，基底晶圓尤其因背部研磨而具有小於200微米、尤其小於100微米、較佳小於50微米、更佳小於20微米的一厚度。
特定而言許多晶片可容納於具有至少200毫米、尤其至少300毫米、較佳至少450毫米之一直徑的一基底晶圓上。
在本發明的一特定實施例中，僅可藉由本發明在步驟b或c後施覆焊料凸塊或C4凸塊以將各個晶片堆疊連接至一板或基本上下個高階封裝單元
焊料凸塊由具有一低熔點的一金屬合金組成且通常用於將晶片/晶片堆疊連接至其他電組件/電子組件。
特定而言，當使用一基底晶圓而其具有穿透該基底晶圓之導電連接(TSV)時，有利的是在步驟b或c之後將晶片或晶片堆疊罐封於一塊體中，該塊體之特徵尤其為高熱及/或機械穩定性及/或防水性質，尤其為由有機及/或陶瓷材料製成之一塊體。塊體中含有至少部分環氧樹脂或塊體完全由環氧樹脂形成的一實施例尤其較佳。在本發明的一特定實施例中，含有環氧樹脂之塊體可經纖維增強。
有利地，在室溫下或在一較高溫度下以液體形式灌注塊體。
在本發明的一有利實施例中，在罐封之後可對該塊體加壓，尤其藉由在低於大氣壓力下(較佳在真空中)執行罐封之後釋放至大氣壓力。此另外導致可能的空隙及/或孔穴用塊體填充；此促成晶體堆疊的長期可靠性。
在罐封之後藉由較佳硬質塑膠塊體之作用可有利地從載體取走基底晶圓。
在本發明的一較佳實施例中，塊體運作使得在罐封之後或罐封期間塊體產生對應於基底晶圓之基本形式，及/或移除塊體直至晶片之最上層，尤其磨掉該塊體。此額外地簡化由基底晶圓、經罐封的晶片及塊體組成之本體的進一步處置，且可使用特別熟知之構造以供處置。藉由移除塊體，可經由所形成的一精確平坦表面而將一冷卻本體有利地施覆至最上層。
本發明的一尤其較佳實施例在於基底晶圓及/或載體由矽組成，因此載體同樣為一晶圓。其可用已知構造處置且具有額外優點，即：就基底晶圓及載體均由矽組成而言載體之熱膨脹係數為相同。
從下列較佳例示性實施例描述且使用圖式將明白本發明的其他優點、特徵及細節。
在圖式中具有相同功能的相同組件及部分用相同元件符號識別。
圖1繪示用於執行本發明中主張之方法的一單元之示意性結構，在台B.1處的基底晶圓1已被安裝或以某一其他方式(例如)預安裝於載體5上之後，在區域A中晶片層在基底晶圓1上的放置如圖2f中所示般進行，且在帶移除台B.2處自一先前背部研磨製程起存在的一背部研磨帶已被移除。
具有基底晶圓1之載體5經由具有一機械臂R的一機器人B.3處置。
在處置模組B上存在一匣式台B.4，用於生產晶片堆疊16的方法所需之材料及/或組件從該匣式台B.4移除或再次遞送。
在晶片放置於晶片放置系統A中之後，具有基底晶圓1及堆疊於基底晶圓1上且視需要經由一黏著劑固定之晶片9的載體5被傳送至接合台C以用於熱處理或將晶片接合至基底晶圓1上。在熱處理期間或接合期間，下個基底晶圓1可與晶片9一起提供。由於取決於需求規範，接合可能花費大量時間(特別是與晶片的放置相比較)，故接合台C亦可由若干接合單元組成。
關於接合於基底晶圓1上的晶片堆疊之其他處理步驟(諸如(例如)在一切割模組中分離晶片堆疊16)未繪示於圖1中，但可緊隨於接合台C或較佳可定位於處置模組B之區域中，因此圖1中在處置模組B上方使得可經由機械臂R處置晶片堆疊16。在本發明的一較佳實施例中，載體5亦可在切割模組中使用，以致即使在與基底晶圓1接合之後晶片堆疊16亦可繼續經安全處置。
圖2a繪示前部2具有導電薄層3'的矽基底晶圓1，該導電薄層3'藉由前述處理步驟從前部2之表面突出。
在前部2中形成的切割凹槽17將基底晶圓1分成晶圓堆疊區段1c。切割凹槽17僅有利延伸跨越直至基底晶圓在一稍後步驟中從其背部起經背部研磨的該基底晶圓1之厚度部分。
如圖2b中繪示之基底晶圓1經由連接構件4而連接至載體5(此處同樣為一矽晶圓)以便可從基底晶圓1之背部6進行背部研磨(參見圖2c)。此處基底晶圓1且因此晶片堆疊區段1c在背部研磨期間大致上自動分離，以致稍後特定而言不同熱膨脹對晶片堆疊之品質具有一小得多的影響。
如圖2d中所繪示，在各個薄層3'之區域中，從基底晶圓1之背部6延伸至各自薄層3'的電連接7係自基底晶圓1之背部6產生。
導電薄層8被施覆至基底晶圓1之背部6上的導電連接7，以用於晶片9上的導電薄層3之電接觸形成(參見圖2e)。在本發明之特定實施例中，晶片9亦可與導電連接7直接接觸，或者可製造其他導電鏈結點。
如圖2f中繪示，將具有配置於底側10上之薄層3的晶片9施覆於導電薄層8。可在個別放置步驟之間具有或不具有一熱處理步驟或接合步驟而發生此製程序列。晶片9在基底晶圓1上的放置發生於晶片放置台A處。
在圖2g中繪示的製程步驟中，晶片9被罐封至一塊體11中，在此例示性實施例中該塊體11為環氧樹脂。歸因於本發明中主張的先前分離，在罐封步驟前任何熱膨脹影響皆很小，對於材料之不同熱膨脹係數尤為如此。
如圖2m清楚繪示，孔穴18可藉由適當之材料選擇或經由毛細管作用搭配而有利填充，視需要藉由加壓予以支撐。
由於塊體11充分穩定薄晶圓1，因此在接合晶片9及設定塊體11之後，可移除載體5。如圖2g中繪示可在罐封步驟中藉由鬆開連接構件4而自動拆卸載體5(取決於熱)。此外在一下游製程步驟中分離地執行拆卸步驟可能是有利的，且該拆卸步驟可經熱啟動、化學啟動或藉由一外部能源(例如UV光、紅外線光、雷射或微波)之作用啟動。
在圖2h中，載體5已被拆卸，且在圖2i中，連接構件4被移除，特定而言藉由在一清潔步驟中清潔而移除。
在如圖2j中所繪示的製程步驟中基底晶圓1已被翻轉，以用於將焊料凸塊12施覆於薄層3'(參見圖2i)使得前部2現在朝上。焊料凸塊12用於稍後將晶片堆疊16(3D IC)連接至板或下個較高階封裝單元/晶片層。
一系列版本可作為用於薄層3、3'、8及/或晶片9之間連接的材料。基本上可在金屬化合物、有機化合物、無機化合物及混合化合物之間加以區分。在金屬化合物域內，金屬擴散連接、在接合期間形成的共晶連接及在接合之前已存在且在接合期間可熔化合金的共晶係可行的。
後者亦為以球體形式施覆於薄層3、3'且可實質上在不施加壓力情況下產生連接的焊料凸塊12。傳導性聚合物亦可行。
在圖2k中繪示的製程步驟中，具有晶片堆疊16及焊料凸塊12的基底晶圓1沈積於附接至切割框架13的一帶14上，以便接著如圖21中繪示將晶片堆疊16彼此分離(切割)。分離發生在切割凹槽17之區域內，特定而言正交於基底晶圓1。因此獲得圖2m中繪示的分離式晶片堆疊16(3D IC)，其由具有導電連接7(導通體)(其等穿透基底晶圓1)之基底晶圓1之晶片堆疊區段1c、透過導電薄層3、8連接至導通體7的晶片9、附接至薄層3'之焊料珠12及塊體11組成。
1．．．基底晶圓
1c．．．晶片堆疊區段
2．．．前部
3、3'．．．導電薄層
4．．．連接構件
5．．．載體
6．．．背部
7．．．導電連接
8．．．導電薄層
9．．．晶片
10．．．底側
11．．．塊體
12．．．焊料凸塊
13．．．切割框架
14．．．帶
16．．．晶片堆疊
17．．．切割凹槽
18．．．孔穴
A．．．晶片放置台
B．．．處置模組
B.1．．．轉移台
B.2．．．帶移除台
B.3．．．具有機械臂的機器人
B.4．．．匣式台
C．．．接合台
R．．．機械臂
圖1繪示用於實施本發明中主張的方法的一單元之結構；
圖2a繪示本發明中主張的一基底晶圓之一示意圖；
圖2b繪示本發明中主張的一暫時接合步驟之一示意圖；
圖2c繪示本發明中主張的背部研磨步驟之一示意圖；
圖2d繪示本發明中主張的用於在基底晶圓中形成導電連接的步驟之一示意圖；
圖2e繪示本發明中主張的背側金屬化，尤其係施覆導電薄層至基底晶圓之表面的步驟之一示意圖；
圖2f繪示本發明中主張的定位步驟及熱處理步驟之一示意圖；
圖2g繪示本發明中主張的罐封步驟之一示意圖；
圖2h繪示本發明中主張的用於將一載體從基底晶圓拆卸的拆卸步驟之一示意圖；
圖2i繪示本發明中主張的清潔步驟之一示意圖；
圖2j繪示本發明中主張的用於施覆焊料凸塊的步驟之一示意圖；
圖2k繪示本發明中主張的施覆至一膜框架之一示意圖；
圖2l繪示本發明中主張的一切割步驟之一示意圖；及
圖2m繪示本發明中主張的晶片堆疊之一示意圖。
A．．．晶片放置台
B．．．處置模組
B.1．．．轉移台
B.2．．．帶移除台
B.3．．．具有機械臂的機器人
B.4．．．匣式台
C．．．接合台
R．．．機械臂

Claims (21)

  1. 一種將複數個晶片接合(bonding)於一基底晶圓上之方法，該等晶片在該基底(base)晶圓上堆疊成至少一層，且建立導電連接以用於連接進一步垂直鄰近之晶片，該方法利用下列步驟：a)將該基底晶圓固定在一載體上，b)將至少一層晶片放置在該基底晶圓上之預定義位置內，及c)熱處理固定於該載體上的該基底晶圓上之該等晶片，該方法特徵為：在步驟c)之前，使該基底晶圓至少部分分離為該基底晶圓的分離式晶片堆疊區段(separated chip stack sections)。
  2. 如請求項1之方法，其中步驟b)及c)在不同裝置中執行。
  3. 如請求項1或2之方法，其中使用固定構件以供固定。
  4. 如請求項1或2之方法，其中在將該等晶片放置於預定義位置中時施覆於該等晶片之導電薄層經對準且經接合至一對應導電薄層以用於晶片下伏層之連接。
  5. 如請求項1或2之方法，其中在放置之後該等晶片較佳用一有機黏著劑或藉由分子連接而黏著。
  6. 如請求項1或2之方法，其中熱處理連續地在小於280℃發生。
  7. 如請求項1或2之方法，其中在步驟b)或c)之後，該等晶片或晶片堆疊係罐封(potted)於一塊體(mass)中，該塊體為高熱及/或機械及/或化學穩定性及/或防水性質。
  8. 如請求項7之方法，其中在罐封之後從該載體移除該基底晶圓。
  9. 如請求項7之方法，其中在罐封之後或罐封期間使具有該塊體及罐封於該塊體中之該等晶片的該基底晶圓產生對應於該基底晶圓的基本形式，及/或移除該塊體直至該等晶片之最上層，尤其磨掉該塊體。
  10. 如請求項1或2之方法，其中在步驟b)或c)之後，尤其在罐封之後，施覆焊料凸塊以將各個晶片堆疊連接至一板或另一晶片。
  11. 如請求項1或2之方法，其中該基底晶圓及/或該載體至少主要由矽組成。
  12. 如請求項1或2之方法，其中施覆至少兩層晶片至該基底晶圓。
  13. 如請求項1或2之方法，其中在步驟b)或c)之後用一塊體尤其一熱塑材料熱壓印該等晶片或晶片堆疊。
  14. 如請求項1或2之方法，其中在該晶片堆疊從鄰近晶片堆疊分離之前，將具有該等晶片堆疊於其上的該基底晶圓固定在一切割框架中。
  15. 如請求項1或2之方法，其中在背部研磨期間分離該基底晶圓。
  16. 如請求項3之方法，其中該固定構件是一真空靜電構件、機械夾箝(clamping)及/或黏著劑。
  17. 如請求項3之方法，其中該固定構件是一耐熱(heat-resistant)黏著劑。
  18. 如請求項6之方法，其中熱處理連續地在小於250℃之一溫度下發生。
  19. 如請求項6之方法，其中熱處理連續地在小於220℃之一溫度下發生。
  20. 如請求項7之方法，其中在步驟b)或c)之後，該等晶片或晶片堆疊係罐封於一塊體中，該塊體由有機材料或者由陶瓷材料製成。
  21. 如請求項7之方法，其中在步驟b)或c)之後，該等晶片或晶片堆疊係罐封於一塊體中，該塊體由環氧樹脂製成。
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