CN101467221B - 层叠型陶瓷电子元器件 - Google Patents
层叠型陶瓷电子元器件 Download PDFInfo
- Publication number
- CN101467221B CN101467221B CN2007800218438A CN200780021843A CN101467221B CN 101467221 B CN101467221 B CN 101467221B CN 2007800218438 A CN2007800218438 A CN 2007800218438A CN 200780021843 A CN200780021843 A CN 200780021843A CN 101467221 B CN101467221 B CN 101467221B
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- China
- Prior art keywords
- ceramic
- base material
- electronic component
- material layer
- ferrite
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- 239000000463 material Substances 0.000 claims abstract description 94
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- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 8
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- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 229910001289 Manganese-zinc ferrite Inorganic materials 0.000 description 1
- 229910001053 Nickel-zinc ferrite Inorganic materials 0.000 description 1
- ICAWQJNNPMTGPS-UHFFFAOYSA-N [Fe].[V].[Ca] Chemical compound [Fe].[V].[Ca] ICAWQJNNPMTGPS-UHFFFAOYSA-N 0.000 description 1
- JIYIUPFAJUGHNL-UHFFFAOYSA-N [O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[Mn++].[Mn++].[Mn++].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Zn++].[Zn++] Chemical compound [O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[O--].[Mn++].[Mn++].[Mn++].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Fe+3].[Zn++].[Zn++] JIYIUPFAJUGHNL-UHFFFAOYSA-N 0.000 description 1
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- ZSOJHTHUCUGDHS-UHFFFAOYSA-N gadolinium iron Chemical compound [Fe].[Gd] ZSOJHTHUCUGDHS-UHFFFAOYSA-N 0.000 description 1
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- MTRJKZUDDJZTLA-UHFFFAOYSA-N iron yttrium Chemical compound [Fe].[Y] MTRJKZUDDJZTLA-UHFFFAOYSA-N 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- C04B35/622—Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
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- C04B35/63—Preparing or treating the powders individually or as batches ; preparing or treating macroscopic reinforcing agents for ceramic products, e.g. fibres; mechanical aspects section B using additives specially adapted for forming the products, e.g.. binder binders
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
由于铁氧体的基本性质,包括具有由铁氧体形成的层叠结构的陶瓷层叠体的层叠型陶瓷电子元器件具有比较脆的问题。陶瓷层叠体(5)由同时煅烧的、陶瓷基材层(2)和配置在其两主面上的陶瓷辅助层(3及4)构成。陶瓷基材层(2)以及陶瓷辅助层(3及4)互相由相同组成系的铁氧体形成,实质上具有互相相同的晶体结构,但陶瓷辅助层(3及4)的线膨张系数比陶瓷基材层(2)的线膨张系数更小。
Description
技术领域
本发明涉及层叠型陶瓷电子元器件,特别涉及用于提高像铁氧体陶瓷那样的、具有由多晶相大致占据整体的陶瓷形成的陶瓷层叠体的层叠型陶瓷电子元器件的机械强度的改进技术。
背景技术
对于本发明值得关注的层叠型陶瓷电子元器件具有使用磁性体(铁氧体材料)通过整体煅烧得到的复合层叠结构,例如在日本专利特开平7-201566号公报(专利文献1)及日本专利特开2005-183890号公报(专利文献2)中有所记载。
更详细地讲,在专利文献1中记载了一种层叠型陶瓷电子元器件,该层叠型陶瓷电子元器件通过在内置线圈的高磁导率的磁性体层上下表面与低磁导率的磁性体层进行复合,以防止线圈和表面的导体图案之间的电干扰。
另一方面,在专利文献2中记载了了一种层叠型陶瓷电子元器件,该层叠型陶瓷电子元器件通过在内置线圈的磁性体层上下表面与绝缘体层进行复合,使安装在表面的电路器件的配置的自由度提高。
然而,在专利文献1所记载的层叠型陶瓷电子元器件中,由于铁氧体材料基本上比较脆,因此存在难以得到足够的机械强度这样的问题。
在专利文献2所记载的层叠型陶瓷电子元器件中,虽然根据构成绝缘体层的绝缘体的种类可以得到足够的机械强度,但由于磁性体层和绝缘体层在煅烧时的收缩动作的差异,相互之间会产生剥离,或者产生裂纹,或者产生翘曲。
专利文献1:日本专利特开平7-201566号公报
专利文献2:日本专利特开2005-183890号公报
发明内容
于是本发明的目的是提供能解决上述问题的、层叠型陶瓷电子元器件。
本发明的层叠型陶瓷电子元器件具有层叠结构,该层叠结构包括多晶相大致占据整体的陶瓷基材层;与陶瓷基材层同时煅烧得到的、配置在陶瓷基材层的至少一个主面上且多晶相大致占据整体的陶瓷辅助层;包括陶瓷层叠体,以及设在陶瓷层叠体的内部及/或者外部的导体图案。为了解决上述的技术问题,其特征是包括如下结构。
即,其特征是,上述陶瓷基材层的多晶相和上述陶瓷辅助层的多晶相实质上具有互相相同的结晶结构,且陶瓷辅助层的线膨张系数α2比陶瓷基材层的线膨张系数α1更小。
本发明在陶瓷基材层的多晶相及陶瓷辅助层的多晶相都是由铁氧体形成的多晶相时,特别利于实用。
上述的实施形态中,构成陶瓷基材层的铁氧体及构成陶瓷辅助层的铁氧体是互相相同组成系的铁氧体时较为理想。另外,构成陶瓷辅助层的铁氧体是低磁导率或者非磁性的铁氧体时较为理想。另外,铁氧体是尖晶石型铁氧体(MFe2O4:M是2价金属离子)、或者石榴石型铁氧体(R3Fe5O12:R是3价金属离子)时较为理想。
本发明的层叠型陶瓷电子元器件中,在陶瓷基材层形成线圈图案作为上述的导体图案时较为理想。
另外,导体图案以银为主要成分时较为理想。
另外,陶瓷辅助层也设置在陶瓷基材层的内部时较为理想。
另外,陶瓷辅助层以陶瓷层叠体的厚度方向的中央作为中心,在陶瓷层叠体的厚度方向大致对称地配置时较为理想。
另外,陶瓷基材层的线膨张系数α1和上述陶瓷辅助层的线膨张系数α2之差α1-α2为0.2~5ppm/℃时较为理想。
通过煅烧使未烧结陶瓷进行烧结后,在降温时,陶瓷会与其线膨张系数成比例地收缩。若采用本发明,由于在陶瓷基材层的至少一个主面上配置具有比陶瓷基材层的线膨张系数更小的线膨张系数的陶瓷辅助层,因此陶瓷基材层比陶瓷辅助层的收缩更大,降温结束后在层叠型陶瓷电子元器件的配置陶瓷辅助层的主面会残留压缩应力。结果,可以提高层叠型陶瓷电子元器件的机械强度。
另外,若采用本发明,则由于陶瓷基材层的多晶相和陶瓷辅助层的多晶相实质上具有互相相同的晶体结构,因此烧结后的陶瓷基材层与陶瓷辅助层牢固接合,界面处很难发生剥离或裂纹等不理想的情况。
另外,若采用本发明,则由于各陶瓷基材层及陶瓷辅助层的各层中,多晶相大致占据整体,实质上不含有玻璃(非晶态相),因此不会因为玻璃的相互扩散而导致陶瓷特性变化的问题。
在陶瓷基材层的多晶相及陶瓷辅助层的多晶相都是由铁氧体形成的多晶相时,由于铁氧体材料本来的机械强度较差,因此采用本发明使机械强度提高的效果意义更大。
在上述的情况下,构成陶瓷基材层的铁氧体和构成陶瓷辅助层的铁氧体是互相相同组成系列的铁氧体时,在同时煅烧陶瓷基材层和陶瓷辅助层时,可以将成分相互扩散而导致的特性变动控制得较小。
另外,在构成陶瓷辅助层的铁氧体是低磁导率或者非磁性的铁氧体时,可以抑制由配置在该陶瓷辅助层的表面及/或内部的布线产生的不需要的磁场,可以降低给安装在层叠型陶瓷电子元器件的外表面上的IC芯片或内置于陶瓷基材层的线圈图案带来不希望的影响。
若在陶瓷基材层形成线圈图案作为导体图案,则线圈图案可以得到较大电感值。
本发明的层叠型陶瓷电子元器件中,若导体图案将银作为主要成分,则为了得到层叠陶瓷电子元器件,可以在大气那样的氧化性气氛中实施煅烧工序。
若将陶瓷辅助层也设在陶瓷基材层的内部,则特别是厚度方向尺寸较大的层叠型陶瓷电子元器件中,能够更提高机械强度。即,厚度方向尺寸较大的情况下,在离开配置在陶瓷基材层的主面上的陶瓷辅助层的陶瓷基材层内部,容易产生因线膨张系数之差引起的内部应力,有时成为强度下降的原因。与之相反,若在陶瓷基材层的内部也设置线膨张系数较小的陶瓷辅助层,则可以缓解上述的内部应力,结果,可以提高层叠型陶瓷电子元器件的机械强度。另外,在陶瓷基材层形成线圈图案时,若在陶瓷基材层的内部设置由非磁性体形成的陶瓷辅助层,则由于线圈图案组成的线圈成为开放磁路,因此提高了直流叠加特性,所以,成为更大电流也能使用的线圈器件。
若将陶瓷辅助层以陶瓷层叠体的厚度方向的中央作为中心,在陶瓷层叠体的厚度方向大致对称地配置,则可以稳定并缓解成为层叠型陶瓷电子元器件的机械强度下降原因的内部应力,且可以抑制煅烧时能产生的翘曲。
若陶瓷基材层的线膨张系数α1和陶瓷辅助层的线膨张系数α2之差α1—α2在0.2~5ppm/℃的范围内选择,则不产生裂纹等,可以更确实地发挥上述提高强度的效果。
附图说明
图1是表示根据本发明的第一实施方式的层叠型陶瓷电子元器件1的剖视图。
图2是表示根据本发明的第二实施方式的层叠型陶瓷电子元器件1a的剖视图。
图3是表示根据本发明的第三实施方式的层叠型陶瓷电子元器件1b的剖视图。
图4是表示根据本发明的第四实施方式的层叠型陶瓷电子元器件1c的剖视图。
标号说明
1、1a、1b、1c 层叠型陶瓷电子元器件
2 陶瓷基材层
3、4、13 陶瓷辅助层
5 陶瓷层叠体
6 面内导体
7 层间连接导体
8 线圈图案
具体实施方式
图1是表示根据本发明的第一实施方式的层叠型陶瓷电子元器件1的剖视图。
层叠型陶瓷电子元器件1具备陶瓷层叠体5,该陶瓷层叠体5具有包括:陶瓷基材层2;以及与陶瓷基材层2同时煅烧得到的、在陶瓷基材层2的上下主面上分别配置的陶瓷辅助层3及4的层叠结构。
层叠型陶瓷电子元器件1还包括:设在陶瓷层叠体5的内部及/或外部的导体图案。导体图案大致区分为面内导体6和层间连接导体7。面内导体6形成在为形成陶瓷基材层2或者陶瓷辅助层3或4而层叠的陶瓷生片的主面上,层间连接导体7设置为在厚度方向贯穿上述陶瓷生片。通过特定的面内导体6及特定的层间连接导体7,在陶瓷基材层2的内部形成线圈图案8。另外图1中未示出形成线圈图案8的一部分的层间连接导体7。
该层叠型陶瓷电子元器件1例如构成DC-DC变换器,在陶瓷层叠体5的上方主面上安装表面安装器件9及10。表面安装器件9例如是IC芯片,通过焊锡凸点11与在陶瓷层叠体5的上方主面上形成的面内导体6电连接。另一表面安装器件10例如是片状电容器,通过焊锡12与在陶瓷层叠体5的上方主面上形成的面内导体6电连接。形成在陶瓷层叠体5的下方主面上的面内导体6作为在未图示的母板上安装该层叠型陶瓷电子元器件1时的端子电极使用。
陶瓷基材层2及陶瓷辅助层3和4都由多晶相大致占据整体的材料构成。而且,陶瓷基材层2的多晶相及陶瓷辅助层3和4的多晶相实质上互相具有相同的晶体结构,且陶瓷辅助层3及4的线膨张系数α2比陶瓷基材层2的线膨张系数α1更小。
在理想的实施形式中,陶瓷基材层2的多晶相及陶瓷辅助层3和4的多晶相都是由铁氧体形成的多晶相。在该情况下,构成陶瓷基材层2的铁氧体及构成陶瓷辅助层3和4的铁氧体互相为相同组成系的铁氧体时较为理想。这里,相同组成系的铁氧体是指构成元素相同,但构成元素的组成比率不同。
这样,通过使用相同组成系的铁氧体构成陶瓷基材层2和陶瓷辅助层3及4,在同时利用煅烧得到陶瓷基材层2和陶瓷辅助层3及4时,可以将由于成分的相互扩散而导致的特性变动抑制得较小。
另外,构成陶瓷辅助层3及4的铁氧体是低磁导率(例如磁导率为30以下)或者非磁性(磁导率为1)的铁氧体时较为理想。即,假设陶瓷辅助层3及4由高磁导率的铁氧体构成,则由于在配置于此的导体图案中有电流流过,将产生不需要的磁场,有时给例如作为表面安装器件9的IC芯片或内置在陶瓷基材层2的线圈图案8的电特性带来影响。若陶瓷辅助层3及4由低磁导率或者非磁性的铁氧体构成,可以抑制从配置在陶瓷辅助层3及4的导体图案产生的不需要的磁场。
陶瓷基材层2及陶瓷辅助层3和4可以由例如Fe-Ni-Zn-Cu系的铁氧体构成。
该情况下,若例如使用将氧化铁(Fe2O3)、氧化锌(ZnO)、氧化镍(NiO)及氧化铜(CuO)按规定的比率调合的材料作为构成陶瓷基材层2的铁氧体,则可以使其烧结体具有1MHz下的磁导率为150、线膨张系数α1为10.5的特性。
另一方面,若例如使用将氧化铁、氧化锌、氧化镍及氧化铜按与上述不同的规定比率调合的材料作为构成陶瓷辅助层3及4的铁氧体,则可以使其烧结体具有1MHz下的磁导率为20、线膨张系数α2为9.5的特性。
另外,在陶瓷辅助层3及4由非磁性的铁氧体构成的时候,也可以使用例如Fe-Zn-Cu系的铁氧体。例如,若使用将氧化铁、氧化锌及氧化铜按规定的比率调合的材料,则可以使其烧结体具有1MHz下的磁导率为1.0、线膨张系数α2为9.0的特性。
上述的例子中,是使用Fe-Ni-Zn-CuO系或者Fe-Zn-Cu系的组成的铁氧体,但也可以使用Fe-Mn-Zn系的组成的铁氧体。这些铁氧体的晶体结构都采用了尖晶石型的晶体结构,但也使用采用石榴石型等其它的晶体结构的铁氧体。
另外,作为尖晶石型铁氧体(MFe2O4:M是2价金属离子),例如有:镍锌铁氧体:(Ni1-xZnx)Fe2O4、锰锌铁氧体(Mn1-xZnx)Fe2O4、镍铁氧体:NiFe2O4、锰铁氧体:MnFe2O4、锌铁氧体:ZnFe2O4、铜铁氧体:CuFe2O4、钴铁氧体:CoFe2O4、镁铁氧体:MgFe2O4、锂铁氧体:(Li0.5Fe0.5)Fe2O4、伽马氧化铁(γ-Fe2O3):Fe2/3□1/3Fe2O4(「□」表示空位。)、四氧化三铁(铁铁氧体):Fe3O4等。
作为石榴石型铁氧体(R3Fe5O12:R是3价金属离子),例如有:YIG(钇铁石榴石):Y3Fe5O12、CVG(钙钒铁石榴石):Ca3Fe3.5V1.5O12、钆铁石榴石:Gd3Fe5O12等。
接下来,说明层叠型陶瓷电子元器件1的制造方法。
首先,准备应成为陶瓷基材层2及陶瓷辅助层3和4的各个陶瓷生片。这些陶瓷生片是向上述那样调合的铁氧体原料粉末添加粘合剂、增塑剂、湿润剂、分散剂等并使其浆化,将其成形为片状而得到的。
接下来,通过在特定的陶瓷生片形成贯穿孔,对贯穿孔填充导电性糊料,形成未烧结的层间连接导体7。另外,通过在特定的陶瓷生片上印刷导电性糊料,形成未烧结的面内导体6。形成这些面内导体6及层间连接导体7用的导电性糊料中含有的导电性金属以银为主要成分时较为理想。这是因为,不仅能够提供良好的导电性,而且在后述的煅烧工序中,还可以适用于大气这样的氧化性气氛。
另外,尽可能将应成为线圈图案8的面内导体6及层间连接导体7之外的导体图案形成在陶瓷辅助层3及4用的陶瓷生片时较为理想。
接下来,为了分别形成陶瓷基材层2及陶瓷辅助层3和4,通过将规定片数的陶瓷生片以预定的顺序层叠,之后压焊,得到陶瓷层叠体5的未烧结状态的层叠体。另外,在以上的工序对同时制造多个层叠型陶瓷电子元器件1用的集中状态的陶瓷层叠体实施的时候,为了使该集中状态的陶瓷层叠体在之后容易分割,形成分割槽。
接下来,将未烧结的陶瓷层叠体在例如大气这样的氧化性气氛下煅烧,据此得到烧结的陶瓷层叠体5。
接下来,对露出在陶瓷层叠体5的表面的面内导体6进行镀膜处理。例如,进行无电解镀,依次形成镀镍膜及镀金膜。
接下来,在陶瓷层叠体5的上方主面上安装表面安装器件9及10。
然后,在以上的工序对集中状态的陶瓷层叠体实施的时候,沿着上述的分割槽实施分割工序,取出各个层叠型陶瓷电子元器件1。虽然未图示,但可以根据需要,对层叠型陶瓷电子元器件1安装金属覆盖物。
以上的说明中,是在煅烧工序之前形成分割槽,但也可以不形成分割槽,在煅烧工序前,分割集中状态的陶瓷层叠体,取出各个层叠型陶瓷电子元器件1用的陶瓷层叠体5的原始状态的层叠体。在该情况下,对各个陶瓷层叠体5实施煅烧工序,镀膜处理时可以使用例如筒镀。
在如上所述制造的层叠型陶瓷电子元器件1中,煅烧工序之后的降温过程中虽然在陶瓷层叠体5中会产生收缩,但其收缩程度与线膨张系数成比例。该实施方式中,由于陶瓷辅助层3及4的线膨张系数α2比陶瓷基材层2的线膨张系数α1更小,因此若使陶瓷基材层2收缩得更大,结果压缩应力会残留在降温结束后的陶瓷层叠体5的两个主面部分。所以,不仅陶瓷层叠体5,层叠型陶瓷电子元器件1也可以得到较高的机械强度。
另外,若陶瓷辅助层3及4和陶瓷基材层2之间的线膨张系数不同,则一般来讲容易产生剥离或裂纹等,但在该实施方式中,由于陶瓷辅助层3及4和陶瓷基材层2是由实质上互相具有同一晶体结构的陶瓷构成的,因此通过陶瓷的烧结,可以使陶瓷辅助层3及4和陶瓷基材层2牢固接合,难以产生上述的剥离或裂纹等不理想的情况。
另外,陶瓷辅助层3和4及陶瓷基材层2由于是多晶相大致占据整体,实质上不含有玻璃(非晶态相)等易于扩散的成分,因此难以引起由扩散导致的组成进行的不希望的变动,可以得到可靠性高的陶瓷层叠体5。
为了适用于构成上述的陶瓷基材层2及陶瓷辅助层3和4的各个铁氧体的具体例,陶瓷基材层2的线膨张系数α1和陶瓷辅助层3及4的线膨张系数α2之差α1—α2为0.2~5ppm/℃时较为理想。该差小于0.2ppm/℃时,强度提高的效果减小;另一方面,该差大于5ppm/℃时,在陶瓷层叠体5易于产生裂纹等不理想的情况。该线膨张系数之差α1—α2为0.4~3ppm/℃时更理想,在该情况下,可以更稳定地制造具有提高强度效果的层叠型陶瓷电子元器件1。
陶瓷辅助层3及4分别的厚度选择在5~300μm的范围内时较为理想。陶瓷辅助层3及4分别的厚度比5μm更薄时,煅烧后降温时在陶瓷辅助层3及4易于产生裂纹;另一方面,比300μm更厚时,由于因热膨张系数之差而导致的压缩应力难以到达陶瓷层叠体5的表面,因此不能充分得到提高强度的效果。
图2及图3分别表示根据本发明的第二及第三实施方式的层叠型陶瓷电子元器件1a及1b,是与图1对应的图。在图2及图3中,对于与图1所示的要素相当的要素,标注了同样的参照标号,并省略重复说明。
图2所示的层叠型陶瓷电子元器件1a的特征是,不仅设置陶瓷基材层2的主面上的陶瓷辅助层3及4,还在陶瓷基材层2的内部设有陶瓷辅助层13。图3所示的层叠型陶瓷电子元器件1b的特征是,设置多层、例如2层的陶瓷辅助层13。
陶瓷辅助层13具有如下的作用效果。
在陶瓷基材层2的厚度方向尺寸较大时,更具体地讲,厚度方向尺寸在500μm以上时,有时在陶瓷基材层2产生裂纹等的不理想的情况。在线膨张系数较大的陶瓷基材层2中,其两主面被线膨张系数较小的陶瓷辅助层3及4固定的状态下,欲进一步收缩的力作用于内部。在陶瓷基材层2的厚度例如不到500μm的时候,其内部应力没有大到能使陶瓷基材层2的强度下降的程度。然而,随着陶瓷基材层2变厚,陶瓷基材层2的厚度方向中央部有进一步收缩的倾向,由于对陶瓷基材层2有将其表面部和中央部在平面方向互相拉伸的内部应力作用,因此在表面部和中央部的中间位置附近的侧面容易产生裂纹。
在这样的状况下,通过在陶瓷基材层2的内部也配置线膨张系数较小的陶瓷辅助层13,可以缓和想要将陶瓷基材层2收缩过多的内部应力。所以,若采用内部的陶瓷辅助层13,则即使陶瓷层叠体5的厚度方向的尺寸、特别是陶瓷基材层2的厚度方向尺寸较大时,也能使其具有足够的机械强度。
另外,若在陶瓷基材层2的内部配置陶瓷辅助层13,使陶瓷基材层2的连续厚度在300μm以下,更好的是在200μm以下,则可以更可靠地得到上述提高强度的效果,可以更稳定地制造陶瓷层叠体5。
另外,即使陶瓷基材层2的厚度在500μm以下的时候,也可以通过设置陶瓷辅助层13,进一步提高机械强度。
陶瓷辅助层13的厚度为5μm以上时较为理想。这是因为该厚度比5μm更薄时,有时不能充分缓和在陶瓷基材层2内产生的内部应力。
内部的陶瓷辅助层13是由与外侧的陶瓷辅助层3及4同样的材料构成的,但是例如可以将外侧的陶瓷辅助层3及4由低磁导率的铁氧体构成,而内部的陶瓷辅助层13由非磁性的铁氧体构成等,进行任意的组合。在该情况下,通过根据各个磁导率和线膨张系数选择最合适的材料,可以使层叠型陶瓷电子元器件1a及1b的电特性及机械强度都较好。
从图2及图3可知,陶瓷辅助层3及4及陶瓷辅助层13是以陶瓷层叠体5的厚度方向的中央为中心,在陶瓷层叠体5的厚度方向大致对称地配置。通过这样的配置,可以稳定并缓和成为陶瓷层叠体5的强度下降原因的内部应力,且使煅烧工序中难以产生翘曲。另外,由于图1所示的层叠型陶瓷电子元器件1中的陶瓷辅助层3和4也在陶瓷层叠体5的厚度方向大致对称地配置,因此可以得到与上述同样的效果。
如图2及图3所示,设在陶瓷基材层2的内部的陶瓷辅助层13直到陶瓷层叠体5的端面时较为理想。据此,可以有效地缓和成为易于以陶瓷层叠体5的端面为起点产生裂纹的原因的陶瓷基材层2的端面附近的内部应力。
如图2及图3所示,在陶瓷辅助层13由非磁性体构成的时候,将其配置在线圈图案8存在的部分时较为理想。据此,由于通过线圈图案8构成的线圈是开放磁路,因此难以产生磁饱和,可以提高直流叠加特性,使层叠型陶瓷电子元器件1a及1b成为在更大电流下也可以使用的产品。
以上,说明了本发明与图示有关的实施方式,但在本发明的范围内,可以有其它各种的变形例。
例如,陶瓷辅助层3、4及13在层叠型陶瓷电子元器件1、1a及1b的平面方向配置在整个表面时较为理想,但只要是能得到上述效果的范围,也可以不配置在全部表面,例如也可以有缺口或孔等的非配置范围。
另外,图示的层叠型陶瓷电子元器件1、1a及1b是在陶瓷层叠体5上安装表面安装器件9及10的多功能复合器件,但例如图4所示的片状线圈那样的单功能器件,也可以适用于本发明。
图4是本发明的第四实施方式,是表示构成片状线圈的层叠型陶瓷电子元器件1c的剖视图。图4中,对于与图1所示要素相当的要素,标注了同样的参照标号,并省略重复说明。
在图4所示的构成片状线圈的层叠型陶瓷电子元器件1c中,在陶瓷层叠体5的两端部形成端子导体16及17,将线圈图案8的各端部引出至陶瓷层叠体5的各端面,分别与端子导体16及17电连接。
Claims (10)
1.一种层叠型陶瓷电子元器件,其特征在于,包括:
具有层叠结构的陶瓷层叠体;以及设在所述陶瓷层叠体的内部及/或外部的导体图案,所述层叠结构包含:多晶相大致占据整体的陶瓷基材层;以及与所述陶瓷基材层同时煅烧得到的、配置在所述陶瓷基材层的至少一个外主面上且多晶相大致占据整体的陶瓷辅助层,
所述陶瓷基材层的多晶相和所述陶瓷辅助层的多晶相实质上具有互相相同的晶体结构,
且所述陶瓷辅助层的线膨张系数α2比所述陶瓷基材层的线膨张系数α1更小。
2.根据权利要求1所述的层叠型陶瓷电子元器件,其特征在于,所述陶瓷基材层的多晶相及所述陶瓷辅助层的多晶相都是由铁氧体形成的多晶相。
3.根据权利要求2所述的层叠型陶瓷电子元器件,其特征在于,构成所述陶瓷基材层的铁氧体及构成所述陶瓷辅助层的铁氧体是互相相同组成系的铁氧体。
4.根据权利要求2所述的层叠型陶瓷电子元器件,其特征在于,构成所述陶瓷辅助层的铁氧体是低磁导率或者非磁性的铁氧体。
5.根据权利要求2所述的层叠型陶瓷电子元器件,其特征在于,所述铁氧体是尖晶石型铁氧体即MFe2O4、或者石榴石型铁氧体即R3Fe5O12,其中,M是2价金属离子,R是3价金属离子。
6.根据权利要求2所述的层叠型陶瓷电子元器件,其特征在于,所述导体图案包括形成在所述陶瓷基材层的线圈图案。
7.根据权利要求1所述的层叠型陶瓷电子元器件,其特征在于,所述导体图案以银为主要成分。
8.根据权利要求1所述的层叠型陶瓷电子元器件,其特征在于,所述陶瓷辅助层还设在所述陶瓷基材层的内部。
9.根据权利要求1所述的层叠型陶瓷电子元器件,其特征在于,所述陶瓷辅助层以所述陶瓷层叠体的厚度方向的中央作为中心,在所述陶瓷层叠体的厚度方向大致对称地配置。
10.根据权利要求1所述的层叠型陶瓷电子元器件,其特征在于,所述陶瓷基材层的线膨张系数α1和所述陶瓷辅助层的线膨张系数α2之差α1-α2为0.2~5ppm/℃。
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WO2007145189A1 (ja) | 2007-12-21 |
CN101467221A (zh) | 2009-06-24 |
US7839651B2 (en) | 2010-11-23 |
JPWO2007145189A1 (ja) | 2009-10-29 |
EP2028664B1 (en) | 2015-12-30 |
KR101101793B1 (ko) | 2012-01-05 |
JP4840447B2 (ja) | 2011-12-21 |
EP2028664A4 (en) | 2010-08-25 |
KR20080110899A (ko) | 2008-12-19 |
US20090068426A1 (en) | 2009-03-12 |
EP2028664A1 (en) | 2009-02-25 |
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