CN101128931B - 具有顺应性的微电子组件 - Google Patents
具有顺应性的微电子组件 Download PDFInfo
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- CN101128931B CN101128931B CN2006800057997A CN200680005799A CN101128931B CN 101128931 B CN101128931 B CN 101128931B CN 2006800057997 A CN2006800057997 A CN 2006800057997A CN 200680005799 A CN200680005799 A CN 200680005799A CN 101128931 B CN101128931 B CN 101128931B
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- assembly
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- microelectronic element
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US65648005P | 2005-02-25 | 2005-02-25 | |
| US60/656,480 | 2005-02-25 | ||
| PCT/US2006/006554 WO2006091793A1 (en) | 2005-02-25 | 2006-02-23 | Microelectronic assemblies having compliancy |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101128931A CN101128931A (zh) | 2008-02-20 |
| CN101128931B true CN101128931B (zh) | 2010-05-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| EP (1) | EP1851798B1 (enExample) |
| JP (2) | JP5593018B2 (enExample) |
| KR (2) | KR101267651B1 (enExample) |
| CN (1) | CN101128931B (enExample) |
| TW (1) | TWI335627B (enExample) |
| WO (1) | WO2006091793A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI699859B (zh) | 2015-05-21 | 2020-07-21 | 美商L3賀利實科技公司 | 順應式高速互連件 |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006091793A1 (en) | 2005-02-25 | 2006-08-31 | Tessera, Inc. | Microelectronic assemblies having compliancy |
| US7749886B2 (en) * | 2006-12-20 | 2010-07-06 | Tessera, Inc. | Microelectronic assemblies having compliancy and methods therefor |
| DE102008042107A1 (de) * | 2008-09-15 | 2010-03-18 | Robert Bosch Gmbh | Elektronisches Bauteil sowie Verfahren zu seiner Herstellung |
| JP6006523B2 (ja) * | 2012-04-27 | 2016-10-12 | 新光電気工業株式会社 | 接続構造体、配線基板ユニット、電子回路部品ユニット、及び電子装置 |
| US20160343646A1 (en) * | 2015-05-21 | 2016-11-24 | Qualcomm Incorporated | High aspect ratio interconnect for wafer level package (wlp) and integrated circuit (ic) package |
| KR101678162B1 (ko) * | 2015-07-01 | 2016-11-21 | 서울대학교산학협력단 | 유연성 소자용 접속 구조물 및 이의 제조 방법 |
| US9704818B1 (en) * | 2016-07-06 | 2017-07-11 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
| US10103114B2 (en) | 2016-09-21 | 2018-10-16 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
| US11749616B2 (en) * | 2017-10-05 | 2023-09-05 | Texas Instruments Incorporated | Industrial chip scale package for microelectronic device |
| TWI645527B (zh) * | 2018-03-06 | 2018-12-21 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
Family Cites Families (142)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4001870A (en) | 1972-08-18 | 1977-01-04 | Hitachi, Ltd. | Isolating protective film for semiconductor devices and method for making the same |
| GB1487945A (en) | 1974-11-20 | 1977-10-05 | Ibm | Semiconductor integrated circuit devices |
| JPS5321771A (en) | 1976-08-11 | 1978-02-28 | Sharp Kk | Electronic parts mounting structure |
| US4300153A (en) | 1977-09-22 | 1981-11-10 | Sharp Kabushiki Kaisha | Flat shaped semiconductor encapsulation |
| US4284563A (en) | 1978-02-08 | 1981-08-18 | Research Corporation | 9,10,11,12,12-Pentachloro 4,6-dioxa-5-thia-1-aza-tricyclo[7.2.1.02,8 ]d |
| JPS5519850A (en) | 1978-07-31 | 1980-02-12 | Hitachi Ltd | Semiconductor |
| US4396936A (en) | 1980-12-29 | 1983-08-02 | Honeywell Information Systems, Inc. | Integrated circuit chip package with improved cooling means |
| US4381602A (en) | 1980-12-29 | 1983-05-03 | Honeywell Information Systems Inc. | Method of mounting an I.C. chip on a substrate |
| JPS601846A (ja) | 1983-06-18 | 1985-01-08 | Toshiba Corp | 多層配線構造の半導体装置とその製造方法 |
| US5310699A (en) | 1984-08-28 | 1994-05-10 | Sharp Kabushiki Kaisha | Method of manufacturing a bump electrode |
| US4642889A (en) | 1985-04-29 | 1987-02-17 | Amp Incorporated | Compliant interconnection and method therefor |
| US4671849A (en) | 1985-05-06 | 1987-06-09 | International Business Machines Corporation | Method for control of etch profile |
| US6043563A (en) | 1997-05-06 | 2000-03-28 | Formfactor, Inc. | Electronic components with terminals and spring contact elements extending from areas which are remote from the terminals |
| US4716049A (en) | 1985-12-20 | 1987-12-29 | Hughes Aircraft Company | Compressive pedestal for microminiature connections |
| US4924353A (en) | 1985-12-20 | 1990-05-08 | Hughes Aircraft Company | Connector system for coupling to an integrated circuit chip |
| US4902606A (en) | 1985-12-20 | 1990-02-20 | Hughes Aircraft Company | Compressive pedestal for microminiature connections |
| US5302550A (en) | 1985-12-24 | 1994-04-12 | Mitsubishi Denki Kabushiki Kaisha | Method of bonding a microelectronic device |
| US4977441A (en) | 1985-12-25 | 1990-12-11 | Hitachi, Ltd. | Semiconductor device and tape carrier |
| US4885126A (en) | 1986-10-17 | 1989-12-05 | Polonio John D | Interconnection mechanisms for electronic components |
| US4813129A (en) | 1987-06-19 | 1989-03-21 | Hewlett-Packard Company | Interconnect structure for PC boards and integrated circuits |
| JPH01129431A (ja) | 1987-11-16 | 1989-05-22 | Sharp Corp | 半導体チップ実装方式 |
| US4783594A (en) | 1987-11-20 | 1988-11-08 | Santa Barbara Research Center | Reticular detector array |
| JPH0715087B2 (ja) | 1988-07-21 | 1995-02-22 | リンテック株式会社 | 粘接着テープおよびその使用方法 |
| US5001542A (en) | 1988-12-05 | 1991-03-19 | Hitachi Chemical Company | Composition for circuit connection, method for connection using the same, and connected structure of semiconductor chips |
| US4962985A (en) | 1989-10-02 | 1990-10-16 | At&T Bell Laboratories | Protective coatings for optical devices comprising Langmuir-Blodgett films |
| US5082811A (en) | 1990-02-28 | 1992-01-21 | E. I. Du Pont De Nemours And Company | Ceramic dielectric compositions and method for enhancing dielectric properties |
| US5656862A (en) | 1990-03-14 | 1997-08-12 | International Business Machines Corporation | Solder interconnection structure |
| US5070297A (en) | 1990-06-04 | 1991-12-03 | Texas Instruments Incorporated | Full wafer integrated circuit testing device |
| US5187020A (en) | 1990-07-31 | 1993-02-16 | Texas Instruments Incorporated | Compliant contact pad |
| US5148266A (en) | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies having interposer and flexible lead |
| US5148265A (en) | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies with fan-in leads |
| US5679977A (en) | 1990-09-24 | 1997-10-21 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
| US5072520A (en) | 1990-10-23 | 1991-12-17 | Rogers Corporation | Method of manufacturing an interconnect device having coplanar contact bumps |
| US5140404A (en) | 1990-10-24 | 1992-08-18 | Micron Technology, Inc. | Semiconductor device manufactured by a method for attaching a semiconductor die to a leadframe using a thermoplastic covered carrier tape |
| US5180311A (en) | 1991-01-22 | 1993-01-19 | Hughes Aircraft Company | Resilient interconnection bridge |
| JP2593965B2 (ja) | 1991-01-29 | 1997-03-26 | 三菱電機株式会社 | 半導体装置 |
| US5265329A (en) | 1991-06-12 | 1993-11-30 | Amp Incorporated | Fiber-filled elastomeric connector attachment method and product |
| US5225966A (en) | 1991-07-24 | 1993-07-06 | At&T Bell Laboratories | Conductive adhesive film techniques |
| US5316788A (en) | 1991-07-26 | 1994-05-31 | International Business Machines Corporation | Applying solder to high density substrates |
| US5194930A (en) | 1991-09-16 | 1993-03-16 | International Business Machines | Dielectric composition and solder interconnection structure for its use |
| JP2927081B2 (ja) | 1991-10-30 | 1999-07-28 | 株式会社デンソー | 樹脂封止型半導体装置 |
| JPH05175280A (ja) | 1991-12-20 | 1993-07-13 | Rohm Co Ltd | 半導体装置の実装構造および実装方法 |
| US5203076A (en) | 1991-12-23 | 1993-04-20 | Motorola, Inc. | Vacuum infiltration of underfill material for flip-chip devices |
| US5249101A (en) | 1992-07-06 | 1993-09-28 | International Business Machines Corporation | Chip carrier with protective coating for circuitized surface |
| AU4782293A (en) | 1992-07-24 | 1994-02-14 | Tessera, Inc. | Semiconductor connection components and methods with releasable lead support |
| US5371404A (en) | 1993-02-04 | 1994-12-06 | Motorola, Inc. | Thermally conductive integrated circuit package with radio frequency shielding |
| US5414298A (en) | 1993-03-26 | 1995-05-09 | Tessera, Inc. | Semiconductor chip assemblies and components with pressure contact |
| JP3269171B2 (ja) | 1993-04-08 | 2002-03-25 | セイコーエプソン株式会社 | 半導体装置およびそれを有した時計 |
| US5355283A (en) | 1993-04-14 | 1994-10-11 | Amkor Electronics, Inc. | Ball grid array with via interconnection |
| US5600103A (en) | 1993-04-16 | 1997-02-04 | Kabushiki Kaisha Toshiba | Circuit devices and fabrication method of the same |
| JP3445641B2 (ja) | 1993-07-30 | 2003-09-08 | 株式会社デンソー | 半導体装置 |
| US6326678B1 (en) | 1993-09-03 | 2001-12-04 | Asat, Limited | Molded plastic package with heat sink and enhanced electrical performance |
| US5477611A (en) | 1993-09-20 | 1995-12-26 | Tessera, Inc. | Method of forming interface between die and chip carrier |
| JP3214186B2 (ja) | 1993-10-07 | 2001-10-02 | 三菱電機株式会社 | 半導体装置の製造方法 |
| JPH07115096A (ja) | 1993-10-18 | 1995-05-02 | Fujitsu Ltd | バンプ電極 |
| US5772451A (en) | 1993-11-16 | 1998-06-30 | Form Factor, Inc. | Sockets for electronic components and methods of connecting to electronic components |
| US5431571A (en) | 1993-11-22 | 1995-07-11 | W. L. Gore & Associates, Inc. | Electrical conductive polymer matrix |
| US5455390A (en) | 1994-02-01 | 1995-10-03 | Tessera, Inc. | Microelectronics unit mounting with multiple lead bonding |
| US5508228A (en) | 1994-02-14 | 1996-04-16 | Microelectronics And Computer Technology Corporation | Compliant electrically connective bumps for an adhesive flip chip integrated circuit device and methods for forming same |
| US5431328A (en) | 1994-05-06 | 1995-07-11 | Industrial Technology Research Institute | Composite bump flip chip bonding |
| US5393697A (en) | 1994-05-06 | 1995-02-28 | Industrial Technology Research Institute | Composite bump structure and methods of fabrication |
| US6359335B1 (en) | 1994-05-19 | 2002-03-19 | Tessera, Inc. | Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures |
| US5518964A (en) * | 1994-07-07 | 1996-05-21 | Tessera, Inc. | Microelectronic mounting with multiple lead deformation and bonding |
| US6177636B1 (en) | 1994-12-29 | 2001-01-23 | Tessera, Inc. | Connection components with posts |
| US5989936A (en) * | 1994-07-07 | 1999-11-23 | Tessera, Inc. | Microelectronic assembly fabrication with terminal formation from a conductive layer |
| US5659952A (en) | 1994-09-20 | 1997-08-26 | Tessera, Inc. | Method of fabricating compliant interface for semiconductor chip |
| US6870272B2 (en) | 1994-09-20 | 2005-03-22 | Tessera, Inc. | Methods of making microelectronic assemblies including compliant interfaces |
| US5929517A (en) | 1994-12-29 | 1999-07-27 | Tessera, Inc. | Compliant integrated circuit package and method of fabricating the same |
| US6826827B1 (en) * | 1994-12-29 | 2004-12-07 | Tessera, Inc. | Forming conductive posts by selective removal of conductive material |
| US5707902A (en) | 1995-02-13 | 1998-01-13 | Industrial Technology Research Institute | Composite bump structure and methods of fabrication |
| US5734547A (en) | 1995-02-13 | 1998-03-31 | Iversen; Arthur H. | Power switchgear |
| US5801446A (en) | 1995-03-28 | 1998-09-01 | Tessera, Inc. | Microelectronic connections with solid core joining units |
| JPH0964233A (ja) * | 1995-06-15 | 1997-03-07 | Ngk Spark Plug Co Ltd | セラミック基板、その製造方法およびセラミック基板と樹脂製基板との接合体 |
| US5874781A (en) | 1995-08-16 | 1999-02-23 | Micron Technology, Inc. | Angularly offset stacked die multichip device and method of manufacture |
| US5777379A (en) | 1995-08-18 | 1998-07-07 | Tessera, Inc. | Semiconductor assemblies with reinforced peripheral regions |
| US5874782A (en) | 1995-08-24 | 1999-02-23 | International Business Machines Corporation | Wafer with elevated contact structures |
| US5766987A (en) | 1995-09-22 | 1998-06-16 | Tessera, Inc. | Microelectronic encapsulation methods and equipment |
| US6284563B1 (en) | 1995-10-31 | 2001-09-04 | Tessera, Inc. | Method of making compliant microelectronic assemblies |
| US6211572B1 (en) | 1995-10-31 | 2001-04-03 | Tessera, Inc. | Semiconductor chip package with fan-in leads |
| US5749997A (en) | 1995-12-27 | 1998-05-12 | Industrial Technology Research Institute | Composite bump tape automated bonding method and bonded structure |
| US5789271A (en) | 1996-03-18 | 1998-08-04 | Micron Technology, Inc. | Method for fabricating microbump interconnect for bare semiconductor dice |
| WO1997044859A1 (en) | 1996-05-24 | 1997-11-27 | Tessera, Inc. | Connectors for microelectronic elements |
| US6030856A (en) | 1996-06-10 | 2000-02-29 | Tessera, Inc. | Bondable compliant pads for packaging of a semiconductor chip and method therefor |
| US5790377A (en) | 1996-09-12 | 1998-08-04 | Packard Hughes Interconnect Company | Integral copper column with solder bump flip chip |
| US6255738B1 (en) | 1996-09-30 | 2001-07-03 | Tessera, Inc. | Encapsulant for microelectronic devices |
| US6130116A (en) | 1996-12-13 | 2000-10-10 | Tessera, Inc. | Method of encapsulating a microelectronic assembly utilizing a barrier |
| US6054337A (en) | 1996-12-13 | 2000-04-25 | Tessera, Inc. | Method of making a compliant multichip package |
| TW448524B (en) * | 1997-01-17 | 2001-08-01 | Seiko Epson Corp | Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment |
| TW392262B (en) | 1997-03-10 | 2000-06-01 | Seiko Epson Corp | Electric parts and semiconductor device and the manufacturing method thereof, and the assembled circuit board, and the electric device using the same |
| WO1998043289A1 (fr) * | 1997-03-21 | 1998-10-01 | Seiko Epson Corporation | Composant a semi-conducteur, bande de support de couche et leur procede de fabrication |
| US6313402B1 (en) | 1997-10-29 | 2001-11-06 | Packard Hughes Interconnect Company | Stress relief bend useful in an integrated circuit redistribution patch |
| US5937758A (en) | 1997-11-26 | 1999-08-17 | Motorola, Inc. | Micro-contact printing stamp |
| JP3458056B2 (ja) * | 1998-01-08 | 2003-10-20 | 松下電器産業株式会社 | 半導体装置およびその実装体 |
| US5956235A (en) | 1998-02-12 | 1999-09-21 | International Business Machines Corporation | Method and apparatus for flexibly connecting electronic devices |
| US6337445B1 (en) | 1998-03-16 | 2002-01-08 | Texas Instruments Incorporated | Composite connection structure and method of manufacturing |
| US6642136B1 (en) | 2001-09-17 | 2003-11-04 | Megic Corporation | Method of making a low fabrication cost, high performance, high reliability chip scale package |
| US6184576B1 (en) | 1998-09-21 | 2001-02-06 | Advantest Corp. | Packaging and interconnection of contact structure |
| JP4024958B2 (ja) * | 1999-03-15 | 2007-12-19 | 株式会社ルネサステクノロジ | 半導体装置および半導体実装構造体 |
| US6197613B1 (en) | 1999-03-23 | 2001-03-06 | Industrial Technology Research Institute | Wafer level packaging method and devices formed |
| WO2000059033A1 (fr) | 1999-03-25 | 2000-10-05 | Seiko Epson Corporation | Tableau de repartition, tableau de connexion, dispositif semi-conducteur, son procede de fabrication, carte de circuit imprime, et instrument electronique |
| US6537854B1 (en) | 1999-05-24 | 2003-03-25 | Industrial Technology Research Institute | Method for bonding IC chips having multi-layered bumps with corrugated surfaces and devices formed |
| KR20020011440A (ko) * | 1999-06-17 | 2002-02-08 | 마이클 골위저, 호레스트 쉐퍼 | 가요성 접점을 구비한 전자 소자 및 그 전자 소자의 제조방법 |
| US6277669B1 (en) | 1999-09-15 | 2001-08-21 | Industrial Technology Research Institute | Wafer level packaging method and packages formed |
| US6230400B1 (en) | 1999-09-17 | 2001-05-15 | George Tzanavaras | Method for forming interconnects |
| JP2001144204A (ja) * | 1999-11-16 | 2001-05-25 | Nec Corp | 半導体装置及びその製造方法 |
| US6555908B1 (en) * | 2000-02-10 | 2003-04-29 | Epic Technologies, Inc. | Compliant, solderable input/output bump structures |
| DE10014300A1 (de) | 2000-03-23 | 2001-10-04 | Infineon Technologies Ag | Halbleiterbauelement und Verfahren zu dessen Herstellung |
| DE10016132A1 (de) | 2000-03-31 | 2001-10-18 | Infineon Technologies Ag | Elektronisches Bauelement mit flexiblen Kontaktierungsstellen und Verfahren zu dessen Herstellung |
| JP3596864B2 (ja) | 2000-05-25 | 2004-12-02 | シャープ株式会社 | 半導体装置 |
| JP3440070B2 (ja) * | 2000-07-13 | 2003-08-25 | 沖電気工業株式会社 | ウェハー及びウェハーの製造方法 |
| US6767818B1 (en) | 2000-08-07 | 2004-07-27 | Industrial Technology Research Institute | Method for forming electrically conductive bumps and devices formed |
| US6660626B1 (en) * | 2000-08-22 | 2003-12-09 | Charles W. C. Lin | Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint |
| US6462575B1 (en) | 2000-08-28 | 2002-10-08 | Micron Technology, Inc. | Method and system for wafer level testing and burning-in semiconductor components |
| US6710456B1 (en) | 2000-08-31 | 2004-03-23 | Micron Technology, Inc. | Composite interposer for BGA packages |
| JP4174174B2 (ja) * | 2000-09-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法並びに半導体装置実装構造体 |
| TW574752B (en) | 2000-12-25 | 2004-02-01 | Hitachi Ltd | Semiconductor module |
| US6518675B2 (en) | 2000-12-29 | 2003-02-11 | Samsung Electronics Co., Ltd. | Wafer level package and method for manufacturing the same |
| US6433427B1 (en) | 2001-01-16 | 2002-08-13 | Industrial Technology Research Institute | Wafer level package incorporating dual stress buffer layers for I/O redistribution and method for fabrication |
| US6388322B1 (en) | 2001-01-17 | 2002-05-14 | Aralight, Inc. | Article comprising a mechanically compliant bump |
| JP4465891B2 (ja) * | 2001-02-07 | 2010-05-26 | パナソニック株式会社 | 半導体装置 |
| US20020121702A1 (en) * | 2001-03-01 | 2002-09-05 | Siemens Dematic Electronics Assembly Systems, Inc. | Method and structure of in-situ wafer scale polymer stud grid array contact formation |
| US6643739B2 (en) | 2001-03-13 | 2003-11-04 | Koninklijke Philips Electronics N.V. | Cache way prediction based on instruction base register |
| US7148566B2 (en) | 2001-03-26 | 2006-12-12 | International Business Machines Corporation | Method and structure for an organic package with improved BGA life |
| US20050097727A1 (en) | 2001-03-28 | 2005-05-12 | Tomoo Iijima | Multi-layer wiring board, method for producing multi-layer wiring board, polishing machine for multi-layer wiring board, and metal sheet for producing wiring board |
| US20020151164A1 (en) | 2001-04-12 | 2002-10-17 | Jiang Hunt Hang | Structure and method for depositing solder bumps on a wafer |
| JP3983996B2 (ja) * | 2001-04-23 | 2007-09-26 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| US6767819B2 (en) | 2001-09-12 | 2004-07-27 | Dow Corning Corporation | Apparatus with compliant electrical terminals, and methods for forming same |
| TW517360B (en) | 2001-12-19 | 2003-01-11 | Ind Tech Res Inst | Enhanced type wafer level package structure and its manufacture method |
| TW503496B (en) | 2001-12-31 | 2002-09-21 | Megic Corp | Chip packaging structure and manufacturing process of the same |
| US6638870B2 (en) | 2002-01-10 | 2003-10-28 | Infineon Technologies Ag | Forming a structure on a wafer |
| US6940177B2 (en) | 2002-05-16 | 2005-09-06 | Dow Corning Corporation | Semiconductor package and method of preparing same |
| DE10223738B4 (de) | 2002-05-28 | 2007-09-27 | Qimonda Ag | Verfahren zur Verbindung integrierter Schaltungen |
| US7329563B2 (en) | 2002-09-03 | 2008-02-12 | Industrial Technology Research Institute | Method for fabrication of wafer level package incorporating dual compliant layers |
| JP4091443B2 (ja) | 2003-01-14 | 2008-05-28 | シャープ株式会社 | テレビジョン受信機及び電子番組表表示装置 |
| DE10308095B3 (de) | 2003-02-24 | 2004-10-14 | Infineon Technologies Ag | Elektronisches Bauteil mit mindestens einem Halbleiterchip auf einem Schaltungsträger und Verfahren zur Herstellung desselben |
| US20040222518A1 (en) | 2003-02-25 | 2004-11-11 | Tessera, Inc. | Ball grid array with bumps |
| JP2004273592A (ja) | 2003-03-06 | 2004-09-30 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| US7358608B2 (en) * | 2003-06-13 | 2008-04-15 | Oki Electric Industry Co., Ltd. | Semiconductor device having chip size package with improved strength |
| TWI223363B (en) | 2003-11-06 | 2004-11-01 | Ind Tech Res Inst | Bonding structure with compliant bumps |
| US7294929B2 (en) | 2003-12-30 | 2007-11-13 | Texas Instruments Incorporated | Solder ball pad structure |
| US7317249B2 (en) | 2004-12-23 | 2008-01-08 | Tessera, Inc. | Microelectronic package having stacked semiconductor devices and a process for its fabrication |
| WO2006091793A1 (en) | 2005-02-25 | 2006-08-31 | Tessera, Inc. | Microelectronic assemblies having compliancy |
-
2006
- 2006-02-23 WO PCT/US2006/006554 patent/WO2006091793A1/en not_active Ceased
- 2006-02-23 JP JP2007557186A patent/JP5593018B2/ja not_active Expired - Fee Related
- 2006-02-23 US US11/360,230 patent/US7999379B2/en not_active Expired - Fee Related
- 2006-02-23 CN CN2006800057997A patent/CN101128931B/zh not_active Expired - Fee Related
- 2006-02-23 KR KR1020077020400A patent/KR101267651B1/ko not_active Expired - Fee Related
- 2006-02-23 EP EP06721033.6A patent/EP1851798B1/en not_active Not-in-force
- 2006-02-23 KR KR1020127029645A patent/KR101357765B1/ko not_active Expired - Fee Related
- 2006-02-24 TW TW095106342A patent/TWI335627B/zh not_active IP Right Cessation
-
2011
- 2011-07-07 US US13/177,790 patent/US20110266668A1/en not_active Abandoned
-
2013
- 2013-01-28 JP JP2013013738A patent/JP2013138214A/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI699859B (zh) | 2015-05-21 | 2020-07-21 | 美商L3賀利實科技公司 | 順應式高速互連件 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1851798A1 (en) | 2007-11-07 |
| JP2008532291A (ja) | 2008-08-14 |
| CN101128931A (zh) | 2008-02-20 |
| TWI335627B (en) | 2011-01-01 |
| KR20070106628A (ko) | 2007-11-02 |
| WO2006091793A1 (en) | 2006-08-31 |
| US20110266668A1 (en) | 2011-11-03 |
| JP5593018B2 (ja) | 2014-09-17 |
| KR20120137441A (ko) | 2012-12-20 |
| JP2013138214A (ja) | 2013-07-11 |
| TW200636878A (en) | 2006-10-16 |
| US7999379B2 (en) | 2011-08-16 |
| US20060194365A1 (en) | 2006-08-31 |
| WO2006091793A8 (en) | 2007-10-04 |
| KR101357765B1 (ko) | 2014-02-11 |
| KR101267651B1 (ko) | 2013-05-23 |
| EP1851798B1 (en) | 2016-08-03 |
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