CN101128931B - 具有顺应性的微电子组件 - Google Patents

具有顺应性的微电子组件 Download PDF

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Publication number
CN101128931B
CN101128931B CN2006800057997A CN200680005799A CN101128931B CN 101128931 B CN101128931 B CN 101128931B CN 2006800057997 A CN2006800057997 A CN 2006800057997A CN 200680005799 A CN200680005799 A CN 200680005799A CN 101128931 B CN101128931 B CN 101128931B
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microelectronic element
assembly
compliant layer
conductive pole
compliant
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CN2006800057997A
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CN101128931A (zh
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B·哈巴
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Adeia Semiconductor Solutions LLC
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Tessera LLC
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Abstract

一种微电子组件包括一具有第一表面(22)和在第一表面(22)上的接触件(24)的微电子元件(20)，例如半导体晶片或半导体芯片，一覆盖于微电子元件的第一表面的顺应层(26)，该顺应层(26)具有与微电子元件的接触件(24)对准的开口。该组件还需包括覆盖顺应层(26)并从微电子元件(20)的第一表面凸起的导电柱(38)，该导电柱(38)通过延伸在接触(24)和导电柱(38)之间的细长的导电元件与微电子元件(20)的接触件(24)电气互连。

Description

具有顺应性的微电子组件
交叉参考相关申请
本申请要求于2005年2月25日申请的美国临时申请序列号为60/656480的优先权，该文件公开的内容也在此被引入作为参考。
发明背景
本发明涉及晶片级和半导体芯片的封装。更具体地，本发明涉及改进的顺应(compliant)晶片和顺应(compliant)半导体封装结构以及它们的制作和测试方法。
象半导体芯片这样的微电子器件通常需要许多连接其他电子组件的输入和输出连接。半导体芯片或其他类似器件的输入和输出连接通常被设置为大体覆盖器件表面(通常被称作是“面阵列”)的栅格状图案或平行且紧邻器件前表面每个边缘的细长行状，或处于该前表面的中央。典型的，象芯片这样的器件必须物理地安装在例如印刷电路板的基板上，并且器件的接触必须与电路板的电导部件电性连接。
半导体芯片通常采用这样的封装，该封装便于芯片在制作和将它安装到象电路板或其他电路面板这样的外部基板上时的处理。例如，许多半导体芯片采用适合于表面安装的封装。有许多这类的封装被用于不同的用途。最普通的，这类封装包括一个介电元件，通常被称作“芯片载体”，它具有由在电介质上镀覆的或蚀刻的金属结构作为终端。这些终端通常通过沿芯片载体本身延伸的细迹线或在芯片接触与终端或迹线之间延伸的细导线或引线来与芯片本身的接触相连接。在表面安装的操作中，封装被置于电路板上以使封装上的每个终端与电路板上对应的接触垫对齐。在终端和接触垫之间提供焊料或其他粘合材料。通过加热组件以使焊料熔化或“回流”或使连接材料活化，封装就永久地固定住了。
许多封装包括焊球形式的焊料团，通常直径为约0.1mm和约0.8mm(5和30mils)，与封装的终端相接。具有从底面凸出的焊球阵列的封装通常被称为球格阵列或“BGA”封装。其他被称为面格阵列(land grid array)或“LGA”封装的封装通过薄层或由焊料形成的面来与衬底固定。这种类型的封装可以十分紧凑。某些封装，通常被称为“芯片级封装”，占用电路板的面积等于或稍稍大于包封在封装中的器件面积。这样的好处是它减少了组件的总面积，并允许衬底上不同器件之间采用短互连(short interconnection)，这可以限制器件之间信号的传播时间，从而便于组件在高速下工作。
包括封装的组件会遭受器件和基板上由不同的热膨胀和收缩导致的应力。在工作状态和制造过程中，半导体芯片膨胀和收缩的量与电路板的膨胀和收缩的量趋于不同。当封装的终端(例如通过使用焊料)固定到芯片或其他器件时，这些效应会使得终端相对于电路板上的接触垫移动。这会导致在连接终端和电路板上的接触垫的焊料中产生应力。正如在美国专利5679977、5148266、5148265、5455390和5518964的某些优选实施例中公开的那样，此处这些公开被引入作为参考，半导体芯片封装可以具有相对于芯片或其他包封在封装中的器件可移动的终端。这种移动能对不同的膨胀和收缩进行显著程度的补偿。
封装器件的测试引出另一个艰难的问题。在某些制造过程中，需要在封装器件的终端和测试装置之间临时连接，并通过这些连接来操作这些器件以保证器件是完全有功能的。通常，这些临时连接必须不能焊合封装终端与测试装置。确保所有的终端与测试装置的导电元件可靠连接是重要的。然而，很难通过将封装压靠在例如具有平接触垫的普通电路板这样的简单测试装置上来形成连接。如果封装的终端不是共面的，或测试装置的导电元件不是共面的，一些终端将不能与它们在测试装置上对应的接触垫相连接。例如，在BGA封装中，连在终端上焊球直径的不同和芯片载体的不平坦，可能导致某些焊球位于不同的高度。
这些问题能通过使用特别构造的具有补偿不平坦特性的测试装置来加以缓解。然而，这种特性增加了测试装置的成本，并且，在某些情况下，给测试装置本身引入了某些不可靠性。这是非常不可取的，因为为了提供有意义的测试，测试装置以及器件与测试装置的接合应当比封装器件本身更可靠。而且，有意于高频工作的器件必须加入高频信号进行测试。这种需求为测试装置中信号路径的电特性引入了约束，这更加使测试装置的构造复杂化。
此外，当测试晶片和具有连接到终端的焊球的封装器件时，焊料趋于在测试装置的与焊球接合的那部分上积聚。这些焊料残留的积聚会缩短测试装置的寿命并削弱其可靠性。
已经推出了多种处理上述问题的解决方法。在前述专利中公开的某些封装中具有相对于微电子器件可移动的终端。这种移动可以在某种程度上补偿在测试过程中终端的不平坦。
由Nishiguchi等发表的美国专利5196726和5214308公开了一种BGA型的方法，其中芯片表面上的突点引线(突点引线)纳入衬底上的杯状凹槽并通过一种低熔点材料在那焊合。由Beaman等发表的美国专利4975079公开了一种芯片的测试凹槽，其中测试衬底上的半球形(dome-shaped)接触置于圆锥型导槽(guides)中。芯片紧压在衬底上以使焊球进入圆锥导槽并接合衬底上的半球形管脚。应使用足够的力量以使半球形管脚让芯片的焊球实际上发生变形。
BGA凹槽的另一个例子可以在1998年9月8日公开的、共同受让的美国专利5802699中找到，该篇公开的内容在此被引入作为参考。`699号专利公开了一种具有许多孔洞的片状连接器。每个孔洞提供有至少一个在内部延伸于孔洞上的弹力薄层接触。BGA器件的突点引线(bump leads)进入孔洞以使突点引线(bump leads)与接触接合。该组件可以被测试，如果被认为是可接受的，突点引线就永久与接触粘合。
于2001年3月20日公开的共同受让的美国专利6202297，该文公开的内容在此被引入作为参考，公开了一种用于具有突点引线的微电子装置的连接器和该连接器制造和使用的方法。在`297号专利的一个实施例中，绝缘衬底具有从上表面向上延伸的多个柱。这些柱可以被排列成一个柱群的阵列，每个柱群之间定义一个间隙。一个基本上是薄片状的接触从每个柱的顶端延伸。为对器件测试，器件的突点引线插入到各自的间隙中，这样当突点引线继续插入时与挨着突点引线的接触相接合。典型的，当突点引线插入到间隙时，接触的末梢部分向下朝衬底并从间隙中央向外偏转。
共同受让的美国专利6177636，该文的公开内容在此被引入作为参考，公开了一种在微电子器件和支持衬底之间提供内部互连的方法和设备。在`636号专利的一个优选实施例中，制造微电子器件的内部互连组分的方法包括提供一具有第一和第二表面的柔性芯片载体并在芯片载体的第一表面上耦合一导电片。然后选择蚀刻该导电片得到多个大体上坚硬的柱。支撑结构的第二表面上提供一顺应(compliant)层并且微电子器件例如微电子芯片与该顺应层接合，从而该顺应层夹在微电子器件和芯片载体之间，并且柱从芯片载体的外部表面凸出。柱与微电子器件电连接。柱形成的凸起的封装终端可以接合入凹槽或焊料焊合到例如电路面板这样的基板。由于柱相对于微电子器件是可移动的，这样的封装相当适用于器件在使用时器件和支持基板之间温度膨胀系数的不匹配。而且，柱的顶端可以是共面或接近共面的。
除了所有上述的在工艺上的改进，还有晶片和微电子封装在制造、测试上的更多改进将在下文描述。
发明内容
根据本发明的一个方面，一种微电子组件，包括：一具有第一表面和该第一表面上的接触件的微电子元件；一覆盖所述微电子元件的第一表面的顺应层；在所述顺应层的上表面上的导电迹线，所述导电迹线与所述接触件相连，覆盖在所述的顺应层上并从所述导电迹线凸出的导电柱，所述的导电柱与所述微电子元件的所述接触件电气互连，其中，所述顺应层具有一平坦的上表面和一倾斜表面，导电柱从所述上表面上凸出，并且具有高出该上表面50-300微米的高度。
根据本发明的另一个方面，一种微电子组件，包括：一具有第一表面和在该第一表面上的接触件的微电子元件；一覆盖所述微电子元件的第一表面的顺应层，所述的顺应层具有一与所述微电子元件的第一表面隔开的上表面；覆盖所述的顺应层的上表面并从所述的微电子元件的第一表面凸出的导电柱；与所述导电柱和所述微电子元件的所述接触件电气互连的且位于所述导电柱下方的细长的导电元件，其中，所述顺应层具有一平坦的上表面和一倾斜表面，导电柱从所述上表面上凸出，并且具有高出该上表面50-300微米的高度。
根据本发明的再一个方面，一种微电子组件，包括：一具有第一表面和该第一表面上的接触件的微电子元件；覆盖所述微电子元件的第一表面的多个顺应块，每个所述的顺应块设置为相邻所述微电子元件的一个所述接触件；覆盖所述微电子元件并从所述微电子元件的第一表面凸出的蚀刻的导电柱；与所述导电柱和所述微电子元件的所述接触件电气互连的导电迹线，所述的顺应块使所述的导电柱相对所述微电子元件的所述接触件移动，其中，所述多个顺应块中的至少一个具有平坦的上表面和倾斜表面，导电柱从所述上表面上凸出，并且具有高出该上表面50-300微米的高度。
在本发明的某些优选实施方式中，一个微电子组件包括象半导体晶片或芯片这样的微电子元件，微电子元件具有第一表面和该表面上的接触件。该组件要在微电子元件的第一表面上覆盖一顺应层，该顺应层最好有与微电子元的接触件大体对准的开口。在微电子元件的第一表面和顺应层之间可以设置一介电钝化层。组件还需包括覆盖着顺应层并从微电子元件的第一表面凸出的导电柱，该导电柱与微电子元件的接触件电气互连。当导电柱的顶端与导电垫邻接时，例如是测试板或印刷电路板上的导电垫，该导电柱的顶端可相对于微电子元件上的接触件移动从而适应不平坦。
在某些优选实施例中，顺应层优选由具有低弹性系数的材料构成。顺应层可以是由诸如硅树脂、柔化环氧、聚酰亚胺、热固性聚合物、含氟聚合物和热塑性聚合物之类的材料构成。在其他的优选实施例中，顺应层可以有一上表面，例如平的上表面，和一个在顺应层的上表面和微电子元件的第一表面之间延伸的倾斜表面。该倾斜表面可具有至少一个弯曲表面。在特别的优选实施例中，该倾斜表面包括一从微电子元件的第一表面延伸的第一弯曲表面和一从顺应层的上表面延伸的第二弯曲表面。
微电子组件需要包括细长的电性导电元件用于电性互连导电柱和微电子元件的接触件。该细长的电性导电元件可以包括铜、金、镍及其合金、化合物、合成物等材料。在某些优选实施例中，该细长的电性导电元件可以是焊合带或导电迹线。较佳地，细长的电性导电元件在顺应层上延伸。
在本发明的某些优选实施例中，顺应层包括多个覆盖于微电子元件的第一表面的顺应块。至少一个导电柱被置于至少一个顺应块的顶上。在其他的优选实施例中，每个导电柱设置于一个顺应块的顶上。还在其他的优选实施例中，一单独的顺应块顶上设置两个或更多导电柱。每个导电柱需有一邻接顺应层的基部和一远离顺应层的顶部。导电柱优选具有大于焊料掩蔽层厚度的高度，由此导电柱是微电子组件上最高/长的结构。结果，在测试微电子组件时，导电柱的顶部是与测试板上导电垫最先接合的部件。某些优选实施例中，导电柱需有约50～300微米的高度。在某些优选实施例中，至少一个导电柱具有截头圆锥体的形状，其基部具有约100～600微米的直径，顶部具有约40～200微米的直径。导电柱可以由导电材料构成，如铜、铜合金、金以及其组合物等。
本发明的其他优选实施例中，微电子组件包括一微电子元件，如半导体晶片或芯片，其具有一第一表面和在第一表面连接的接触件，和一覆盖着微电子元件第一表面的顺应层，该顺应层具有与微电子元件第一表面隔开的上表面。该组件还需包括覆盖于顺应层上表面并从微电子元件第一表面上凸起的导电柱，和与导电柱和微电子元件上的接触件电气互连的细长形导电元件。
顺应层可以包括多个顺应块，每个导电柱都设置于一个顺应块的顶部。顺应层需有与微电子元件的接触件对准的开口，该开口定义了从微电子元件的第一表面到顺应层上表面延伸的倾斜层。该细长的导电元件需覆盖在顺应层的倾斜表面上。
在本发明的其他实施例中，微电子组件包括具有第一表面和可与第一表面连接的接触件的微电子元件，覆盖于微电子元件第一表面的多个顺应块，每个顺应块邻接微电子元件的一个接触件设置。组件需包括覆盖于微电子元件并从微电子元件的第一表面凸出的导电柱，以及与导电柱和微电子元件的接触件电气互连的导电迹线，藉此顺应块可使导电柱相对于微电子元件的接触件是可动的。
顺应块优选具有与微电子元件第一表面隔开的上表面和在顺应块的上表面和微电子元件的第一表面间延伸的倾斜表面。导电迹线需延伸在顺应块的倾斜表面上。
本发明的这些和其他的优选实施例将在下文中更具体的描述。
附图说明
图1A是具有一个或多个接触件的微电子元件的剖面图。
图1B是图1A中微电子元件在其接触件承载表面上形成顺应层后的剖面图。
图1C是图1B中的微电子子组件在顺应层上形成细长的导电迹线后的剖面图。
图1D是图1C中的微电子子组件在导电柱或管脚形成在图1C所示的细长的导电迹线上后的剖面图。
图2示出了依照本发明另一优选实施例的微电子组件的剖面图。
图3A和3B示出了图1D中微电子组件的测试方法。
图4A和4B示出了图2中微电子组件的测试方法。
图5示出了依照本发明另一优选实施例的微电子组件。
具体实施方式
图1A-1D示出了具有电性连接的导电柱或引脚的顺应微电子组件的制作流程的剖面图。
图1A示出了一具有多个管芯或芯片的半导体晶片20。该晶片具有一第一表面或接触件承载面22，其上具有一个或多个与第一表面22连接的接触件24。该晶片在此处公开的制造过程中的任意点都可以切单成独立的芯片封装。在其他的优选实施例中，晶片20可以被单个的微电子芯片替换。在晶片20的接触件承载表面22上可以淀积或粘附上一层介电钝化层(未示出)。该钝化层可以是在半导体芯片的接触件承载表面上普通地形成的SiO2钝化层。在另一优选实施例中，隔离介电钝化层可以是如环氧树脂、聚酰亚胺树脂、光可成像介电质等。使用隔离介电钝化层时，钝化层可被旋涂或增层(built up)构造成一个在表面上平坦的片状，或是使用任何一种在本领域公知并普遍使用的电子粘合剂(electronic grade adhesives)将介电片层压在表面上。该钝化层优选覆盖晶片的接触件承载表面22并使接触件24露出，由此例如细长的粘合带这样的导电元件可以在下文中描述的后续步骤中设置。
参见图1B，在钝化层(未示出)暴露的表面上淀积或层压上一层顺应层26。该顺应层可以形成和/或具有共同受让的美国专利6211572、6284563、6465878、6847107以及未决的美国申请09/020647和10/873883中公开的形状，这些文件公开的内容在此处被引入作为参考。[TESSERA 078线的实例]采用可固化的液体将顺应层模版印刷、丝网印刷、转化模制在钝化层上，当这种液体固化时，顺应层粘附到该钝化层。或者，采用电子粘合剂(electronic gradeadhesive)以固化的顺应垫的形式将顺应层粘附到钝化层的暴露表面上。顺应层26优选具有一大体平坦的上表面28和一个在晶片20的接触件承载表面22和顺应层的上表面28之间的、渐变、倾斜过渡表面30。该倾斜过渡表面30顺着在接触件承载表面26和大体平的上表面28之间的曲率的线，或简单地以一个使得倾斜表面30相对于接触件承载表面22和大体平的表面28不那么垂直的角度倾斜。顺应层26可以由多种材料形成，如弹性系数低的材料。顺应层还可以由聚合物和其他如硅树脂、柔化环氧、聚酰亚胺、热固性聚合物、含氟聚合物和热塑性聚合物等材料构成。
在前述组件的上表面还可以淀积一电镀种籽层(没有示出)。该电镀种籽层可以用溅射(喷镀)的方式来淀积。典型的电镀种籽层材料包括钯(用于非电解镀/化学镀)、钛、镍钨和铬。然而，在其他优选实施例中，主要地使用铜种籽层。
参见图1C，在顺应层26露出的上表面上施加光刻胶层(没有示出)，然后曝光和显影，形成细长的电性导电粘合带或迹线32以形成导电垫。该电性导电粘合带较佳地与靠近导电带32一端的芯片连接件24和靠近导电粘合带32另一端的终端34电气互连。该粘合带可以直接镀在接触件24上。优选的粘合带材料包括铜、金、镍及其合金、化合物和合成物。
参见图1D，可在组件的上表面淀积或层压上一掩蔽层36使得只有终端34露出。该掩模层可以是介电材料。在组件上淀积或层压的焊料掩模可以包括通过丝网印刷的、曝光和显影的或层压的薄片，光刻胶材料或包括环氧树脂、聚酰亚胺树脂、氟聚合物等。
参见图1D，每个导电终端34的上部形成导电柱或管脚38。导电柱或管脚是通过电镀或淀积以使它们从半导体晶片20或芯片的接触件承载表面22上凸出。某些优选实施例中，优选每个导电柱38与导电迹线32的终端34连接。柱的尺寸可在一个相当大的范围内变化。某些优选实施例中，导电柱具有的高度hp高出顺应层26的上表面28约50～300微米。每个柱具有一邻近顺应层的基部40和一远离顺应层的顶部42。导电柱38可以由任何导电材料构成，但最好由铜、铜合金、金及其组合物之类的金属材料构成。例如，导电柱38可由铜和设置在柱38表面的一层金44构成。
某些优选实施例中，可由如电镀之类的传统工艺来形成导电迹线，导电柱可由普通受让的美国专利6177636中公开的方法形成，该专利的公开内容在此被引入作为参考。在其他的优选实施例中，也可以把导电柱当作单独的元件制作，然后以任何合适的将导电柱连接到导电迹线32终端的方式把导电柱组合到微电子组件上去。还在其他的一些优选实施例中，组件可以这样形成：淀积一种籽层，电镀第一端连接微电子元件的接触并且第二端淀积在顺应层上的导电迹线，将导电柱电镀在顺应层上并连接导电迹线，然后去除种籽层。组件还可以通过非电解镀导电柱来形成。该导电柱可以通过采用铜或镍进非电解镀柱来形成。
参见图2，在本发明其他的优选实施例中，微电子组件包括一在接触面122上有芯片接触件124的半导体芯片120。在半导体芯片120的接触面122上形成一个或多个顺应材料块。某些优选实施例中，一个或多个顺应块126包括一大体上平的上表面128和在上表面128和半导体芯片120的接触表面122之间过渡的倾斜表面130。组件的上部形成一个或多个导电粘合带132。每个导电粘合带132具有一电连接接触124的第一端和一覆在顺应块126的大体平的上表面128上的第二端134。微电子子组件的上面提供一掩蔽层136。该掩蔽层136具有开口137。导电迹线132的终端134通过开口137露出。子组件的上部形成一个或多个导电柱138。每个导电柱138较佳地与导电迹线132的终端134电气互连。导电柱可被金层144覆盖。
参见图3A，图1D中的微电子组件可用具有导电垫52的基板50进行测试，例如印刷电路板。为清楚起见，图3A和3B中的微电子组件被简化了。该微电子组件包括一具有第一表面22的晶片20和覆在晶片20的第一表面22上的顺应层。导电柱38从顺应层26的上表面28上凸出。该导电柱38与晶片20上的接触件电气互连。
参见图3A和3B，为对微电子组件测试，导电柱38的顶部42与电路化基板50的导电垫52并列对齐。如图3B所示，导电垫的顶部压靠在导电垫上。顺应层26允许导电柱的顶部相对于晶片的接触可移动以适应柱和导电垫之间不平坦和温度不平配的需要。如果微电子组件测试成功，可以采用例如焊料或其他可熔或可导电的材料来使组件与例如印刷电路板这样的基板永久粘附。
参见图4A，图2中的微电子组件可以采用例如测试板这样具有导电垫152的基板150进行测试。为描述清楚起见，图4A和4B中显示的微电子组件被简化了。该微电子组件包括具有第一表面122的晶片120和覆在晶片120的第一表面122上的顺应块126。导电柱138从顺应块126的上表面128上凸出。导电柱138通过导电迹线132与晶片120上的接触件124电气互连。该导电迹线优选地覆在顺应块上。较佳地，该导电迹线与顺应块接触。在某些优选实施例中，导电迹线与顺应块接触并覆盖顺应块的倾斜边缘。较佳地，导电柱的顶部是微电子组件最高的部分，这样，该顶部是组件最先接合测试板上导电垫的部分。导电柱可以具有任何高度，只要该高度高于形成在顺应层或顺应块上的焊料掩蔽层并且/或者柱的顶部决定了组件的最高点。结果，在测试操作中，导电柱的顶部直接接合测试板上的导电垫，而无需如焊料或导电连接/桥这样的添加物质。
参见图4A和4B，为对微电子组件测试，导电柱138的顶部142与电路化基板150的导电垫152并列对齐。如图4B所示，导电柱138的顶部压靠在导电垫152上以在微电子组件和基板150间形成电连接。顺应层126允许导电柱138相对于晶片120上的接触件124可移动以适应柱138和测试基板上的导电垫152之间的不平坦和温度不匹配。如果微电子组件测试成功，可以采用例如焊料或其他可熔或可导电的材料来使组件与例如印刷电路板这样的基板永久粘附。
参见图5，在本发明的某些优选实施例中，导电柱238可以具有大致截头圆锥体的形状，每个柱238的基部240和顶部242是大致圆形的。在这些特定的优选实施例中，柱的基部240典型地具有约100-600微米的直径，顶部242典型地具有约40-200微米的直径。导电柱的外表面可以选择性地镀上高导电性的层，如金、金/镍、金/锇或金/钯，或选择性地镀上像锇这样的低电阻导电涂层以保证在导电柱焊接或嵌入基板时有良好的连接。
在本发明的某些优选实施例中，柱具有便于倾斜运动的形状以当顶部与接触垫接合时每个柱的顶部碰上对面的接触垫。这种倾斜运动促进了可靠的电连接。正如在未决的(co-pending)、共同受让的序列号为10/985126的美国专利申请中详细描述的，其名为“MICRO PIN GRID ARRAYWITH WIPINGACTION”，于2004年11月10日申请，该文件公开的内容在此被引入作为参考，可以以促进擦拭动作并在另一方面便于柱和接触的接合的特征来提供该导电柱。具有其他的促进擦拭和/或好的电连接的形状与设计的导电柱可见于未决的/共同受让的序列号为10/985119的美国申请，于2004年11月10日申请的，题为“MICROPIN GRID WITH PIN MOTION ISOLATION”和共同受让的申请序列号为11/014439的美国专利申请，于2004年12月16日申请的，题为“MICROPACKAGE AND METHODS THEREFOR”，这些文件公开的在此被引入作为参考。
在本发明的某些优选实施例中，为促进微电子元件间电连接的形成及便于微电子封装的测试，可在一个或多个微电子封装的电可导部分提供颗粒涂敷，正如在美国专利4804132和5083697中公开的那样，该文件的公开在此被引入作为参考。优选在导电部分例如导电柱的导电终端或顶端提供颗粒涂敷。在一个特定的优选实施例中，颗粒涂敷是使用标准光刻技术在微电子元件的导电部分上选择性地电镀的金属化金刚石晶体涂敷。在操作中，具有金刚石晶体涂敷的导电部分可被压在对面的接触垫上以刺穿存在于接触垫的外表面上的氧化层。在传统擦拭动作之外，通过对氧化层的刺穿，金刚石晶体涂敷促进形成了可靠的电连接。
还可以通过在未决的、共同受让的美国申请序列号为10/959465的，于2004年10月6日申请并题为“Formation of Circuitry With Modification of FeatureHeight”中公开的工艺来制作导电柱，该文件的公开在此被引入作为参考。
虽然本发明不局限于任何特定的操作理论，可以相信按此处公开的在顺应材料上形成导电柱可以提供一种适应于温度不匹配并确保形成适当的电连接的顺应晶片级或芯片封装。此外，使用导电管脚或导电柱使得微电子组件和/或晶片可以通过将导电柱顶部直接邻接到测试板上的接触来进行测试，而无需使用测试凹槽。
虽然本发明以公开了一种以特定顺序制作微电子组件或晶片的方法，但在本发明的范围之内这个顺序还可以更换。
在某些优选实施例中，这里公开的结构可以用于制作测试板，其具有顺应层和从顺应层凸出的导电柱。在测试晶片或管芯时，裸露的晶片或管芯上的接触与导电柱的顶端相邻接。
虽然此处本发明是以特定的实施例作为参考来介绍的，但可以理解这些实施例只是对本发明的应用和原理做的介绍。因此，可以理解，在不背离本发明的范围和精神的条件下，可以对描述的实施例作许多修正和设计出其它组合，本发明的范围将由所附的权利要求所限定。
工业实用性
本发明在微电子工业具有实用性。

Claims (29)

1.一种微电子组件，包括：
一具有第一表面和该第一表面上的接触件的微电子元件；
一覆盖所述微电子元件的第一表面的顺应层；
在所述顺应层的上表面上的导电迹线，所述导电迹线与所述接触件相连，
覆盖在所述的顺应层上并从所述导电迹线凸出的导电柱，所述的导电柱与所述微电子元件的所述接触件电气互连，
其中，所述顺应层具有一平坦的上表面和一倾斜表面，导电柱从所述上表面上凸出，并且具有高出该上表面50-300微米的高度。
2.如权利要求1所述的组件，其特征在于，所述的导电柱具有决定了所述组件最高点的顶端。
3.如权利要求1所述的组件，其特征在于，所述顺应层具有与所述微电子组件的所述接触件对准的开口。
4.如权利要求3所述的组件，其特征在于，所述导电迹线经过所述顺应层的开口，所述导电迹线与所述导电柱和所述微电子元件的所述接触件电气互连。
5.如权利要求1所述的组件，其特征在于，所述的微电子元件是半导体晶片。
6.如权利要求1所述的组件，其特征在于，所述的微电子元件是半导体芯片。
7.如权利要求1所述的组件，其特征在于，还包括设置于所述微电子元件的第一表面和所述顺应层之间的介电钝化层。
8.如权利要求1所述的组件，其特征在于，所述的顺应层包括一具有低弹性系数的材料。
9.如权利要求1所述的组件，其特征在于，所述的顺应层包括一介电材料。
10.如权利要求1所述的组件，其特征在于，所述的顺应层包括由硅树脂、柔化环氧、聚酰亚胺、热固性聚合物、含氟聚合物和热塑性聚合物组成的组中选取的一种材料。
11.如权利要求1所述的组件，其特征在于，所述顺应层的所述倾斜表面在所述顺应层的上表面和所述微电子元件的第一表面之间延伸。
12.如权利要求11所述的组件，其特征在于，该倾斜表面包括至少一个弯曲的表面。
13.如权利要求12所述的组件，其特征在于，该至少一个弯曲的表面包括一从所述微电子元件的第一表面延伸的一弯曲表面。
14.如权利要求12所述的组件，其特征在于，其中该至少一个弯曲的表面包括一从所述顺应层的上表面延伸的一弯曲表面。
15.如权利要求1所述的组件，其特征在于，所述导电迹线包括从铜、金和镍组成的组中选择的至少一种材料。
16.如权利要求1所述的组件，其特征在于，所述顺应层包括覆盖于所述微电子元件的第一表面的多个顺应块，所述导电柱的至少一个设置在所述顺应块的至少一个上。
17.如权利要求16所述的组件，其特征在于，所述导电柱设置在所述顺应块的上面。
18.如权利要求1所述的组件，其特征在于，所述导电柱具有一邻近所述顺应层的基部和一远离所述顺应层的顶部。
19.如权利要求18所述的组件，其特征在于，所述导电柱的至少一个具有截头圆锥体的形状，其基部直径为100～600微米，顶部直径为40～200微米。
20.如权利要求1所述的组件，其特征在于，其中所述导电柱包括导电的材料。
21.如权利要求1所述的组件，其特征在于，所述导电柱包括从铜、铜合金、金及其组合物的组成的组中选取的材料。
22.一种微电子组件，包括：
一具有第一表面和在该第一表面上的接触件的微电子元件；
一覆盖所述微电子元件的第一表面的顺应层，所述的顺应层具有一与所述微电子元件的第一表面隔开的上表面；
覆盖所述的顺应层的上表面并从所述的微电子元件的第一表面凸出的导电柱；
与所述导电柱和所述微电子元件的所述接触件电气互连的且位于所述导电柱下方的细长的导电元件，
其中，所述顺应层具有一平坦的上表面和一倾斜表面，导电柱从所述上表面上凸出，并且具有高出该上表面50-300微米的高度。
23.如权利要求22所述的组件，其特征在于，所述微电子元件是半导体晶片。
24.如权利要求22所述的组件，其特征在于，所述微电子元件是半导体芯片。
25.如权利要求22所述的组件，其特征在于，所述顺应层包括多个顺应块，每个所述导电柱设置在所述顺应块的一个之上。
26.如权利要求22所述的组件，其特征在于，所述顺应层具有与所述微电子元件的所述接触件对准的开口，所述开口限定了从所述微电子元件的第一表面到所述顺应层的上表面延伸的所述顺应层的倾斜表面，所述的细长的导电元件覆在所述顺应层的倾斜表面上。
27.一种微电子组件，包括：
一具有第一表面和该第一表面上的接触件的微电子元件；
覆盖所述微电子元件的第一表面的多个顺应块，每个所述的顺应块设置为相邻所述微电子元件的一个所述接触件；
覆盖所述微电子元件并从所述微电子元件的第一表面凸出的蚀刻的导电柱；
与所述导电柱和所述微电子元件的所述接触件电气互连的导电迹线，所述的顺应块使所述的导电柱相对所述微电子元件的所述接触件移动，
其中，所述多个顺应块中的至少一个具有平坦的上表面和倾斜表面，导电柱从所述上表面上凸出，并且具有高出该上表面50-300微米的高度。
28.如权利要求27所述的组件，其特征在于，所述顺应块具有与所述微电子元件的第一表面隔开设置的上表面和延伸于所述顺应块的上表面和所述微电子元件的第一表面之间的倾斜表面。
29.如权利要求28所述的组件，其特征在于，所述的导电迹线在所述顺应块的倾斜表面上延伸。
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