CN100576462C - 减小厚绝缘体层的粗糙度的方法 - Google Patents

减小厚绝缘体层的粗糙度的方法 Download PDF

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Publication number
CN100576462C
CN100576462C CN200680030390A CN200680030390A CN100576462C CN 100576462 C CN100576462 C CN 100576462C CN 200680030390 A CN200680030390 A CN 200680030390A CN 200680030390 A CN200680030390 A CN 200680030390A CN 100576462 C CN100576462 C CN 100576462C
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insulator layer
plasma
substrate
layer
roughness
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Expired - Lifetime
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Chinese (zh)
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CN101243545A (zh
Inventor
尼古拉斯·达瓦尔
塞巴斯蒂安·凯尔迪勒
塞西尔·奥尔耐特
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Soitec SA
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Soitec SA
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H10P95/064—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Magnetic Heads (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
CN200680030390A 2005-07-13 2006-07-12 减小厚绝缘体层的粗糙度的方法 Expired - Lifetime CN100576462C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0507573A FR2888663B1 (fr) 2005-07-13 2005-07-13 Procede de diminution de la rugosite d'une couche epaisse d'isolant
FR05/07573 2005-07-13

Publications (2)

Publication Number Publication Date
CN101243545A CN101243545A (zh) 2008-08-13
CN100576462C true CN100576462C (zh) 2009-12-30

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CN200680030390A Expired - Lifetime CN100576462C (zh) 2005-07-13 2006-07-12 减小厚绝缘体层的粗糙度的方法

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US (2) US7446019B2 (cg-RX-API-DMAC7.html)
EP (1) EP1902463B1 (cg-RX-API-DMAC7.html)
JP (1) JP4927080B2 (cg-RX-API-DMAC7.html)
KR (1) KR100958467B1 (cg-RX-API-DMAC7.html)
CN (1) CN100576462C (cg-RX-API-DMAC7.html)
AT (1) ATE524828T1 (cg-RX-API-DMAC7.html)
FR (1) FR2888663B1 (cg-RX-API-DMAC7.html)
SG (1) SG151287A1 (cg-RX-API-DMAC7.html)
WO (1) WO2007006803A1 (cg-RX-API-DMAC7.html)

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FR2911598B1 (fr) * 2007-01-22 2009-04-17 Soitec Silicon On Insulator Procede de rugosification de surface.
FR2911597B1 (fr) * 2007-01-22 2009-05-01 Soitec Silicon On Insulator Procede de formation et de controle d'interfaces rugueuses.
FR2912839B1 (fr) * 2007-02-16 2009-05-15 Soitec Silicon On Insulator Amelioration de la qualite de l'interface de collage par nettoyage froid et collage a chaud
WO2008123116A1 (en) * 2007-03-26 2008-10-16 Semiconductor Energy Laboratory Co., Ltd. Soi substrate and method for manufacturing soi substrate
WO2008123117A1 (en) * 2007-03-26 2008-10-16 Semiconductor Energy Laboratory Co., Ltd. Soi substrate and method for manufacturing soi substrate
CN101281912B (zh) * 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
CN101657882B (zh) * 2007-04-13 2012-05-30 株式会社半导体能源研究所 显示器件、用于制造显示器件的方法、以及soi衬底
KR101440930B1 (ko) * 2007-04-20 2014-09-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Ｓｏｉ 기판의 제작방법
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US7763502B2 (en) * 2007-06-22 2010-07-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device
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JP5503876B2 (ja) * 2008-01-24 2014-05-28 株式会社半導体エネルギー研究所 半導体基板の製造方法
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CN101981654B (zh) 2008-04-01 2012-11-21 信越化学工业株式会社 Soi基板的制造方法
FR2931585B1 (fr) * 2008-05-26 2010-09-03 Commissariat Energie Atomique Traitement de surface par plasma d'azote dans un procede de collage direct
JP5548395B2 (ja) * 2008-06-25 2014-07-16 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
JP5663150B2 (ja) * 2008-07-22 2015-02-04 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
US20100022070A1 (en) * 2008-07-22 2010-01-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
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US8741740B2 (en) * 2008-10-02 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
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JP5917036B2 (ja) 2010-08-05 2016-05-11 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
JP2012156495A (ja) 2011-01-07 2012-08-16 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
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KR102148336B1 (ko) * 2013-11-26 2020-08-27 삼성전자주식회사 표면 처리 방법, 반도체 제조 방법 및 이에 의해 제조된 반도체 장치
WO2015147952A2 (en) * 2014-01-29 2015-10-01 Palvannanathan Ganesan Floating nuclear power reactor with a self-cooling containment structure and an emergency heat exchange system
CN107004639B (zh) * 2014-07-08 2021-02-05 麻省理工学院 衬底制造方法
FR3036200B1 (fr) * 2015-05-13 2017-05-05 Soitec Silicon On Insulator Methode de calibration pour equipements de traitement thermique
EP3391151B1 (en) * 2015-12-18 2022-02-16 ASML Netherlands B.V. A method of manufacturing a membrane assembly for euv lithography, a membrane assembly, a lithographic apparatus, and a device manufacturing method
FR3045939B1 (fr) 2015-12-22 2018-03-30 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de collage direct entre deux structures
WO2019022826A1 (en) * 2017-07-24 2019-01-31 Applied Materials, Inc. PRETREATMENT APPARATUS FOR IMPROVING THE CONTINUITY OF ULTRA-THIN AMORPHOUS SILICON FILM ON SILICON OXIDE
FR3079345B1 (fr) * 2018-03-26 2020-02-21 Soitec Procede de fabrication d'un substrat pour dispositif radiofrequence
CN114203546B (zh) * 2020-09-18 2026-04-03 中芯集成电路（宁波）有限公司 半导体器件及其制造方法
JP7487659B2 (ja) * 2020-12-25 2024-05-21 株式会社Sumco Ｓｏｉウェーハの製造方法
CN114688950B (zh) * 2022-05-31 2022-08-23 陕西建工第一建设集团有限公司 一种建筑施工用铝合金板平整检测装置
FR3171514A1 (fr) * 2025-01-22 2026-07-24 Commissariat A L' Energie Atomique Et Aux Energies Alternatives Procédé de fabrication d’un guide d’ondes

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Publication number Publication date
US7446019B2 (en) 2008-11-04
KR100958467B1 (ko) 2010-05-17
JP2009501440A (ja) 2009-01-15
FR2888663A1 (fr) 2007-01-19
JP4927080B2 (ja) 2012-05-09
CN101243545A (zh) 2008-08-13
SG151287A1 (en) 2009-04-30
KR20080031747A (ko) 2008-04-10
WO2007006803A1 (fr) 2007-01-18
US20070020947A1 (en) 2007-01-25
FR2888663B1 (fr) 2008-04-18
EP1902463A1 (fr) 2008-03-26
ATE524828T1 (de) 2011-09-15
US8183128B2 (en) 2012-05-22
US20090023267A1 (en) 2009-01-22
EP1902463B1 (fr) 2011-09-14

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