CN100550390C - Eeprom - Google Patents
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- Publication number
- CN100550390C CN100550390C CNB2006101630117A CN200610163011A CN100550390C CN 100550390 C CN100550390 C CN 100550390C CN B2006101630117 A CNB2006101630117 A CN B2006101630117A CN 200610163011 A CN200610163011 A CN 200610163011A CN 100550390 C CN100550390 C CN 100550390C
- Authority
- CN
- China
- Prior art keywords
- diffusion layer
- trap
- floating grid
- eeprom
- area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000009792 diffusion process Methods 0.000 claims abstract description 150
- 238000007667 floating Methods 0.000 claims abstract description 86
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 179
- 239000003990 capacitor Substances 0.000 description 68
- 230000000694 effects Effects 0.000 description 15
- 238000009825 accumulation Methods 0.000 description 12
- 238000013461 design Methods 0.000 description 7
- 101100204059 Caenorhabditis elegans trap-2 gene Proteins 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 230000007850 degeneration Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005342079 | 2005-11-28 | ||
JP2005342079A JP2007149947A (ja) | 2005-11-28 | 2005-11-28 | 不揮発性メモリセル及びeeprom |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101026167A CN101026167A (zh) | 2007-08-29 |
CN100550390C true CN100550390C (zh) | 2009-10-14 |
Family
ID=38086607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006101630117A Expired - Fee Related CN100550390C (zh) | 2005-11-28 | 2006-11-28 | Eeprom |
Country Status (4)
Country | Link |
---|---|
US (1) | US20070120176A1 (zh) |
JP (1) | JP2007149947A (zh) |
KR (1) | KR100846327B1 (zh) |
CN (1) | CN100550390C (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4800109B2 (ja) * | 2005-09-13 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5374546B2 (ja) * | 2005-09-13 | 2013-12-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2007149997A (ja) * | 2005-11-29 | 2007-06-14 | Nec Electronics Corp | 不揮発性メモリセル及びeeprom |
JP5130571B2 (ja) * | 2007-06-19 | 2013-01-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR100953348B1 (ko) * | 2007-12-31 | 2010-04-20 | 주식회사 동부하이텍 | 단일 폴리형 이이피롬 및 그의 제조 방법 |
US8472251B2 (en) * | 2008-02-11 | 2013-06-25 | Aplus Flash Technology, Inc. | Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory device |
US7919368B2 (en) * | 2009-05-29 | 2011-04-05 | Texas Instruments Incorporated | Area-efficient electrically erasable programmable memory cell |
US8362535B2 (en) * | 2009-09-29 | 2013-01-29 | United Microelectronics Corp. | Layout structure of non-volatile memory device |
US9087587B2 (en) | 2013-03-15 | 2015-07-21 | GlobalFoundries, Inc. | Integrated circuits and methods for operating integrated circuits with non-volatile memory |
KR102166525B1 (ko) * | 2014-04-18 | 2020-10-15 | 에스케이하이닉스 주식회사 | 단일층의 게이트를 갖는 불휘발성 메모리소자 및 그 동작방법과, 이를 이용한 메모리 셀어레이 |
JP6876397B2 (ja) * | 2016-09-21 | 2021-05-26 | ラピスセミコンダクタ株式会社 | 半導体メモリおよび半導体メモリの製造方法 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2957615B2 (ja) * | 1989-11-27 | 1999-10-06 | 三菱電機株式会社 | 不揮発性半導体記憶装置 |
US5640346A (en) * | 1992-03-03 | 1997-06-17 | Harris Corporation | Electrically programmable memory cell |
JP2924832B2 (ja) * | 1996-11-28 | 1999-07-26 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3147108B2 (ja) * | 1999-01-20 | 2001-03-19 | 日本電気株式会社 | 半導体記憶装置の製造方法 |
US6084262A (en) * | 1999-08-19 | 2000-07-04 | Worldwide Semiconductor Mfg | Etox cell programmed by band-to-band tunneling induced substrate hot electron and read by gate induced drain leakage current |
JP2001185633A (ja) * | 1999-12-15 | 2001-07-06 | Texas Instr Inc <Ti> | Eepromデバイス |
US6191980B1 (en) * | 2000-03-07 | 2001-02-20 | Lucent Technologies, Inc. | Single-poly non-volatile memory cell having low-capacitance erase gate |
US6324095B1 (en) * | 2000-05-09 | 2001-11-27 | Agere Systems Guardian Corp. | Low voltage flash EEPROM memory cell with improved data retention |
US6570212B1 (en) * | 2000-05-24 | 2003-05-27 | Lattice Semiconductor Corporation | Complementary avalanche injection EEPROM cell |
JP2002158301A (ja) * | 2000-11-22 | 2002-05-31 | Denso Corp | 半導体記憶装置及びその製造方法 |
JP2002198439A (ja) * | 2000-12-26 | 2002-07-12 | Sharp Corp | 半導体装置および携帯電子機器 |
KR100395755B1 (ko) * | 2001-06-28 | 2003-08-21 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
JP2003031701A (ja) * | 2001-07-13 | 2003-01-31 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置およびその製造方法 |
US7130213B1 (en) * | 2001-12-06 | 2006-10-31 | Virage Logic Corporation | Methods and apparatuses for a dual-polarity non-volatile memory cell |
US6788574B1 (en) * | 2001-12-06 | 2004-09-07 | Virage Logic Corporation | Electrically-alterable non-volatile memory cell |
US6992938B1 (en) * | 2001-12-06 | 2006-01-31 | Virage Logic Corporation | Methods and apparatuses for test circuitry for a dual-polarity non-volatile memory cell |
FR2838554B1 (fr) * | 2002-04-15 | 2004-07-09 | St Microelectronics Sa | Dispositif semiconducteur de memoire, non volatile, programmable et effacable electriquement, a une seule couche de materiau de grille, et plan memoire correspondant |
US6762453B1 (en) * | 2002-12-19 | 2004-07-13 | Delphi Technologies, Inc. | Programmable memory transistor |
JP2005175411A (ja) * | 2003-12-12 | 2005-06-30 | Genusion:Kk | 半導体装置、及びその製造方法 |
US6862216B1 (en) * | 2004-06-29 | 2005-03-01 | National Semiconductor Corporation | Non-volatile memory cell with gated diode and MOS transistor and method for using such cell |
US7020027B1 (en) * | 2004-07-08 | 2006-03-28 | National Semiconductor Corporation | Programming method for nonvolatile memory cell |
-
2005
- 2005-11-28 JP JP2005342079A patent/JP2007149947A/ja active Pending
-
2006
- 2006-11-27 KR KR1020060117506A patent/KR100846327B1/ko not_active IP Right Cessation
- 2006-11-27 US US11/604,208 patent/US20070120176A1/en not_active Abandoned
- 2006-11-28 CN CNB2006101630117A patent/CN100550390C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2007149947A (ja) | 2007-06-14 |
KR20070055966A (ko) | 2007-05-31 |
KR100846327B1 (ko) | 2008-07-15 |
US20070120176A1 (en) | 2007-05-31 |
CN101026167A (zh) | 2007-08-29 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: RENESAS ELECTRONICS CO., LTD. Free format text: FORMER NAME: NEC CORP. |
|
CP01 | Change in the name or title of a patent holder |
Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corporation Address before: Kanagawa, Japan Patentee before: NEC Corp. |
|
CP02 | Change in the address of a patent holder | ||
CP02 | Change in the address of a patent holder |
Address after: Tokyo, Japan Patentee after: Renesas Electronics Corporation Address before: Kanagawa, Japan Patentee before: Renesas Electronics Corporation |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091014 Termination date: 20191128 |