CN100539116C - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN100539116C
CN100539116C CNB2005100825221A CN200510082522A CN100539116C CN 100539116 C CN100539116 C CN 100539116C CN B2005100825221 A CNB2005100825221 A CN B2005100825221A CN 200510082522 A CN200510082522 A CN 200510082522A CN 100539116 C CN100539116 C CN 100539116C
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CN
China
Prior art keywords
insulating film
film
organosiloxane
layer
wiring
Prior art date
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Expired - Fee Related
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CNB2005100825221A
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English (en)
Chinese (zh)
Other versions
CN1728375A (zh
Inventor
古泽健志
三浦典子
后藤欣哉
松浦正纯
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Renesas Electronics Corp
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Renesas Technology Corp
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Publication of CN1728375A publication Critical patent/CN1728375A/zh
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6548Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/20Cleaning during device manufacture
    • H10P70/27Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H10P70/277Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers the processing being a planarisation of conductive layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48Insulating materials thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6506Formation of intermediate materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6684Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H10P14/6686Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
CNB2005100825221A 2004-07-06 2005-07-06 半导体装置及其制造方法 Expired - Fee Related CN100539116C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP199709/04 2004-07-06
JP2004199709A JP4854938B2 (ja) 2004-07-06 2004-07-06 半導体装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN2008101454383A Division CN101330045B (zh) 2004-07-06 2005-07-06 半导体装置的制造方法

Publications (2)

Publication Number Publication Date
CN1728375A CN1728375A (zh) 2006-02-01
CN100539116C true CN100539116C (zh) 2009-09-09

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Family Applications (2)

Application Number Title Priority Date Filing Date
CNB2005100825221A Expired - Fee Related CN100539116C (zh) 2004-07-06 2005-07-06 半导体装置及其制造方法
CN2008101454383A Expired - Fee Related CN101330045B (zh) 2004-07-06 2005-07-06 半导体装置的制造方法

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Country Status (5)

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US (2) US7602063B2 (enExample)
JP (1) JP4854938B2 (enExample)
KR (1) KR101139034B1 (enExample)
CN (2) CN100539116C (enExample)
TW (1) TWI413212B (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2006126536A1 (ja) * 2005-05-25 2008-12-25 日本電気株式会社 半導体装置及びその製造方法
JP5060037B2 (ja) * 2005-10-07 2012-10-31 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8368220B2 (en) * 2005-10-18 2013-02-05 Taiwan Semiconductor Manufacturing Co. Ltd. Anchored damascene structures
US8043957B2 (en) 2006-05-17 2011-10-25 Nec Corporation Semiconductor device, method for manufacturing semiconductor device and apparatus for manufacturing semiconductor
KR100829385B1 (ko) * 2006-11-27 2008-05-13 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
JP2011249678A (ja) * 2010-05-28 2011-12-08 Elpida Memory Inc 半導体装置及びその製造方法
JP5972679B2 (ja) * 2012-06-18 2016-08-17 東海旅客鉄道株式会社 炭素含有酸化ケイ素膜の製造方法
US10755995B2 (en) 2018-06-28 2020-08-25 Taiwan Semiconductor Manufacturing Co., Ltd. Warpage control of semiconductor die
JP2022037944A (ja) * 2018-12-28 2022-03-10 日産化学株式会社 水素ガスを用いた前処理によるレジスト下層膜のエッチング耐性を向上する方法
US11410879B2 (en) * 2020-04-07 2022-08-09 International Business Machines Corporation Subtractive back-end-of-line vias
US11456242B2 (en) * 2020-07-21 2022-09-27 Nanya Technology Corporation Semiconductor device with stress-relieving structures and method for fabricating the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340569A (ja) * 1999-03-19 2000-12-08 Toshiba Corp 半導体装置の配線構造及びその形成方法
JP2002329718A (ja) * 2001-04-06 2002-11-15 Asm Japan Kk 半導体基板上のシロキサン重合体膜及びその製造方法
US20030162410A1 (en) * 1998-02-11 2003-08-28 Applied Materials, Inc. Method of depositing low K films
US20030201465A1 (en) * 2002-04-18 2003-10-30 Daisuke Ryuzaki Semiconductor manufacturing method for low-k insulating film
US6740602B1 (en) * 2003-03-17 2004-05-25 Asm Japan K.K. Method of forming low-dielectric constant film on semiconductor substrate by plasma reaction using high-RF power

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JP3726226B2 (ja) * 1998-02-05 2005-12-14 日本エー・エス・エム株式会社 絶縁膜及びその製造方法
JP3078811B1 (ja) * 1998-03-26 2000-08-21 松下電器産業株式会社 配線構造体の形成方法
US6068884A (en) * 1998-04-28 2000-05-30 Silcon Valley Group Thermal Systems, Llc Method of making low κ dielectric inorganic/organic hybrid films
JP3197007B2 (ja) 1999-06-08 2001-08-13 日本エー・エス・エム株式会社 半導体基板上のシリコン重合体絶縁膜及びその膜を形成する方法
JP4554011B2 (ja) * 1999-08-10 2010-09-29 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP3615979B2 (ja) 2000-01-18 2005-02-02 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP2001338978A (ja) * 2000-05-25 2001-12-07 Hitachi Ltd 半導体装置及びその製造方法
JP2003031580A (ja) * 2001-07-18 2003-01-31 Toshiba Corp 半導体装置の製造方法
JP3545364B2 (ja) * 2000-12-19 2004-07-21 キヤノン販売株式会社 半導体装置及びその製造方法
SG98468A1 (en) * 2001-01-17 2003-09-19 Air Prod & Chem Organosilicon precursors for interlayer dielectric films with low dielectric constants
JP3924501B2 (ja) * 2001-06-25 2007-06-06 Necエレクトロニクス株式会社 集積回路装置の製造方法
JP2003142579A (ja) * 2001-11-07 2003-05-16 Hitachi Ltd 半導体装置の製造方法および半導体装置
JP2004023030A (ja) * 2002-06-20 2004-01-22 Matsushita Electric Ind Co Ltd 半導体装置の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030162410A1 (en) * 1998-02-11 2003-08-28 Applied Materials, Inc. Method of depositing low K films
JP2000340569A (ja) * 1999-03-19 2000-12-08 Toshiba Corp 半導体装置の配線構造及びその形成方法
JP2002329718A (ja) * 2001-04-06 2002-11-15 Asm Japan Kk 半導体基板上のシロキサン重合体膜及びその製造方法
US20030201465A1 (en) * 2002-04-18 2003-10-30 Daisuke Ryuzaki Semiconductor manufacturing method for low-k insulating film
US6740602B1 (en) * 2003-03-17 2004-05-25 Asm Japan K.K. Method of forming low-dielectric constant film on semiconductor substrate by plasma reaction using high-RF power

Also Published As

Publication number Publication date
US7602063B2 (en) 2009-10-13
US20090263963A1 (en) 2009-10-22
US20060006530A1 (en) 2006-01-12
KR101139034B1 (ko) 2012-04-30
CN101330045B (zh) 2010-08-11
CN101330045A (zh) 2008-12-24
KR20060049890A (ko) 2006-05-19
JP4854938B2 (ja) 2012-01-18
TW200608519A (en) 2006-03-01
TWI413212B (zh) 2013-10-21
US7960279B2 (en) 2011-06-14
CN1728375A (zh) 2006-02-01
JP2006024641A (ja) 2006-01-26

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