CN100495730C - 半导体器件以及图像显示装置 - Google Patents

半导体器件以及图像显示装置 Download PDF

Info

Publication number
CN100495730C
CN100495730C CNB2006100680458A CN200610068045A CN100495730C CN 100495730 C CN100495730 C CN 100495730C CN B2006100680458 A CNB2006100680458 A CN B2006100680458A CN 200610068045 A CN200610068045 A CN 200610068045A CN 100495730 C CN100495730 C CN 100495730C
Authority
CN
China
Prior art keywords
impurity region
region
impurity
channel
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2006100680458A
Other languages
English (en)
Chinese (zh)
Other versions
CN1838433A (zh
Inventor
丰田吉彦
中川直紀
吉野太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN1838433A publication Critical patent/CN1838433A/zh
Application granted granted Critical
Publication of CN100495730C publication Critical patent/CN100495730C/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6719—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having significant overlap between the lightly-doped drains and the gate electrodes, e.g. gate-overlapped LDD [GOLDD] TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6717—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6721—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having lightly-doped extensions consisting of multiple lightly doped zones or having non-homogeneous dopant distributions, e.g. graded LDD

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
CNB2006100680458A 2005-03-24 2006-03-24 半导体器件以及图像显示装置 Expired - Fee Related CN100495730C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005086674 2005-03-24
JP2005086674A JP2006269808A (ja) 2005-03-24 2005-03-24 半導体装置および画像表示装置

Publications (2)

Publication Number Publication Date
CN1838433A CN1838433A (zh) 2006-09-27
CN100495730C true CN100495730C (zh) 2009-06-03

Family

ID=37015739

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006100680458A Expired - Fee Related CN100495730C (zh) 2005-03-24 2006-03-24 半导体器件以及图像显示装置

Country Status (5)

Country Link
US (1) US7612378B2 (enExample)
JP (1) JP2006269808A (enExample)
KR (1) KR100727714B1 (enExample)
CN (1) CN100495730C (enExample)
TW (1) TWI313056B (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI418036B (zh) * 2006-12-05 2013-12-01 Semiconductor Energy Lab 半導體裝置及其製造方法
JP5041255B2 (ja) * 2007-04-18 2012-10-03 三菱電機株式会社 半導体薄膜の製造方法
WO2009096148A1 (ja) * 2008-01-29 2009-08-06 Sharp Kabushiki Kaisha 半導体装置及びその製造方法
KR101274706B1 (ko) * 2008-05-16 2013-06-12 엘지디스플레이 주식회사 액정표시장치 및 그 제조방법
KR101634411B1 (ko) * 2008-10-31 2016-06-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 구동 회로, 표시 장치 및 전자 장치
KR102181301B1 (ko) 2009-07-18 2020-11-20 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치 제조 방법
JP5811556B2 (ja) * 2011-03-18 2015-11-11 セイコーエプソン株式会社 半導体装置の製造方法
KR102022051B1 (ko) 2012-11-14 2019-09-18 삼성디스플레이 주식회사 박막트랜지스터 및 이를 포함하는 유기발광 화소
JP2015125997A (ja) * 2013-12-25 2015-07-06 キヤノン株式会社 撮像装置、撮像システム、および、撮像装置の製造方法。
JP6523197B2 (ja) 2016-03-18 2019-05-29 東芝メモリ株式会社 不揮発性半導体記憶装置およびその製造方法
JP7117974B2 (ja) * 2018-10-30 2022-08-15 キヤノン株式会社 表示装置および電子機器
CN109785795A (zh) * 2019-03-11 2019-05-21 中国计量大学 一种采用ldd结构的硅基oled微显示器件驱动电路
WO2022091348A1 (ja) * 2020-10-30 2022-05-05 シャープ株式会社 表示装置および表示装置の製造方法
CN116670834A (zh) * 2021-12-27 2023-08-29 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、显示基板
CN119381387B (zh) * 2024-12-26 2025-05-16 浙江创芯集成电路有限公司 半导体ldd扩展宽度测试结构及其形成方法、计算方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6235558B1 (en) * 1999-04-02 2001-05-22 Sharp Kabushiki Kaisha Method for fabricating semiconductor device
US6501098B2 (en) * 1998-11-25 2002-12-31 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227320A (en) * 1991-09-10 1993-07-13 Vlsi Technology, Inc. Method for producing gate overlapped lightly doped drain (goldd) structure for submicron transistor
US5340761A (en) * 1991-10-31 1994-08-23 Vlsi Technology, Inc. Self-aligned contacts with gate overlapped lightly doped drain (goldd) structure
US5196357A (en) * 1991-11-18 1993-03-23 Vlsi Technology, Inc. Method of making extended polysilicon self-aligned gate overlapped lightly doped drain structure for submicron transistor
AU652682B2 (en) 1992-01-09 1994-09-01 Miles Inc. Combined use of chemicals and microbials in termite control
US5358879A (en) * 1993-04-30 1994-10-25 Loral Federal Systems Company Method of making gate overlapped lightly doped drain for buried channel devices
JP4531175B2 (ja) * 1998-12-03 2010-08-25 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6545359B1 (en) 1998-12-18 2003-04-08 Semiconductor Energy Laboratory Co., Ltd. Wiring line and manufacture process thereof, and semiconductor device and manufacturing process thereof
JP4372879B2 (ja) 1999-01-29 2009-11-25 株式会社半導体エネルギー研究所 半導体装置
JP2001196594A (ja) * 1999-08-31 2001-07-19 Fujitsu Ltd 薄膜トランジスタ、液晶表示用基板及びその製造方法
US6646287B1 (en) * 1999-11-19 2003-11-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with tapered gate and insulating film
JP4493779B2 (ja) * 2000-01-31 2010-06-30 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
TW513753B (en) * 2000-03-27 2002-12-11 Semiconductor Energy Lab Semiconductor display device and manufacturing method thereof
JP2001345448A (ja) 2000-05-31 2001-12-14 Toshiba Corp 薄膜トランジスタの製造方法および薄膜トランジスタ
JP4850328B2 (ja) 2000-08-29 2012-01-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR100439345B1 (ko) * 2000-10-31 2004-07-07 피티플러스(주) 폴리실리콘 활성층을 포함하는 박막트랜지스터 및 제조 방법
CN1423841A (zh) * 2000-12-21 2003-06-11 皇家菲利浦电子有限公司 薄膜晶体管
JP4926329B2 (ja) 2001-03-27 2012-05-09 株式会社半導体エネルギー研究所 半導体装置およびその作製方法、電気器具
TW480735B (en) * 2001-04-24 2002-03-21 United Microelectronics Corp Structure and manufacturing method of polysilicon thin film transistor
JP2003332578A (ja) * 2002-05-09 2003-11-21 Sharp Corp 薄膜トランジスタ及びその製造方法並びにこれを用いた液晶表示装置
TW538529B (en) 2002-07-15 2003-06-21 Univ Nat Chiao Tung Thin film transistor structure and the manufacturing method thereof
JP2005072531A (ja) * 2003-08-28 2005-03-17 Sharp Corp 薄膜トランジスタを備えた装置およびその製造方法
JP2005333107A (ja) * 2004-04-21 2005-12-02 Mitsubishi Electric Corp 半導体装置、画像表示装置および半導体装置の製造方法
JP2005311037A (ja) * 2004-04-21 2005-11-04 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP4641741B2 (ja) * 2004-05-28 2011-03-02 三菱電機株式会社 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6501098B2 (en) * 1998-11-25 2002-12-31 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device
US6235558B1 (en) * 1999-04-02 2001-05-22 Sharp Kabushiki Kaisha Method for fabricating semiconductor device

Also Published As

Publication number Publication date
KR20060103185A (ko) 2006-09-28
KR100727714B1 (ko) 2007-06-13
TW200701446A (en) 2007-01-01
CN1838433A (zh) 2006-09-27
JP2006269808A (ja) 2006-10-05
US7612378B2 (en) 2009-11-03
US20060214229A1 (en) 2006-09-28
TWI313056B (en) 2009-08-01

Similar Documents

Publication Publication Date Title
US5396084A (en) Thin film transistor device having driving circuit and matrix circuit
CN100495730C (zh) 半导体器件以及图像显示装置
US20110012125A1 (en) Thin film transistor and active matrix display
US8987120B2 (en) Flat panel display device comprising polysilicon thin film transistor and method of manufacturing the same
US7700995B2 (en) Semiconductor device and display device
US5703382A (en) Array having multiple channel structures with continuously doped interchannel regions
US8174053B2 (en) Semiconductor device, production method thereof, and electronic device
JPH02135780A (ja) 高電圧薄膜トランジスタとその製造方法
US10424672B2 (en) Oxide semiconductor transistor
JP2008027976A (ja) 薄膜トランジスタアレイ基板、その製造方法、及び表示装置
CN100459168C (zh) 半导体器件
JP4641741B2 (ja) 半導体装置
JP2005333107A (ja) 半導体装置、画像表示装置および半導体装置の製造方法
JP5414712B2 (ja) 半導体装置
KR100488063B1 (ko) 박막 트랜지스터 및 그 제조방법
JP3469183B2 (ja) 液晶表示装置
GB2459666A (en) Thin film transistor with low leakage current
KR101001430B1 (ko) 박막 트랜지스터 및 그 제조 방법
JPH0786609A (ja) マルチゲート半導体素子
JP2008153643A (ja) 薄膜トランジスタ、薄膜トランジスタの製造方法、および表示装置
JP2005064049A (ja) 薄膜トランジスタ及びその形成方法及びこの薄膜トランジスタを用いて構成される回路及び表示装置
JP2008153641A (ja) 薄膜トランジスタ、薄膜トランジスタの製造方法、および表示装置
JP2011187500A (ja) 半導体装置およびその製造方法
KR20080039194A (ko) 박막 트랜지스터 및 그 제조 방법과, 그를 이용한 액정표시 장치 및 유기 발광 다이오드 표시 장치
KR20200121478A (ko) 이중 소스층을 가지는 박막 트랜지스터 및 그 제조 방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090603

Termination date: 20190324