CN100477208C - 制造半导体器件的方法 - Google Patents

制造半导体器件的方法 Download PDF

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Publication number
CN100477208C
CN100477208C CNB2004101048860A CN200410104886A CN100477208C CN 100477208 C CN100477208 C CN 100477208C CN B2004101048860 A CNB2004101048860 A CN B2004101048860A CN 200410104886 A CN200410104886 A CN 200410104886A CN 100477208 C CN100477208 C CN 100477208C
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semiconductor chip
semiconductor
semiconductor device
wiring substrate
chip
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CN1638122A (zh
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木下顺弘
绀野顺平
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NEC Electronics Corp
Renesas Electronics Corp
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Renesas Technology Corp
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Abstract

本发明公开了一种制造半导体器件的方法，包括如下步骤：磨半导体晶片的后面以减小其厚度；将半导体晶片的后面平整；将半导体晶片分成多个半导体芯片；在所述多个半导体芯片的电极上形成金突块；将NCP施加到封装板的前面上；以及，通过NCP将半导体芯片布置在封装板的上方，并且对半导体芯片的背面施压，从而将半导体芯片倒装粘结到封装板上。因此，可以防止当倒装粘结时NCP上升到半导体芯片的背面上，以及防止各芯片的背面和密封树脂之间的分离，从而防止由于制造和安装半导体器件的过程中的高温处理而引起的所述分离和开裂，并改进半导体器件的可靠性。

Description

制造半导体器件的方法
技术领域
本发明涉及一种半导体器件及其制造方法。具体地，本发明涉及一种在倒装片粘结中能够得到有效应用的技术。
背景技术
对于使用粘结剂的传统倒装片粘结，使用具有多阶边缘的半导体器件并将其粘结到电路上。通过具有多层结构的检测元件或者中间元件将该半导体器件和电路粘结在一起，在粘结后需要将中间元件破坏或分离，从而将其除去(参照例如专利文件1)。
[专利文件1]日本未审查专利公开No2000-216193(图1)。
作为使用倒装片粘结的半导体器件的一个示例，已知一种多片半导体器件，其包括多层半导体芯片，其中所述半导体芯片的最底层倒装粘结到接线基底上。
上述多片半导体器件由于其尺寸的减小和引脚数目的增加最好具有更窄的衬垫(电极)间距。然后，作为一种减小半导体器件的尺寸(厚度)的方法，已经提出将半导体芯片的厚度减小。即，通过研磨其后表面使半导体芯片变薄。
由于衬垫间距的减小，使得倒装粘结部分的下侧填充密封变得很困难，因为穿透树脂需要时间。所以，在安装半导体芯片之前将粘结剂应用到接线基底上，然后将半导体芯片置于粘结剂之上，并通过施加压力和热量进行倒装粘结。
本发明的发明人对研磨最底层半导体芯片的后表面和在多片半导体器件中预涂布粘结剂的技术进行了研究，并且发现了如下问题。
即，如果对半导体芯片的背面施加压力以便对该半导体芯片进行热接触粘结，那么被半导体芯片挤压的粘结剂沿着半导体芯片的侧壁上升，并且进一步到达半导体芯片的背面。如果研磨痕迹(非均匀)保持在半导体芯片的背面上，则粘结剂经过芯片边缘的掩膜痕迹上升到背面上，因此粘结剂粘结到最底层半导体芯片的背面上。例如，该粘结剂是环氧基的非导电(绝缘)树脂，主要是热固树脂。
如果树脂粘结剂粘结到半导体芯片的背面上，半导体芯片会由于第二层半导体芯片而从密封树脂或模粘结剂(die bonding agent)(树脂粘结剂)脱离，这是因为树脂粘结剂粘结到其他树脂上的粘结能力较差，然后水聚集在该分离位置。如果在这种状态下继续制造，水会在后续执行的高温处理过程中由于热量而膨胀(例如基底的焊料回流或安装阶段)，并且半导体芯片从所述分离位置的上方裂开。
发明内容
本发明的一个目的在于提供一种能够改进可靠性的半导体器件及其制造方法。
本发明的另一个目的在于提供一种厚度减小的半导体器件及其制造方法。
通过下文结合附图的描述可以使本发明的上述和其他的目的和特征变得明了。
以下简述本专利申请公开的本发明的典型形式。
即，根据本发明的第一方面，提供一种半导体器件，包括：
具有前面和后面的接线基底；
具有主表面和背面的第一半导体芯片，其通过突出的电极倒装粘结到所述接线基底的前面上；
具有主表面和背面的第二半导体芯片，其通过利用粘结剂将其背面粘结到第一半导体芯片的背面上而安装到第一半导体芯片的上方；
设置在接线基底和第一半导体芯片之间的非导电树脂粘结剂；以及
形成在接线基底的前面上方的密封体，其用来将第一和第二半导体芯片树脂密封，
其中，所述第一半导体芯片通过研磨其背面而被变薄，并通过研磨后的抛光将其背面平整。
根据本发明的第二方面，提供一种制造半导体器件的方法，包括如下步骤：
(a)研磨半导体晶片的后面以减小其厚度；
(b)在步骤(a)之后，将半导体晶片的后面平整；
(c)在步骤(b)之后，将半导体晶片分成多个半导体芯片；
(d)在步骤(c)之后，在所述多个半导体芯片上形成突出电极；
(e)将非导电树脂粘结剂施加到接线基底的前面上；
(f)通过树脂粘结剂将半导体芯片布置在接线基底的前面的上方，并且对半导体芯片的背面施压，从而通过所述突出电极将半导体芯片倒装粘结到接线基底上；以及
(g)利用树脂将半导体芯片密封。
根据本发明的另一方面，提供一种制造半导体器件的方法，包括如下步骤：
(a)研磨半导体晶片的后面以减小其厚度；
(b)在步骤(a)之后，将半导体晶片的后面平整；
(c)在步骤(b)之后，将半导体晶片分成多个半导体芯片；
(d)在步骤(c)之后，在所述多个半导体芯片上形成突出电极；
(e)将非导电树脂粘结剂施加到接线基底的前面上；
(f)通过树脂粘结剂将半导体芯片布置在接线基底的前面的上方；
(g)在步骤(f)之后，对半导体芯片的平整背面施压，从而通过所述突出电极将半导体芯片倒装粘结到接线基底上；以及
(h)利用树脂将半导体芯片密封。
根据本发明的另一方面，提供一种制造半导体器件的方法，包括如下步骤：
(a)准备多个半导体芯片，每个都具有前面和后面，研磨半导体晶片的后面以减小其厚度，然后在研磨之后将半导体晶片的后面平整；
(b)在所述多个半导体芯片上形成突出电极；
(c)将非导电树脂粘结剂施加到接线基底的前面上；
(d)通过树脂粘结剂将半导体芯片布置在接线基底的前面的上方；
(e)对半导体芯片的平整背面施压，从而通过所述突出电极将半导体芯片倒装粘结到接线基底上；以及
(f)利用树脂将半导体芯片密封。
下面简述本专利申请公开的本发明的典型形式所得到的效果。
半导体晶片的后面被研磨，以便减小其厚度，并且进一步通过将该后面平整而除去半导体晶片上的不平整。所以，可以防止树脂粘结剂在倒装粘结期间上升到芯片的背面上，并且防止芯片的背面和密封树脂之间的分离以及芯片的背面和第二半导体芯片的模粘结材料之间的分离。结果，可以防止在制造和安装半导体器件的高温处理过程中出现分离和开裂。因此，可以改进半导体器件的可靠性。
附图说明
图1是根据本发明实施例的半导体器件的剖视图；
图2是制造图1所示半导体器件的方法的制造流程；
图3是示出对应于图2所示制造流程的步骤S1-S5的制造状态的剖视图；
图4是示出对应于图2所示制造流程的步骤S6-S9的制造状态的剖视图；
图5是示出对应于图2所示制造流程的步骤S10和S11的制造状态的剖视图；
图6是示出对应于图2所示制造流程的步骤S12和S13的制造状态的剖视图；
图7是示出对应于图2所示制造流程的步骤S1-S4的晶片状态的透视图；
图8是示出图2所示制造流程的NCP应用步骤中的NCP应用方法的剖视图；
图9是示出图2所示制造流程的FC安装步骤中的临时安装方法的剖视图；
图10是示出图2所示制造流程的FC安装步骤中的主接触粘结方法的剖视图；
图11是示出图10所示部分A的结构的局部放大剖视图；
图12是示出根据本发明实施例的改进的接触粘结方法的局部放大剖视图；
图13是示出将图1所示半导体器件安装到封装板上的局部剖视图；
图14是示出与图10所示主接触粘结方法相比较的对比示例的接触粘结方法的局部放大剖视图；以及
图15是示出图14所示对比示例的接触粘结方法将树脂粘结剂粘结到芯片背面上平视图。
具体实施方式
在以下实施例中对相同或相似部件不再重复描述，除非非常必要。
此外，在以下的实施例中，为了描述方便的需要，必要时将描述本发明的多个部分或者实施例，但是它们并非彼此不相关，并且每个都是其他的部分或全部的改进、详细描述或者互补说明，除非另有说明。
在下文的实施例中，当参照指代元件的标号(包括数字、数值、数量和范围)时，理论上，本发明并不限于具体标号，而是可以大于或小于该标号，除非清楚地说明并且明显地限定于该具体标号。
以下将参照附图描述本发明的实施例。在所有用于解释实施例的附图中，具有相同功能的元件使用相同的附图标号指代，并且省略其重复说明。
(实施例)
图1是根据本发明实施例的半导体器件的剖视图；图2是制造图1所示半导体器件的方法的制造流程；图3是示出对应于图2所示制造流程的步骤S1-S5的制造状态的剖视图；图4是示出对应于图2所示制造流程的步骤S6-S9的制造状态的剖视图；图5是示出对应于图2所示制造流程的步骤S10和S11的制造状态的剖视图；图6是示出对应于图2所示制造流程的步骤S12和S13的制造状态的剖视图；图7是示出对应于图2所示制造流程的步骤S1-S4的晶片状态的透视图；图8是示出图2所示制造流程的NCP应用步骤中的NCP应用方法的剖视图；图9是示出图2所示制造流程的FC安装步骤中的临时安装方法的剖视图；图10是示出图2所示制造流程的FC安装步骤中的主接触粘结方法的剖视图；图11是示出图10所示部分A的结构的局部放大剖视图；图12是示出根据本发明实施例的改进的接触粘结方法的局部放大剖视图；图13是示出将图1所示半导体器件安装到封装板上的局部剖视图；图14是示出与图10所示主接触粘结方法相比较的对比示例的接触粘结方法的局部放大剖视图；以及图15是示出图14所示对比示例的接触粘结方法将树脂粘结剂粘结到芯片背面上平视图。
图1所示实施例的半导体器件具有将半导体芯片倒装粘结到接线基底上的结构。在该实施例中，将具有四个半导体芯片并且利用树脂密封的SIP(封装系统)16作为所述半导体器件的示例加以描述。
该SIP16包括控制用第一半导体芯片1、第二半导体芯片2、第三半导体芯片3和第四半导体芯片4；每个芯片都具有存储电路，其中第一半导体芯片1通过突出电极倒装粘结到作为接线基底的封装板5上，第二半导体芯片2形成在第一半导体芯片1上方。第三半导体芯片3安装在封装板5的上方，第四半导体芯片4安装在第三半导体芯片3上方，并使得两者的主表面3a和4a向上。
仅有第一半导体芯片1倒装粘结到封装板5上，第二半导体芯片2、第三半导体芯片3和第四半导体芯片4均接线连接到封装板5上。
图1所示SIP16的详细结构为，SIP16包括：作为接线基底并且具有前面5a和后面5b的封装板5；第一半导体芯片1，其具有主表面1a和背面1b，并且通过突出电极倒装粘结到封装板5的前面5a上；第二半导体芯片2，其具有主表面2a和背面2b，并且形成在第一半导体芯片1的上方，并且通过模粘结剂(粘结剂)12将其背面2b连接到第一半导体芯片1的背面1b上；第三半导体芯片3，其形成在封装板5的前面5a上，并使其主表面3a向上；第四半导体芯片4，其形成在第三半导体芯片3的主表面3a上方，并使其主表面4a向上；NCP(非导电膏)7，其为置于封装板5的前面5a和第一半导体芯片1之间的非导电树脂粘结剂；多个接线6，其用于将第二、第三和第四半导体芯片电连接到封装板5；密封体10，其利用树脂密封四个半导体芯片和多个接线6；以及，焊球11，其为形成在封装板5的后面5b上的外部端子。
此外，通过研磨和随后的抛光将SIP16的第一半导体芯片1的背面1b变薄。即，对背面1b进行平整。
研磨第一半导体芯片1的背面1b，以便将第一半导体芯片1的厚度减小到140μm。如果需要也可以将其他三个半导体芯片类似地变薄。
通过金突块(突出电极)1d将第一半导体芯片1倒装粘结到封装板5上，所述金突块焊接到封装板5上，用于进行倒装粘结。树脂粘结剂的NCP7置于封装板5和第一半导体芯片1之间，以便于硬化和保护倒装粘结部分。
该NCP7例如是环氧基非导电(绝缘)热固树脂粘结剂。
通过模粘结剂12将第二半导体芯片2、第三半导体芯片3和第四半导体芯片4固定。即，随着第二半导体芯片2形成在第一半导体芯片1的上方，第一半导体芯片1的背面1b和第二半导体芯片2的背面2b通过模粘结剂12粘结到一起。此外，随着第三半导体芯片3的后面3b通过模粘结剂12粘结到封装板5上并且第四半导体芯片形成在第三半导体芯片3的主表面3a上方，第三半导体芯片3的主表面3a和第四半导体芯片4的背面4b通过模粘结剂12粘结到一起。
由于上述结构，第二半导体芯片2的主表面2a、第三半导体芯片3的主表面3a和第四半导体芯片4的主表面4a面向上，并且可以被接线。
所述模粘结剂12例如也可以是环氧基非导电(绝缘)热固树脂粘结剂。
形成密封体10的密封树脂例如也可以是环氧基非导电(绝缘)热固树脂粘结剂。
接线6是导线，例如是金线。
封装板5的后面5b上的多个外端子是焊球11，其以栅格的形式布置在封装板5的后面5b上。即，本实施例的SIP16也可以是BGA(球栅阵列)形式的半导体器件。
如图5所示，在封装板5的前面5a上形成多个引线(电极)5c和多个接线连接引线5f，前面5a上不包括这些露出部分的区域被焊料抗蚀膜5i覆盖，该焊料抗蚀膜是绝缘膜。在后面5b上设置突台5h，在该突台上形成有焊接突块11。前面5a上的引线5c和接线连接引线5f通过内部接线5e和通孔接线5g电连接到后面5b上的突台5h上。
所以，半导体芯片的电极电连接到作为封装板5的后面5b上形成的外端子的焊球11上。引线5c、接线连接引线5f和通孔接线5g由铜合金制成。
本实施例的SIP16中，通过在将晶片分割成多个芯片之前研磨其背面1b(背研磨)以及在研磨之后通过抛光或湿蚀刻，将倒装粘结到封装板5上的第一半导体芯片1变薄并平整。所以，背面1b具有高平整度。因此，不会在第一半导体芯片1的背面1b上形成如图14所示的对比示例中的不规则9c，如图10所示，因此当在倒装粘结的过程中通过施压块13对NCP7施加压力时，可以防止NCP7上升到背面1b上，所以，可以防止如图15的比较示例中所示的将NCP7粘结到芯片18背面18a上的情形。
结果，可以防止第一半导体芯片1的背面1b与密封体10之间的分离以及第一半导体芯片1的背面1b与半导体芯片2的模粘结剂12之间的分离，此外，还可以防止在形成焊球11或安装基底时的热处理过程中出现的上述分离和开裂。
所以，可以改进例如SIP16的半导体器件的可靠性。
由于倒装粘结的第一半导体芯片1在其背面被研磨之后通过抛光或者湿蚀刻加以平整，并且不具有图14所示的背面1b上的不规则9c，因此，可以改进第一半导体芯片1的弯曲强度。
所以，可以防止当芯片被施压块13施压以便进行倒装粘结时出现的芯片的开裂，并且将第二半导体芯片2形成在厚度减小的第一半导体芯片1上方。即，由于将薄芯片用来进行倒装粘结，可以减小例如SIP16的多片半导体器件的厚度和尺寸。
上述背研磨步骤的特征在于：研磨速度较快，但是该步骤结束后背面的表面粗糙度高于上述抛光或者湿蚀刻步骤后的表面粗糙度。只需要执行背研磨步骤来减小晶片的厚度。在这种情况下，如上所述，由于芯片背面的粗糙度造成的粘结剂上升成为要解决的问题。也可以只执行得到非常平整表面的抛光或者湿蚀刻步骤，以便减小晶片的厚度。在这种情况下，由于抛光或湿蚀刻步骤的厚度减小速度小于背研磨步骤的厚度减小速度，因此该步骤所需的时间变长并且生产率降低。为了改进芯片背面的平整度同时维持生产率，因此以高速度执行厚度减小步骤是很有效的，例如，应该首先执行背研磨步骤以便将晶片的厚度减小到一定程度，然后执行增加后面平整度的步骤，例如抛光或者湿蚀刻步骤，以便减小晶片的厚度。在这种情况下，为了维持生产率，优选采用以高速度减小晶片厚度的步骤，以完成大于晶片最终厚度一半的厚度。
以下参照图2的制造流程描述制造根据本发明实施例的半导体器件的制造方法。
首先在图2所示步骤S1中执行晶片处理，即，如图3和7中步骤S1所示，准备半导体晶片9，其前面9a上具有图案。
之后，如图2的步骤S2中的BG(背研磨)所示，即，研磨半导体晶片9的后面9a，以减小半导体晶片9的厚度。如图3的步骤S2所示，通过上述研磨步骤在半导体晶片9的后面9b上形成有不规则9c。该不规则9c的大小在大约0.05μm到0.1μm之间，但是不限于该范围。如图7的步骤S2所示，在半导体晶片9的后面9b上径向地形成研磨痕迹9d。
之后，执行如图2的步骤S3中所示的干抛光，以便使半导体晶片9的后面9b平整。在该步骤中，半导体晶片9的后面9b通过干抛光得以平整，如图7中的步骤S3所示。干抛光是利用将浸有硅的纤维压缩2μm而形成的抛光布研磨(抛光)表面。在干抛光之后，半导体晶片9的后面9b上的不规则9c的大小为大约0.0015μm。
因此，如图3中的步骤S3所示地将半导体晶片9变薄。厚度减小的半导体晶片9的厚度可以例如是140μm，并且可以在需要时设定为该值(例如，可以通过背研磨和干抛光把晶片变成大约90μm厚)。
不仅可以使用干抛光而且可以使用湿蚀刻在背研磨之后平整半导体晶片9的后面9b。在这种情况下，湿蚀刻是旋转蚀刻，通过在利用转动件转动半导体晶片9的同时供应氟化硝酸(fluoronitric acid)来执行所述旋转蚀刻，并且使不规则9c小于干抛光后的大小。
之后，执行如图2的步骤S4中所示的芯片切割。即，将厚度已经减小的半导体芯片9切割，从而分成多个如图3的步骤S4中所示的半导体芯片(第一半导体芯片1)。此时，如图7的步骤S4中所示，沿着切割线9e切割半导体晶片9。
由于没有在第一半导体芯片1的背面1b上形成如图14的对比示例中所示的不规则9c，因此，可以改进第一半导体芯片1的弯曲强度。
之后，在图2的步骤S5中形成突柱(stud bump)。即，在半导体芯片的多个电极上形成突出电极。例如，在衬垫1c上形成作为突出电极的金突块1d，其为第一半导体芯片1的电极。使用接线粘结技术在第一半导体芯片1的衬垫1c上形成金突块1d(形成的突块被称为“突柱”)。围绕第一半导体芯片1的主表面1a形成有衬垫1c的位置的区域被表面保护膜1e覆盖。
以下描述图2的步骤S6及其后续步骤中的接线基底的处理。
准备如图4的步骤S6中所示的、作为接线基底的封装板5。在封装板5的前面5a上形成多个引线5c，并且围绕引线5c形成作为绝缘膜的焊料抗蚀膜5i。
可以使用具有多个接线基底的多腔基底执行图2的步骤S6及其后续步骤中的制造过程。在该实施例中，将描述使用封装板5的单个SIP16的制造过程。
之后，执行图2的步骤S7中所示的焊料预涂布。即，如图4的步骤S7所示，在引线5c上形成焊料预涂布层5d，以便倒装粘结到封装板5的前面5a上。该焊料预涂布层5d用以提高作为突出电极的金突块1d与用于倒装粘结的引线5c之间的焊料粘结强度。
之后，执行图2的步骤S8中所示的NCP涂布。即，如图4的步骤S8中所示，将非导电树脂粘结剂的NCP7施加到封装板5的前面5a上。该NCP7例如是热固树脂。
在根据本实施例的制造半导体器件的方法中，在进行倒装粘结前将NCP7布置在将要倒装粘结到封装板5上的部分处。这是因为，当衬垫间距变窄以增加引脚数目时金突块1d变小，因此半导体芯片和封装板5之间的空间变小(例如，5到10μm)，从而使得非常难以在倒装粘结后通过下填充密封注入树脂。所以，NCP7布置在封装板5上。即使可以将树脂注入，由于上述空间变窄，因此需要很长时间将树脂置于芯片和基底之间。所以，提前将NCP7布置在封装板5上。
所以，即使当衬垫间距减小时，也可以将非导电树脂粘结剂的NCP7置于半导体芯片和封装板5之间。
在该实施例中，如图8所示，膏状NCP7从喷嘴8滴落到封装板5的前面5a上，从而施加在前面5a上。该非导电树脂粘结剂并不限于膏状树脂粘结剂，可以使用膜状树脂粘结剂(例如，NCF，(非导电膜))。
优选地，所施加的NCP7量可以多到覆盖围绕半导体芯片的侧部的区域，以便保护半导体芯片。
之后，执行FC(倒装)安装，即如图2和4的步骤S9所示的倒装粘结。首先，如图9所示，通过NCP7将由吸附块13b吸附和载带的第一半导体芯片1临时安装到封装板5的前面5a上方。
之后，如图10所示，通过施压块13对第一半导体芯片1的平整背面1b施压并且加热，从而通过金突块1d将第一半导体芯片1倒装粘结到封装板5上。例如，施压块13的温度设定为300℃，并且利用500g的载荷对第一半导体芯片1施压。从施压块13供应的热量被传递到第一半导体芯片1，以便融化NCP7和焊料预涂布层5d。即，通过热接触进行倒装粘结。
所以，如图4的步骤S9中所示，将焊料预涂布层5d融化，以便通过焊料17将金突块1d粘结到引线5c上。
在该实施例中，当利用施压块13对第一半导体芯片1的背面1b施压时，如图11所示，在第一半导体芯片1和施压块13之间设置片元件14，从而通过片元件14利用施压块13对第一半导体芯片1的背面1b施压。该片元件14的厚度大约是50μm，例如是由氟树脂制成。由于氟树脂具有树脂的较高热阻抗和较高释放性能(releasability)，因此优选使用由氟树脂制成的片元件14。
在该实施例中，对第一半导体芯片1需要倒装粘结的背面1b研磨，然后进行抛光或湿蚀刻，从而进行平整。所以，由于背面1b非常平整，并且不具有图14的比较示例中所示的较大不规则9c，因此当背面1b被施压块13如图11所示地施压时，可以防止NCP7上升到背面1b上。
即，由于第一半导体芯片1的背面1b是平整后的平整表面，当第一半导体芯片1被施压块13施压时，可以防止沿着芯片的侧面上升的NCP7从第一半导体芯片1的背面1b和片元件14之间的空间粘结到第一半导体芯片1的背面1b上，因此不同于图15的比较示例中所示的NCP7粘结到芯片18的背面18a上的情形。
此外，由于施压块13的施压面13a被片元件14覆盖，所以，当NCP7上升时，可以防止NCP7粘结到施压块13上，并且防止施压块13被NCP7污染。
考虑到半导体芯片1的弯曲强度，使第一半导体芯片1的厚度为大约140μm，并且不能使施压块13的施压载荷比需要的大。所以，作为更加可靠地防止NCP7粘结到第一半导体芯片1的背面1b上的手段，可以使用厚度如图12的改进中所示的片元件14。
例如，使用厚度为大约100μm的片元件14，并对第一半导体芯片1的背面1b施压、使其与片元件14紧密接合，从而使片元件14与第一半导体芯片1的背面1b能够彼此紧密地粘结。所以，可以可靠地防止NCP7粘结到第一半导体芯片1的背面1b上。
当第一半导体芯片1被施压块13施压时，不必总是在芯片1和施压块13之间设置片元件14。即，因为第一半导体芯片1的背面1b是平整的平整表面，施压块13的施压面13a与第一半导体芯片1的背面1b之间紧密接触，因此可以在不设置片元件14的条件下防止NCP7粘结到第一半导体芯片1的背面1b上，可以在没有设置片元件14的条件下用施压块13对第一半导体芯片1的背面1b施压。
这样，完成了第一半导体芯片1的倒装粘结，如图4的步骤S9所示。
然后执行SIP16中的第三半导体芯片3的模粘结。如图1所示，通过模粘结剂12将第三半导体芯片3粘结到封装板5的前面5a上，并使得主表面3a向上。该模粘结剂12是例如热固树脂粘结剂。
然后，执行图2的步骤S10所示的第二芯片粘结。如图1和图5的步骤S10所示，通过作为粘结剂的模粘结剂12将第二半导体芯片2固定在第一半导体芯片1上，并将第四半导体芯片4固定在第三半导体芯片3上。
即，通过模粘结剂12将半导体芯片2安装到第一半导体芯片1的背面1b上方，并使其主表面2a向上，然后通过模粘结剂12将第一半导体芯片1的背面1b和第二半导体芯片2的背面2b粘结在一起。
此外，通过模粘结剂12将第四半导体芯片4安装在第三半导体芯片3的主表面3a上方，并使其主表面4a向上，然后通过模粘结剂12将第三半导体芯片3的主表面3a与第四半导体芯片4的背面4b粘结在一起。
上述模粘结剂12例如是热固树脂粘结剂。
之后，执行图2的步骤S11所示的接线粘结(W/B)。如图1和图5的步骤S11所示，通过例如金线的接线6将第二半导体芯片2、第三半导体芯片3和第四半导体芯片4电连接到封装板5的接线连接引线5f上。
然后执行图2的步骤S12中所示的模制。如图1和图6的步骤S12所示，用树脂密封第一半导体芯片1、第二半导体芯片2、第三半导体芯片3、第四半导体芯片4和多个接线6，以形成密封体10。该密封树脂例如是环氧基热固树脂。
之后，执行图2的步骤S13中所示的焊球固定。如图1和图6的步骤S13所示，在封装板5的后面5b的突台5h上形成多个作为外端子的焊球11。通过回流高温处理融化焊球11，从而固定到突台5h上。
由于在该实施例中可以防止NCP7粘结到第一半导体芯片1的背面1b上，可以防止第一半导体芯片1的背面1b和密封体10之间的分离以及第一半导体芯片1的背面1b和第二半导体芯片2的模粘结剂12之间的分离。
这样，可以防止固定焊球11的回流高温处理引起的上述分离和开裂，所以可以改进SIP16(半导体器件)的可靠性。
当使用多腔基底执行制造过程时，将基底切割成单个的SIP16，如图2的步骤S14所示。
由于通过回流高温处理在焊球11和封装板15的端子15a之间执行粘结以便如图13所示将SIP16安装到封装板15的上方，因此可以防止第一半导体芯片1的背面1b和密封体10之间的分离以及第一半导体芯片1的背面1b和第二半导体芯片2的模粘结剂12之间的分离以及开裂，从而改进SIP16的可靠性。
以上描述了根据本实施例的制造半导体器件的方法，其中，首先执行通过研磨后面9b减小半导体晶片9的厚度的步骤。或者，准备多个半导体芯片，首先通过研磨其背面1b使其变薄，之后通过平整背面1b使其平整，如图2的步骤S5所示地在这些半导体芯片上形成突柱，然后倒装粘结具有金突块1d的半导体芯片，从而制造半导体器件。即，供应经受图2的步骤S1到S4的半导体芯片，然后在这些半导体芯片上执行图2的步骤S5到S14，以制造半导体器件。
尽管以上已经描述了本发明人做出的本发明的优选实施例，但是毋庸置疑，本发明并不限于上述实施例，而是可以在不脱离本发明的精神和范围的前提下做出改变。
例如，在上述实施例中，可以通过焊料粘结将金突块1d热接触粘结到封装板5的引线5c上。通过在封装板5的引线5c的表面上镀金以便将金突块1d接触粘结到引线5c的镀金层上，可以执行上述倒装粘结。
尽管将SIP16作为半导体器件的示例加以描述，但是该半导体器件可以不是SIP16，如果通过使用非导电树脂粘结剂将至少一个通过研磨变薄并将其后面平整的半导体芯片倒装粘结到接线基底上来制造半导体器件，那么该器件可以例如是BGA或LGA(台栅格阵列)。
本发明适用于电子设备和半导体制造技术。
本申请要求2003年12月24日提交的日本专利申请No2003-426943的优先权，该专利申请的全部内容被在此引用作为参考。

Claims (10)

1.一种制造半导体器件的方法，包括如下步骤：
研磨半导体晶片的后面以减小其厚度；
在所述研磨半导体晶片的后面的步骤之后，将半导体晶片的后面平整；
在所述将半导体晶片的后面平整的步骤之后，将半导体晶片分成多个半导体芯片；
在所述将半导体晶片分成多个半导体芯片的步骤之后，在所述多个半导体芯片的电极上分别形成突出电极；
将树脂粘结剂施加到接线基底的前面上；
在所述施加树脂粘结剂的步骤之后，通过树脂粘结剂将多个半导体芯片中的第一半导体芯片布置在接线基底的前面的上方，并且通过由氟树脂制成的片元件利用块对第一半导体芯片的背面施压，从而使得树脂粘结剂被加热以便通过所述突出电极将第一半导体芯片与接线基底电连接；
通过粘结剂将第二半导体芯片安装在第一半导体芯片的背面；
通过接线将第二半导体芯片与接线基底电连接；以及
利用树脂将第一半导体芯片、第二半导体芯片、接线密封。
2.如权利要求1所述的制造半导体器件的方法，其中，在所述将半导体晶片的后面平整的步骤中执行抛光，从而将半导体晶片的后面平整。
3.如权利要求1所述的制造半导体器件的方法，其中，在所述将半导体晶片的后面平整的步骤中执行湿蚀刻，从而将半导体晶片的后面平整。
4.如权利要求1所述的制造半导体器件的方法，其中，所述树脂粘结剂是非导电、热固树脂。
5.如权利要求1所述的制造半导体器件的方法，其中，粘结剂是热固树脂。
6.如权利要求1所述的制造半导体器件的方法，其中，在树脂密封的步骤中使用的密封树脂是热固树脂。
7.如权利要求1所述的制造半导体器件的方法，其中，在树脂密封的步骤之后在接线基底的后面上方形成作为外端子的多个焊球。
8.如权利要求1所述的制造半导体器件的方法，其中，在所述将树脂粘结剂施加到接线基底的前面上的步骤之前，在多个将要倒装粘结到接线基底的前面上方的电极上预涂布焊料。
9.如权利要求8所述的制造半导体器件的方法，其中，所述预涂布的焊料用来连接在倒装粘结中用作突出电极的金突块。
10.如权利要求1所述的制造半导体器件的方法，其中，在所述将树脂粘结剂施加到接线基底的前面上的步骤中将膏状非导电树脂粘结剂施加到接线基底的前面上。
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