BG64243B1 - Метод и устройство за модулация/демодулация с последователно ограничаване на минималната дължина на серия от еднакви знаци в кодова дума - Google Patents
Метод и устройство за модулация/демодулация с последователно ограничаване на минималната дължина на серия от еднакви знаци в кодова дума Download PDFInfo
- Publication number
- BG64243B1 BG64243B1 BG104111A BG10411100A BG64243B1 BG 64243 B1 BG64243 B1 BG 64243B1 BG 104111 A BG104111 A BG 104111A BG 10411100 A BG10411100 A BG 10411100A BG 64243 B1 BG64243 B1 BG 64243B1
- Authority
- BG
- Bulgaria
- Prior art keywords
- series
- data
- code
- length
- conversion
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
- H03M5/145—Conversion to or from block codes or representations thereof
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
- G11B2020/1453—17PP modulation, i.e. the parity preserving RLL(1,7) code with rate 2/3 used on Blu-Ray discs
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Dc Digital Transmission (AREA)
- Facsimile Image Signal Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15028098A JP3985173B2 (ja) | 1998-05-29 | 1998-05-29 | 変調装置および方法、復調装置および方法、並びにデータ格納媒体 |
PCT/IB1999/000948 WO1999063671A1 (en) | 1998-05-29 | 1999-05-25 | Apparatus and method for modulation/demodulation with consecutive minimum runlength limitation |
Publications (2)
Publication Number | Publication Date |
---|---|
BG104111A BG104111A (en) | 2000-08-31 |
BG64243B1 true BG64243B1 (bg) | 2004-06-30 |
Family
ID=15493529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BG104111A BG64243B1 (bg) | 1998-05-29 | 2000-01-27 | Метод и устройство за модулация/демодулация с последователно ограничаване на минималната дължина на серия от еднакви знаци в кодова дума |
Country Status (40)
Country | Link |
---|---|
US (5) | US6496541B1 (me) |
EP (1) | EP1000467B1 (me) |
JP (1) | JP3985173B2 (me) |
KR (1) | KR100753966B1 (me) |
CN (2) | CN1183681C (me) |
AR (1) | AR019600A1 (me) |
AT (1) | ATE463082T1 (me) |
AU (1) | AU758251B2 (me) |
BG (1) | BG64243B1 (me) |
CA (2) | CA2680404C (me) |
CY (1) | CY1110892T1 (me) |
CZ (1) | CZ303005B6 (me) |
DE (1) | DE69942194D1 (me) |
DK (1) | DK1000467T3 (me) |
EA (1) | EA002209B1 (me) |
EE (1) | EE05501B1 (me) |
EG (1) | EG22694A (me) |
ES (1) | ES2341927T3 (me) |
HK (1) | HK1029458A1 (me) |
HR (1) | HRP20000050B1 (me) |
HU (1) | HU229922B1 (me) |
ID (1) | ID24969A (me) |
IL (2) | IL134229A (me) |
LT (1) | LT4754B (me) |
LV (1) | LV12526B (me) |
ME (1) | ME01711B (me) |
MY (1) | MY131577A (me) |
NO (1) | NO332391B1 (me) |
NZ (1) | NZ502506A (me) |
PL (1) | PL338300A1 (me) |
PT (1) | PT1000467E (me) |
RO (1) | RO121883B1 (me) |
SI (1) | SI20174B (me) |
SK (1) | SK288035B6 (me) |
TR (1) | TR200000248T1 (me) |
TW (1) | TW498313B (me) |
UA (1) | UA49081C2 (me) |
WO (1) | WO1999063671A1 (me) |
YU (1) | YU49188B (me) |
ZA (1) | ZA200000371B (me) |
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