ATE443345T1 - Gestapelte 1t-n speicherzellenstruktur - Google Patents
Gestapelte 1t-n speicherzellenstrukturInfo
- Publication number
- ATE443345T1 ATE443345T1 AT04785544T AT04785544T ATE443345T1 AT E443345 T1 ATE443345 T1 AT E443345T1 AT 04785544 T AT04785544 T AT 04785544T AT 04785544 T AT04785544 T AT 04785544T AT E443345 T1 ATE443345 T1 AT E443345T1
- Authority
- AT
- Austria
- Prior art keywords
- architecture
- 1cell
- stacked
- cross
- point
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
- H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1659—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/78—Array wherein the memory cells of a group share an access device, all the memory cells of the group having a common electrode and the access device being not part of a word line or a bit line driver
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Static Random-Access Memory (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/438,344 US7042749B2 (en) | 2002-05-16 | 2003-05-15 | Stacked 1T-nmemory cell structure |
| PCT/US2004/015078 WO2004105039A2 (en) | 2003-05-15 | 2004-05-13 | STACKED 1T-nMEMORY CELL STRUCTURE |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE443345T1 true ATE443345T1 (de) | 2009-10-15 |
Family
ID=33476571
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT04785544T ATE443345T1 (de) | 2003-05-15 | 2004-05-13 | Gestapelte 1t-n speicherzellenstruktur |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US7042749B2 (de) |
| EP (1) | EP1634333B1 (de) |
| JP (1) | JP4966011B2 (de) |
| KR (1) | KR100850579B1 (de) |
| CN (2) | CN100511696C (de) |
| AT (1) | ATE443345T1 (de) |
| DE (1) | DE602004023194D1 (de) |
| SG (1) | SG153669A1 (de) |
| WO (1) | WO2004105039A2 (de) |
Families Citing this family (68)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6940748B2 (en) * | 2002-05-16 | 2005-09-06 | Micron Technology, Inc. | Stacked 1T-nMTJ MRAM structure |
| US7042749B2 (en) * | 2002-05-16 | 2006-05-09 | Micron Technology, Inc. | Stacked 1T-nmemory cell structure |
| WO2003098636A2 (en) * | 2002-05-16 | 2003-11-27 | Micron Technology, Inc. | STACKED 1T-nMEMORY CELL STRUCTURE |
| US7209378B2 (en) | 2002-08-08 | 2007-04-24 | Micron Technology, Inc. | Columnar 1T-N memory cell structure |
| US6882553B2 (en) * | 2002-08-08 | 2005-04-19 | Micron Technology Inc. | Stacked columnar resistive memory structure and its method of formation and operation |
| JP4419049B2 (ja) * | 2003-04-21 | 2010-02-24 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
| US7020004B1 (en) * | 2003-08-29 | 2006-03-28 | Micron Technology, Inc. | Double density MRAM with planar processing |
| US20050139879A1 (en) * | 2003-12-24 | 2005-06-30 | Diana Daniel C. | Ion implanting conductive electrodes of polymer memories |
| KR100580635B1 (ko) * | 2003-12-30 | 2006-05-16 | 삼성전자주식회사 | 전자소자 및 그 제조방법 |
| US7106639B2 (en) * | 2004-09-01 | 2006-09-12 | Hewlett-Packard Development Company, L.P. | Defect management enabled PIRM and method |
| DE102004044413A1 (de) * | 2004-09-14 | 2006-03-16 | Infineon Technologies Ag | Halbleiterspeicherbauelement |
| KR100604913B1 (ko) | 2004-10-28 | 2006-07-28 | 삼성전자주식회사 | 멀티 비트 셀 어레이 구조를 가지는 마그네틱 램 |
| DE102005017534A1 (de) * | 2004-12-29 | 2006-07-13 | Hynix Semiconductor Inc., Ichon | Nichtflüchtige ferroelektrische Speichervorrichtung |
| DE102005017533A1 (de) * | 2004-12-29 | 2006-07-13 | Hynix Semiconductor Inc., Ichon | Nichtflüchtige ferroelektrische Speichervorrichtung |
| JP4591821B2 (ja) * | 2005-02-09 | 2010-12-01 | エルピーダメモリ株式会社 | 半導体装置 |
| KR100690914B1 (ko) * | 2005-08-10 | 2007-03-09 | 삼성전자주식회사 | 상변화 메모리 장치 |
| US8143653B2 (en) * | 2005-08-10 | 2012-03-27 | Samsung Electronics Co., Ltd. | Variable resistance memory device and system thereof |
| US7345899B2 (en) * | 2006-04-07 | 2008-03-18 | Infineon Technologies Ag | Memory having storage locations within a common volume of phase change material |
| KR100895853B1 (ko) * | 2006-09-14 | 2009-05-06 | 삼성전자주식회사 | 적층 메모리 소자 및 그 형성 방법 |
| KR100837412B1 (ko) * | 2006-12-12 | 2008-06-12 | 삼성전자주식회사 | 멀티 스택 메모리 소자 |
| KR100819005B1 (ko) | 2007-02-16 | 2008-04-03 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치 |
| KR100819560B1 (ko) * | 2007-03-26 | 2008-04-08 | 삼성전자주식회사 | 상전이 메모리소자 및 그 제조방법 |
| US20090164203A1 (en) * | 2007-12-23 | 2009-06-25 | Unity Semiconductor Corporation | Non-volatile memory compiler |
| JP5063337B2 (ja) * | 2007-12-27 | 2012-10-31 | 株式会社日立製作所 | 半導体装置 |
| US7663900B2 (en) | 2007-12-31 | 2010-02-16 | Hitachi Global Storage Technologies Netherlands B.V. | Tree-structure memory device |
| KR101418434B1 (ko) * | 2008-03-13 | 2014-08-14 | 삼성전자주식회사 | 비휘발성 메모리 장치, 이의 제조 방법, 및 이를 포함하는프로세싱 시스템 |
| FR2935530B1 (fr) * | 2008-08-29 | 2012-05-04 | Commissariat Energie Atomique | Dispositif de memorisation de donnees a adressage optique. |
| KR101486426B1 (ko) * | 2009-01-30 | 2015-01-26 | 삼성전자주식회사 | 스택형 로드리스 반도체 메모리 소자 |
| KR101497547B1 (ko) * | 2009-03-19 | 2015-03-02 | 삼성전자주식회사 | 비휘발성 메모리 소자 |
| US7978498B2 (en) * | 2009-04-03 | 2011-07-12 | Sandisk 3D, Llc | Programming non-volatile storage element using current from other element |
| US8139391B2 (en) * | 2009-04-03 | 2012-03-20 | Sandisk 3D Llc | Multi-bit resistance-switching memory cell |
| JP2012523648A (ja) * | 2009-04-08 | 2012-10-04 | サンディスク スリーディー,エルエルシー | 垂直ビット線および二重グローバルビット線アーキテクチャを有する再プログラミング可能な不揮発性メモリ素子の3次元アレイ |
| US7983065B2 (en) * | 2009-04-08 | 2011-07-19 | Sandisk 3D Llc | Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines |
| US8351236B2 (en) | 2009-04-08 | 2013-01-08 | Sandisk 3D Llc | Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture |
| US8212233B2 (en) * | 2009-05-28 | 2012-07-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Forming phase-change memory using self-aligned contact/via scheme |
| US8158967B2 (en) | 2009-11-23 | 2012-04-17 | Micron Technology, Inc. | Integrated memory arrays |
| US8223525B2 (en) * | 2009-12-15 | 2012-07-17 | Sandisk 3D Llc | Page register outside array and sense amplifier interface |
| US9646869B2 (en) | 2010-03-02 | 2017-05-09 | Micron Technology, Inc. | Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices |
| US8507966B2 (en) | 2010-03-02 | 2013-08-13 | Micron Technology, Inc. | Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same |
| US9608119B2 (en) | 2010-03-02 | 2017-03-28 | Micron Technology, Inc. | Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures |
| US8288795B2 (en) * | 2010-03-02 | 2012-10-16 | Micron Technology, Inc. | Thyristor based memory cells, devices and systems including the same and methods for forming the same |
| US8513722B2 (en) | 2010-03-02 | 2013-08-20 | Micron Technology, Inc. | Floating body cell structures, devices including same, and methods for forming same |
| US8547720B2 (en) | 2010-06-08 | 2013-10-01 | Sandisk 3D Llc | Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines |
| US8624217B2 (en) * | 2010-06-25 | 2014-01-07 | International Business Machines Corporation | Planar phase-change memory cell with parallel electrical paths |
| US8575008B2 (en) | 2010-08-31 | 2013-11-05 | International Business Machines Corporation | Post-fabrication self-aligned initialization of integrated devices |
| US10497713B2 (en) * | 2010-11-18 | 2019-12-03 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
| US8598621B2 (en) | 2011-02-11 | 2013-12-03 | Micron Technology, Inc. | Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor |
| US8952418B2 (en) | 2011-03-01 | 2015-02-10 | Micron Technology, Inc. | Gated bipolar junction transistors |
| US8519431B2 (en) | 2011-03-08 | 2013-08-27 | Micron Technology, Inc. | Thyristors |
| US8772848B2 (en) | 2011-07-26 | 2014-07-08 | Micron Technology, Inc. | Circuit structures, memory circuitry, and methods |
| CN103137860B (zh) * | 2011-11-30 | 2015-04-08 | 中国科学院微电子研究所 | 非易失性三维半导体存储器件及制备方法 |
| US8456883B1 (en) * | 2012-05-29 | 2013-06-04 | Headway Technologies, Inc. | Method of spin torque MRAM process integration |
| KR20150012591A (ko) * | 2013-07-25 | 2015-02-04 | 삼성디스플레이 주식회사 | 유기발광표시장치 및 그 제조방법 |
| FR3038133B1 (fr) * | 2015-06-23 | 2017-08-25 | St Microelectronics Crolles 2 Sas | Cellule memoire a changement de phase ayant une structure compacte |
| TWI603512B (zh) * | 2015-07-03 | 2017-10-21 | 力晶科技股份有限公司 | 電阻式隨機存取記憶體結構 |
| CN107658317B (zh) * | 2017-09-15 | 2019-01-01 | 长江存储科技有限责任公司 | 一种半导体装置及其制备方法 |
| US10629649B2 (en) | 2017-12-29 | 2020-04-21 | Spin Memory, Inc. | Method of making a three dimensional perpendicular magnetic tunnel junction with thin-film transistor |
| US10347322B1 (en) * | 2018-02-20 | 2019-07-09 | Micron Technology, Inc. | Apparatuses having memory strings compared to one another through a sense amplifier |
| CN120035137A (zh) | 2018-02-23 | 2025-05-23 | 株式会社半导体能源研究所 | 存储装置及其工作方法 |
| US11417829B2 (en) * | 2018-05-18 | 2022-08-16 | Integrated Silicon Solution, (Cayman) Inc. | Three dimensional perpendicular magnetic tunnel junction with thin film transistor array |
| US10790286B2 (en) | 2018-12-06 | 2020-09-29 | Micron Technology, Inc. | Apparatuses including 3D memory arrays, methods of forming the apparatuses, and related electronic systems |
| CN110943102B (zh) * | 2019-11-12 | 2023-07-18 | 华中科技大学 | 一种高密度的相变存储器三维集成电路结构 |
| US11355554B2 (en) | 2020-05-08 | 2022-06-07 | Micron Technology, Inc. | Sense lines in three-dimensional memory arrays, and methods of forming the same |
| US11545205B2 (en) * | 2020-08-20 | 2023-01-03 | Micron Technology, Inc. | Apparatuses, systems, and methods for ferroelectric memory cell operations |
| US12317509B2 (en) | 2021-08-04 | 2025-05-27 | International Business Machines Corporation | Stacked spin-orbit-torque magnetoresistive random-access memory |
| JP2023043704A (ja) * | 2021-09-16 | 2023-03-29 | キオクシア株式会社 | 半導体記憶装置 |
| TWI807838B (zh) * | 2021-09-16 | 2023-07-01 | 日商鎧俠股份有限公司 | 記憶體元件 |
| US12112785B2 (en) | 2022-04-29 | 2024-10-08 | Micron Technology, Inc. | Apparatuses, systems, and methods for configurable memory |
Family Cites Families (44)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02148763A (ja) * | 1988-11-29 | 1990-06-07 | Nec Kyushu Ltd | 半導体記憶装置 |
| US5160987A (en) * | 1989-10-26 | 1992-11-03 | International Business Machines Corporation | Three-dimensional semiconductor structures formed from planar layers |
| GB9027198D0 (en) * | 1990-12-14 | 1991-02-06 | Smithkline Beecham Plc | Medicaments |
| US5638318A (en) * | 1995-09-11 | 1997-06-10 | Micron Technology, Inc. | Ferroelectric memory using ferroelectric reference cells |
| US5969380A (en) * | 1996-06-07 | 1999-10-19 | Micron Technology, Inc. | Three dimensional ferroelectric memory |
| US6256224B1 (en) | 2000-05-03 | 2001-07-03 | Hewlett-Packard Co | Write circuit for large MRAM arrays |
| JP3161384B2 (ja) * | 1997-09-16 | 2001-04-25 | 日本電気株式会社 | 半導体記憶装置とそのアクセス方法 |
| US5922514A (en) * | 1997-09-17 | 1999-07-13 | Dale Electronics, Inc. | Thick film low value high frequency inductor, and method of making the same |
| US5864496A (en) * | 1997-09-29 | 1999-01-26 | Siemens Aktiengesellschaft | High density semiconductor memory having diagonal bit lines and dual word lines |
| US6069815A (en) * | 1997-12-18 | 2000-05-30 | Siemens Aktiengesellschaft | Semiconductor memory having hierarchical bit line and/or word line architecture |
| JP2000187976A (ja) | 1998-12-17 | 2000-07-04 | Canon Inc | 磁性薄膜メモリおよびその記録再生方法 |
| US6072716A (en) | 1999-04-14 | 2000-06-06 | Massachusetts Institute Of Technology | Memory structures and methods of making same |
| JP3620041B2 (ja) * | 1999-12-09 | 2005-02-16 | セイコーエプソン株式会社 | メモリデバイス及びその製造方法、並びに電子機器 |
| US6473336B2 (en) | 1999-12-16 | 2002-10-29 | Kabushiki Kaisha Toshiba | Magnetic memory device |
| JP2001217398A (ja) | 2000-02-03 | 2001-08-10 | Rohm Co Ltd | 強磁性トンネル接合素子を用いた記憶装置 |
| US6185143B1 (en) | 2000-02-04 | 2001-02-06 | Hewlett-Packard Company | Magnetic random access memory (MRAM) device including differential sense amplifiers |
| US6426896B1 (en) * | 2000-05-22 | 2002-07-30 | Actrans System Inc. | Flash memory cell with contactless bit line, and process of fabrication |
| FR2810150B1 (fr) * | 2000-06-13 | 2002-10-04 | St Microelectronics Sa | Dispositif de memoire vive dynamique et procede de commande d'un acces en lecture d'une telle memoire |
| JP4477199B2 (ja) | 2000-06-16 | 2010-06-09 | 株式会社ルネサステクノロジ | 磁気ランダムアクセスメモリ、磁気ランダムアクセスメモリへのアクセス方法および磁気ランダムアクセスメモリの製造方法 |
| US6317375B1 (en) | 2000-08-31 | 2001-11-13 | Hewlett-Packard Company | Method and apparatus for reading memory cells of a resistive cross point array |
| JP4149647B2 (ja) | 2000-09-28 | 2008-09-10 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
| JP4726292B2 (ja) * | 2000-11-14 | 2011-07-20 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
| JP2002270790A (ja) | 2000-12-27 | 2002-09-20 | Toshiba Corp | 半導体記憶装置 |
| JP2002208682A (ja) | 2001-01-12 | 2002-07-26 | Hitachi Ltd | 磁気半導体記憶装置及びその製造方法 |
| CA2332085A1 (en) * | 2001-01-23 | 2002-07-23 | Ibm Canada Limited-Ibm Canada Limitee | Adapting polymorphic inline caches for multithreaded computing |
| US6356477B1 (en) * | 2001-01-29 | 2002-03-12 | Hewlett Packard Company | Cross point memory array including shared devices for blocking sneak path currents |
| US6348365B1 (en) | 2001-03-02 | 2002-02-19 | Micron Technology, Inc. | PCRAM cell manufacturing |
| US6653154B2 (en) | 2001-03-15 | 2003-11-25 | Micron Technology, Inc. | Method of forming self-aligned, trenchless mangetoresistive random-access memory (MRAM) structure with sidewall containment of MRAM structure |
| US6376259B1 (en) | 2001-03-21 | 2002-04-23 | Ramtron International Corporation | Method for manufacturing a ferroelectric memory cell including co-annealing |
| JP4637388B2 (ja) | 2001-03-23 | 2011-02-23 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
| KR100399436B1 (ko) | 2001-03-28 | 2003-09-29 | 주식회사 하이닉스반도체 | 마그네틱 램 및 그 형성방법 |
| JP2002298572A (ja) | 2001-03-28 | 2002-10-11 | Toshiba Corp | 半導体記憶装置 |
| JP3892736B2 (ja) * | 2001-03-29 | 2007-03-14 | 株式会社東芝 | 半導体記憶装置 |
| JP2003068989A (ja) * | 2001-08-23 | 2003-03-07 | Sony Corp | 強誘電体型不揮発性半導体メモリの製造方法 |
| US20030047765A1 (en) | 2001-08-30 | 2003-03-13 | Campbell Kristy A. | Stoichiometry for chalcogenide glasses useful for memory devices and method of formation |
| JP4771631B2 (ja) | 2001-09-21 | 2011-09-14 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
| JP3749847B2 (ja) | 2001-09-27 | 2006-03-01 | 株式会社東芝 | 相変化型不揮発性記憶装置及びその駆動回路 |
| CN100358047C (zh) | 2001-11-30 | 2007-12-26 | 株式会社东芝 | 磁随机存取存储器 |
| US6459609B1 (en) | 2001-12-13 | 2002-10-01 | Ramtron International Corporation | Self referencing 1T/1C ferroelectric random access memory |
| EP1321941B1 (de) | 2001-12-21 | 2005-08-17 | Kabushiki Kaisha Toshiba | MRAM mit gestapelten Speicherzellen |
| US7042749B2 (en) * | 2002-05-16 | 2006-05-09 | Micron Technology, Inc. | Stacked 1T-nmemory cell structure |
| US6940748B2 (en) * | 2002-05-16 | 2005-09-06 | Micron Technology, Inc. | Stacked 1T-nMTJ MRAM structure |
| US6754124B2 (en) | 2002-06-11 | 2004-06-22 | Micron Technology, Inc. | Hybrid MRAM array structure and operation |
| KR100448908B1 (ko) * | 2002-09-03 | 2004-09-16 | 삼성전자주식회사 | 상전이 기억 소자 구조 및 그 제조 방법 |
-
2003
- 2003-05-15 US US10/438,344 patent/US7042749B2/en not_active Expired - Lifetime
-
2004
- 2004-05-13 CN CNB2004800202629A patent/CN100511696C/zh not_active Expired - Fee Related
- 2004-05-13 KR KR1020057021779A patent/KR100850579B1/ko not_active Expired - Lifetime
- 2004-05-13 WO PCT/US2004/015078 patent/WO2004105039A2/en not_active Ceased
- 2004-05-13 CN CN200810130131.6A patent/CN101393888B/zh not_active Expired - Fee Related
- 2004-05-13 SG SG200717931-0A patent/SG153669A1/en unknown
- 2004-05-13 AT AT04785544T patent/ATE443345T1/de not_active IP Right Cessation
- 2004-05-13 DE DE602004023194T patent/DE602004023194D1/de not_active Expired - Lifetime
- 2004-05-13 JP JP2006533053A patent/JP4966011B2/ja not_active Expired - Fee Related
- 2004-05-13 EP EP04785544A patent/EP1634333B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR100850579B1 (ko) | 2008-08-06 |
| EP1634333A2 (de) | 2006-03-15 |
| EP1634333B1 (de) | 2009-09-16 |
| KR20060013541A (ko) | 2006-02-10 |
| CN101393888B (zh) | 2014-06-25 |
| JP4966011B2 (ja) | 2012-07-04 |
| CN101393888A (zh) | 2009-03-25 |
| DE602004023194D1 (de) | 2009-10-29 |
| WO2004105039A3 (en) | 2005-01-20 |
| US20030223292A1 (en) | 2003-12-04 |
| CN100511696C (zh) | 2009-07-08 |
| US7042749B2 (en) | 2006-05-09 |
| JP2007511895A (ja) | 2007-05-10 |
| CN1823418A (zh) | 2006-08-23 |
| WO2004105039A2 (en) | 2004-12-02 |
| SG153669A1 (en) | 2009-07-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE602004023194D1 (de) | GESTAPELTE 1T-n SPEICHERZELLENSTRUKTUR | |
| TW200514094A (en) | Stacked 1t-nmemory cell structure | |
| JP7325552B2 (ja) | 高記憶密度化3次元フラッシュメモリデバイス | |
| JP2004517504A5 (de) | ||
| TWI237267B (en) | Semiconductor memory device | |
| US6859410B2 (en) | Tree decoder structure particularly well-suited to interfacing array lines having extremely small layout pitch | |
| US6856572B2 (en) | Multi-headed decoder structure utilizing memory array line driver with dual purpose driver device | |
| US7898893B2 (en) | Multi-layered memory devices | |
| US7440350B2 (en) | Semiconductor integrated circuit device | |
| US6845033B2 (en) | Structure and system-on-chip integration of a two-transistor and two-capacitor memory cell for trench technology | |
| TW200504998A (en) | Semiconductor memory device | |
| TW200721177A (en) | Semiconductor memory device | |
| TW200504757A (en) | Semiconductor integrated circuit | |
| TW200515412A (en) | Magnetic random access memory and data reading method thereof | |
| EP1376599A3 (de) | Magnetische Speicheranordnung mit XP-Zelle and STR-Zelle in einem Chip | |
| TWI764344B (zh) | 用來在記憶體模組中增加資料預取數量的裝置 | |
| JP5037115B2 (ja) | 非揮発性半導体メモリ装置 | |
| TW200802369A (en) | Nonvolatile semiconductor memory device | |
| US6452855B1 (en) | DRAM array interchangeable between single-cell and twin-cell array operation | |
| TW200636721A (en) | Memory device with pre-fetch circuit and pre-fetch method | |
| JP2011060402A5 (de) | ||
| JP2004119897A5 (de) | ||
| Sakimura et al. | A 250-MHz 1-Mbit embedded MRAM macro using 2T1MTJ cell with bitline separation and half-pitch shift architecture | |
| US7333387B2 (en) | Device and method for selecting 1-row and 2-row activation | |
| US20250191650A1 (en) | 3d dram with vertical word lines |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |