ATE431574T1 - Ätzverfahren und verwendung einer zusammensetzung zur bildung einer ätzschutzschicht - Google Patents

Ätzverfahren und verwendung einer zusammensetzung zur bildung einer ätzschutzschicht

Info

Publication number
ATE431574T1
ATE431574T1 AT02762996T AT02762996T ATE431574T1 AT E431574 T1 ATE431574 T1 AT E431574T1 AT 02762996 T AT02762996 T AT 02762996T AT 02762996 T AT02762996 T AT 02762996T AT E431574 T1 ATE431574 T1 AT E431574T1
Authority
AT
Austria
Prior art keywords
forming
etching
composition
protection layer
water
Prior art date
Application number
AT02762996T
Other languages
English (en)
Inventor
Hatsuyuki Tanaka
Original Assignee
Az Electronic Materials Usa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Az Electronic Materials Usa filed Critical Az Electronic Materials Usa
Application granted granted Critical
Publication of ATE431574T1 publication Critical patent/ATE431574T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/40Treatment after imagewise removal, e.g. baking

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Materials For Photolithography (AREA)
  • Drying Of Semiconductors (AREA)
  • Polymers With Sulfur, Phosphorus Or Metals In The Main Chain (AREA)
  • Polyurethanes Or Polyureas (AREA)
  • Paints Or Removers (AREA)
AT02762996T 2001-09-13 2002-09-04 Ätzverfahren und verwendung einer zusammensetzung zur bildung einer ätzschutzschicht ATE431574T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001277600A JP4237430B2 (ja) 2001-09-13 2001-09-13 エッチング方法及びエッチング保護層形成用組成物
PCT/JP2002/008962 WO2003025677A1 (fr) 2001-09-13 2002-09-04 Procede de gravure et composition permettant de former une couche de protection contre la gravure

Publications (1)

Publication Number Publication Date
ATE431574T1 true ATE431574T1 (de) 2009-05-15

Family

ID=19102105

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02762996T ATE431574T1 (de) 2001-09-13 2002-09-04 Ätzverfahren und verwendung einer zusammensetzung zur bildung einer ätzschutzschicht

Country Status (9)

Country Link
US (1) US7141177B2 (de)
EP (1) EP1429185B1 (de)
JP (1) JP4237430B2 (de)
KR (1) KR100884910B1 (de)
CN (1) CN100478781C (de)
AT (1) ATE431574T1 (de)
DE (1) DE60232343D1 (de)
TW (1) TW575790B (de)
WO (1) WO2003025677A1 (de)

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JP4012480B2 (ja) * 2003-03-28 2007-11-21 Azエレクトロニックマテリアルズ株式会社 微細パターン形成補助剤及びその製造法
WO2005013011A1 (ja) 2003-08-04 2005-02-10 Fujitsu Limited レジストパターン厚肉化材料、それを用いたレジストパターンの製造方法及び半導体装置の製造方法
JP4490228B2 (ja) 2004-06-15 2010-06-23 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、半導体装置及びその製造方法
JP4679997B2 (ja) * 2004-08-31 2011-05-11 Azエレクトロニックマテリアルズ株式会社 微細パターン形成方法
JP4718145B2 (ja) 2004-08-31 2011-07-06 富士通株式会社 半導体装置及びゲート電極の製造方法
JP4583860B2 (ja) 2004-10-04 2010-11-17 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、並びに、半導体装置及びその製造方法
US7595141B2 (en) * 2004-10-26 2009-09-29 Az Electronic Materials Usa Corp. Composition for coating over a photoresist pattern
JP4676325B2 (ja) 2005-02-18 2011-04-27 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、半導体装置及びその製造方法
KR20060095318A (ko) * 2005-02-28 2006-08-31 삼성에스디아이 주식회사 전자 방출 소자와 이의 제조 방법
CN1702547B (zh) * 2005-03-29 2010-04-07 中国科学院光电技术研究所 一种高精度灰度掩模制作方法
JP4566862B2 (ja) 2005-08-25 2010-10-20 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、半導体装置及びその製造方法
JP4657899B2 (ja) 2005-11-30 2011-03-23 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、半導体装置及びその製造方法
JP4675227B2 (ja) * 2005-12-21 2011-04-20 トヨタ自動車株式会社 凸部の頂面に被覆膜を形成する方法
JP4724073B2 (ja) 2006-08-17 2011-07-13 富士通株式会社 レジストパターンの形成方法、半導体装置及びその製造方法
JP4739150B2 (ja) 2006-08-30 2011-08-03 富士通株式会社 レジストカバー膜形成材料、レジストパターンの形成方法、電子デバイス及びその製造方法
JP4801550B2 (ja) 2006-09-26 2011-10-26 富士通株式会社 レジスト組成物、レジストパターンの形成方法、及び半導体装置の製造方法
JP5018307B2 (ja) 2006-09-26 2012-09-05 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの形成方法、半導体装置及びその製造方法
US7923200B2 (en) * 2007-04-09 2011-04-12 Az Electronic Materials Usa Corp. Composition for coating over a photoresist pattern comprising a lactam
JP5069494B2 (ja) * 2007-05-01 2012-11-07 AzエレクトロニックマテリアルズIp株式会社 微細化パターン形成用水溶性樹脂組成物およびこれを用いた微細パターン形成方法
JP2009295745A (ja) * 2008-06-04 2009-12-17 Toshiba Corp 半導体装置の製造方法
US7745077B2 (en) * 2008-06-18 2010-06-29 Az Electronic Materials Usa Corp. Composition for coating over a photoresist pattern
JP5659872B2 (ja) 2010-10-22 2015-01-28 富士通株式会社 レジストパターン改善化材料、レジストパターンの形成方法、及び半導体装置の製造方法
JP5659873B2 (ja) 2010-12-16 2015-01-28 富士通株式会社 レジストパターン改善化材料、レジストパターンの形成方法、及び半導体装置の製造方法
JP5708071B2 (ja) 2011-03-11 2015-04-30 富士通株式会社 レジストパターン改善化材料、レジストパターンの形成方法、及び半導体装置の製造方法
ES2930455T3 (es) 2015-11-09 2022-12-13 Furukawa Electric Co Ltd Cinta de protección de superficie con máscara integrada
CN108351606A (zh) 2015-11-19 2018-07-31 Az电子材料(卢森堡)有限公司 用于形成细微抗蚀图案的组合物和使用该组合物的图案形成方法
CN108267934B (zh) * 2016-12-30 2021-03-30 臻鼎科技股份有限公司 水溶性感光树脂组合物、覆盖膜及电路板
CN110997975B (zh) * 2017-07-14 2022-09-09 英福康控股股份公司 从部件的表面受控地除去保护层的方法
KR102562023B1 (ko) * 2018-01-30 2023-08-01 도쿄엘렉트론가부시키가이샤 기판 처리 방법, 기판 처리 장치 및 에칭액

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Also Published As

Publication number Publication date
US20040238486A1 (en) 2004-12-02
CN1555510A (zh) 2004-12-15
CN100478781C (zh) 2009-04-15
EP1429185A4 (de) 2006-06-07
EP1429185A1 (de) 2004-06-16
DE60232343D1 (de) 2009-06-25
US7141177B2 (en) 2006-11-28
JP2003084457A (ja) 2003-03-19
KR20040035782A (ko) 2004-04-29
KR100884910B1 (ko) 2009-02-20
TW575790B (en) 2004-02-11
JP4237430B2 (ja) 2009-03-11
EP1429185B1 (de) 2009-05-13
WO2003025677A1 (fr) 2003-03-27

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