ATE348406T1 - Herstellungsverfahren für eine grabenkondensator- dram-zelle - Google Patents

Herstellungsverfahren für eine grabenkondensator- dram-zelle

Info

Publication number
ATE348406T1
ATE348406T1 AT95116061T AT95116061T ATE348406T1 AT E348406 T1 ATE348406 T1 AT E348406T1 AT 95116061 T AT95116061 T AT 95116061T AT 95116061 T AT95116061 T AT 95116061T AT E348406 T1 ATE348406 T1 AT E348406T1
Authority
AT
Austria
Prior art keywords
trench capacitor
production method
word line
dram cell
capacitor dram
Prior art date
Application number
AT95116061T
Other languages
English (en)
Inventor
Johann Alsmeier
Martin Gall
Original Assignee
Qimonda Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qimonda Ag filed Critical Qimonda Ag
Application granted granted Critical
Publication of ATE348406T1 publication Critical patent/ATE348406T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
AT95116061T 1994-11-15 1995-10-11 Herstellungsverfahren für eine grabenkondensator- dram-zelle ATE348406T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/340,500 US5936271A (en) 1994-11-15 1994-11-15 Unit cell layout and transfer gate design for high density DRAMs having a trench capacitor with signal electrode composed of three differently doped polysilicon layers

Publications (1)

Publication Number Publication Date
ATE348406T1 true ATE348406T1 (de) 2007-01-15

Family

ID=23333631

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95116061T ATE348406T1 (de) 1994-11-15 1995-10-11 Herstellungsverfahren für eine grabenkondensator- dram-zelle

Country Status (7)

Country Link
US (2) US5936271A (de)
EP (1) EP0713253B1 (de)
JP (1) JPH08227981A (de)
KR (1) KR100384326B1 (de)
AT (1) ATE348406T1 (de)
DE (1) DE69535335T2 (de)
TW (1) TW300337B (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6025224A (en) 1997-03-31 2000-02-15 Siemens Aktiengesellschaft Device with asymmetrical channel dopant profile
JP3132435B2 (ja) * 1997-09-22 2001-02-05 日本電気株式会社 半導体装置の製造方法
JPH11186514A (ja) * 1997-12-22 1999-07-09 Toshiba Corp 半導体記憶装置及びその製造方法
US6310375B1 (en) 1998-04-06 2001-10-30 Siemens Aktiengesellschaft Trench capacitor with isolation collar and corresponding manufacturing method
US6074909A (en) * 1998-07-31 2000-06-13 Siemens Aktiengesellschaft Apparatus and method for forming controlled deep trench top isolation layers
DE19845058A1 (de) * 1998-09-30 2000-04-13 Siemens Ag DRAM-Zellenanordnung und Verfahren zu deren Herstellung
US6180975B1 (en) * 1998-10-30 2001-01-30 International Business Machines Corporation Depletion strap semiconductor memory device
DE19957123B4 (de) * 1999-11-26 2006-11-16 Infineon Technologies Ag Verfahren zur Herstellung einer Zellenanordnung für einen dynamischen Halbleiterspeicher
US6339239B1 (en) 2000-06-23 2002-01-15 International Business Machines Corporation DRAM cell layout for node capacitance enhancement
US6410399B1 (en) * 2000-06-29 2002-06-25 International Business Machines Corporation Process to lower strap, wordline and bitline contact resistance in trench-based DRAMS by silicidization
US6653678B2 (en) * 2001-07-13 2003-11-25 International Business Machines Corporation Reduction of polysilicon stress in trench capacitors
DE10153110B4 (de) * 2001-10-22 2006-11-30 Infineon Technologies Ag Speicherzelle
DE10202139B4 (de) * 2002-01-21 2006-07-13 Infineon Technologies Ag Speicherzelle mit einem dünnen Isolationskragen und Speicherbaustein
DE10205077B4 (de) * 2002-02-07 2007-03-08 Infineon Technologies Ag Halbleiterspeicherzelle mit einem Graben und einem planaren Auswahltransistor und Verfahren zu ihrer Herstellung
US6913968B2 (en) * 2003-07-30 2005-07-05 International Business Machines Corporation Method and structure for vertical DRAM devices with self-aligned upper trench shaping
TWI223385B (en) * 2003-09-04 2004-11-01 Nanya Technology Corp Trench device structure with single side buried strap and method for fabricating the same
US7365385B2 (en) * 2004-08-30 2008-04-29 Micron Technology, Inc. DRAM layout with vertical FETs and method of formation
DE102004047665B3 (de) * 2004-09-30 2006-02-16 Infineon Technologies Ag Speicherzelle und integrierte Speicherschaltung
US7285840B2 (en) * 2004-12-12 2007-10-23 Lsi Corporation Apparatus for confining inductively coupled surface currents
US7563669B2 (en) * 2006-05-16 2009-07-21 Agere Systems Inc. Integrated circuit with a trench capacitor structure and method of manufacture
US7833872B2 (en) * 2007-10-31 2010-11-16 International Business Machines Corporation Uniform recess of a material in a trench independent of incoming topography
US7875913B2 (en) * 2008-05-30 2011-01-25 Omnivision Technologies, Inc. Transistor with contact over gate active area
US10249711B2 (en) 2017-06-29 2019-04-02 Teledyne Scientific & Imaging, Llc FET with micro-scale device array

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60245163A (ja) * 1984-05-18 1985-12-04 Fujitsu Ltd 半導体装置
JPS6155957A (ja) * 1984-08-27 1986-03-20 Toshiba Corp 半導体記憶装置
JPS62104073A (ja) * 1985-10-30 1987-05-14 Nec Corp 半導体記憶装置およびその製造方法
JPS62150879A (ja) * 1985-12-25 1987-07-04 Mitsubishi Electric Corp 半導体記憶装置
JPH0766659B2 (ja) * 1986-01-30 1995-07-19 三菱電機株式会社 半導体記憶装置
JPS62299062A (ja) * 1986-06-18 1987-12-26 Matsushita Electric Ind Co Ltd 半導体記憶装置
US4829017A (en) * 1986-09-25 1989-05-09 Texas Instruments Incorporated Method for lubricating a high capacity dram cell
US4959698A (en) * 1986-10-08 1990-09-25 Mitsubishi Denki Kabushiki Kaisha Memory cell of a semiconductor memory device
US4801988A (en) * 1986-10-31 1989-01-31 International Business Machines Corporation Semiconductor trench capacitor cell with merged isolation and node trench construction
JPS63169758A (ja) * 1987-01-08 1988-07-13 Mitsubishi Electric Corp 半導体素子
EP0283964B1 (de) * 1987-03-20 1994-09-28 Nec Corporation Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff
US4942554A (en) * 1987-11-26 1990-07-17 Siemens Aktiengesellschaft Three-dimensional, one-transistor cell arrangement for dynamic semiconductor memories comprising trench capacitor and method for manufacturing same
JP2593524B2 (ja) * 1988-07-25 1997-03-26 株式会社東芝 半導体装置の製造方法
JP2785191B2 (ja) * 1988-10-29 1998-08-13 ソニー株式会社 半導体メモリ
JPH03225955A (ja) * 1990-01-31 1991-10-04 Fujitsu Ltd 半導体装置
US5244824A (en) * 1990-09-05 1993-09-14 Motorola, Inc. Trench capacitor and transistor structure and method for making the same
US5065273A (en) * 1990-12-04 1991-11-12 International Business Machines Corporation High capacity DRAM trench capacitor and methods of fabricating same
JP2795549B2 (ja) * 1991-03-13 1998-09-10 シャープ株式会社 ダイナミックｒａｍ及びその製造法
US5204279A (en) * 1991-06-03 1993-04-20 Sgs-Thomson Microelectronics, Inc. Method of making SRAM cell and structure with polycrystalline p-channel load devices
US5214603A (en) * 1991-08-05 1993-05-25 International Business Machines Corporation Folded bitline, ultra-high density dynamic random access memory having access transistors stacked above trench storage capacitors
JPH0661454A (ja) * 1992-08-10 1994-03-04 Hitachi Ltd 半導体集積回路装置
DE69330302T2 (de) * 1992-09-04 2002-01-10 Mitsubishi Electric Corp Halbleiterspeicheranordnung und Verfahren zu ihrer Herstellung
US5389559A (en) * 1993-12-02 1995-02-14 International Business Machines Corporation Method of forming integrated interconnect for very high density DRAMs

Also Published As

Publication number Publication date
EP0713253B1 (de) 2006-12-13
US6004844A (en) 1999-12-21
KR960019739A (ko) 1996-06-17
US5936271A (en) 1999-08-10
DE69535335D1 (de) 2007-01-25
JPH08227981A (ja) 1996-09-03
TW300337B (de) 1997-03-11
KR100384326B1 (ko) 2003-09-13
DE69535335T2 (de) 2007-07-05
EP0713253A1 (de) 1996-05-22

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties