ATE158441T1 - Eingeschlossener transistor mit eingegrabenem kanal - Google Patents

Eingeschlossener transistor mit eingegrabenem kanal

Info

Publication number
ATE158441T1
ATE158441T1 AT89908745T AT89908745T ATE158441T1 AT E158441 T1 ATE158441 T1 AT E158441T1 AT 89908745 T AT89908745 T AT 89908745T AT 89908745 T AT89908745 T AT 89908745T AT E158441 T1 ATE158441 T1 AT E158441T1
Authority
AT
Austria
Prior art keywords
transistor
channel region
buried channel
enclosed
regions
Prior art date
Application number
AT89908745T
Other languages
English (en)
Inventor
Thomas E Harrington Iii
Original Assignee
Dallas Semiconductor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dallas Semiconductor filed Critical Dallas Semiconductor
Application granted granted Critical
Publication of ATE158441T1 publication Critical patent/ATE158441T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/637Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/114PN junction isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/856Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/859Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
  • Semiconductor Memories (AREA)
AT89908745T 1988-06-23 1989-06-23 Eingeschlossener transistor mit eingegrabenem kanal ATE158441T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/210,242 US4906588A (en) 1988-06-23 1988-06-23 Enclosed buried channel transistor

Publications (1)

Publication Number Publication Date
ATE158441T1 true ATE158441T1 (de) 1997-10-15

Family

ID=22782136

Family Applications (1)

Application Number Title Priority Date Filing Date
AT89908745T ATE158441T1 (de) 1988-06-23 1989-06-23 Eingeschlossener transistor mit eingegrabenem kanal

Country Status (6)

Country Link
US (1) US4906588A (de)
EP (1) EP0422129B1 (de)
JP (1) JP2716829B2 (de)
AT (1) ATE158441T1 (de)
DE (1) DE68928326T2 (de)
WO (1) WO1989012910A1 (de)

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US4943537A (en) * 1988-06-23 1990-07-24 Dallas Semiconductor Corporation CMOS integrated circuit with reduced susceptibility to PMOS punchthrough
US5122474A (en) * 1988-06-23 1992-06-16 Dallas Semiconductor Corporation Method of fabricating a CMOS IC with reduced susceptibility to PMOS punchthrough
US5180682A (en) * 1988-08-18 1993-01-19 Seiko Epson Corporation Semiconductor device and method of producing semiconductor device
US5296401A (en) * 1990-01-11 1994-03-22 Mitsubishi Denki Kabushiki Kaisha MIS device having p channel MOS device and n channel MOS device with LDD structure and manufacturing method thereof
US5196360A (en) * 1990-10-02 1993-03-23 Micron Technologies, Inc. Methods for inhibiting outgrowth of silicide in self-aligned silicide process
US5786620A (en) * 1992-01-28 1998-07-28 Thunderbird Technologies, Inc. Fermi-threshold field effect transistors including source/drain pocket implants and methods of fabricating same
US5814869A (en) * 1992-01-28 1998-09-29 Thunderbird Technologies, Inc. Short channel fermi-threshold field effect transistors
US5440221A (en) * 1992-07-08 1995-08-08 Benchmarg Microelectronics, Inc. Method and apparatus for monitoring batttery capacity with charge control
US5444004A (en) * 1994-04-13 1995-08-22 Winbond Electronics Corporation CMOS process compatible self-alignment lateral bipolar junction transistor
US5654213A (en) * 1995-10-03 1997-08-05 Integrated Device Technology, Inc. Method for fabricating a CMOS device
US5705437A (en) * 1996-09-25 1998-01-06 Taiwan Semiconductor Manufacturing Company, Ltd. Trench free process for SRAM
US6156591A (en) * 1998-01-16 2000-12-05 Texas Instruments - Acer Incorporated Method of fabricating CMOS transistors with self-aligned planarization twin-well by using fewer mask counts
US6294416B1 (en) * 1998-01-23 2001-09-25 Texas Instruments-Acer Incorporated Method of fabricating CMOS transistors with self-aligned planarization twin-well by using fewer mask counts
US5929493A (en) * 1998-03-31 1999-07-27 Texas Instruments--Acer Incorporated CMOS transistors with self-aligned planarization twin-well by using fewer mask counts
DE19913375B4 (de) * 1999-03-24 2009-03-26 Infineon Technologies Ag Verfahren zur Herstellung einer MOS-Transistorstruktur
US20060038223A1 (en) * 2001-07-03 2006-02-23 Siliconix Incorporated Trench MOSFET having drain-drift region comprising stack of implanted regions
US7291884B2 (en) * 2001-07-03 2007-11-06 Siliconix Incorporated Trench MIS device having implanted drain-drift region and thick bottom oxide
US7009247B2 (en) * 2001-07-03 2006-03-07 Siliconix Incorporated Trench MIS device with thick oxide layer in bottom of gate contact trench
US7033876B2 (en) * 2001-07-03 2006-04-25 Siliconix Incorporated Trench MIS device having implanted drain-drift region and thick bottom oxide and process for manufacturing the same
US6747318B1 (en) * 2001-12-13 2004-06-08 Lsi Logic Corporation Buried channel devices and a process for their fabrication simultaneously with surface channel devices to produce transistors and capacitors with multiple electrical gate oxides
US7196375B2 (en) * 2004-03-16 2007-03-27 Taiwan Semiconductor Manufacturing Company, Ltd. High-voltage MOS transistor
WO2009060670A1 (ja) * 2007-11-09 2009-05-14 Sanken Electric Co., Ltd. 半導体装置及びその製造方法
US8981445B2 (en) 2012-02-28 2015-03-17 Texas Instruments Incorporated Analog floating-gate memory with N-channel and P-channel MOS transistors

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Also Published As

Publication number Publication date
WO1989012910A1 (en) 1989-12-28
DE68928326T2 (de) 1998-02-05
JPH06500894A (ja) 1994-01-27
EP0422129B1 (de) 1997-09-17
HK1003040A1 (en) 1998-09-30
JP2716829B2 (ja) 1998-02-18
US4906588A (en) 1990-03-06
EP0422129A1 (de) 1991-04-17
EP0422129A4 (en) 1991-09-04
DE68928326D1 (de) 1997-10-23

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