ATE113759T1 - Verfahren zum herstellen von lötkontakthügeln und resultierende struktur. - Google Patents
Verfahren zum herstellen von lötkontakthügeln und resultierende struktur.Info
- Publication number
- ATE113759T1 ATE113759T1 AT89402181T AT89402181T ATE113759T1 AT E113759 T1 ATE113759 T1 AT E113759T1 AT 89402181 T AT89402181 T AT 89402181T AT 89402181 T AT89402181 T AT 89402181T AT E113759 T1 ATE113759 T1 AT E113759T1
- Authority
- AT
- Austria
- Prior art keywords
- solder
- soluble metal
- under bump
- layer
- bump metallurgy
- Prior art date
Links
- 229910000679 solder Inorganic materials 0.000 title abstract 17
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000002184 metal Substances 0.000 abstract 6
- 229910052751 metal Inorganic materials 0.000 abstract 6
- 238000005272 metallurgy Methods 0.000 abstract 5
- 238000002161 passivation Methods 0.000 abstract 4
- 239000000463 material Substances 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000000151 deposition Methods 0.000 abstract 1
- 238000004090 dissolution Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 239000000155 melt Substances 0.000 abstract 1
- 150000002739 metals Chemical class 0.000 abstract 1
Classifications
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2081—Compound repelling a metal, e.g. solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/067—Etchants
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49204—Contact or terminal manufacturing
- Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
- Y10T29/4921—Contact or terminal manufacturing by assembling plural parts with bonding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/227,347 US4950623A (en) | 1988-08-02 | 1988-08-02 | Method of building solder bumps |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE113759T1 true ATE113759T1 (de) | 1994-11-15 |
Family
ID=22852733
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT89402181T ATE113759T1 (de) | 1988-08-02 | 1989-08-01 | Verfahren zum herstellen von lötkontakthügeln und resultierende struktur. |
Country Status (6)
Country | Link |
---|---|
US (1) | US4950623A (de) |
EP (1) | EP0354114B1 (de) |
JP (1) | JPH02224248A (de) |
KR (1) | KR900004229A (de) |
AT (1) | ATE113759T1 (de) |
DE (1) | DE68919152D1 (de) |
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DE102017107961B4 (de) * | 2017-04-12 | 2022-10-13 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung einer Beleuchtungseinrichtung und Beleuchtungseinrichtung |
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JPS60198750A (ja) * | 1984-03-23 | 1985-10-08 | Hitachi Ltd | 多層配線部材及びその製造方法 |
JPS61194744A (ja) * | 1985-02-25 | 1986-08-29 | Hitachi Ltd | 半導体装置 |
US4661375A (en) * | 1985-04-22 | 1987-04-28 | At&T Technologies, Inc. | Method for increasing the height of solder bumps |
JPS6358945A (ja) * | 1986-08-29 | 1988-03-14 | Toshiba Corp | はんだバンプの形成方法 |
-
1988
- 1988-08-02 US US07/227,347 patent/US4950623A/en not_active Expired - Fee Related
-
1989
- 1989-08-01 EP EP89402181A patent/EP0354114B1/de not_active Expired - Lifetime
- 1989-08-01 AT AT89402181T patent/ATE113759T1/de not_active IP Right Cessation
- 1989-08-01 DE DE68919152T patent/DE68919152D1/de not_active Expired - Lifetime
- 1989-08-02 JP JP1201130A patent/JPH02224248A/ja active Pending
- 1989-08-02 KR KR1019890011060A patent/KR900004229A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
US4950623A (en) | 1990-08-21 |
EP0354114A1 (de) | 1990-02-07 |
EP0354114B1 (de) | 1994-11-02 |
KR900004229A (ko) | 1990-03-27 |
DE68919152D1 (de) | 1994-12-08 |
JPH02224248A (ja) | 1990-09-06 |
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