JPS5779649A - Formation of electrode - Google Patents

Formation of electrode

Info

Publication number
JPS5779649A
JPS5779649A JP55156216A JP15621680A JPS5779649A JP S5779649 A JPS5779649 A JP S5779649A JP 55156216 A JP55156216 A JP 55156216A JP 15621680 A JP15621680 A JP 15621680A JP S5779649 A JPS5779649 A JP S5779649A
Authority
JP
Japan
Prior art keywords
film
formation
bump
wiring conductor
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55156216A
Other languages
Japanese (ja)
Inventor
Junichi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP55156216A priority Critical patent/JPS5779649A/en
Publication of JPS5779649A publication Critical patent/JPS5779649A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To enable to form easily a bump by a method wherein after a metal coating is provided by electroless plating on the exposed part of a wiring conductor film being covered with an insulating film, melted solder is deposited for formation. CONSTITUTION:An opening is provided in the oxide film 104 to cover the wiring conductor film 105 on an Si substrate 106, the middle metal film 112 of Au, Ag, Pb, Sn, Ni, etc., is formed by electroless plating on the exposed wiring conductor film, and melted solder is deposited on the metal film thereof to form the bump 111. Accordingly the progress of work is simplfied, and formation of bump is facilitated.
JP55156216A 1980-11-06 1980-11-06 Formation of electrode Pending JPS5779649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55156216A JPS5779649A (en) 1980-11-06 1980-11-06 Formation of electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55156216A JPS5779649A (en) 1980-11-06 1980-11-06 Formation of electrode

Publications (1)

Publication Number Publication Date
JPS5779649A true JPS5779649A (en) 1982-05-18

Family

ID=15622891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55156216A Pending JPS5779649A (en) 1980-11-06 1980-11-06 Formation of electrode

Country Status (1)

Country Link
JP (1) JPS5779649A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63252446A (en) * 1987-04-09 1988-10-19 Toshiba Corp Formation of solder bump
JPH021127A (en) * 1988-03-15 1990-01-05 Toshiba Corp Formation of bump
EP0791960A3 (en) * 1996-02-23 1998-02-18 Matsushita Electric Industrial Co., Ltd. Semiconductor devices having protruding contacts and method for making the same
EP1100123A1 (en) * 1999-11-09 2001-05-16 Corning Incorporated Dip formation of flip-chip solder bumps

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63252446A (en) * 1987-04-09 1988-10-19 Toshiba Corp Formation of solder bump
JPH021127A (en) * 1988-03-15 1990-01-05 Toshiba Corp Formation of bump
EP0791960A3 (en) * 1996-02-23 1998-02-18 Matsushita Electric Industrial Co., Ltd. Semiconductor devices having protruding contacts and method for making the same
US5952718A (en) * 1996-02-23 1999-09-14 Matsushita Electric Industrial Co., Ltd. Semiconductor devices having protruding contacts
US6107120A (en) * 1996-02-23 2000-08-22 Matsushita Electric Indsutrial Co., Ltd. Method of making semiconductor devices having protruding contacts
EP1100123A1 (en) * 1999-11-09 2001-05-16 Corning Incorporated Dip formation of flip-chip solder bumps
US6551650B1 (en) 1999-11-09 2003-04-22 Corning Incorporated Dip formation of flip-chip solder bumps

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