WO2023147709A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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Publication number
WO2023147709A1
WO2023147709A1 PCT/CN2022/076165 CN2022076165W WO2023147709A1 WO 2023147709 A1 WO2023147709 A1 WO 2023147709A1 CN 2022076165 W CN2022076165 W CN 2022076165W WO 2023147709 A1 WO2023147709 A1 WO 2023147709A1
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WIPO (PCT)
Prior art keywords
light
layer
area
shielding portion
opening
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PCT/CN2022/076165
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English (en)
French (fr)
Inventor
金蒙
吕磊
杨林
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/638,872 priority Critical patent/US20240040894A1/en
Publication of WO2023147709A1 publication Critical patent/WO2023147709A1/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80521—Cathodes characterised by their shape

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and a display device.
  • CUP Camera under Panel
  • the present application provides a display panel and a display device, so as to alleviate the technical problem of poor light transmittance existing in display screens using under-screen camera technology.
  • An embodiment of the present application provides a display panel, which includes a first display area and a second display area, the light transmittance of the first display area is greater than the light transmittance of the second display area, and the display panel further includes :
  • a light-emitting layer located on the side of the first electrode layer away from the drive substrate, the light-emitting layer includes: a plurality of first pixels arranged in the first display area, and a plurality of pixels arranged in the second display area the second pixel of the region;
  • the first electrode layer is located on the side of the first electrode layer away from the driving substrate, and the light emitting layer includes: a plurality of first pixels arranged in the first display area, and a plurality of first pixels arranged in the first display area. the second pixel of the second display area; and
  • a second electrode layer located on a side of the light-emitting layer away from the first electrode layer
  • the second electrode layer is provided with a first opening between adjacent first pixels, and the plurality of adjacent first pixels around the first opening
  • the central point encloses a first polygon, and the ratio of the area of the first opening to the area of the corresponding first polygon ranges from 50% to 95%.
  • the first electrode layer includes a plurality of first electrode blocks corresponding to the first pixels and a plurality of second electrode blocks corresponding to the second pixels;
  • the central points of a plurality of adjacent first electrode blocks around the first opening form a second polygon, and the ratio range of the area of the first opening to the area of the corresponding second polygon is 50% to 95%.
  • the driving substrate includes:
  • a driving circuit layer disposed between the substrate and the light-emitting layer, the driving circuit layer comprising: a first transistor corresponding to the first pixel and a second transistor corresponding to the second pixel;
  • a light-shielding layer disposed between the substrate and the driving circuit layer, the light-shielding layer comprising: a first light-shielding portion corresponding to the first pixel;
  • the center points of a plurality of adjacent first light-shielding portions around the first opening form a third polygon, and the area of the first opening is equal to the area of the corresponding third polygon.
  • the ratios range from 50% to 95%.
  • the driving circuit layer further includes: a first signal wiring electrically connected to the first transistor;
  • the light-shielding layer further includes a second light-shielding portion disposed on the first display area and overlapping with the first signal trace, and the second light-shielding portion is electrically connected to an adjacent first light-shielding portion.
  • the first display area includes: a light-transmitting sub-area and a transition sub-area between the light-transmitting sub-area and the second display area;
  • the light-shielding layer further includes: a third light-shielding portion disposed around the first light-shielding portion and the second light-shielding portion, the third light-shielding portion is at least partially overlapped with the transition sub-region, and the second light-shielding portion The portion is also connected between the adjacent first light shielding portion and the third light shielding portion.
  • the first opening is arranged corresponding to the area surrounded by the adjacent first light-shielding portion and the second light-shielding portion, and/or, corresponding to the adjacent first light-shielding portion part, the second light-shielding part, and the area surrounded by the third light-shielding part.
  • the surface shape of at least one light-shielding portion edge among the first light-shielding portion, the second light-shielding portion and the third light-shielding portion is wavy or zigzag.
  • the number of the first pixels in a unit area is the same as the number of the second pixels in a unit area.
  • the first display area includes: a light-transmitting sub-area and a transition sub-area between the light-transmitting sub-area and the second display area;
  • the first transistor is disposed in the transition sub-region, or the first transistor is disposed in the light-transmitting sub-region and between the first light shielding portion and the first pixel.
  • the light-emitting layer is provided with a second opening corresponding to the first opening in the first display area, and a plurality of the first pixels adjacent to the second opening are
  • the central points of the first polygons enclose the first polygon, and the ratio of the area of the second opening to the corresponding area of the first polygon ranges from 50% to 95%.
  • the driving substrate includes:
  • a light-shielding layer disposed on one side of the substrate
  • a driving circuit layer disposed between the light-shielding layer and the light-emitting layer
  • a pixel definition layer disposed between the driving circuit layer and the light emitting layer
  • the driving substrate is provided with a third opening corresponding to the first opening, and the third opening at least penetrates through the pixel definition layer.
  • the light-shielding layer includes: a first light-shielding portion disposed corresponding to the first pixel;
  • the bottom surface of the third opening extends to the light-shielding layer and is on the same layer as the bottom surface of the first light-shielding portion.
  • the minimum distance between the first opening and the adjacent first pixel is greater than or equal to 2um.
  • An embodiment of the present application further provides a display device, which includes a functional element and a display panel according to one of the foregoing embodiments, the functional element being disposed on a non-light emitting side of a first display area of the display panel.
  • the display panel includes a first display area and a second display area, the light transmittance of the first display area is greater than the light transmittance of the second display area, and the display panel It also includes a driving substrate, a first electrode layer on one side of the driving substrate, a light-emitting layer on a side of the first electrode layer away from the driving substrate, and a light-emitting layer on a side of the light-emitting layer away from the first electrode layer.
  • the second electrode layer, the light emitting layer includes a plurality of first pixels arranged in the first display area and a plurality of second pixels arranged in the second display area, in the first display area,
  • the second electrode layer is provided with a first opening between adjacent first pixels, and the center points of a plurality of adjacent first pixels around the first opening form a first polygon, so The ratio of the area of the first opening to the area of the corresponding first polygon ranges from 50% to 95%.
  • First openings are provided between the first pixels to improve the light transmittance of the first display area, which solves the problem of poor light transmittance in the existing display screen using the under-screen camera technology.
  • FIG. 1 is a schematic top view structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 2 is a schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present application.
  • Fig. 3 is a schematic diagram of the surface shape of the first opening provided by the embodiment of the present application.
  • FIG. 4 is a schematic diagram of the detailed structure of the driving substrate provided by the embodiment of the present application.
  • FIG. 5 is a schematic top view structure diagram of a light-shielding layer in the first display area provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a cross-sectional structure of the second electrode layer before patterning provided by the embodiment of the present application.
  • FIG. 7 is a schematic diagram of the detailed structure of the first opening provided by the embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of another top view of the light-shielding layer provided by the embodiment of the present application.
  • FIG. 9 is another schematic top view structure diagram of the light-shielding layer provided by the embodiment of the present application.
  • FIG. 10 is another schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present application.
  • FIG. 11 is a schematic diagram of another cross-sectional structure before patterning of the second electrode layer provided by the embodiment of the present application.
  • FIG. 12 is a schematic flowchart of a method for manufacturing a display panel provided in an embodiment of the present application.
  • FIG. 1 is a schematic top view of the display panel provided by the embodiment of the present application
  • Figure 2 is a schematic cross-sectional structure of the display panel provided by the embodiment of the present application
  • Figure 3 is a schematic diagram of the structure of the display panel provided by the embodiment of the present application A schematic diagram of the surface shape of the first opening
  • FIG. 4 is a schematic diagram of the detailed structure of the driving substrate provided by the embodiment of the present application.
  • the display panel 100 includes a first display area SA and a second display area DA, the light transmittance of the first display area SA is greater than the light transmittance of the second display area DA.
  • the first display area SA is an area with additional functions.
  • the first display area SA can be used to display images, so that the display panel 100 can present the effect of full-screen display, and can also be used to install cameras, optical touch components, and fingerprint recognition sensors. Optical components to enhance the user experience.
  • the second display area DA is the main display area, and the second display area DA is used for displaying images.
  • the display panel 100 also includes a driving substrate 10, a first electrode layer 20 located on one side of the driving substrate 10, a light emitting layer 50 located on a side of the first electrode layer 20 away from the driving substrate 10, and a light emitting layer located on the side of the driving substrate 10. 50 away from the second electrode layer 30 on the side of the first electrode layer 20 .
  • the light emitting layer 50 includes a plurality of first pixels 51 disposed in the first display area SA, and a plurality of second pixels 52 disposed in the second display area DA.
  • the number of the first pixels 51 in a unit area is the same as the number of the second pixels 52 in a unit area, that is, the pixel density of the first display area SA is equal to that of the second display area DA. pixel density, so as to reduce the display difference between the first display area SA and the second display area DA.
  • the size and shape of the first pixel 51 in the first display area SA and the size and shape of the second pixel 52 in the second display area DA may be the same or different.
  • the shapes of the first pixel 51 and the second pixel 52 include other polygons such as circle and square, and the embodiment of the present application uses a circle as an example for illustration.
  • a plurality of the first pixels 51 and a plurality of the second pixels 52 all include sub-pixels of other colors such as red sub-pixels, green sub-pixels and blue sub-pixels, wherein each of the first pixels 51 and each of the The second pixel 52 is one of a red sub-pixel, a green sub-pixel and a blue sub-pixel.
  • the red sub-pixel is formed of red light-emitting material and can emit red light
  • the green sub-pixel is formed of green light-emitting material and can emit green light
  • the blue sub-pixel is formed of blue light-emitting material and can emit blue light.
  • first pixel 51 and the second pixel 52 emit light under the joint action of the first electrode layer 20 and the second electrode layer 30 .
  • the first electrode layer 20 is an anode
  • the second electrode layer 30 is a cathode.
  • the application is not limited thereto.
  • the first electrode layer 20 of the application can also be a cathode
  • the second electrode layer 30 is a cathode.
  • Layer 30 is the anode.
  • the second electrode layer 30 is provided with a first opening 31 between adjacent first pixels 51, so as to improve the light transmittance of the first display area SA.
  • the center points of a plurality of adjacent first pixels 51 around the first opening 31 form a first polygon 411, and the area of the first opening 31 is the same as that of the corresponding first polygon 411.
  • the area ratio ranges from 50% to 95%, so as to reduce the impact on the electrical performance of the second electrode layer 30 while increasing the light transmittance of the first display area SA.
  • the light-emitting layer 50 is provided with the second opening corresponding to the first opening 31 in the first display area SA, and the center points of a plurality of adjacent first pixels 51 around the second opening are surrounded by In the first polygon 411 , the ratio of the area of the second opening to the corresponding area of the first polygon 411 ranges from 50% to 95%.
  • the first polygon 411 is a quadrangle
  • the plurality of first pixels 51 surrounding the first polygon 411 include at least three color sub-pixels, such as a blue A color sub-pixel B, a red sub-pixel R, and two green sub-pixels G, as shown in Figure 3, wherein the size of the blue sub-pixel B is larger than the size of the red sub-pixel R, and the size of the red sub-pixel R is larger than the green sub-pixel G size.
  • the first electrode layer 20 includes a plurality of electrode blocks arranged in an array on the driving substrate 10, each of the electrode blocks corresponds to a sub-pixel, specifically, the first electrode layer 20 includes a plurality of electrode blocks corresponding to the The first electrode block 21 of the first pixel 51 and the plurality of second electrode blocks 22 corresponding to the second pixel 52 . Center points of a plurality of adjacent first electrode blocks 21 around the first opening 31 enclose a second polygon, and the area of the first opening 31 is the same as the area of the corresponding second polygon. The ratio ranges from 50% to 95%.
  • the light emitting layer 50 is disposed on the first electrode layer 20, specifically, the first pixel 51 is disposed on the first electrode block 21, and the second pixel 52 is disposed on the first electrode block 21. above the second electrode block 22.
  • the orthographic projection of the first pixel 51 on the driving substrate 10 falls within the range of the orthographic projection of the first electrode block 21 on the driving substrate 10, and the area of the first pixel 51 is smaller than the The area of the first electrode block 21; the orthographic projection of the second pixel 52 on the driving substrate 10 falls within the range of the orthographic projection of the second electrode block 22 on the driving substrate 10, and the first The area of the second pixel 52 is smaller than the area of the second electrode block 22 .
  • the center point of the first electrode block 21 coincides with the center point of the corresponding first pixel 51
  • the center point of the second electrode block 22 coincides with the center point of the corresponding second pixel 52 .
  • the center points of the plurality of first electrode blocks 21 adjacent to the first opening 31 enclose a second polygon corresponding to the plurality of first electrode blocks 21 of the plurality of first pixels.
  • the central points of 51 enclose the first polygon 411 and overlap.
  • the orthographic projection of the first opening 31 on the driving substrate 10 is away from the orthographic projection of the first electrode block 21 on the driving substrate 10 .
  • the “distance” in this application means that the orthographic projections of the two components on the same plane do not overlap with each other, and there is a gap between them, such as the orthographic projection of the first opening 31 on the drive substrate 10
  • the projection is far from the orthographic projection of the first electrode block 21 on the driving substrate 10, that is to say, the orthographic projection of the first opening 31 on the driving substrate 10 is at the same distance as the first electrode block 21.
  • the orthographic projection on the driving substrate 10 has no overlapping portion, and there is a difference between the orthographic projection of the first opening 31 on the driving substrate 10 and the orthographic projection of the first electrode block 21 on the driving substrate 10 with intervals.
  • the minimum distance L3 between the first opening 31 and the adjacent first pixel 51 is greater than or equal to 2um, that is, the outer contour of the first opening 31 on the driving substrate 10 is orthographically projected and The minimum distance L3 of the outer contour of the orthographic projection of the first electrode block 21 on the driving substrate 10 is greater than or equal to 2 micrometers.
  • the orthographic projection of the second electrode layer 30 on the driving substrate 10 completely covers the orthographic projection of each of the first electrode blocks 21 on the driving substrate 10, so as to ensure that the first display area SA normal display of each of the first pixels 51 .
  • the surface shape of the first opening 31 includes circular, square, hexagonal, octagonal, etc., as shown in FIG.
  • the surface shape of the first opening 31 is circular, such as The surface shape of the first opening 31 shown in (b) in Figure 3 is a square, and the surface shape of the first opening 31 shown in Figure 3 (c) is a regular hexagon, as shown in Figure 3 (d)
  • the surface shape of the first opening 31 is a regular octagon.
  • the driving substrate 10 includes a substrate 11, a driving circuit layer 12 disposed between the substrate 11 and the light-emitting layer 50, and a driving circuit layer 12 disposed between the substrate 11 and the driving layer 50.
  • the light-shielding layer 13 between the circuit layers 12 .
  • the substrate 11 can be a flexible substrate, and the material of the flexible substrate can be an organic material such as polyimide; the substrate 11 can also be a rigid substrate, and the material of the rigid substrate can be, for example, glass, metal, plastics, etc.; the substrate 11 can be a single-layer film structure or a multi-layer film structure, such as when the substrate 11 is a flexible polyimide substrate, the substrate 11 can include the first stacked A substrate 111, a first barrier layer 112, a second substrate 113, and a second barrier layer 114, wherein the first barrier layer 112 and the second barrier layer 114 are used to prevent water and oxygen from penetrating the substrate 11
  • the materials of the first barrier layer 112 and the second barrier layer 114 include inorganic materials such as silicon oxide and silicon nitride.
  • the light shielding layer 13 is located on the substrate 11, specifically, the light shielding layer 13 may be located between the first substrate 111 and the first barrier layer 112, or the light shielding layer 13 may also be Located between the second substrate 113 and the second barrier layer 114 . In this embodiment, the light shielding layer 13 is located between the second substrate 113 and the second barrier layer 114 as an example for illustration.
  • the driving circuit layer 12 is disposed between the light-shielding layer 13 and the light-emitting layer 50, and the driving circuit layer 12 includes a first transistor 12-1 corresponding to the first pixel 51 and a first transistor 12-1 corresponding to the The second transistor 12 - 2 of the second pixel 52 .
  • the first transistor 12 - 1 is electrically connected to the corresponding first electrode block 21
  • the second transistor 12 - 2 is electrically connected to the corresponding second electrode block 22 .
  • the second transistor 12-2 is located on the side of the second barrier layer 114 away from the light shielding layer 13, and the second transistor 12-2 Comprising an active layer 121, a first gate 122 and a second gate 123 disposed on the side of the active layer 121 away from the light shielding layer 13, disposed on the second gate 123 away from the first gate A source 124 and a drain 125 on one side of the pole 122, wherein the active layer 121 includes a channel region, a source region and a drain region located on both sides of the channel region, the first gate 122 and The second gate 123 is disposed corresponding to the channel region, the source 124 is connected to the source region of the active layer 121, and the drain 125 is connected to the drain region of the active layer 121 , the second electrode block 22 is connected to the source 124 or the drain 125 .
  • the present application is not limited thereto, and the structure of the second transistor 12 - 2 of the present application may also be of other types, such as single gate, bottom gate, etc. may be used.
  • the structural description of the first transistor 12-1 reference may be made to the second transistor 12-2, which will not be repeated here.
  • the driving substrate 10 also includes an insulating layer disposed between the layers of the driving circuit layer 12, such as the first gate insulating layer between the active layer 121 and the first gate 122.
  • the driving circuit layer 12 also includes a second signal wiring 15 connected to the light-shielding layer 13, by connecting the light-shielding layer 13 to the second signal wiring 15, to prevent or reduce Damage to the pixel circuit caused by discharge.
  • the second signal wiring 15 includes a constant voltage signal line such as VDD, and the second signal wiring 15 can be arranged on the same layer as the first gate 122 or the second gate 123 , or can be arranged on the same layer as the first gate 122 or the second gate 123 .
  • the active or the drain 125 are arranged in the same layer, but the present application is not limited thereto.
  • the driving substrate 10 also includes signal lines such as data lines, gate scanning lines, etc., which will not be repeated here.
  • the light-shielding layer 13 is disposed between the substrate 11 and the driving circuit layer 12, and is used to shield the transistors of the driving circuit layer 12 and prevent light from shining on the transistors. Moreover, in the first display area SA, the light-shielding layer 13 includes a first light-shielding portion 131 corresponding to the first pixel 51 . Center points of a plurality of adjacent first light shielding portions 131 around the first opening 31 enclose a third polygon, and the area of the first opening 31 is the same as the area of the corresponding third polygon. The ratio ranges from 50% to 95%.
  • the first light-shielding portion 131 is set corresponding to the first pixel 51, and the orthographic projection of the first pixel 51 on the substrate 11 falls on the first light-shielding portion 131 on the substrate. within the range of the orthographic projection on the base 11, and the area of the first pixel 51 is smaller than the area of the first light shielding portion 131, the center point of the first pixel 51 is in the same direction as the center point of the first light shielding portion 131 coincide.
  • the central points of the plurality of first light shielding portions 131 adjacent to the first opening 31 enclose a third polygon and the plurality of first pixels 51 corresponding to the plurality of first light shielding portions 131
  • the first polygon 411 surrounded by the center points of is coincident.
  • the minimum distance L2 between the outer contour of the orthographic projection of the first opening 31 on the substrate 11 and the outer contour of the first light shielding portion 131 on the substrate 11 is greater than 1 micron, That is, the orthographic projection of the first opening 31 on the substrate 11 is different from the orthographic projection of the first light shielding portion 131 on the substrate 11 .
  • the first transistor 12-1 in order to further improve the light transmittance of the first display area SA, in the first display area SA, can also be arranged in the first display area The edge of SA.
  • the first display area SA includes a light-transmitting sub-area TA and a transition sub-area BA between the light-transmitting sub-area TA and the second display area DA, and the first transistor 12-1 located in the transition sub-area BA to further increase the light transmittance of the first display area SA.
  • the driving circuit layer 12 further includes a first signal wiring electrically connected to the first transistor 12-1, and the first transistor 12-1 is connected to the corresponding first transistor 12-1 through the first signal wiring.
  • An electrode block 21 is connected, and the first signal wiring is a transparent wire.
  • FIG. 5 is a schematic top view structural diagram of the light-shielding layer in the first display area provided by the embodiment of the present application.
  • the light-shielding layer 13 further includes a second light-shielding portion 132 arranged in the first display area SA and overlapping with the first signal traces, the second light-shielding portion 132 132 is electrically connected to the adjacent first light shielding portion 131 .
  • the orthographic projection of the second light-shielding portion 132 on the substrate 11 covers the orthographic projection of the first signal trace on the substrate 11 , and the second light-shielding portion 132 on the substrate 11
  • the minimum distance between the outer contour of the upper orthographic projection and the outer contour of the first signal trace on the substrate 11 is greater than 1 micron.
  • the orthographic projection of the first light shielding portion 131 on the substrate 11 covers the orthographic projection of the first electrode block 21 on the substrate 11, Moreover, the minimum distance L1 between the outer contour of the first light-shielding portion 131 on the substrate 11 and the outer contour of the first electrode block 21 on the substrate 11 is larger than 1 micron.
  • the light-shielding layer 13 can be designed in an entire surface or the light-shielding layer 13 is set corresponding to the second electrode block 22, so as to meet the requirement of being able to shield the second transistor 10-2. It is appropriate.
  • the light-shielding layer 13 further includes surrounding the first light-shielding portion 131 and the second The third light shielding portion 133 provided by the light shielding portion 132 is at least partially overlapped with the transition sub-area BA, and the second light shielding portion 132 is also connected to the adjacent first light shielding portion 131 and the third light shielding portion 133 .
  • the surface shape of the third light-shielding portion 133 is an elliptical ring, and the minimum width of the third light-shielding portion 133 is greater than 10 microns, so as to protect the first transistor 20- 1. Avoid damage.
  • the first opening 31 is provided corresponding to the area surrounded by the adjacent first light shielding portion 131 and the second light shielding portion 132, and/or, corresponding to the adjacent first light shielding portion 131, the second light shielding portion portion 132 and the area surrounded by the third light shielding portion 133 is set.
  • FIG. 6 is a schematic cross-sectional structure diagram of the second electrode layer before patterning provided by the embodiment of the present application.
  • a sacrificial layer 80 may be provided between adjacent first pixels 51 in the first display area SA, and the second electrode layer 30 is disposed on the sacrificial layer 80 , and then the sacrificial layer 80 is peeled off by laser and part of the second electrode layer 30 is lifted to form the first opening 31 .
  • the display panel 100 further includes a pixel definition layer 40 located on the first electrode layer 20 and the driving substrate 10 , specifically, the pixel definition layer 40 covers the first electrode layer 20 And on the planarization layer 144, the pixel definition layer 40 is provided with a pixel opening 41, and the pixel opening 41 corresponds to the electrode blocks of the first electrode layer 20 (such as the first electrode block 21 and the second electrode block 22) Setting, and exposing the corresponding part of the electrode block.
  • the sacrificial layer 80 is disposed on the pixel definition layer 40 in the first display area SA, and the orthographic projection of the sacrificial layer 80 on the driving substrate 10 is in the same direction as the light shielding layer 13 The orthographic projections on the driving substrate 10 are separated.
  • the thickness of the sacrificial layer 80 is smaller than that of the light-shielding layer 13 , for example, the thickness of the light-shielding layer 13 ranges from 500 angstroms to 5000 angstroms, and the thickness of the sacrificial layer 80 ranges from 100 angstroms to 2000 angstroms.
  • the material of the sacrificial layer 80 and the material of the light-shielding layer 13 can be the same or different, for example, the material of the light-shielding layer 13 includes at least one of metals such as Al, Pt, Pd, Ag, Mo, Li, W, etc.
  • the material of the sacrificial layer 80 also includes at least one of Al, Pt, Pd, Ag, Mo, Li, W and other metals.
  • the display panel 100 may further include a first functional film layer located between the first electrode layer 20 and the light emitting layer 50 60 and the second functional film layer 70 located between the light emitting layer 50 and the second electrode layer 30 .
  • the first functional film layer 60 may be a hole transport layer or a composite film layer of a hole transport layer and a hole injection layer, and the hole injection layer is located between the hole transport layer and the light-emitting layer 50;
  • the two-function film layer 70 may be an electron transport layer or a composite film layer of an electron transport layer and an electron injection layer, and the electron injection layer is located between the electron transport layer and the light emitting layer 50 .
  • the display panel 100 may also include an encapsulation layer on the side of the second electrode layer 30 away from the first electrode layer 20, etc., the encapsulation layer can protect the light-emitting layer 50 from intrusion of water and oxygen. cause the luminescent material to fail.
  • the thickness of the sacrificial layer 80 is smaller than the thickness of the light-shielding layer 13 , and the orthographic projection of the sacrificial layer 80 on the driving substrate 10 is different from that of the light-shielding layer 13 on the driving substrate 10
  • the orthographic projection is separated, so that during laser processing, the sacrificial layer 80 will absorb energy and push away the film layer directly above it including the second electrode layer 30, forming a crater shape with a narrow bottom and a wide top.
  • the first opening 31 of the structure is shown in FIG. 7 , which is a schematic diagram of the detailed structure of the first opening provided by the embodiment of the present application.
  • the edge of the wiring refers to the first transistor 12-1 where the first display area SA is set. area, and taking into account the laser edge energy attenuation effect, the minimum width of the elliptical ring must be guaranteed to be more than 10 microns, and the inner edge of the elliptical ring exceeds the edge of the wiring by more than 1 micron, so that in the process of laser patterning the second electrode layer 30
  • the third light-shielding part 133 can protect the first transistor 12 and prevent the edge energy attenuation of the laser from effectively removing the second electrode layer 30 at the edge.
  • the shape of the second light-shielding portion 132 is the same as that of the first signal wiring, and the width of the second light-shielding portion 132 is at least 2 mm wider than the width of the first signal wiring, and makes The minimum distance between the outline of the orthographic projection of the second light shielding portion 132 on the substrate 11 and the outline of the orthographic projection of the first signal trace on the substrate 11 is greater than 1 micron, so in During the process of laser patterning the second electrode layer 30 , the second light shielding portion 132 can protect the first signal wiring.
  • the first light shielding portion 131 is set corresponding to the first electrode block 21, and the orthographic projection of the first light shielding portion 131 on the substrate 11 covers the first electrode block 21 on the substrate. Orthographic projection on 11, and the minimum distance between the outer contour of the first light-shielding portion 131 on the substrate 11 and the outer contour of the first electrode block 21 on the substrate 11 The distance is greater than 1 micron, so that the first light shielding portion 131 can protect the first electrode block 21 during the process of laser patterning the second electrode layer 30 .
  • the infrared laser is irradiated on the first display area SA from the back of the display panel 100, that is, under the substrate 11, due to the first electrode block 21, the first signal wiring, and the
  • the first transistor 20-1 is shielded by the light-shielding layer 13, and the film layers below the second electrode layer 30 (including the substrate 11, the insulating layer, and the light-emitting layer 50, etc.) have almost no absorption of infrared (transmission rate is 90-100%), so the sacrificial layer 80 on the area not shielded by the light-shielding layer 13 will absorb the infrared laser light, and then the temperature of the irradiated area will rise through thermal relaxation and heat transfer, resulting in Changes such as melting and gasification cause the second electrode layer 30 corresponding to the sacrificial layer 80 to be peeled off to form the first opening 31 .
  • the energy and depth of field of the laser will affect the peeling depth.
  • the peeling will not be complete, and the second electrode layer 30 will remain in the laser irradiation area, which will affect the SA light in the first display area. transmittance; when the laser energy is too high, the second electrode layer 30 in the irradiated area can be effectively peeled off, but too high energy will damage the film layer below the second electrode layer 30, such as the The first functional film layer 60 and the second functional film layer 70 are described.
  • the thermal effect brought about by too high energy will cause large-area curling or even tearing of most of the film layers at the edge, thereby affecting the second electrode layer 30 in the unirradiated area, thereby causing subsequent package failure and display abnormal.
  • the second electrode layer 30 in the irradiated area can be completely peeled off without damaging the film layer below the second electrode layer 30, so that the formed first opening 31
  • the edge is smooth without abnormal protrusions and tears, wherein no abnormal protrusions means that the height of the protrusions formed on the second electrode layer 30 near the first opening 31 is less than 1 micron, so as not to affect the sealing of the encapsulation layer.
  • encapsulation effective encapsulation to protect the encapsulation layer.
  • the area ratio of the laser lift-off area in the first display area SA is 70%-90%, and the corresponding transmittance of the first display area SA can be increased by 30%-60%.
  • FIG. 8 is another schematic top view of the light-shielding layer provided by the embodiment of the present application
  • FIG. 9 is another kind of light-shielding layer provided by the embodiment of the present application. Schematic diagram of top view structure. Different from the above embodiments, the edge of at least one light shielding portion of the first light shielding portion 131 , the second light shielding portion 132 and the third light shielding portion 133 of the light shielding layer 13 has a wavy or wavy surface shape.
  • the surface shape of the second light shielding part 132 is a wavy line; as shown in Figure 9, the first light shielding part 131 and the third light shielding part 133 has a zigzag surface shape, and the second light shielding portion 132 has a wavy surface shape.
  • the above-mentioned embodiments please refer to the above-mentioned embodiments, which will not be repeated here.
  • FIG. 10 is another schematic cross-sectional structure diagram of the display panel provided by the embodiment of the present application
  • FIG. 11 is a patterned second electrode layer provided by the embodiment of the present application.
  • the driving substrate 10 of the display panel 101 is provided with a third opening 42 corresponding to the first opening 31, and the third opening 42 at least penetrates through the pixel definition layer 40, In order to further increase the light transmittance of the first display area SA.
  • the third opening 42 runs through the pixel definition layer 40 and part of the film layers below the pixel definition layer 40 (such as the planarization layer 144, the interlayer insulating layer 143, etc.), such as the third opening 42
  • the bottom surface extends to the light-shielding layer 13 and is on the same layer as the bottom surface of the first light-shielding portion 131 , so as to further increase the light transmittance of the first display area SA.
  • the sacrificial layer 80 is set on the same layer as the light shielding layer 13, and the sacrificial layer 80 is located in the light shielding portion of the light shielding layer 13 (including the first light shielding portion 131, the second light shielding portion In the area surrounded by the light-shielding part 132 and the third light-shielding part 133), the third opening 42 penetrates the pixel definition layer 40 and the layer below the pixel definition layer 40 to the sacrificial layer 80, so as to expose the sacrificial layer 80 .
  • Part of the first functional film layer 60 , the second functional film layer 70 and the second electrode layer 30 are located on the sacrificial layer 80 in the third opening 42 , when the sacrificial layer 80 is removed by laser
  • the second electrode layer 30 above the sacrificial layer 80 is lifted to form the first opening 31 .
  • the present application also provides a method for manufacturing a display panel. Please refer to FIG. 1 to FIG. 12 .
  • the preparation method of the display panel comprises the following steps:
  • S301 Prepare a driving substrate 10, the driving substrate 10 is divided into a first display area SA and a second display area DA, the light transmittance of the first display area SA is greater than the light transmittance of the second display area DA;
  • the light emitting layer 50 includes a plurality of first pixels 51 arranged in the first display area SA, and a plurality of The second pixel 52 arranged in the second display area DA;
  • S304 Prepare the second electrode layer 30 on the side of the light emitting layer 50 away from the first electrode layer 20, pattern the second electrode layer 30 so that the second electrode layer 30 is in the first display area
  • a first opening 31 is formed between adjacent first pixels 51 in the SA, and the center points of a plurality of adjacent first pixels 51 around the first opening 31 enclose a first polygon 411, the The ratio of the area of the first opening 31 to the area of the corresponding first polygon 411 ranges from 50% to 95%.
  • the step of preparing the driving substrate 10 includes: providing a substrate 11, and preparing a light shielding layer 13 and a sacrificial layer 80 on the substrate 11, wherein in the first display area SA, the The light-shielding layer 13 includes a first light-shielding portion 131, a second light-shielding portion 132, and a third light-shielding portion 133, the sacrificial layer 80 is set on the same layer as the light-shielding layer 13, and the sacrificial layer 80 is located on the light-shielding layer 133.
  • the sacrificial layer 80 is separated from the light-shielding layer 13, and the minimum distance between the sacrificial layer 80 and the light-shielding layer 13 is greater than 1 micron, wherein the thickness of the sacrificial layer 80 is smaller than that of the light-shielding layer 13 thickness.
  • the step of patterning the first electrode layer 20 includes: using a yellow light process to make the first electrode layer 20 form a plurality of first electrode layers arranged in an array in the first display area SA.
  • the electrode block 21 and a plurality of second electrode blocks 22 arranged in an array are formed in the second display area DA.
  • the step of preparing the light-emitting layer 50 includes: preparing a pixel definition layer 40 on the first electrode layer 20 and the driving substrate 10, patterning the pixel definition layer 40 to form a pixel opening 41, A light emitting layer 50 is prepared in the pixel opening 41 .
  • the first pixel 51 is formed in the pixel opening 41 corresponding to the first electrode block 21
  • the second pixel 52 is formed in the pixel opening 41 corresponding to the second electrode block 22 .
  • step S304 the step of patterning the second electrode layer 30 to form the first opening 31 further includes:
  • a third opening 42 is formed on the driving substrate 10 in the first display area SA, and the third opening 42 at least penetrates through the pixel definition layer 40 .
  • the third opening 42 penetrates the pixel definition layer 40 and part of the film layer below the pixel definition layer 40, for example, the third opening 42 penetrates the pixel definition layer 40 and the film below the pixel definition layer 40.
  • the first display area SA is irradiated with laser light to remove the sacrificial layer 80 and the second electrode layer 30 corresponding to the sacrificial layer 80 , so that the second electrode layer 30 forms the first opening 31 .
  • the first opening 31 of the second electrode layer 30 can also be prepared by the following method:
  • Step of preparing the driving substrate includes providing a substrate 11, and preparing a light shielding layer 13 on the substrate 11;
  • a sacrificial layer 80 is prepared on the pixel definition layer 40 between the pixel openings 41, the thickness of the sacrificial layer 80 is smaller than the thickness of the light shielding layer 13, and the thickness of the sacrificial layer 80 on the substrate 11 is
  • the orthographic projection is separated from the orthographic projection of the shading layer 13 on the substrate 11, and the outer contour of the sacrificial layer 80 on the substrate 11 is the same as that of the shading layer 13 on the substrate.
  • the minimum distance between the outer contours of the orthographic projection on 11 is greater than 1 micron;
  • the first display area SA is irradiated with laser light to remove the sacrificial layer 80 and the second electrode layer 30 corresponding to the sacrificial layer 80 , so that the second electrode layer 30 forms the first opening 31 .
  • the embodiment of the present application further provides a display device, the display device includes functional elements and a display panel 100 as in one of the above embodiments, the functional elements are arranged on the display panel 100 The non-light-emitting side of the first display area SA.
  • the display devices include mobile phones, televisions, tablets, and wearable electronic devices.
  • the present application provides a display panel, a manufacturing method thereof, and a display device.
  • the display panel includes a first display area and a second display area, and the light transmittance of the first display area is greater than the light transmittance of the second display area.
  • the display panel further includes a driving substrate, a first electrode layer located on one side of the driving substrate, a light-emitting layer located on the side of the first electrode layer away from the driving substrate, and a light-emitting layer located on the side of the light-emitting layer away from the first electrode layer.
  • a second electrode layer on one side of the electrode layer, the light-emitting layer includes a plurality of first pixels arranged in the first display area and a plurality of second pixels arranged in the second display area, in the first display area
  • the second electrode layer is provided with a first opening between adjacent first pixels, and the central points of the adjacent first pixels around the first opening form a first Polygon, the ratio of the area of the first opening to the area of the corresponding first polygon ranges from 50% to 95%, and the present application makes the second electrode layer in the corresponding first display area
  • a first opening is provided between the adjacent first pixels to improve the light transmittance of the first display area, which solves the problem of poor light transmittance in the existing display screen using the under-screen camera technology.

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Abstract

一种显示面板(100)和显示装置，该显示面板(100)包括第一显示区(SA)和第二显示区(DA)，显示面板(100)的发光层(50)包括多个设置在第一显示区(SA)的第一像素(51)和多个设置在第二显示区(DA)的第二像素(52)，在第一显示区(SA)内，第二电极层(30)在相邻第一像素(51)之间设置有第一开口(31)，以提高第一显示区(SA)的透光性，以缓解现有应用屏下摄像头技术的显示屏存在透光性差的问题。

Description

显示面板和显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板和显示装置。
 背景技术
随着人们对手机屏幕的要求越来越高，全面屏已成为必然的趋势。然而，一些内部元器件，如手机前置摄像头、脸部识别传感器等占用屏幕显示区域，导致显示画面缺失，无法实现真正的全面屏。CUP（Camera under Panel，屏下摄像头）技术的出现使该问题得以缓解，CUP技术不用挖孔，在CUP区域既可显示，又可成像；但当前应用CUP技术的显示屏透光效果一般，影响屏下摄像头的成像效果。
因此，现有应用屏下摄像头技术的显示屏存在透光性差的技术问题需要解决。
 技术问题
本申请提供一种显示面板和显示装置，以缓解现有应用屏下摄像头技术的显示屏存在透光性差的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请实施例提供一种显示面板，其包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率，所述显示面板还包括：
驱动基板；
发光层，位于所述第一电极层远离所述驱动基板的一侧，所述发光层包括：多个设置在所述第一显示区的第一像素，和多个设置在所述第二显示区的第二像素；
第一电极层，位于所述第一电极层远离所述驱动基板的一侧，所述发光层包括：多个设置在所述第一显示区的第一像素，和多个设置在所述第二显示区的第二像素；以及
第二电极层，位于所述发光层远离所述第一电极层的一侧；
其中，在所述第一显示区中，所述第二电极层在相邻所述第一像素之间设置有第一开口，所述第一开口周围相邻的多个所述第一像素的中心点围成第一多边形，所述第一开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%。
在本申请实施例提供的显示面板中，所述第一电极层包括多个对应所述第一像素的第一电极块和多个对应所述第二像素的第二电极块；
所述第一开口周围相邻的多个所述第一电极块的中心点围成第二多边形，所述第一开口的面积与对应的所述第二多边形的面积的比值范围为50%至95%。
在本申请实施例提供的显示面板中，所述驱动基板包括：
衬底；
驱动电路层，设置在所述衬底和所述发光层之间，所述驱动电路层包括：对应所述第一像素的第一晶体管和对应所述第二像素的第二晶体管；
遮光层，设置在所述衬底和所述驱动电路层之间，所述遮光层包括：对应所述第一像素设置的第一遮光部；
其中，所述第一开口周围相邻的多个所述第一遮光部的中心点围成第三多边形，所述第一开口的面积与对应的所述第三多边形的面积的比值范围为50%至95%。
在本申请实施例提供的显示面板中，所述驱动电路层还包括：与所述第一晶体管电连接的第一信号走线；
所述遮光层还包括设置在所述第一显示区且与所述第一信号走线重叠设置的第二遮光部，所述第二遮光部与相邻的第一遮光部电连接。
在本申请实施例提供的显示面板中，所述第一显示区包括：透光子区以及位于所述透光子区与所述第二显示区之间的过渡子区；
所述遮光层还包括：围绕所述第一遮光部和所述第二遮光部设置的第三遮光部，所述第三遮光部与所述过渡子区至少部分重叠设置，所述第二遮光部还连接于相邻的所述第一遮光部与所述第三遮光部之间。
在本申请实施例提供的显示面板中，所述第一开口对应相邻所述第一遮光部和所述第二遮光部围绕的区域设置，和/或，对应相邻的所述第一遮光部、所述第二遮光部、所述第三遮光部围绕的区域设置。
在本申请实施例提供的显示面板中，所述第一遮光部、所述第二遮光部以及所述第三遮光部中至少一个遮光部边缘的表面形状呈波浪状或锯齿状。
在本申请实施例提供的显示面板中，单位面积内所述第一像素的数量与单位面积内所述第二像素的数量相同。
在本申请实施例提供的显示面板中，所述第一显示区包括：透光子区以及位于所述透光子区与所述第二显示区之间的过渡子区；
所述第一晶体管设置在所述过渡子区，或，所述第一晶体管设置在所述透光子区且位于所述第一遮光部和所述第一像素之间。
在本申请实施例提供的显示面板中，所述发光层在所述第一显示区对应所述第一开口设置有第二开口，所述第二开口周围相邻的多个所述第一像素的中心点围成所述第一多边形，所述第二开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%。
在本申请实施例提供的显示面板中，所述驱动基板包括：
衬底；
遮光层，设置在所述衬底的一侧；
驱动电路层，设置在所述遮光层和所述发光层之间；
像素定义层，设置在所述驱动电路层和所述发光层之间；
其中，所述驱动基板在对应所述第一开口处设置有第三开口，所述第三开口至少贯穿所述像素定义层。
在本申请实施例提供的显示面板中，所述遮光层包括：对应所述第一像素设置的第一遮光部；
所述第三开口的底面延伸至所述遮光层，并与所述第一遮光部的底面同层。
在本申请实施例提供的显示面板中，所述第一开口与相邻所述第一像素之间的最小间距大于或等于2um。
本申请实施例还提供一种显示装置，其包括功能元件以及前述实施例其中之一的显示面板，所述功能元件设置于所述显示面板的第一显示区的非出光侧。
 有益效果
本申请提供的显示面板和显示装置中，显示面板包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率，所述显示面板还包括驱动基板、位于所述驱动基板一侧的第一电极层、位于所述第一电极层远离所述驱动基板一侧的发光层以及位于所述发光层远离所述第一电极层一侧的第二电极层，所述发光层包括多个设置在所述第一显示区的第一像素和多个设置在所述第二显示区的第二像素，在所述第一显示区内，所述第二电极层在相邻所述第一像素之间设置有第一开口，所述第一开口周围相邻的多个所述第一像素的中心点围成第一多边形，所述第一开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%，本申请通过使所述第二电极层在对应第一显示区内的相邻所述第一像素之间设置第一开口，以提高第一显示区的透光性，解决了现有应用屏下摄像头技术的显示屏存在透光性差的问题。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示面板的俯视结构示意图。
图2为本申请实施例提供的显示面板的一种剖面结构示意图。
图3为本申请实施例提供的第一开口的表面形状示意图。
图4为本申请实施例提供的驱动基板的细节结构示意图。
图5为本申请实施例提供的第一显示区内遮光层的一种俯视结构示意图。
图6为本申请实施例提供的第二电极层图案化之前的一种剖面结构示意图。
图7为本申请实施例提供的第一开口的细节结构示意图。
图8为本申请实施例提供的遮光层的另一种俯视结构示意图。
图9为本申请实施例提供的遮光层的又一种俯视结构示意图。
图10为本申请实施例提供的显示面板的另一种剖面结构示意图。
图11为本申请实施例提供的第二电极层图案化之前的另一种剖面结构示意图。
图12为本申请实施例提供的显示面板制备方法的流程示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。在附图中，为了清晰理解和便于描述，夸大了一些层和区域的厚度。即附图中示出的每个组件的尺寸和厚度是任意示出的，但是本申请不限于此。
请参照图1至图4，图1为本申请实施例提供的显示面板的俯视结构示意图，图2为本申请实施例提供的显示面板的一种剖面结构示意图，图3为本申请实施例提供的第一开口的表面形状示意图，图4为本申请实施例提供的驱动基板的细节结构示意图。所述显示面板100包括第一显示区SA和第二显示区DA，所述第一显示区SA的透光率大于所述第二显示区DA的透光率。第一显示区SA为功能附加区，第一显示区SA既可以用于显示图像，从而使得显示面板100可以呈现全屏显示的效果，又可以用于安装摄像头、光学触控组件以及指纹识别传感器等光学元件，从而提升用户体验。第二显示区DA为主显示区，第二显示区DA用于显示图像。
所述显示面板100还包括驱动基板10、位于所述驱动基板10一侧的第一电极层20、位于所述第一电极层20远离所述驱动基板10一侧的发光层50以及位于发光层50远离第一电极层20一侧的第二电极层30。所述发光层50包括多个设置在所述第一显示区SA的第一像素51，和多个设置在所述第二显示区DA的第二像素52。
可选地，单位面积内所述第一像素51的数量与单位面积内所述第二像素52的数量相同，也即所述第一显示区SA的像素密度等于所述第二显示区DA的像素密度，以减小所述第一显示区SA和所述第二显示区DA的显示差异。另外，所述第一显示区SA的所述第一像素51的大小和形状与所述第二显示区DA的所述第二像素52的大小和形状可以相同，也可以不同。其中所述第一像素51和所述第二像素52的形状均包括圆形、方形等其他多边形，本申请实施例以圆形为例说明。
多个所述第一像素51和多个所述第二像素52均包括红色子像素、绿色子像素以及蓝色子像素等其他颜色的子像素，其中每个所述第一像素51和每个所述第二像素52为红色子像素、绿色子像素以及蓝色子像素中的一个。所述红色子像素由红色发光材料形成，能够发射红光；所述绿色子像素由绿色发光材料形成，能够发射绿光；所述蓝色子像素由蓝色发光材料形成，能够发射蓝光。
可以理解的是，所述第一像素51和所述第二像素52在所述第一电极层20和所述第二电极层30的共同作用下发光。所述第一电极层20为阳极，所述第二电极层30为阴极，当然地，本申请不限于此，本申请的所述第一电极层20也可为阴极，则所述第二电极层30为阳极。
其中，在所述第一显示区SA中，所述第二电极层30在相邻所述第一像素51之间设置有第一开口31，以提高所述第一显示区SA的透光率。所述第一开口31周围相邻的多个所述第一像素51的中心点围成第一多边形411，所述第一开口31的面积与对应的所述第一多边形411的面积的比值范围为50%至95%，以在提高所述第一显示区SA透光率的同时，减小对所述第二电极层30电学性能的影响。
所述发光层50在所述第一显示区SA对应所述第一开口31设置有所述第二开口，所述第二开口周围相邻的多个所述第一像素51的中心点围成所述第一多边形411，所述第二开口的面积与对应的所述第一多边形411的面积的比值范围为50%至95%。
可选地，所述第一多边形411为四边形，而围成所述第一多边形411的多个所述第一像素51中，至少包括三种颜色的子像素，比如包括一个蓝色子像素B、一个红色子像素R以及两个绿色子像素G，如图3所示，其中蓝色子像素B的尺寸大于红色子像素R的尺寸，红色子像素R的尺寸大于绿色子像素G的尺寸。
第一电极层20包括阵列排布在所述驱动基板10上的多个电极块，每个所述电极块对应一个子像素，具体而言，所述第一电极层20包括多个对应所述第一像素51的第一电极块21和多个对应所述第二像素52的第二电极块22。所述第一开口31周围相邻的多个所述第一电极块21的中心点围成第二多边形，所述第一开口31的面积与对应的所述第二多边形的面积的比值范围为50%至95%。
可以理解的，所述发光层50设置在所述第一电极层20上，具体而言，所述第一像素51设置在所述第一电极块21上，所述第二像素52设置在所述第二电极块22上。所述第一像素51在所述驱动基板10上的正投影落在所述第一电极块21在所述驱动基板10上的正投影范围内，且所述第一像素51的面积小于所述第一电极块21的面积；所述第二像素52在所述驱动基板10上的正投影落在所述第二电极块22在所述驱动基板10上的正投影范围内，且所述第二像素52的面积小于所述第二电极块22的面积。而且所述第一电极块21的中心点与对应的所述第一像素51的中心点重合，所述第二电极块22的中心点与对应的所述第二像素52的中心点重合。如此，所述第一开口31周围相邻的多个所述第一电极块21的中心点围成第二多边形与多个所述第一电极块21对应的多个所述第一像素51的中心点围成第一多边形411重合。
进一步地，所述第一开口31在所述驱动基板10上的正投影与所述第一电极块21在所述驱动基板10上的正投影相离。其中本申请中的“相离”是指两个部件在同一平面上的正投影彼此之间没有重叠，且彼此之间具有间隔，比如所述第一开口31在所述驱动基板10上的正投影与所述第一电极块21在所述驱动基板10上的正投影相离，即是指所述第一开口31在所述驱动基板10上的正投影与所述第一电极块21在所述驱动基板10上的正投影没有重叠部分，且所述第一开口31在所述驱动基板10上的正投影与所述第一电极块21在所述驱动基板10上的正投影之间具有间隔。
进一步地，所述第一开口31与相邻所述第一像素51之间的最小间距L3大于或等于2um，也即所述第一开口31在所述驱动基板10上正投影的外轮廓与所述第一电极块21在所述驱动基板10上正投影的外轮廓的最小距离L3大于或等于2微米。如此所述第二电极层30在所述驱动基板10上的正投影完全覆盖每一所述第一电极块21在所述驱动基板10上的正投影，以保证所述第一显示区SA内每个所述第一像素51的正常显示。可选地，所述第一开口31的表面形状包括圆形、方形、六边形、八边形等，如图3中（a）所示的第一开口31的表面形状为圆形，如图3中（b）所示的第一开口31的表面形状为方形，如图3中（c）所示的第一开口31的表面形状为正六边形，如图3中（d）所示的第一开口31的表面形状为正八边形。
下面将详细阐述所述驱动基板10的具体结构：
可选地，参照图4，所述驱动基板10包括衬底11、设置于所述衬底11和所述发光层50之间的驱动电路层12以及设置在所述衬底11和所述驱动电路层12之间的遮光层13。
可选地，所述衬底11可以是柔性基底，柔性基底的材料可以是聚酰亚胺等有机材料；所述衬底11也可以是刚性基底，刚性基底的材料例如可以为玻璃、金属、塑料等；所述衬底11可以为单层膜层结构或多层膜层结构，比如所述衬底11为柔性聚酰亚胺衬底时，所述衬底11可包括层叠设置的第一衬底111、第一阻隔层112、第二衬底113以及第二阻隔层114，其中所述第一阻隔层112和所述第二阻隔层114用于阻挡水氧透过所述衬底11，所述第一阻隔层112和所述第二阻隔层114的材料包括氧化硅、氮化硅等无机材料。
所述遮光层13位于所述衬底11上，具体而言，所述遮光层13可位于所述第一衬底111与所述第一阻隔层112之间，或者所述遮光层13也可位于所述第二衬底113与所述第二阻隔层114之间。本实施例以所述遮光层13位于所述第二衬底113与所述第二阻隔层114之间为例说明。
具体地，所述驱动电路层12设置在所述遮光层13和所述发光层50之间，所述驱动电路层12包括对应所述第一像素51的第一晶体管12-1和对应所述第二像素52的第二晶体管12-2。所述第一晶体管12-1与对应的所述第一电极块21电连接，所述第二晶体管12-2与对应的所述第二电极块22电连接。
具体而言，以所述第二晶体管12-2为例，所述第二晶体管12-2位于所述第二阻隔层114远离所述遮光层13的一侧，所述第二晶体管12-2包括有源层121、设置于所述有源层121远离所述遮光层13一侧的第一栅极122和第二栅极123、设置于所述第二栅极123远离所述第一栅极122一侧的源极124和漏极125，其中所述有源层121包括沟道区、位于所述沟道区两侧的源极区和漏极区，所述第一栅极122和所述第二栅极123对应所述沟道区设置，所述源极124和所述有源层121的源极区连接，所述漏极125与所述有源层121的漏极区连接，所述第二电极块22与所述源极124或所述漏极125连接。但本申请不限于此，本申请的第二晶体管12-2结构还可为其他类型，比如可采用单栅、底栅等。两外对所述第一晶体管12-1的结构描述可参照所述第二晶体管12-2，在此不再赘述。
当然地，所述驱动基板10还包括设置于所述驱动电路层12各层之间的绝缘层，比如位于所述有源层121和所述第一栅极122之间的第一栅极绝缘层141、位于所述第一栅极122和所述第二栅极123之间的第二栅极绝缘层142、位于所述第二栅极123和所述源极124之间的层间绝缘层143以及位于所述源极124和所述漏极125与所述第一电极层20之间的平坦化层144。
可选地，所述驱动电路层12还包括与所述遮光层13连接的第二信号走线15，通过使所述遮光层13与第二信号走线15连接，以防止或减小由静电放电引起的对像素电路的破坏。所述第二信号走线15包括VDD等恒压信号线，所述第二信号走线15可与所述第一栅极122或所述第二栅极123同层设置，也可与所述有源或所述漏极125同层设置，但本申请不限于此。当然地，所述驱动基板10还包括数据线、栅极扫描线等信号线，在此不再赘述。
所述遮光层13设置在所述衬底11和所述驱动电路层12之间，用于遮挡所述驱动电路层12的晶体管，避免光线照射所述晶体管。而且在所述第一显示区SA，所述遮光层13包括对应所述第一像素51设置的第一遮光部131。所述第一开口31周围相邻的多个所述第一遮光部131的中心点围成第三多边形，所述第一开口31的面积与对应的所述第三多边形的面积的比值范围为50%至95%。可以理解的是，所述第一遮光部131对应所述第一像素51设置，所述第一像素51在所述衬底11上的正投影落在所述第一遮光部131在所述衬底11上的正投影的范围内，且所述第一像素51的面积小于所述第一遮光部131的面积，所述第一像素51的中心点与所述第一遮光部131的中心点重合。如此所述第一开口31周围相邻的多个所述第一遮光部131的中心点围成第三多边形与多个所述第一遮光部131对应的多个所述第一像素51的中心点围成的所述第一多边形411重合。
更具体地，所述第一开口31在所述衬底11上正投影的外轮廓与所述第一遮光部131在所述衬底11上正投影的外轮廓的最小距离L2大于1微米，也即所述第一开口31在所述衬底11上的正投影与所述第一遮光部131在所述衬底11上的正投影相离。
在一种实施例中，为了进一步提高所述第一显示区SA的透光率，在所述第一显示区SA内，所述第一晶体管12-1还可设置于所述第一显示区SA的边缘。具体而言，所述第一显示区SA包括透光子区TA以及位于所述透光子区TA与所述第二显示区DA之间的过渡子区BA，所述第一晶体管12-1位于所述过渡子区BA内，以进一步提高所述第一显示区SA的透光率。为此所述驱动电路层12还包括与所述第一晶体管12-1电连接的第一信号走线，所述第一晶体管12-1通过所述第一信号走线与对应的所述第一电极块21连接，所述第一信号走线为透明导线。
另外，请结合参照图1至图5，图5为本申请实施例提供的第一显示区内遮光层的一种俯视结构示意图。为了保护所述第一信号走线，所述遮光层13还包括设置在所述第一显示区SA且与所述第一信号走线重叠设置的第二遮光部132，所述第二遮光部132与相邻的第一遮光部131电连接。所述第二遮光部132在所述衬底11上的正投影覆盖所述第一信号走线在所述衬底11上的正投影，且所述第二遮光部132在所述衬底11上正投影的外轮廓与所述第一信号走线在所述衬底11上正投影的外轮廓之间的最小距离大于1微米。
可以理解的，为了保护所述第一电极块21，所述第一遮光部131在所述衬底11上的正投影覆盖所述第一电极块21在所述衬底11上的正投影，且所述第一遮光部131在所述衬底11上正投影的外轮廓与所述第一电极块21在所述衬底11上正投影的外轮廓之间的最小距离L1大于1微米。当然地，在所述第二显示区DA，所述遮光层13可以呈整面设计或者所述遮光层13对应所述第二电极块22设置，以满足能够遮挡所述第二晶体管10-2为宜。
进一步地，为了能够遮挡位于所述第一显示区SA的所述过渡子区BA内的第一晶体管20-1，所述遮光层13还包括围绕所述第一遮光部131和所述第二遮光部132设置的第三遮光部133，所述第三遮光部133与所述过渡子区BA至少部分重叠设置，所述第二遮光部132还连接于相邻的所述第一遮光部131与所述第三遮光部133之间。
可选地，所述第三遮光部133的表面形状为椭圆环，且所述第三遮光部133的最小宽度大于10微米，以保护位于所述过渡子区BA的所述第一晶体管20-1，避免受到损伤。所述第一开口31对应相邻所述第一遮光部131和所述第二遮光部132围绕的区域设置，和/或，对应相邻的所述第一遮光部131、所述第二遮光部132、所述第三遮光部133围绕的区域设置。
下面将具体阐述如何形成所述第一开口31以提高所述第一显示区SA的透光率：
请结合参照图1至图6，图6为本申请实施例提供的第二电极层图案化之前的一种剖面结构示意图。为了使所述第二电极层30图案化形成所述第一开口31，可在所述第一显示区SA内相邻所述第一像素51之间设置牺牲层80，所述第二电极层30设置在所述牺牲层80上，然后采用激光剥离所述牺牲层80并带起部分所述第二电极层30，形成所述第一开口31。
具体地，所述显示面板100还包括位于所述第一电极层20以及所述驱动基板10上的像素定义层40，具体而言，所述像素定义层40覆于所述第一电极层20以及所述平坦化层144上，所述像素定义层40上设置有像素开口41，所述像素开口41对应所述第一电极层20的电极块（如第一电极块21和第二电极块22）设置，且裸露出对应的部分所述电极块。
可选地，所述牺牲层80设置在所述第一显示区SA内的所述像素定义层40上，且所述牺牲层80在所述驱动基板10的正投影与所述遮光层13在所述驱动基板10上的正投影相离。所述牺牲层80的厚度小于所述遮光层13的厚度，比如所述遮光层13的厚度范围为500埃至5000埃，所述牺牲层80的厚度范围为100埃至2000埃。所述牺牲层80的材料和所述遮光层13的材料可以相同也可以不同，比如所述遮光层13的材料包括Al、Pt、Pd、Ag、Mo、Li、W等金属中的至少一种，所述牺牲层80的材料也包括Al、Pt、Pd、Ag、Mo、Li、W等金属中的至少一种。
进一步可选地，为了能够提高电子和空穴注入发光层50的效率，所述显示面板100进一步还可包括位于所述第一电极层20与所述发光层50之间的第一功能膜层60以及位于所述发光层50和所述第二电极层30之间的第二功能膜层70。其中所述第一功能膜层60可以是空穴传输层或者是空穴传输层和空穴注入层的复合膜层，空穴注入层位于空穴传输层和发光层50之间；所述第二功能膜层70可以是电子传输层或者是电子传输层和电子注入层的复合膜层，电子注入层位于电子传输层和发光层50之间。如此，所述牺牲层80和所述第二电极层30之间还夹设有第一功能膜层60和第二功能膜层70。当然地，所述显示面板100还可包括位于所述第二电极层30远离所述第一电极层20一侧的封装层等，所述封装层能够保护所述发光层50，避免水氧入侵导致发光材料失效。
可以理解的，由于所述牺牲层80的厚度小于所述遮光层13的厚度，且所述牺牲层80在所述驱动基板10的正投影与所述遮光层13在所述驱动基板10上的正投影相离，使得在激光加工过程中所述牺牲层80会吸收能量将其正上方的包括所述第二电极层30在内的膜层顶开，形成一个底部窄顶部宽的火山口状结构的第一开口31，如图7所示，图7为本申请实施例提供的第一开口的细节结构示意图。
具体地，在激光加工过程中，由于第三遮光部133的表面形状是覆盖布线边缘的椭圆环，其中布线边缘即是指设置所述第一显示区SA的所述第一晶体管12-1的区域，并考虑到激光边缘能量衰减效应，椭圆环的最小宽度需保证10微米以上，且椭圆环的内边缘超出布线边缘1微米以上，如此在激光图案化所述第二电极层30的过程中，所述第三遮光部133能够起到保护所述第一晶体管12的作用，还能防止激光边缘能量衰减对边缘的所述第二电极层30无法有效去除的风险。
另外，所述第二遮光部132的形状与所述第一信号走线的形状相同，且所述第二遮光部132的宽度比所述第一信号走线的宽度宽至少2毫米，且使得所述第二遮光部132在所述衬底11上正投影的外轮廓与所述第一信号走线在所述衬底11上正投影的外轮廓之间的最小距离大于1微米，如此在激光图案化所述第二电极层30的过程中，所述第二遮光部132能够起到保护所述第一信号走线的作用。
同样地，所述第一遮光部131对应所述第一电极块21设置，所述第一遮光部131在所述衬底11上的正投影覆盖所述第一电极块21在所述衬底11上的正投影，且所述第一遮光部131在所述衬底11上正投影的外轮廓与所述第一电极块21在所述衬底11上正投影的外轮廓之间的最小距离大于1微米，如此在激光图案化所述第二电极层30的过程中，所述第一遮光部131能够起到保护所述第一电极块21的作用。
因此，将红外激光从所述显示面板100的背面即所述衬底11的下方照射在所述第一显示区SA时，由于所述第一电极块21、所述第一信号走线、所述第一晶体管20-1均有所述遮光层13遮挡，且所述第二电极层30以下的膜层（包括衬底11、绝缘层以及发光层50等）对红外几乎无吸收（透过率在90-100%），因此未被所述遮光层13遮挡到的区域上的所述牺牲层80会吸收该红外激光，进而通过热弛豫和热传递使得被照射区域的温度上升，发生熔化和气化等变化，使得所述牺牲层80对应的所述第二电极层30被剥离以形成所述第一开口31。
需要注意的是，激光的能量和景深会影响剥离的深度，当激光能量过低，则剥离不彻底，激光照射区域会有所述第二电极层30残留，影响所述第一显示区SA光线的透过率；当激光能量过高，随可有效的剥离掉被照射区域内的所述第二电极层30，但是过高的能量会损伤所述第二电极层30以下膜层，比如所述第一功能膜层60和所述第二功能膜层70。同时，过高的能量带来的热效应会使得边缘发生大面积卷曲甚至撕裂起大部分膜层，从而影响到未被照射到区域的所述第二电极层30，进而造成后续封装失效和显示异常。
因此，需要选择适当的激光能量，使被照射区域的所述第二电极层30能够完全剥离且不伤及所述第二电极层30以下膜层，如此使形成的所述第一开口31的边缘光滑且无异常凸起和撕裂，其中无异常凸起是指靠近所述第一开口31的所述第二电极层30形成的凸起高度小于1微米，以不影响所述封装层的封装，保护所述封装层的有效封装。另外，激光剥离区域在所述第一显示区SA内的面积占比为70%~90%，对应的所述第一显示区SA的透过率可提升30%~60%。
在一种实施例中，请结合参照图1至图9，图8为本申请实施例提供的遮光层的另一种俯视结构示意图，图9为本申请实施例提供的遮光层的又一种俯视结构示意图。与上述实施例不同的是，所述遮光层13的所述第一遮光部131、所述第二遮光部132以及所述第三遮光部133中至少一个遮光部边缘的表面形状呈波浪状或锯齿状等，以降低光的衍射，如图8所示，所述第二遮光部132的表面形状为波浪线；如图9所示，所述第一遮光部131和所述第三遮光部133的表面形状为锯齿状，所述第二遮光部132的表面形状为波浪线。其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，请结合参照图1至图11，图10为本申请实施例提供的显示面板的另一种剖面结构示意图，图11为本申请实施例提供的第二电极层图案化之前的另一种剖面结构示意图。与上述实施例不同的是，所述显示面板101的所述驱动基板10在对应所述第一开口31处设置有第三开口42，所述第三开口42至少贯穿所述像素定义层40，以进一步提高所述第一显示区SA的透光率。
可选地，所述第三开口42贯穿像素定义层40以及所述像素定义层40以下的部分膜层（如平坦化层144、层间绝缘层143等），比如所述第三开口42的底面延伸至所述遮光层13，并与所述第一遮光部131的底面同层，以此来进一步提高所述第一显示区SA的透光率。
具体而言，如图11所示，所述牺牲层80与所述遮光层13同层设置，且所述牺牲层80位于所述遮光层13的遮光部（包括第一遮光部131、第二遮光部132、第三遮光部133）围成的区域内，所述第三开口42贯穿像素定义层40以及所述像素定义层40以下的膜层至所述牺牲层80，以裸露出所述牺牲层80。部分所述第一功能膜层60、所述第二功能膜层70以及所述第二电极层30位于所述第三开口42内的牺牲层80上，在采用激光去除所述牺牲层80时会带起所述牺牲层80上面的所述第二电极层30，以形成所述第一开口31。其他说明请参照上述实施例，在此不再赘述。
基于同一发明构思，本申请还提供一种显示面板制备方法，请结合参照图1至图12，图12为本申请实施例提供的显示面板制备方法的流程示意图。所述显示面板制备方法包括以下步骤：
S301：制备驱动基板10，所述驱动基板10划分为第一显示区SA和第二显示区DA，所述第一显示区SA的透光率大于所述第二显示区DA的透光率；
S302：在所述驱动基板10的一侧制备第一电极层20，并图案化所述第一电极层20；
S303：在所述第一电极层20远离所述驱动基板10的一侧制备发光层50，所述发光层50包括多个设置在所述第一显示区SA的第一像素51，和多个设置在所述第二显示区DA的第二像素52；
S304：在所述发光层50远离所述第一电极层20的一侧制备第二电极层30，图案化所述第二电极层30使所述第二电极层30在所述第一显示区SA内相邻所述第一像素51之间形成第一开口31，所述第一开口31周围相邻的多个所述第一像素51的中心点围成第一多边形411，所述第一开口31的面积与对应的所述第一多边形411的面积的比值范围为50%至95%。
具体地，在步骤S301中，所述制备驱动基板10的步骤包括：提供衬底11，在所述衬底11上制备遮光层13和牺牲层80，其中在所述第一显示区SA，所述遮光层13包括第一遮光部131、第二遮光部132以及所述第三遮光部133，所述牺牲层80与所述遮光层13同层设置，且所述牺牲层80位于所述遮光层13的遮光部（包括第一遮光部131、第二遮光部132、第三遮光部133）围成的区域内。所述牺牲层80与所述遮光层13相离，且所述牺牲层80与所述遮光层13之间的最小距离大于1微米，其中所述牺牲层80的厚度小于所述遮光层13的厚度。
具体地，在步骤S302中，图案化所述第一电极层20的步骤包括：采用黄光工艺使所述第一电极层20在所述第一显示区SA形成阵列排布的多个第一电极块21以及在所述第二显示区DA形成阵列排布的多个第二电极块22。
具体地，在步骤S303中，制备发光层50的步骤包括：在所述第一电极层20以及所述驱动基板10上制备像素定义层40，图案化所述像素定义层40形成像素开口41，在所述像素开口41内制备发光层50。其中在对应所述第一电极块21的所述像素开口41内形成第一像素51，在对应所述第二电极块22的所述像素开口41内形成第二像素52。
具体地，在步骤S304中，图案化所述第二电极层30形成第一开口31的步骤还包括：
在所述第一显示区SA内的所述驱动基板10上制备第三开口42，所述第三开口42至少贯穿所述像素定义层40。具体而言，所述第三开口42贯穿像素定义层40以及所述像素定义层40以下的部分膜层，比如所述第三开口42贯穿像素定义层40以及所述像素定义层40以下的膜层至所述牺牲层80，以裸露出所述牺牲层80；
在所述像素定义层40、所述像素开口41以及所述第三开口42内制备第二电极层30，使所述第二电极层30覆盖所述牺牲层80；
采用激光照射所述第一显示区SA，以去除所述牺牲层80以及所述牺牲层80对应的所述第二电极层30，使所述第二电极层30形成所述第一开口31。
或者，所述第二电极层30的第一开口31还可通过如下方法制备：
制备驱动基板10并在所述驱动基板10上制备第一电极层20，其中制备驱动基板的步骤包括提供衬底11，在所述衬底11上制备遮光层13；
在所述第一电极层20以及所述驱动基板10上制备像素定义层40，图案化所述像素定义层40形成像素开口41；
在所述像素开口41之间的所述像素定义层40上制备牺牲层80，所述牺牲层80的厚度小于所述遮光层13的厚度，所述牺牲层80在所述衬底11上的正投影与所述遮光层13在所述衬底11上的正投影相离，且所述牺牲层80在所述衬底11上正投影的外轮廓与所述遮光层13在所述衬底11上正投影的外轮廓之间的最小距离大于1微米；
在所述像素定义层40、所述牺牲层80以及所述像素开口41内制备第二电极层30，使所述第二电极层30覆盖所述牺牲层80；
采用激光照射所述第一显示区SA，以去除所述牺牲层80以及所述牺牲层80对应的所述第二电极层30，使所述第二电极层30形成所述第一开口31。
在一种实施例中，本申请实施例还提供一种显示装置，所述显示装置包括功能元件以及如上述实施例其中之一的显示面板100，所述功能元件设置于所述显示面板100的第一显示区SA的非出光侧。所述显示装置包括手机、电视、平板以及可穿戴电子设备等。
根据上述实施例可知：
本申请提供一种显示面板及其制备方法以及显示装置，该显示面板包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率，所述显示面板还包括驱动基板、位于所述驱动基板一侧的第一电极层、位于所述第一电极层远离所述驱动基板一侧的发光层以及位于所述发光层远离所述第一电极层一侧的第二电极层，所述发光层包括多个设置在所述第一显示区的第一像素和多个设置在所述第二显示区的第二像素，在所述第一显示区内，所述第二电极层在相邻所述第一像素之间设置有第一开口，所述第一开口周围相邻的多个所述第一像素的中心点围成第一多边形，所述第一开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%，本申请通过使所述第二电极层在对应第一显示区内的相邻所述第一像素之间设置第一开口，以提高第一显示区的透光性，解决了现有应用屏下摄像头技术的显示屏存在透光性差的问题。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，其包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率，所述显示面板还包括：
    驱动基板；
    第一电极层，位于所述驱动基板的一侧；
    发光层，位于所述第一电极层远离所述驱动基板的一侧，所述发光层包括：多个设置在所述第一显示区的第一像素，和多个设置在所述第二显示区的第二像素；
    第二电极层，位于所述发光层远离所述第一电极层的一侧；
    其中，在所述第一显示区中，所述第二电极层在相邻所述第一像素之间设置有第一开口，所述第一开口周围相邻的多个所述第一像素的中心点围成第一多边形，所述第一开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%。
  2. 根据权利要求1所述的显示面板，其中，所述第一电极层包括多个对应所述第一像素的第一电极块和多个对应所述第二像素的第二电极块；
    所述第一开口周围相邻的多个所述第一电极块的中心点围成第二多边形，所述第一开口的面积与对应的所述第二多边形的面积的比值范围为50%至95%。
  3. 根据权利要求1所述的显示面板，其中，所述驱动基板包括：
    衬底；
    驱动电路层，设置在所述衬底和所述发光层之间，所述驱动电路层包括：对应所述第一像素的第一晶体管和对应所述第二像素的第二晶体管；
    遮光层，设置在所述衬底和所述驱动电路层之间，所述遮光层包括：对应所述第一像素设置的第一遮光部；
    其中，所述第一开口周围相邻的多个所述第一遮光部的中心点围成第三多边形，所述第一开口的面积与对应的所述第三多边形的面积的比值范围为50%至95%。
  4. 根据权利要求3所述的显示面板，其中，所述驱动电路层还包括：与所述第一晶体管电连接的第一信号走线；
    所述遮光层还包括设置在所述第一显示区且与所述第一信号走线重叠设置的第二遮光部，所述第二遮光部与相邻的第一遮光部电连接。
  5. 根据权利要求4所述的显示面板，其中，所述第一显示区包括：透光子区以及位于所述透光子区与所述第二显示区之间的过渡子区；
    所述遮光层还包括：围绕所述第一遮光部和所述第二遮光部设置的第三遮光部，所述第三遮光部与所述过渡子区至少部分重叠设置，所述第二遮光部还连接于相邻的所述第一遮光部与所述第三遮光部之间。
  6. 根据权利要求5所述的显示面板，其中，所述第一开口对应相邻所述第一遮光部和所述第二遮光部围绕的区域设置，和/或，对应相邻的所述第一遮光部、所述第二遮光部、所述第三遮光部围绕的区域设置。
  7. 根据权利要求5所述的显示面板，其中，所述第一遮光部、所述第二遮光部以及所述第三遮光部中至少一个遮光部边缘的表面形状呈波浪状或锯齿状。
  8. 根据权利要求3所述的显示面板，其中，单位面积内所述第一像素的数量与单位面积内所述第二像素的数量相同。
  9. 根据权利要求8所述的显示面板，其中，所述第一显示区包括：透光子区以及位于所述透光子区与所述第二显示区之间的过渡子区；
    所述第一晶体管设置在所述过渡子区，或，所述第一晶体管设置在所述透光子区且位于所述第一遮光部和所述第一像素之间。
  10. 根据权利要求1所述的显示面板，其中，所述发光层在所述第一显示区对应所述第一开口设置有第二开口，所述第二开口周围相邻的多个所述第一像素的中心点围成所述第一多边形，所述第二开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%。
  11. 根据权利要求10所述的显示面板，其中，所述驱动基板包括：衬底；
    遮光层，设置在所述衬底的一侧；
    驱动电路层，设置在所述遮光层和所述发光层之间；
    像素定义层，设置在所述驱动电路层和所述发光层之间；
    其中，所述驱动基板在对应所述第一开口处设置有第三开口，所述第三开口至少贯穿所述像素定义层。
  12. 根据权利要求11所述的显示面板，其中，所述遮光层包括：对应所述第一像素设置的第一遮光部；
    所述第三开口的底面延伸至所述遮光层，并与所述第一遮光部的底面同层。
  13. 根据权利要求1所述的显示面板，其中，所述第一开口与相邻所述第一像素之间的最小间距大于或等于2um。
  14. 一种显示装置，其包括功能元件以及显示面板，所述显示面板包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率，所述显示面板还包括：
    驱动基板；
    第一电极层，位于所述驱动基板的一侧；
    发光层，位于所述第一电极层远离所述驱动基板的一侧，所述发光层包括：多个设置在所述第一显示区的第一像素，和多个设置在所述第二显示区的第二像素；
    第二电极层，位于所述发光层远离所述第一电极层的一侧；
    其中，所述功能元件设置于所述显示面板的第一显示区的非出光侧，在所述第一显示区中，所述第二电极层在相邻所述第一像素之间设置有第一开口，所述第一开口周围相邻的多个所述第一像素的中心点围成第一多边形，所述第一开口的面积与对应的所述第一多边形的面积的比值范围为50%至95%。
  15. 根据权利要求14所述的显示装置，其中，所述第一电极层包括多个对应所述第一像素的第一电极块和多个对应所述第二像素的第二电极块；
    所述第一开口周围相邻的多个所述第一电极块的中心点围成第二多边形，所述第一开口的面积与对应的所述第二多边形的面积的比值范围为50%至95%。
  16. 根据权利要求14所述的显示装置，其中，所述驱动基板包括：
    衬底；
    驱动电路层，设置在所述衬底和所述发光层之间，所述驱动电路层包括：对应所述第一像素的第一晶体管和对应所述第二像素的第二晶体管；
    遮光层，设置在所述衬底和所述驱动电路层之间，所述遮光层包括：对应所述第一像素设置的第一遮光部；
    其中，所述第一开口周围相邻的多个所述第一遮光部的中心点围成第三多边形，所述第一开口的面积与对应的所述第三多边形的面积的比值范围为50%至95%。
  17. 根据权利要求16所述的显示装置，其中，所述驱动电路层还包括：与所述第一晶体管电连接的第一信号走线；
    所述遮光层还包括设置在所述第一显示区且与所述第一信号走线重叠设置的第二遮光部，所述第二遮光部与相邻的第一遮光部电连接。
  18. 根据权利要求17所述的显示装置，其中，所述第一显示区包括：透光子区以及位于所述透光子区与所述第二显示区之间的过渡子区；
    所述遮光层还包括：围绕所述第一遮光部和所述第二遮光部设置的第三遮光部，所述第三遮光部与所述过渡子区至少部分重叠设置，所述第二遮光部还连接于相邻的所述第一遮光部与所述第三遮光部之间。
  19. 根据权利要求18所述的显示装置，其中，所述第一开口对应相邻所述第一遮光部和所述第二遮光部围绕的区域设置，和/或，对应相邻的所述第一遮光部、所述第二遮光部、所述第三遮光部围绕的区域设置。
  20. 根据权利要求18所述的显示装置，其中，所述第一遮光部、所述第二遮光部以及所述第三遮光部中至少一个遮光部边缘的表面形状呈波浪状或锯齿状。
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