WO2022141643A1 - 显示面板及其制作方法和显示装置 - Google Patents

显示面板及其制作方法和显示装置 Download PDF

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Publication number
WO2022141643A1
WO2022141643A1 PCT/CN2021/070183 CN2021070183W WO2022141643A1 WO 2022141643 A1 WO2022141643 A1 WO 2022141643A1 CN 2021070183 W CN2021070183 W CN 2021070183W WO 2022141643 A1 WO2022141643 A1 WO 2022141643A1
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WIPO (PCT)
Prior art keywords
substrate
cathode
light
display panel
shielding
Prior art date
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PCT/CN2021/070183
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English (en)
French (fr)
Inventor
于池
黄炜赟
石博
汪杨鹏
霍堡垒
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2021/070183 priority Critical patent/WO2022141643A1/zh
Priority to GB2217845.3A priority patent/GB2610521A/en
Priority to US17/638,297 priority patent/US20230165110A1/en
Priority to CN202180000021.1A priority patent/CN115039232A/zh
Priority to CN202111328787.0A priority patent/CN114039013B/zh
Publication of WO2022141643A1 publication Critical patent/WO2022141643A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/824—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80521—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80524—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device.
  • a display with a screen-to-body ratio of 100% or close to 100% is often referred to as a "full screen”.
  • the front camera needs to be set on the back side of the display (that is, the side opposite to the light-emitting side of the display).
  • the front camera When the front camera is working, it needs enough light to take a clear picture. Therefore, the light transmittance of the area opposite to the front camera on the display screen is relatively high.
  • a display panel has a display area, and the display area includes a light-transmitting area and a main display area located around the light-transmitting area.
  • the display panel includes a substrate, a plurality of shielding patterns and a plurality of light emitting devices, the plurality of shielding patterns are arranged on the substrate and are located in the light transmission area; the plurality of shielding patterns are located on the substrate
  • the orthographic projections on the base are separated from each other.
  • each light-emitting device includes a light-emitting layer and a cathode located on the side of the light-emitting layer away from the substrate; each light-emitting device There is an effective light-emitting area, and the orthographic projection of the effective light-emitting area on the substrate is located within the orthographic projection range of the cathode of the light-emitting device on the substrate.
  • the orthographic projections of the plurality of cathodes of the plurality of light-emitting devices on the substrate are separated from each other, and are located on the side of the plurality of shielding patterns away from the substrate; one cathode corresponds to one shielding pattern, and each shielding pattern corresponds to one shielding pattern.
  • the orthographic projections of each of the shielding patterns on the substrate cover the orthographic projections of the corresponding cathodes on the substrate.
  • the transmittance of the cathode to visible light is greater than the transmittance of infrared light; the transmittance of the shielding pattern to infrared light is less than or equal to 2%.
  • each light-emitting device further includes an anode, the anode is located on a side of the light-emitting layer close to the substrate; one of the anodes forms one of the shielding patterns.
  • each light emitting device further includes an anode located on a side of the light emitting layer close to the substrate.
  • the plurality of shielding patterns are located on one side of the plurality of anodes of the plurality of light-emitting devices close to the substrate; one shielding pattern corresponds to one anode, and the orthographic projection of the shielding pattern on the substrate is the same The orthographic projections of the corresponding anodes on the substrate at least partially overlap.
  • the display panel further includes a semiconductor layer, a gate metal layer and a source-drain metal layer.
  • a semiconductor layer is located between the substrate and the plurality of anodes; a gate metal layer is located between the substrate and the plurality of anodes; a source-drain metal layer is opposite to the semiconductor layer and the gate metal
  • the layer is remote from the substrate and is located on the side of the plurality of anodes close to the substrate.
  • the shielding pattern is located on the semiconductor layer or the gate metal layer or the source-drain metal layer.
  • the transmittance of the shielding pattern to visible light is greater than the transmittance of infrared light; the thickness of the shielding pattern is greater than the thickness of the cathode.
  • the material of the cathode includes a magnesium-silver alloy, and the material of the shielding pattern includes silver.
  • the cathode includes a cathode body portion and a cathode connection portion; the orthographic projection of the anode on the substrate overlaps the orthographic projection of the cathode body portion on the substrate; the cathode connection The orthographic projection of the cathode connecting portion on the substrate does not overlap with the orthographic projection of the anode on the substrate.
  • the shielding pattern includes a shielding pattern main body portion and a shielding pattern connecting portion: an orthographic projection of the shielding pattern body portion on the substrate covers an orthographic projection of the cathode body portion on the substrate. projection; the shielding pattern connecting portion is connected to the shielding pattern main body portion, and the orthographic projection of the shielding pattern connecting portion on the substrate covers the orthographic projection of the cathode connecting portion on the substrate.
  • the display panel further includes a transparent conductive layer and a first insulating layer.
  • the transparent conductive layer is located between the film layer where the shielding pattern is located and the plurality of anodes; the first insulating layer is located between the transparent conductive layer and the plurality of cathodes.
  • a plurality of first via holes are arranged in the first insulating layer, and there is a gap between the orthographic projection of each first via hole on the substrate and the orthographic projection of the anode on the substrate;
  • the orthographic projection of each of the first via holes on the substrate is located within the orthographic projection range of the cathode connection portion on the substrate, and each of the cathodes is connected to the substrate through at least one of the first via holes.
  • the transparent conductive layer is electrically connected.
  • the display panel further includes at least one cathode connection structure, and the at least one cathode connection structure and the cathode material are the same and disposed in the same layer.
  • the dimension of the cathode connection structure in the first direction is larger than the dimension in the second direction; each of the cathode connection structures is electrically connected to two adjacent cathodes.
  • the first direction is a row direction in which a plurality of sub-pixels of the display panel are arranged
  • the second direction is a column direction in which a plurality of sub-pixels of the display panel are arranged.
  • the display panel includes a plurality of the cathode connection structures arranged in a plurality of rows, and each row includes a plurality of the cathode connection structures arranged in sequence along the first direction.
  • the cathode connection bar has substantially the same size as the cathode connection structure in the second direction.
  • the display panel further includes at least one shielding connection structure, and the at least one shielding connection structure and the plurality of shielding pattern materials are the same and provided in the same layer.
  • the display panel includes a plurality of cathode connection bars
  • the display panel includes a plurality of the shielding connection structures arranged in a plurality of rows, and each row includes a plurality of the shielding connection structures arranged in sequence along the first direction connection structure; each row of shielding connection structures, and the parts of a plurality of shielding patterns connected by the plurality of shielding connection structures in the row, form a shielding connection strip; an orthographic projection of the shielding connection strip on the substrate Overlay an orthographic projection of the cathode tie bars on the substrate.
  • the anode includes a first anode part and a second anode part; the shape of the first anode part and the effective light emitting area of the light emitting device in which the first anode part is located is substantially the same, and the boundary of the first anode part is the same as The boundary portions of the anodes overlap; the second anode portion is electrically connected to the first anode portion.
  • the cathode includes a first cathode part and a second cathode part; the orthographic projection of the first cathode part on the substrate is covered by the orthographic projection of the first anode part on the substrate; the second cathode part and the The first cathode portion is electrically connected, and the orthographic projection of the second cathode portion on the substrate is covered by the orthographic projection of the second anode portion on the substrate.
  • the cathode includes a cathode main body part and a cathode connection part
  • the first cathode part and the second cathode part form the cathode main body part
  • the shape of the cathode main body part is the same as that of the anode roughly the same.
  • the shape of the cathode is substantially the same as the shape of the anode.
  • the display panel further includes sequentially disposed along a direction perpendicular to the substrate and directed from the substrate to the anode, and disposed in a film layer where the substrate and the plurality of anodes are located.
  • the pixel circuit layer includes a plurality of peripheral first pixel circuits arranged in the light-transmitting area; a plurality of second via holes are arranged in the second insulating layer; and a plurality of first through holes are arranged in the third insulating layer.
  • connection line layer includes a plurality of connection lines, the first end of each connection line is electrically connected to a pixel circuit through a second via hole, and the second end is connected to the third via hole of an anode through a third via hole.
  • the two anode parts are electrically connected; when the display panel further includes a transparent conductive layer, the transparent conductive layer is located on the side of the third insulating layer away from the substrate, and the third via hole passes through the The transparent conductive layer is formed, and the conductive material in the third via hole for electrically connecting the connection line and the corresponding anode is electrically insulated from the transparent conductive layer.
  • connection line layer further includes a plurality of spacers, each spacer is electrically connected to the second end of one of the connection lines, and each spacer is connected to a second end of one of the connection lines through one of the third vias The second anode portion of the anode is electrically connected.
  • the orthographic projections of the third via hole and the spacer on the substrate are both the same as the orthographic projection of one cathode connection bar on the substrate at least partially overlap.
  • the display panel includes a plurality of sub-pixels, each sub-pixel includes a light emitting device; the plurality of sub-pixels includes a plurality of red sub-pixels, a plurality of green sub-pixels and a plurality of blue sub-pixels.
  • the shape of the first cathode portion of the cathode of the light-emitting device of the green sub-pixel is substantially circular; the shape of the first cathode portion of the cathode of the light-emitting device of the red sub-pixel is substantially elliptical.
  • the minimum distance between the first cathode portions of the two green sub-pixels is smaller than the minimum distance between the first cathode portions of the other two sub-pixels of the same color.
  • the effective light-emitting regions of the light-emitting devices of the red sub-pixels and the blue sub-pixels are alternately arranged along the first direction; the effective light-emitting regions of the light-emitting devices of the green sub-pixels are arranged along the second direction.
  • a method for fabricating a display panel comprising: fabricating a plurality of shielding patterns separated from each other on a substrate; fabricating a plurality of shielding patterns on a side away from the substrate of the plurality of shielding patterns A light-emitting layer; a cathode film is formed on the side of the plurality of light-emitting layers away from the substrate; a laser is used to illuminate the light-transmitting area of the substrate corresponding to the display panel from the side of the substrate away from the cathode film In the region of the cathode film, the part of the cathode film in the region that is not covered by the plurality of shielding patterns is removed to form a plurality of mutually separated cathodes.
  • Each light-emitting layer and its corresponding cathode form part of a light-emitting device, each light-emitting device has an effective light-emitting area, and the orthographic projection of the effective light-emitting area on the substrate is located at the cathode of the light-emitting device on the substrate orthographic projection on the base.
  • the fabricating a plurality of mutually separated shielding patterns on the substrate includes: fabricating a plurality of mutually separated anodes on the substrate.
  • Each of the light emitting devices includes an anode, and an anode forms one of the shielding patterns.
  • the fabricating a plurality of shielding patterns separated from each other on the substrate includes: fabricating a patterned semiconductor layer, a patterned gate metal layer, and patterning on the substrate A plurality of the shielding patterns are formed in the process of patterning the semiconductor layer or the gate metal layer or the source and drain metal layers; wherein, the source and drain metal layers are relatively The semiconductor layer and the gate metal layer are remote from the substrate.
  • the fabrication of a plurality of mutually separated shielding patterns on the substrate, and between the fabrication of a plurality of light-emitting layers the fabrication method further includes: fabricating a plurality of anodes on the substrate; The light emitting device includes an anode.
  • the fabrication of a plurality of shielding patterns separated from each other on the substrate, and between the fabrication of the plurality of anodes, the fabrication method further includes: the source-drain metal layer is far from the source-drain metal layer.
  • a transparent conductive layer is formed on one side of the substrate; a first insulating layer is formed on the side of the transparent conductive layer away from the substrate; and a plurality of first via holes are formed in the first insulating layer.
  • a plurality of shielding connection structures are formed in the process of patterning the semiconductor layer or the gate metal layer or the source-drain metal layer.
  • the plurality of shielding connection structures and the shielding patterns are located in the same film layer; the size of each shielding connection structure in the first direction is larger than its size in the second direction; the first direction is a plurality of subsections of the display panel The row direction in which the pixels are arranged, and the second direction is the column direction in which the plurality of sub-pixels of the display panel are arranged.
  • Each of the shielding connection structures is connected to two of the shielding patterns; the plurality of shielding connection structures are arranged in a plurality of rows, and each row includes a plurality of the shielding connection structures arranged in sequence along the first direction; each row The shading connection structure, and the parts of the plurality of shading patterns to which the plurality of shading connection structures in the row are connected, form a shading connection bar.
  • the manufacturing method before the laser is used to irradiate an area of the substrate corresponding to the light-transmitting area of the display panel from a side of the substrate away from the cathode thin film, the manufacturing method further includes: A mask is arranged on the side of the substrate away from the cathode film. Wherein, the mask plate includes at least one light blocking light, and the orthographic projection of each light blocking light on the substrate is connected with the orthographic projection of at least two anodes on the substrate.
  • a display device in another aspect, includes a display panel and a functional device, and the display panel is the display panel in any of the foregoing embodiments.
  • the functional device is arranged on the back side of the display panel, and is located in the light-transmitting area of the display panel.
  • FIG. 1 is a top view of a display panel according to some embodiments.
  • Fig. 2 is a sectional view along section line A-A in Fig. 1;
  • Fig. 3 is a sectional view along section line B-B in Fig. 1;
  • Fig. 4 is an enlarged view of region M in Fig. 1;
  • Figure 5 is a cross-sectional view along section line C-C in Figure 4.
  • 6A is a top view of a cathode of a light-transmitting region according to some embodiments.
  • 6B is a top view of an anode of a light-transmitting region according to some embodiments.
  • 6C is a cross-sectional view along section line D-D in FIG. 6A;
  • FIG. 7A is another top view of a cathode of a light-transmitting region according to some embodiments.
  • 7B is another top view of an anode of a light-transmitting region according to some embodiments.
  • 7C is a top view of an occlusion pattern according to some embodiments.
  • FIG. 8A is a cross-sectional view of FIG. 6A along section line E'-E' to E"-E";
  • FIG. 8B is another cross-sectional view along section line E'-E' to E"-E" in FIG. 6A;
  • Figure 8C is another cross-sectional view taken along section line E'-E' to E"-E" in Figure 6A;
  • Figure 8D is another cross-sectional view taken along section line E'-E' to E"-E" in Figure 6A;
  • FIG. 9 is yet another top view of a cathode of a light-transmitting region according to some embodiments.
  • 10A is another top view of an occlusion pattern according to some embodiments.
  • 10B is a schematic diagram of a mask according to some embodiments.
  • 11A is yet another top view of an occlusion pattern according to some embodiments.
  • 11B is a cross-sectional view along section line F-F in FIG. 9;
  • 11C is a cross-sectional view along section line G-G in FIG. 9;
  • 11D is another cross-sectional view along section line G-G in FIG. 9;
  • FIG. 12 is a graph showing the transmittance of a cathode film to light of different wavelengths according to some embodiments
  • 13 is a graph showing the transmittance of silver layers of different thicknesses to light of different wavelengths according to some embodiments
  • 15 is a flow chart of a method of fabricating a display panel according to some embodiments.
  • FIG. 16 is another flowchart of a method of fabricating a display panel according to some embodiments.
  • FIG. 17 is yet another flowchart of a method for fabricating a display panel according to some embodiments.
  • FIG. 18 is a schematic diagram of a manufacturing step of a display panel according to some embodiments.
  • 19 is a schematic diagram of another manufacturing step of a display panel according to some embodiments.
  • FIG. 20 is a schematic diagram of yet another manufacturing step of a display panel according to some embodiments.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as “first” or “second” may expressly or implicitly include one or more of that feature.
  • plural means two or more.
  • the expressions "connected,” “electrically connected,” and derivatives thereof may be used.
  • the term “connected” may be used in describing some embodiments to indicate that two or more components are in direct or indirect physical contact with each other.
  • the term “electrically connected” may be used in describing some embodiments to indicate that two or more components are in direct or indirect electrical contact.
  • Exemplary embodiments are described herein with reference to cross-sectional and/or plan views that are idealized exemplary drawings.
  • the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes of the drawings due to, for example, manufacturing techniques and/or tolerances, are contemplated.
  • example embodiments should not be construed as limited to the shapes of the regions shown herein, but to include deviations in shapes due, for example, to manufacturing. For example, an etched area shown as a rectangle will typically have curved features.
  • the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
  • the expression "the orthographic projection of A on the substrate covers the orthographic projection of B on the substrate” refers to the difference between the orthographic projection of A on the substrate and the orthographic projection of B on the substrate.
  • the expression “same layer setting” is used, which means that a film layer with a specific pattern is formed by one patterning process using the same mask.
  • a patterning process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights Or have different thicknesses.
  • the display device 100 may be any product or component with a display function, such as a TV, a monitor, a notebook computer, a tablet computer, a mobile phone, and a navigator.
  • the display device 100 adopts the technology of arranging functional devices on the back side of the screen, such as front camera components, under-screen fingerprint components, 3D face recognition components, iris recognition components, proximity sensors and other components that can implement specific functions.
  • functional devices such as front camera components, under-screen fingerprint components, 3D face recognition components, iris recognition components, proximity sensors and other components that can implement specific functions.
  • the display device 100 adopts the under-screen camera technology.
  • a display device 100 includes a display panel 110 , the display panel 110 has a display area 10 , and the display area 10 includes a light-transmitting area 101 and a main display area 102 around the light-transmitting area 101 .
  • the main display area 102 is provided with a plurality of sub-pixels, which play a role of mainly performing screen display.
  • the light-transmitting area 101 is also provided with a plurality of sub-pixels, so that the light-transmitting area 101 can participate in image display, and the light-transmitting area 101 can transmit light.
  • the position of the light-transmitting area 101 in the display area 10 is not unique, for example, it can be set at the upper middle position of the display area 310 (see FIG. 1 ), or set on the left or right side of the upper part of the display area 10, and can also be set on the display area 310. The middle of the lower part of zone 10, and so on.
  • the functional device 120 is disposed on the backside of the light-transmitting area 101 of the display panel 110 .
  • a front camera assembly is provided on the back side of the light-transmitting area 101 .
  • the display panel 110 displays a picture
  • both the light-transmitting area 101 and the main display area 102 can display the picture.
  • the front camera assembly captures an image
  • the external light can pass through the light-transmitting area 101 to the front camera assembly.
  • the display panel 110 may further have a peripheral area 20 , and the peripheral area 20 may surround the display area 10 (refer to FIG. 1 ), or may only exist on one or more sides of the display area 10 .
  • Sub-pixels may also be arranged in the peripheral area 20, so that the peripheral area also has a display function, so that the screen ratio of the display panel 110 is close to or reaches 100%.
  • the display panel 110 may be an organic light-emitting diode (Organic Light-Emitting Diode, OLED for short) display panel.
  • OLED Organic Light-Emitting Diode
  • FIG. 3 is a cross-sectional view of a sub-pixel in the main display area 102 in FIG. 1 ; the display panel 110 includes a substrate 11 , a sub-pixel 30 disposed on the substrate 11 , and a package for packaging the sub-pixel 30 Layer 40.
  • each sub-pixel 30 of the above-mentioned display panel 110 includes a pixel circuit 301 and a light-emitting device 302 disposed on the substrate 11 .
  • the pixel circuit 301 includes a plurality of thin film transistors TFT and at least one storage capacitor Cst, wherein the thin film transistor TFT includes an active layer 12 , a gate electrode 13 , and a source electrode disposed on the substrate 11 . 14, and the drain 15; the storage capacitor Cst includes a first electrode 16 and a second electrode 17 arranged oppositely.
  • the film layer where the active layer 12 is located is the semiconductor layer 210 .
  • the gate electrode 13 and the first electrode 16 have the same material and are arranged in the same layer, the film layer where they are located is called the first gate metal layer 221, and the film layer where the second electrode 17 is located can be called the second gate metal layer 222, That is, the display panel 110 may include two gate metal layers 220 .
  • the film layer where the source electrode 14 and the drain electrode 15 are located is called the first source-drain metal layer 231 .
  • the gate insulating layer 18 is provided between the semiconductor layer 210 and the first gate metal layer 221; the first interlayer insulating layer 19 is provided between the first gate metal layer 221 and the second gate metal layer 222; A second interlayer insulating layer 21 is provided between the second gate metal layer 222 and the first source-drain metal layer 231 .
  • a passivation layer 22 and a flat layer 23 are provided on the side of the first source-drain metal layer 231 away from the substrate 11 .
  • One of the source electrode 14 and the drain electrode 15 of the thin film transistor TFT is electrically connected to the light emitting device 302 to transmit a voltage signal to the light emitting device 302 to drive the light emitting device 302 to emit light.
  • the source electrode 14 or the drain electrode 15 of the thin film transistor TFT may be directly or indirectly electrically connected to the light emitting device 302 .
  • the display panel 110 further includes another source-drain metal layer disposed on the side of the flat layer 23 away from the substrate 11 , which may be referred to as a second source-drain metal layer 232 .
  • 232 is provided with a connection electrode 24, and the drain electrode 15 of the thin film transistor TFT is electrically connected to the light emitting device 302 through the connection electrode 24.
  • the display panel 110 includes two source-drain metal layers 230 .
  • the light emitting device 302 is located on the side of the film layer where the pixel circuit 301 is located away from the substrate 11 , and includes the anode 25 , the light emitting layer 26 and the cathode thin film 27 .
  • the display panel 110 includes two source-drain metal layers 230
  • at least one insulating layer 28 is disposed between the anode 25 and the second source-drain metal layer 232
  • the anode 25 is disposed on the at least one insulating layer 28 through the anode 25 .
  • the via holes in are electrically connected to the connection electrodes 24 .
  • the display panel further includes a pixel defining layer 29, the pixel defining layer 29 includes a plurality of opening areas, one light emitting device 302 corresponds to one opening area, and the light emitting layer 26 thereof is at least partially disposed in the corresponding opening area.
  • the light emitting device 302 further includes an electron transport layer (election transporting layer, referred to as ETL), an electron injection layer (election injection layer, referred to as EIL), a hole transport layer (hole transporting layer, referred to as HTL) and holes One or more layers in the hole injection layer (HIL).
  • ETL electron transport layer
  • EIL electron injection layer
  • HTL hole transport layer
  • HIL hole transporting layer
  • the display panel 110 may be a top emission display panel, in this case, the anode 25 close to the substrate 11 is opaque, and the cathode film 27 away from the substrate 11 is transparent or translucent; the display panel 110 may also be a bottom emission display panel, In this case, the anode 25 close to the substrate 11 is transparent or translucent, and the cathode film 27 away from the substrate 11 is opaque; the display panel 110 may also be a double-sided light-emitting display panel. Both the anode 25 and the cathode film 27 remote from the substrate 11 are transparent or translucent.
  • reducing the resolution of the light-transmitting area 101 that is, reducing the distribution density of the sub-pixels 30 in the light-transmitting area 101 , can improve the light transmittance of the light-transmitting area 101 .
  • the cathode film 27 is usually designed as a whole layer. Although the cathode film 27 can transmit visible light, its transmittance to visible light is relatively low. Therefore, the cathode film 27 located in the light-transmitting area 101 on the display panel 110 can be patterned to improve the light transmittance of the light-transmitting area 101 .
  • a mask plate and a vapor deposition process are used to pattern the cathode thin film in the light-transmitting area.
  • the patterning precision of the cathode thin film is relatively low.
  • the display panel 110 includes a substrate 11 , a plurality of blocking patterns 31 and a light emitting device 302 .
  • a plurality of shielding patterns 31 are disposed on the substrate 11 and are located in the light-transmitting area 101 .
  • the orthographic projections of the shielding patterns 31 on the substrate 11 are separated from each other.
  • a plurality of light-emitting devices 302 are disposed in the light-transmitting region 101 and disposed on the substrate 11; 32.
  • Each light emitting device 302 has an effective light emitting area 261 , and the orthographic projection of the effective light emitting area 261 on the substrate 11 is located within the orthographic projection range of the cathode 32 of the light emitting device 302 on the substrate 11 .
  • the orthographic projections of the cathodes 32 of the plurality of light emitting devices 302 on the substrate 11 are separated from each other; referring to FIG. One side; one cathode 32 corresponds to one shielding pattern 31 , and the orthographic projection of each shielding pattern 31 on the substrate 11 covers the orthographic projection of its corresponding cathode 32 on the substrate 11 .
  • a plurality of shielding patterns 31 separated from each other are first fabricated on the substrate 11 ; then a light-emitting layer is fabricated on the side of the shielding patterns 31 away from the substrate 11 26 and the cathode film 27; use the laser to irradiate the area of the substrate 11 corresponding to the light-transmitting area 101 of the display panel 110 from the side of the substrate 11 away from the cathode film 27, and remove the part of the cathode film 27 in this area, which is not
  • the portions shielded by the shielding patterns 31 form a plurality of mutually separated cathodes 32 .
  • the laser irradiates the substrate 11 from the side of the substrate 11 away from the cathode thin film 27 .
  • part of the laser light is blocked by the plurality of shielding patterns 31; the laser light that is not shielded by the plurality of shielding patterns 31 is irradiated on the cathode film 27, the part of the cathode film 27 that is irradiated by the laser light is removed, and the part not irradiated by the laser light is retained, A plurality of independent cathodes 32 are formed.
  • the shape of the orthographic projection of the cathode 32 on the substrate 11 is approximately the same as the shape of the orthographic projection of the shielding pattern 31 on the substrate 11, and the orthographic projection of the shielding pattern 31 on the substrate 11 covers the cathode Orthographic projection of 32 on substrate 11.
  • the shielding patterns 31 can be patterned by vapor deposition, etching and other processes, and the patterning precision is high, and the patterns formed by the plurality of cathodes 32 can be controlled by controlling the positions, shapes and sizes of the shielding patterns 31 .
  • the precision of patterning the cathode film 27 is improved, unnecessary cathode materials are removed as much as possible, the aperture ratio of the cathode film 27 is increased, and the transmittance of visible light of the film layers where the cathodes 32 are located is improved.
  • the transmittance of the cathode 32 for visible light is greater than the transmittance for infrared light.
  • the cathode 32 is located on the side of the light-emitting layer 26 away from the substrate 11 , and the light emitted by the light-emitting layer 26 needs to be emitted through the cathode 32 . If the cathode thin film 27 is irradiated with a laser in the visible light band, part of the laser light will be emitted through the cathode thin film 27, and the efficiency of removing the cathode thin film 27 by laser is low.
  • the region on the substrate 11 corresponding to the light-transmitting region 101 of the display panel 110 can be irradiated with laser light in the infrared wavelength band to improve the efficiency of patterning the cathode film 27 .
  • the transmittance of the cathode 32 to visible light is greater than the transmittance of infrared light, so that the cathode 32 can pass through at least part of the visible light for displaying the picture, and can absorb at least part of the infrared light, so that the cathode film 27 is absorbed by the laser light in the infrared wavelength band.
  • the irradiated portion can be removed.
  • the transmittance of the shielding pattern 31 to infrared light is less than or equal to 2%, such as 2%, 1.5%, 1%, 0.5%, 0%, so that the substrate 11 is irradiated with laser light in the infrared light band
  • the shielding pattern 31 can absorb most or all of the infrared light, reduce the laser light passing through the infrared light band of the shielding pattern 31, and prevent the infrared light from directly irradiating the cathode film 27 and being damaged. The portion blocked by the blocking pattern 31 is blocked.
  • the material of the cathode film 27 includes a magnesium-silver alloy.
  • the magnesium-silver alloy can transmit visible light, and when the display panel displays an image, the light can be emitted from the plurality of cathodes 32; on the other hand, the magnesium-silver alloy can The infrared light is absorbed, and the infrared light is irradiated on the cathode film 27 made of magnesium-silver alloy, so that the part not blocked by the blocking pattern 31 can be removed.
  • FIG. 12 shows the transmittance curves of the cathode thin film 27 to light of different wavelengths when the thickness of the cathode thin film 27 is 13 nanometers.
  • infrared light with a wavelength of 900 mm may be used, and at this time, the transmittance of the cathode film 27 is about 29%; infrared light with a wavelength of 940 mm may also be used, at this time, the transmittance of the cathode film 27
  • the transmittance of the cathode film 27 is about 27.2%; the infrared light with a wavelength of 960 mm can also be used, at this time, the transmittance of the cathode film 27 is about 26.1%. It should be understood that other wavelengths of infrared light may also be used, which will not be listed one by one here.
  • each light emitting device 302 further includes an anode 25 , and the anode 25 is located on the side of the light emitting layer 26 close to the substrate 11 ; one anode 25 forms a shielding pattern 31 .
  • the anode 25 can absorb infrared light.
  • the anode 25 can be set as the shielding pattern 31, so that the film layer structure of the display panel 110 is simple, no new film layer needs to be introduced, and the manufacturing cost is low.
  • one anode 25 forms one shielding pattern 31
  • the thickness of the anode 25 is 100 nanometers, and the material of the anode 25 is opaque to light; or; when the thickness of the material of the anode 25 is 100 nanometers, the infrared The transmittance is less than or equal to 2%.
  • the orthographic projection of the cathode 32 on the substrate 11 and the orthographic projection of the corresponding anode 25 on the substrate 11 are approximately the same in shape and approximately in size. are equal, and the orthographic projection of one anode 25 on the substrate 11 overlaps the orthographic projection of its opposite cathode 32 on the substrate 11 .
  • the orthographic projection of the boundary of the cathode 32 on the substrate 11 coincides with the orthographic projection of the boundary of the anode 25 on the substrate 11 .
  • the laser when the laser is irradiated to the anode 25 , the laser may be diffracted. Based on this, please refer to FIG. 14 .
  • FIG. 14 shows the boundary of the anode 25 and the cathode 32 when the shielding pattern 31 is formed for the anode 25 .
  • each light emitting device 302 includes an anode 25 located on a side of the light emitting layer 26 close to the substrate 11 .
  • the plurality of shielding patterns 31 are located on the side of the plurality of anodes 25 of the plurality of light emitting devices 302 close to the substrate 11; one shielding pattern 31 corresponds to one anode 25, and the orthographic projection of the shielding pattern 31 on the substrate 11 corresponds to the The orthographic projections of the anode 25 on the substrate 11 overlap at least partially.
  • the orthographic projection of the shielding pattern 31 on the substrate 11 partially overlaps with the orthographic projection of the corresponding anode 25 on the substrate 11 , that is, the orthographic projection of the shielding pattern 31 on the substrate 11 covers part of the anode 25 on the substrate 11
  • the shielding pattern 31 and the anode 25 jointly determine the shape of the cathode 32
  • the shielding pattern 31 can partially protect the anode 25 .
  • the orthographic projection of the shielding pattern 31 on the substrate 11 completely overlaps with the orthographic projection of the corresponding anode 25 on the substrate 11 , that is, the orthographic projection of the shielding pattern 31 on the substrate 11 completely covers the anode 25 on the substrate 11
  • the shape of the cathode 32 is determined by the shielding pattern 31 , and the shielding pattern 31 can completely protect the anode 25 .
  • a plurality of shielding patterns 31 is disposed on one side of the plurality of anodes 25 close to the substrate 11 , and one shielding pattern 31 corresponds to one anode 25 , and the shielding pattern 31 can protect the anodes 25 .
  • Infrared light has light energy, and after the film absorbs the infrared light, the temperature will increase.
  • the anode 25 is a part of the light emitting device 302 , and the anode 25 may be damaged if the temperature of the anode 25 increases.
  • the shielding pattern 31 can reduce the risk of damage to the anode 25 due to the increase in temperature, thereby improving the safety and yield of the manufacturing process of the display panel 110 .
  • the display panel 110 further includes a semiconductor layer 210 , a gate metal layer 220 and a source-drain metal layer 230 .
  • the semiconductor layer 210 is located between the substrate 11 and the plurality of anodes 25; the gate metal layer 220 is located between the substrate 11 and the plurality of anodes 25; the source-drain metal layer 230 is far from the substrate relative to the semiconductor layer and the gate metal layer 220 11 , and are located on one side of the plurality of anodes 25 close to the substrate 11 .
  • the blocking pattern 31 is located on the semiconductor layer 210 or the gate metal layer 220 or the source-drain metal layer 230 .
  • the gate metal layer 220 may be located on the side of the semiconductor layer 210 away from or close to the substrate 11 .
  • the gate 13 of the thin film transistor of the pixel circuit is located on the side of the active layer 12 away from the substrate 11, and the thin film transistor is the top gate at this time structure;
  • the gate metal layer 220 is located on the side of the semiconductor layer 210 close to the substrate 11, the gate 13 of the thin film transistor of the pixel circuit is located on the side of the active layer 12 close to the substrate 11, and the thin film transistor is Bottom gate structure.
  • the shielding pattern 31 in the semiconductor layer 210 or the gate metal layer 220 or the source-drain metal layer 230 , it is not necessary to add an additional film layer to the display panel 110 , thereby not affecting the performance of the display panel 110 . thickness without adding additional process steps.
  • the blocking pattern 31 may be disposed on either of the two gate metal layers 220 ; in the case where the display panel 110 includes two source-drain metal layers 230 Next, the blocking pattern 31 may be disposed in either of the two source-drain metal layers 230 .
  • the shielding pattern 31 is located on the first source-drain metal layer 231 where the source electrode 14 and the drain electrode 15 of the thin film transistor are located.
  • the blocking pattern 31 is located on the first gate metal layer 221 where the gate electrode 13 of the thin film transistor is located.
  • the shielding pattern 31 is located on the semiconductor layer 210 .
  • all the shielding patterns in the plurality of shielding patterns 31 may be disposed in the same film layer of the semiconductor layer 210 , the gate metal layer 220 and the source-drain metal layer 230 .
  • a plurality of shielding patterns 31 can also be arranged in at least two layers of the semiconductor layer 210 , the gate metal layer 220 and the source-drain metal layer 230 respectively, and can also be arranged under the same light-emitting device 302 with two layers or two layers.
  • the above shielding pattern 31 is used to achieve a better protection effect on the anode 25 of the light emitting device 302 by using the multilayer shielding pattern 31 . Exemplarily, referring to FIG.
  • two layers of shielding patterns 31 are provided on one side of each anode 25 close to the substrate 11 , one of the two layers of shielding patterns 31 is located on the semiconductor layer 210 , and the other layer is located on the first gate metal. Layer 221.
  • the material of the shielding pattern 31 may be the same as the metal material of the film layer where the shielding pattern 31 is located.
  • the material of the shielding pattern 31 may be the same as the material of the source-drain metal layer 230 .
  • a plurality of shielding patterns 31 are formed without adding additional processes, which simplifies the production process of the display panel and reduces the production cost of the display panel.
  • the transmittance of the shielding pattern 31 to visible light is greater than the transmittance of infrared light, so that the shielding pattern 31 can be used to shield the infrared laser to prevent the anode 25 from being damaged by being irradiated by the infrared laser.
  • the transmittance of the blocking pattern 31 to infrared light is less than or equal to 2%, for example, 2%, 1.5%, 1%, 0.5%, 0%, so as to block most or all of the infrared laser light.
  • the thickness of the shielding pattern 31 is greater than the thickness of the cathode 32 . Since the transmittance of both the shielding pattern 31 and the cathode 32 to visible light is greater than the transmittance of infrared light, if the same or similar materials are used for both, the thickness of the shielding pattern 31 is greater than the thickness of the cathode 32, which can be used in When the laser in the infrared light band irradiates the area on the substrate 11 corresponding to the light-transmitting area 101 of the display panel 110, on the premise that the part of the cathode film 27 irradiated by the infrared light can be removed, it is ensured that the shielding pattern 31 is in the infrared light. Under irradiation, it will not melt into a liquid state, nor will it evaporate into a gaseous state.
  • the diffraction of the laser light will cause the boundary of the orthographic projection of the shielding pattern 31 on the substrate 11 to exceed the boundary of the orthographic projection of the cathode 32 on the substrate 11 .
  • the display panel 110 when the visible light enters the light-transmitting area 101 from the light-emitting side of the display panel 110 , part of the visible light will strike the portion of the shielding pattern 31 beyond the boundary of the cathode 32 , reducing the exposure of the light-transmitting area 101 to visible light. transmittance.
  • the material of the shielding pattern 31 includes silver, which can absorb infrared light and transmit visible light.
  • the shielding pattern 31 can absorb infrared light, so as to block the infrared light irradiated to the anode.
  • the material of the shielding pattern 31 is not limited to silver, and the material of the shielding pattern 31 may also be other materials whose transmittance to visible light is greater than that of infrared light.
  • the material of the cathode 32 may include a magnesium-silver alloy.
  • FIG. 13 is a schematic diagram of the transmittance of silver layers with different thicknesses to light of different wavelengths; exemplarily, if infrared light with a wavelength of 920 nanometers is used, the transmittance when the thickness of the silver layer is 20 nanometers It is about 7.992%, the transmittance is about 4.169% when the thickness of the silver layer is 25 nanometers, and the transmittance when the thickness of the silver layer is 30 nanometers is about 2.773%.
  • silver with a thickness of 30 nanometers or greater than 30 nanometers can be used as the shielding pattern 31; for example, 35 nanometers, 38 nanometers, and 45 nanometers can be used.
  • the cathodes 32 separated from each other in the light-transmitting region 101 need to be connected to each other.
  • a transparent conductive layer may be provided to connect the plurality of mutually separated cathodes 32 to the transparent conductive layer.
  • a cathode connection structure may be provided between the plurality of mutually separated cathodes 32 to electrically connect the plurality of mutually separated cathodes 32 .
  • the cathode 32 includes a cathode main part 321 and a cathode connection part 322 .
  • the orthographic projection of the anode 25 on the substrate 11 covers the orthographic projection of the cathode main portion 321 on the substrate 11 ; the cathode connecting portion 322 is electrically connected to the cathode main portion 321 (see FIG. 7A ), and the cathode connecting portion 322
  • the orthographic projection on the substrate 11 does not overlap with the orthographic projection of the anode 25 on the substrate 11 (see FIG. 8A ).
  • the display panel 110 further includes a transparent conductive layer 33 and a first insulating layer 281 .
  • the transparent conductive layer 33 is located between the film layer where the shielding pattern 31 is located and the plurality of anodes 25 ; the first insulating layer 281 is located between the transparent conductive layer 33 and the plurality of cathodes 32 .
  • the first insulating layer 281 is provided with a plurality of first vias 34, and there is a gap between the orthographic projection of each first via 34 on the substrate 11 and the orthographic projection of the anode 25 on the substrate 11;
  • the orthographic projection of a via hole 34 on the substrate 11 is located within the orthographic projection range of the cathode connecting portion 322 on the substrate 11 , and each cathode 32 is electrically connected to the transparent conductive layer 33 through at least one first via hole 34 .
  • each cathode 32 may be electrically connected to the transparent conductive layer 33 through a first via hole 34 .
  • the material of the transparent conductive layer 33 may be tin-doped indium oxide (English: Indium Tin Oxide; abbreviation: ITO).
  • the cathode connecting portion 322 protruding from the boundary of the anode 25 in the cathode 32 and providing the first via hole 34 in the first insulating layer 281 between the cathode 32 and the transparent conductive layer 33, the cathode connecting portion is 322 is electrically connected to the transparent conductive layer 33 through the first via hole 34; and since there is a gap between the orthographic projection of the first via hole 34 on the substrate 11 and the orthographic projection of the anode 25 on the substrate 11, the The first via 34 and the anode 25 have an avoidance interval, so that the cathode 32 can be electrically insulated from the anode 25 to prevent short circuit between the cathode 32 and the anode 25 .
  • the shielding pattern 31 includes the shielding pattern main portion 311 and the shielding pattern connecting portion 312 .
  • the orthographic projection of the shielding pattern body portion 311 on the substrate 11 covers the orthographic projection of the cathode body portion 231 on the substrate 11 ; the shielding pattern connecting portion 312 is connected to the shielding pattern body portion 311 (see FIG. 7C ), and The orthographic projection of the shielding pattern connecting portion 312 on the substrate 11 covers the orthographic projection of the cathode connecting portion 321 on the substrate 11 (see FIG.
  • the orthographic projection of the cathode 32 on the substrate 11 is approximately the same in shape and size as the orthographic projection of the opposite shielding pattern 31 on the substrate 11 .
  • the plurality of separated cathodes 32 in the light-transmitting area 101 are electrically connected through the transparent conductive layer 33, and the transparent conductive layer 33 can be directly electrically connected to the signal lines disposed around the display area 10 for transmitting cathode voltage signals. It can also be electrically connected to the cathode film 27 in the main display area 102 to obtain the cathode voltage signal and transmit the cathode voltage signal to each cathode 32 .
  • the pixel defining layer 29 is also included between the transparent conductive layer 33 and the plurality of cathodes 32. Therefore, the first via 34 needs to penetrate through the first insulating layer 281 as well as through The pixel defining layer 29 enables the cathode 32 to be electrically connected to the transparent conductive layer 33 through the first via hole 34 .
  • the display panel 110 further includes at least one cathode connection structure 35 , the at least one cathode connection structure 35 is connected to the cathode 32 .
  • the materials are the same and set on the same layer.
  • the size of the cathode connection structures 35 in the first direction L1 is larger than that in the second direction L2 ; each cathode connection structure 35 is electrically connected to two adjacent cathodes 32 .
  • the first direction is the row direction in which the plurality of sub-pixels 30 of the display panel 110 are arranged, that is, the direction shown by the straight line L1 in FIG. 9 ;
  • the second direction is the column direction in which the plurality of sub-pixels 30 of the display panel 110 are arranged, that is, the The direction shown by the straight line L2 in 9.
  • the plurality of mutually separated cathodes 32 are electrically connected through the cathode connection structure 35, the size of the cathode connection structure 35 in the first direction L1 is larger than the size in the second direction L2, and the cathode connection structure 35 is connected along the Two cathodes 32 adjacent to each other in the first direction L1.
  • the cathode connection structure 35 may be directly electrically connected to the signal line disposed around the display area 10 for transmitting the cathode voltage signal, or may be electrically connected to the cathode film 27 in the main display area 102 to obtain the cathode voltage signal. , and transmits a cathode voltage signal to each cathode 32 .
  • the cathode connection structure 35 is made of the same material as the cathode 32, and the cathode connection structure 35 and the cathode 32 are arranged in the same layer, so that the cathode connection structure 35 can be fabricated together with the cathode 32. For example, when infrared light is used to illuminate the cathode film 27, the cathode film 27 is displayed correspondingly. When the light-transmitting region 101 of the panel 100 is imaged, the cathode 32 and the cathode connection structure 35 are formed simultaneously.
  • the display panel 110 includes a plurality of cathode connection structures 35 arranged in a plurality of rows, and each row includes a plurality of cathode connection structures 35 arranged in sequence along the first direction L1 .
  • the plurality of cathode connection structures 35 in each row are located approximately on a straight line.
  • At least one of opposite sides of the cathode connecting bar 50 in the second direction L2 is provided with a plurality of cathodes 32 , and the plurality of cathodes 32 are all connected to the cathode connecting bar 50 .
  • any two adjacent cathodes 32 are electrically connected through a cathode connection structure 35; and at least part of the plurality of cathodes 32 in the same row are located on the same straight line,
  • the connecting structures 35 are located on the same straight line.
  • a shielding connection structure 36 having the same shape as the cathode connection structure 35 can be provided on the display panel 110 to form a cathode connection structure; for another example, a mask plate 200 can be provided on the side of the substrate 11 away from the cathode film 27, using the mask The membrane plate 200 forms the cathode connection structure 35 .
  • the display panel 110 further includes at least one shielding connection structure 36,
  • the material is the same as that of the plurality of shielding patterns 31 and is provided in the same layer.
  • one shielding connection structure 36 corresponds to one cathode connection structure 35
  • the orthographic projection of the shielding connection structure 36 on the substrate 11 covers the orthographic projection of the corresponding cathode connection structure 35 on the substrate 11 .
  • one shielding pattern 31 corresponds to one cathode 32
  • the orthographic projection of the shielding pattern 31 on the substrate 11 covers the orthographic projection of the cathode 32 on the substrate 11 .
  • the material of the shielding connection structure 36 is the same as the material of the shielding pattern 31, and the shielding connection structure 36 and the shielding pattern 31 are arranged on the same layer, so that the shielding connection structure 36 can be produced at the same time as the patterned shielding pattern 31 is produced, and no additional process is required.
  • the process and film layer are beneficial to reduce the manufacturing cost of the display panel.
  • the shielding connection structure 36 and the shielding pattern 31 may both be located in the semiconductor layer 210, or both may be located in the gate metal layer 220, or both may be located in the source-drain metal layer 230; when the gate metal layer 220 includes two gate metal layers 220, The shielding connection structure 36 and the shielding pattern 31 can be located in either of the two gate metal layers 220; when the source-drain metal layer 230 includes two source-drain metal layers 230, the shielding connection structure 36 and the shielding pattern 31 can be located in the two source-drain metal layers 230. Any of the drain metal layers 230 .
  • the shielding connection structure 36 and the shielding pattern 31 may also be disposed on a different film layer.
  • at least one shielding connection structure 36 can be arranged between the film layer where the shielding pattern 31 is located and the plurality of anodes 25, or at least one shielding connection structure 36 can be arranged between the substrate 11 and the film layer where the shielding pattern 31 is located. between.
  • at least one shielding connection structure 36 may be disposed between the substrate 11 and the anode 25 .
  • the display panel 110 includes a plurality of cathode connection bars 50
  • the display panel 110 includes a plurality of shielding connection structures 36 arranged in a plurality of rows, and each row includes a plurality of shielding connection structures 36 arranged in sequence along the first direction L1 .
  • each row of shielding connecting structures 36 and the portions of the plurality of shielding patterns 31 connected to the plurality of shielding connecting structures 36 in the row form a shielding connecting bar 60 ;
  • one shielding connecting bar 60 is in the The orthographic projection on the substrate 11 covers the orthographic projection of a cathode tie bar 50 on the substrate 11 .
  • the shape of the shielding pattern 31 is substantially the same as that of the cathode 32 ; referring to FIG. 10B , the mask 200 includes at least one shielding line 210 .
  • the orthographic projection of each blocking light 210 on the substrate 11 is connected to the orthographic projection of the at least two anodes 25 on the substrate 11 .
  • the orthographic projection of each blocking light 210 on the substrate 11 covers the orthographic projection of one cathode connecting bar 50 on the substrate 11 .
  • the anode 25 includes a first anode part 251 and a second anode part 252 ; the shape of the first anode part 251 and the effective light emitting region 261 of the light emitting device 302 where the first anode part 251 is substantially the same, and the first anode part 251
  • the boundary of the portion 251 partially coincides with the boundary of the anode 25 .
  • the second anode part 252 is electrically connected to the first anode part 251 , one end of the second anode part 252 is electrically connected to the first anode part 251 , and the other end is electrically connected to the thin film transistor.
  • the cathode 32 includes a first cathode portion 323 and a second cathode portion 324 , and the second cathode portion 322 is electrically connected to the first cathode portion 321 ;
  • the first cathode portion 321 is lining The orthographic projection of the bottom 11 is covered by the orthographic projection of the first anode portion 251 on the substrate 11 ; and the orthographic projection of the second cathode portion 322 on the substrate 11 is covered by the orthographic projection of the second anode portion 252 on the substrate 11 .
  • the cathode 32 includes a cathode main body part 321 and a cathode connecting part 322
  • the first cathode part 323 and the second cathode part 324 form the cathode main body part 321
  • the cathode main body part 321 is approximately the same as that of the anode 25 .
  • the shape of the cathode 32 is substantially the same as that of the anode 25 .
  • the pixel circuits of the sub-pixels 30 in the light-transmitting area 101 are arranged around the light-transmitting area 101 , which can improve the light transmittance of the light-transmitting area 101 .
  • the pixel circuit of the sub-pixel 30 in the light-transmitting area 101 is called the first pixel circuit 3011 (see FIG. 4 ), the pixel circuit 301 of the sub-pixel 30 in the main display area 102 is referred to as a second pixel circuit 3012 (see FIG. 3 ).
  • the first pixel circuits 3011 of the sub-pixels 30 in the light-transmitting area 101 are arranged on the periphery of the light-transmitting area 101, and the light-transmitting area is connected by connecting wires 37 (see 371, 372, 373 in FIG. 4). Each light emitting device 302 in the region 101 is electrically connected to one first pixel circuit 3011 .
  • the multiple connecting lines 37 can be They are arranged in the same connection wire layer 240 , or can be arranged in different connection wire layers 240 , so as to provide sufficient wiring space for the plurality of connection wires 37 .
  • the plurality of connection lines 37 include a first connection line 371 , a second connection line 372 and a third connection line 373 respectively located in the three-layer connection line layer 240 , the first connection line 371 , the second connection line 372 and the The third connection lines 373 are respectively used to electrically connect the light emitting devices 302 in different regions in the light-transmitting region 101 with the corresponding first pixel circuits 3011 .
  • the cross-sectional structure of the light-transmitting area 10 of the display panel 110 and its surrounding area is as follows:
  • the pixel circuit layer 70 , the second insulating layer 282 , the connecting line layer 240 , and the third insulating layer 283 are disposed between the substrate 11 and the film layers where the anodes 25 are located.
  • the pixel circuit layer 70 includes a semiconductor layer 210, a gate insulating layer 18, a first gate metal layer 221, a first interlayer insulating layer 19, a second gate metal layer 222, a second interlayer insulating layer 21, a first source The drain metal layer 231 , the passivation layer 22 , the planarization layer 23 and the second source-drain metal layer 232 .
  • the pixel circuit layer 70 includes a plurality of first pixel circuits 3011 , and the plurality of first pixel circuits 3011 are disposed around the light-transmitting area 101 .
  • a plurality of second vias 38 are provided in the second insulating layer 282 ; and a plurality of third vias 39 are provided in the third insulating layer 283 .
  • the first end of the connection line 37 in the connection line layer 240 is electrically connected to a first pixel circuit 3011 through at least one second via hole 38 , and the second end passes through at least one third via hole 39 and the first end of an anode 25 .
  • the two connecting portions 252 are electrically connected.
  • the three layers of connecting wire layers 240 are the first in order A connecting line layer, a second connecting line layer and a third connecting line layer.
  • the first connection line layer includes a plurality of first connection lines 371
  • the second connection line layer includes a plurality of first connection lines 372
  • the third connection line layer includes a plurality of first connection lines 373 .
  • a fourth insulating layer 284 is disposed between the first connecting wire layer and the second connecting wire layer
  • a fifth insulating layer 285 is disposed between the second connecting wire layer and the third connecting wire layer.
  • the second via hole 38 not only penetrates through the second insulating layer 282 , but also penetrates through the fourth insulating layer 284 , so that the second connection line 372 passes through the second via hole 38 and the fourth insulating layer 284 .
  • a pixel circuit 301 is electrically connected; the third via 39 not only penetrates through the third insulating layer 283 but also penetrates the fifth insulating layer 285 , so that the second connection line 372 is electrically connected to the anode 25 through the third via 39 .
  • the transparent conductive layer 33 when the display panel 110 further includes the transparent conductive layer 33, the transparent conductive layer 33 is located on the side of the third insulating layer 283 away from the substrate 11; when the display panel 110 includes three layers of connecting wire layers In the case of 240 , the transparent conductive layer 33 is located on the side of the fifth insulating layer 285 away from the substrate 11 ; this facilitates the electrical connection between the plurality of cathodes 32 and the transparent conductive layer 33 .
  • the transparent conductive layer 33 may also be disposed at any position below the anode 25 , which is not limited in the present disclosure.
  • the orthographic projection of the first via hole 34 for connecting the cathode connecting portion 322 and the transparent conductive layer 33 on the substrate 11 and the third via hole 39 for connecting the second anode portion 252 and the connection line 37
  • the orthographic projections on substrate 11 do not overlap so that cathode 32 and anode 25 remain electrically isolated.
  • connection line layer 240 further includes a plurality of spacers 41 , each spacer block 41 is electrically connected to the second end of a connection line 37 , and each spacer block 41 is connected to a second end of a connection line 37 through a third via hole 39
  • the second anode portion 252 of the anode 25 is electrically connected.
  • the orthographic projections of the third via hole 39 and the spacer 41 on the substrate 11 are both at least partially intersected with the orthographic projection of one cathode connection bar 50 on the substrate 11 .
  • the second anode part 252 can be electrically connected to the spacer block 41 through the third via hole 39 , and then the anode 25 can be electrically connected to the connection line 37 .
  • auxiliary spacers 42 can also be set at the corresponding positions of other connecting line layers, and the anodes of the first pixel circuit 3011 and the corresponding light-emitting device 302 can be realized through the connecting lines 37, the spacer 41 and the auxiliary spacer 42. 25 electrical connections.
  • the display panel 110 includes a three-layer connecting wire layer 240 , and the connecting wire 37 of the anode 25 for electrically connecting the first pixel circuit 3011 and the light emitting device 302 is located in the three-layer connecting wire layer 240 closest to the substrate 11
  • the connecting line layer is the first connecting line 371 in the first connecting line layer (refer to FIG. 4 ), which can be arranged on the pad electrically connected to the first connecting line 371 in the first connecting line layer. 41.
  • auxiliary pads 42 are respectively arranged in the second connecting line layer and the third connecting line layer. In this way, the first pixel circuit 3011 can be electrically connected to the anode 25 through the connection line 37 , the pad 41 and the two auxiliary pads 42 in sequence.
  • connection between the first pixel circuit 3011 and the anode 25 of the light-emitting device 302 can be prevented from being too deep by the switching function of the spacer 41 and the auxiliary spacer 42, and the connection between the anode 25 and the first electrode 25 can be improved.
  • the orthographic projection of the auxiliary spacer 42 on the substrate 11 and the orthographic projection of the corresponding spacer 41 on the substrate 11 at least partially overlap, for example, completely overlap, so that the spacer 41 and the auxiliary spacer 42 can be reduced as much as possible. occupied area.
  • the via holes (refer to the via holes 43, 44 in FIG. 8A ) for electrically connecting two adjacent conductive blocks (including the pad block 41 and the auxiliary pad block) can be staggered In this way, the orthographic overlap of two adjacent via holes on the substrate 11 in the direction perpendicular to the substrate 11 can be avoided, and the reliability of the electrical connection can be further improved.
  • the display panel 110 includes a three-layer connecting wire layer 240 , and the connecting wire 37 of the anode 25 for electrically connecting the first pixel circuit 3011 and the light emitting device 302 is located in the three-layer connecting wire layer 240 closest to the substrate Taking the connecting line layer of 11 as an example, two auxiliary spacers 42 are provided on the side of the spacer block 41 away from the substrate 11, and the spacer block 41 and the adjacent auxiliary spacer blocks 42 are connected through a fourth via 43; The two auxiliary spacers 42 are connected through the fifth via hole 44 ; the second anode portion 252 is connected to the auxiliary spacer 42 away from the spacer block 41 through the third via hole 39 .
  • the orthographic projection of the third via hole 39 on the substrate 11 does not overlap with the orthographic projection of the fifth via hole 44 on the substrate 11 , and the orthographic projection of the fifth via hole 44 on the substrate 11 and the fourth via hole 43
  • the orthographic projections on the substrate do not overlap, so that two adjacent via holes in the direction perpendicular to the substrate 11 are prevented from being located at the same position, which further improves the reliability of the electrical connection between the anode 25 and the first pixel circuit 3011 .
  • the plurality of sub-pixels 30 of the display panel 110 include a plurality of red sub-pixels 303 , a plurality of green sub-pixels 304 and a plurality of blue sub-pixels 305 ;
  • the shape of the first cathode portion 323 of the cathode 32 is approximately circular;
  • the shape of the first cathode portion 323 of the cathode 32 of the light-emitting device 302 of the red sub-pixel 303 is approximately oval, and the cathode 32 of the light-emitting device of the blue sub-pixel 305
  • the shape of the first cathode 323 is substantially circular or oval.
  • the shapes of the first cathode portions 323 of the red sub-pixel 303 , the green sub-pixel 304 and the blue sub-pixel 305 are not limited to this.
  • the shape of the first cathode portion 323 of the green sub-pixel 304 may also be oval, square or hexagonal; the shape of the first cathode portion 323 of the red sub-pixel 303 may also be circular, square or hexagonal etc.; the shape of the first cathode portion 323 of the blue sub-pixel 305 may also be a square or a hexagon.
  • the minimum distance between the first cathode portions 323 of the two green sub-pixels 304 is smaller than the minimum distance between the first cathode portions of the other two sub-pixels of the same color.
  • the minimum distance D1 between the first cathode portions 323 of the two green sub-pixels 304 is smaller than the minimum distance D2 between the first cathode portions 323 of the two red sub-pixels 303, and is also smaller than the two blue sub-pixels The minimum distance D3 between the first cathode portions 323 of the pixels 305 .
  • the effective light-emitting regions of the light-emitting devices 302 of the red sub-pixel 303 and the blue sub-pixel 302 are alternately arranged along the first direction L1; the effective light-emitting regions of the light-emitting device 302 of the green sub-pixel 304 are arranged along the first direction L1 Arranged in two directions L2.
  • the projection of the effective light-emitting region of the sub-pixel 30 on the substrate 11 is covered by the orthographic projection of the cathode main portion 323 on the substrate 11 .
  • the display panel 110 includes two layers of gate metal layers, two layers of source-drain metal layers, and three layers of conductive layers.
  • the number of insulating layers between the film layers where the anodes 25 of the display panel 110 are located and the substrate 11 is not limited to this. The number of layers can be reduced or increased.
  • Some embodiments of the present disclosure also provide a method for fabricating a display panel, including:
  • the shielding pattern 31 may be the shielding pattern 31 in any of the foregoing embodiments.
  • the shielding pattern 31 may be fabricated by processes such as vapor deposition, exposure, and etching, which are not specifically limited herein.
  • the one or more conductive film layers may be at least one of the semiconductor layer 210, the gate metal layer 220, the source-drain metal layer 230 and other conductive film layers, and at least one conductive film layer is disposed between each adjacent two conductive film layers.
  • An insulating layer 80 is provided.
  • the above-mentioned conductive film layer may exist in the light-transmitting area 101 to form the first pixel circuit 3011 .
  • the conductive pattern of the pixel circuit 3011 is shown in FIGS. 18 to 20 as the cross-sectional structure of the light-transmitting area of the display panel 110. Therefore, in FIGS. 18 to 20, the conductive film layer can not be seen, but only the conductive layer can be seen. insulating layer 80 .
  • Each light emitting layer 26 corresponds to one light emitting device 302 .
  • a plurality of light-emitting layers 26 may be fabricated by using an evaporation or inkjet printing process.
  • the pixel-defining layer 29 includes a plurality of opening regions, and each opening region defines an effective light-emitting region 261 of the light-emitting device 302 .
  • a cathode thin film 27 is formed on the side of the plurality of light emitting layers 26 away from the substrate 11 .
  • the cathode film 27 covers the display area 10 of the display panel 110.
  • the cathode thin film 27 may be fabricated by an evaporation process.
  • the orthographic projection of the shielding pattern 31 on the substrate 11 covers the orthographic projection of the plurality of separated cathodes 32 on the substrate 11 .
  • each light-emitting layer 26 and its corresponding cathode 32 form part of a light-emitting device 302, each light-emitting device 302 has an effective light-emitting area, and the orthographic projection of the effective light-emitting area on the substrate 11 is located at the cathode 32 of the light-emitting device 302 on the substrate within the orthographic projection range on the base 11.
  • the cathode film 27 can transmit visible light and can absorb infrared light; the blocking pattern 31 can absorb infrared light; and the laser is an infrared light beam.
  • the orthographic projection of the shielding pattern 31 on the substrate 11 is approximately the same in shape and size as the orthographic projection of the cathode 32 on the substrate 11, and the orthographic projection of the shielding pattern 31 on the substrate 11 covers a plurality of separated cathodes 32 is orthographically projected on the substrate 11 .
  • the shielding pattern 31 can be patterned by vapor deposition, etching and other processes, and its fabrication precision is high. By precisely controlling the pattern of the shielding pattern 31, the patterns of a plurality of cathodes 32 can be controlled, thereby improving the patterning of the cathode film 27.
  • the accuracy of the processing increases the aperture ratio of the film layers where the plurality of cathodes 32 are located, and improves the transmittance of the films where the plurality of cathodes 32 are located to visible light.
  • the anode is used as the shielding pattern 31
  • S100 (making a plurality of mutually separated shielding patterns 31 on the substrate 11 ) includes S110 .
  • each light-emitting device 302 includes an anode 25 , and an anode 25 forms a shielding pattern 31 .
  • the manufacturing method of the display panel 110 includes:
  • a cathode thin film 27 is formed on the side of the plurality of light emitting layers 26 away from the substrate 11 .
  • the one or more insulating layers 80 at least include all insulating layers in the pixel circuit layer 70 and at least one layer between the pixel circuit layer 70 and the film layer where the anode 25 is located Insulating layer 28 .
  • the one or more insulating layers 80 at least include all insulating layers in the pixel circuit layer 70 and at least one layer between the pixel circuit layer 70 and the film layer where the anode 25 is located Insulating layer 28 .
  • all insulating layers in the pixel circuit layer 70 include a gate insulating layer 18 , a first interlayer insulating layer 19 , a second interlayer insulating layer 21 , a passivation layer 22 and a flat layer 23 ;
  • the at least one insulating layer 28 includes a second insulating layer 282 , a fourth insulating layer 284 , a fifth insulating layer 285 and a third insulating layer 283 .
  • the one or more insulating layers 80 may also include other insulating layers, which will not be repeated here.
  • the light emitting device 302 includes anodes 25 , and a plurality of shielding patterns 31 are located at one of the anodes 25 of the plurality of light emitting devices 302 close to the substrate.
  • S100 (making a plurality of shielding patterns 31 separated from each other on the substrate 11 ) includes S120.
  • S130 is also included between S100 (manufacturing a plurality of mutually separated shielding patterns 31 on the substrate 11 ) and S200 (manufacturing a plurality of light-emitting layers 26 ).
  • each light-emitting device 302 includes one anode 25 .
  • S100 making a plurality of mutually separated shielding patterns on the substrate
  • S130 making a plurality of anodes
  • S121 ⁇ S123 when the plurality of cathodes 32 are electrically connected through the transparent conductive layer 33, S100 (making a plurality of mutually separated shielding patterns on the substrate) and S130 (making a plurality of anodes) further include S121 ⁇ S123.
  • the orthographic projection of each first via hole 34 on the substrate 11 and the orthographic projection of the anode 25 on the substrate 11 there is a gap between the orthographic projection of each first via hole 34 on the substrate 11 and the orthographic projection of the anode 25 on the substrate 11 , and the orthographic projection of each first via hole 34 on the substrate 11 is located in the shield
  • the pattern 31 is in the orthographic projection range on the substrate 11 , and the plurality of first vias 34 penetrate through the first insulating layer 281 and communicate with the transparent conductive layer 33 .
  • the material of the cathode thin film 27 enters many In the first via holes 34 , the cathode film 27 is connected to the transparent conductive layer 33 through the cathode material in the plurality of first via holes 34 .
  • the manufacturing method of the display panel 110 includes:
  • a cathode thin film 27 is formed on the side of the plurality of light emitting layers 26 away from the substrate 11 .
  • the shielding pattern 31 is disposed on the side of the anode 25 close to the substrate 11 , and the orthographic projection of the shielding pattern 31 on the substrate 11 covers the orthographic projection of the anode 25 on the substrate 11 . at this time,
  • the one or more insulating layers 80 include an insulating layer between the substrate 11 and the film layer where the shielding pattern 31 is located.
  • one or more insulating layers 80 include the gate insulating layer 18 .
  • a plurality of mutually separated cathodes 32 are electrically connected by a cathode connecting structure 35 disposed on the same layer.
  • the cathode connecting structure 35 and the cathode 32 can be formed in the following two ways.
  • a plurality of shielding connection structures 36 are formed in the process of patterning the semiconductor layer 210 or the gate metal layer 220 or the source-drain metal layer 230 .
  • the plurality of shielding connection structures 36 and the shielding pattern 31 are located in the same film layer; the size of each shielding connection structure 36 in the first direction L1 is larger than its size in the second direction L2; the first direction L1 is the display panel 110 The row direction in which the plurality of sub-pixels 30 are arranged, and the second direction L2 is the column direction in which the plurality of sub-pixels 30 of the display panel 110 are arranged.
  • Each shielding connection structure 36 is connected with two shielding patterns 31; a plurality of shielding connecting structures 36 are arranged in multiple rows, and each row includes a plurality of shielding connecting structures 36 arranged in sequence along the first direction L1; each row of shielding connecting structures 36, and the portions of the shielding patterns 31 connected by the shielding connecting structures 36 in the row to form a shielding connecting bar 60 .
  • the cathode film 27 can be formed on the A plurality of cathodes 32 and a plurality of cathode connection structures 35; the plurality of cathode connection structures 35 and the plurality of cathodes 32 are located in the same film layer, and the size of each cathode connection structure 35 in the first direction L1 is larger than that in the second direction L2 size on .
  • Each cathode connection structure 35 is electrically connected to two cathodes 32 .
  • the plurality of cathode connection structures 35 are arranged in multiple rows, and each row includes a plurality of cathode connection structures 35 arranged in sequence along the first direction L1;
  • the connected portions of the plurality of cathodes 32 form a cathode connection bar 50 .
  • Method 2 As shown in FIG. 17 and FIG. 20 , before S400 (using the laser to irradiate the area of the substrate 11 corresponding to the light-transmitting area 101 of the display panel 110 from the side of the substrate 11 away from the cathode film 27 ), the production of the display panel The method also includes S310.
  • the mask plate 200 includes at least one blocking light 210 , and the orthographic projection of each blocking light 210 on the substrate 11 is connected to the orthographic projection of the at least two anodes 25 on the substrate 11 .
  • a plurality of cathodes 32 and a plurality of cathode connection structures 35 can also be formed on the cathode film 27; the plurality of cathode connection structures 35 and the plurality of cathodes 32 are located in the same film layer, and each cathode connection structure
  • the dimension of 35 in the first direction L1 is larger than its dimension in the second direction L2.
  • Each cathode connection structure 35 is electrically connected to two cathodes 32 .
  • the plurality of cathode connection structures 35 are arranged in multiple rows, and each row includes a plurality of cathode connection structures 35 arranged in sequence along the first direction L1;
  • the connected portions of the plurality of cathodes 32 form a cathode connection bar 50 .
  • the manufacturing method of the display panel 110 includes:
  • a cathode thin film 27 is formed on the side of the plurality of light emitting layers 26 away from the substrate 11 .

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Abstract

一种显示面板，具有显示区，显示区包括透光区和位于透光区周边的主显示区。显示面板包括衬底、多个遮挡图案和多个发光器件，多个遮挡图案设置于衬底上，且位于透光区；多个遮挡图案在衬底上的正投影相互分离。多个发光器件设置于透光区，并设置于衬底上；每个发光器件包括发光层及位于发光层远离衬底一侧的阴极；每个发光器件具有有效发光区，有效发光区在衬底上的正投影位于发光器件的阴极在衬底上的正投影范围内。多个发光器件的多个阴极在衬底上的正投影相互分离，且位于多个遮挡图案远离衬底的一侧；一个阴极与一个遮挡图案相对应，且每个遮挡图案在衬底上的正投影覆盖与其对应的阴极在衬底上的正投影。

Description

显示面板及其制作方法和显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种显示面板及其制作方法和显示装置。
背景技术
随着人们对视觉体验要求的提升，为了提升显示屏的视觉效果，需要尽可能的增大显示屏中显示区的占比，即提升显示屏的屏占比。屏占比为100％或者接近100％的显示屏，通常被称为“全面屏”。
要实现“全面屏”的设计，需要将前置摄像头设置在显示屏的背侧(即与显示屏的出光侧相背的一侧)。前置摄像头工作时需要有足够的进光量才能拍摄到清晰的图片，因此，对显示屏上，与前置摄像头相对的区域的光线透过率要求较高。
公开内容
一方面，提供一种显示面板。所述显示面板具有显示区，所述显示区包括透光区和位于所述透光区周边的主显示区。所述显示面板包括衬底、多个遮挡图案和多个发光器件，所述多个遮挡图案设置于所述衬底上，且位于所述透光区；所述多个遮挡图案在所述衬底上的正投影相互分离。所述多个发光器件设置于所述透光区，并设置于所述衬底上；每个发光器件包括发光层及位于所述发光层远离所述衬底一侧的阴极；每个发光器件具有有效发光区，所述有效发光区在所述衬底上的正投影位于所述发光器件的阴极在所述衬底上的正投影范围内。所述多个发光器件的多个阴极在所述衬底上的正投影相互分离，且位于所述多个遮挡图案远离所述衬底的一侧；一个阴极与一个遮挡图案相对应，且每个所述遮挡图案在所述衬底上的正投影覆盖与其对应的阴极在所述衬底上的正投影。
在一些实施例中，所述阴极对可见光的透过率大于对红外光的透过率；所述遮挡图案对红外光的透过率小于或等于2％。
在一些实施例中，每个发光器件还包括阳极，所述阳极位于所述发光层靠近所述衬底的一侧；一个所述阳极形成一个所述遮挡图案。
在一些实施例中，每个发光器件还包括阳极，所述阳极位于所述发光层靠近所述衬底的一侧。所述多个遮挡图案位于所述多个发光器件的多个阳极靠近所述衬底的一侧；一个遮挡图案与一个阳极相对应，且所述遮挡图案在所述衬底上的正投影与其对应的阳极在所述衬底上的正投影至少部分重叠。
在一些实施例中，所述显示面板还包括半导体层、栅极金属层和源漏金属层。半导体层位于所述衬底与所述多个阳极之间；栅极金属层位于所述衬底与所述多个阳极之间；源漏金属层相对于所述半导体层和所述栅极金属层远离所述衬底，且位于所述多个阳极靠近所述衬底的一侧。所述遮挡图案位于所述半导体层或所述栅极金属层或所述源漏金属层。
在一些实施例中，所述遮挡图案对可见光的透过率大于对红外光的透过率；所述遮挡图案的厚度大于所述阴极的厚度。
在一些实施例中，所述阴极的材料包括镁银合金，所述遮挡图案的材料包括银。
在一些实施例中，所述阴极包括阴极主体部和阴极连接部；所述阳极在所述衬底上的正投影覆盖所述阴极主体部在所述衬底上的正投影；所述阴极连接部与所述阴极主体部电连接，且所述阴极连接部在所述衬底上的正投影，与所述阳极在所述衬底上的正投影不重叠。
在一些实施例中，所述遮挡图案包括遮挡图案主体部和遮挡图案连接部：所述遮挡图案主体部在所述衬底上的正投影覆盖所述阴极主体部在所述衬底上的正投影；所述遮挡图案连接部与所述遮挡图案主体部连接，且所述遮挡图案连接部在所述衬底上的正投影覆盖所述阴极连接部在所述衬底上的正投影。
在一些实施例中，所述显示面板还包括透明导电层和第一绝缘层。所述透明导电层位于所述遮挡图案所在膜层与所述多个阳极之间；所述第一绝缘层位于所述透明导电层与所述多个阴极之间。所述第一绝缘层内设置有多个第一过孔，且每个第一过孔在所述衬底上的正投影与所述阳极在所述衬底上的正投影之间具有间隙；每个所述第一过孔在所述衬底上的正投影位于所述阴极连接部在所述衬底上的正投影范围内，每个所述阴极通过至少一个所述第一过孔与所述透明导电层电连接。
在一些实施例中，所述显示面板还包括至少一个阴极连接结构，所述至少一个阴极连接结构与所述阴极材料相同且同层设置。所述阴极连接结构在第一方向上的尺寸大于其在第二方向上的尺寸；每个所述阴极连接结构与相邻两个所述阴极电连接。其中，所述第一方向为所述显示面板的多个子像素排列的行方向，所述第二方向为所述显示面板的多个子像素排列的列方向。
在一些实施例中，所述显示面板包括排列成多行的多个所述阴极连接结构，每行包括沿所述第一方向依次排列的多个所述阴极连接结构。每行阴极连接结构，及该行中的多个阴极连接结构所连接的多个阴极的部分，形成一 个阴极连接条。所述阴极连接条在所述第二方向上具有与所述阴极连接结构大致相等的尺寸。
在一些实施例中，所述显示面板还包括至少一个遮挡连接结构，所述至少一个遮挡连接结构与所述多个遮挡图案材料相同且同层设置。在所述显示面板包括多个阴极连接条的情况下，所述显示面板包括排列成多行的多个所述遮挡连接结构，每行包括沿所述第一方向依次排列的多个所述遮挡连接结构；每行遮挡连接结构，及该行中的多个遮挡连接结构所连接的多个遮挡图案的部分，形成一个遮挡连接条；一个所述遮挡连接条在所述衬底上的正投影覆盖一个所述阴极连接条在所述衬底上的正投影。
在一些实施例中，所述阳极包括第一阳极部和第二阳极部；所述第一阳极部与其所在的发光器件的有效发光区的形状大致相同，且所述第一阳极部的边界与所述阳极的边界部分重合；所述第二阳极部与所述第一阳极部电连接。所述阴极包括第一阴极部和第二阴极部；所述第一阴极部在衬底的正投影被所述第一阳极部在衬底的正投影覆盖；所述第二阴极部与所述第一阴极部电连接，且第二阴极部在衬底的正投影被第二阳极部在衬底的正投影覆盖。在所述阴极包括阴极主体部和阴极连接部的情况下，所述第一阴极部和所述第二阴极部形成所述阴极主体部，且所述阴极主体部的形状与所述阳极的形状大致相同。在所述显示面板还包括至少一个阴极连接结构的情况下，所述阴极的形状与所述阳极的形状大致相同。
在一些实施例中，所述显示面板还包括沿垂直于所述衬底且由所述衬底指向所述阳极的方向依次设置，且设置于所述衬底与所述多个阳极所在膜层之间的像素电路层、第二绝缘层、连接线层、及第三绝缘层。所述像素电路层包括多个设置于所述透光区的周边第一像素电路；所述第二绝缘层内设置有多个第二过孔；所述第三绝缘层内设置有多个第三过孔；所述连接线层包括多条连接线，每条连接线的第一端通过一个第二过孔与一个像素电路电连接，第二端通过一个第三过孔与一个阳极的第二阳极部电连接；在所述显示面板还包括透明导电层的情况下，所述透明导电层位于所述第三绝缘层远离所述衬底的一侧，所述第三过孔穿过所述透明导电层，且所述第三过孔中用于电连接所述连接线和对应的阳极的导电材料与所述透明导电层电性绝缘。
在一些实施例中，所述连接线层还包括多个垫块，每个垫块与一条所述连接线的第二端电连接，且每个垫块通过一个所述第三过孔与一个阳极的第二阳极部电连接。在所述显示面板包括多个阴极连接条的情况下，所述第三过孔和所述垫块在所述衬底上的正投影均与一个阴极连接条在所述衬底上的 正投影至少部分交叠。
在一些实施例中，所述显示面板包括多个子像素，每个子像素包括一个发光器件；所述多个子像素包括多个红色子像素、多个绿色子像素和多个蓝色子像素。绿色子像素的发光器件的阴极的第一阴极部的形状大致为圆形；红色子像素的发光器件的阴极的第一阴极部的形状大致为椭圆形。
在一些实施例中，两个绿色子像素的第一阴极部之间的最小间距，小于其他相同颜色的两个子像素的第一阴极部之间的最小间距。
在一些实施例中，红色子像素和蓝色子像素的发光器件的有效发光区沿所述第一方向交替排列；绿色子像素的发光器件的有效发光区沿所述第二方向排列。
另一方面，提供一种显示面板的制作方法，所述制作方法包括：在衬底上制作多个相互分离的遮挡图案；在所述多个遮挡图案远离所述衬底的一侧制作多个发光层；在所述多个发光层远离所述衬底的一侧制作阴极薄膜；使用激光从所述衬底远离所述阴极薄膜的一侧照射所述衬底中对应显示面板的透光区的区域，去除所述阴极薄膜的处于该区域的部分中，未被所述多个遮挡图案遮挡的部分，形成多个相互分离的阴极。每个发光层及其对应的阴极形成一个发光器件的部分，每个发光器件具有有效发光区，所述有效发光区在所述衬底上的正投影位于所述发光器件的阴极在所述衬底上的正投影范围内。
在一些实施例中，所述在衬底上制作多个相互分离的遮挡图案，所述制作方法包括：在所述衬底上制作多个相互分离的阳极。每个所述发光器件包括一个阳极，一个阳极形成一个所述遮挡图案。
在一些实施例中，所述在衬底上制作多个相互分离的遮挡图案，所述制作方法包括：在所述衬底上制作图案化的半导体层、图案化的栅极金属层和图案化的源漏金属层；在图案化所述半导体层或所述栅极金属层或所述源漏金属层的过程中形成多个所述遮挡图案；其中，所述源漏金属层相对于所述半导体层和所述栅极金属层远离所述衬底。在所述在衬底上制作多个相互分离的遮挡图案，与，所述制作多个发光层之间，所述制作方法还包括：在所述衬底上制作多个阳极；每个所述发光器件包括一个阳极。
在一些实施例中，在所述在衬底上制作多个相互分离的遮挡图案，与，所述制作多个阳极之间，所述制作方法还包括：在所述源漏金属层远离所述衬底的一侧制作透明导电层；在所述透明导电层远离所述衬底的一侧制作第一绝缘层；在所述第一绝缘层中制作多个第一过孔。其中，每个第一过孔在 所述衬底上的正投影与所述阳极在所述衬底上的正投影之间具有间隙，且每个第一过孔在所述衬底上的正投影位于所述遮挡图案在所述衬底上的正投影范围内。
在一些实施例中，在图案化所述半导体层或所述栅极金属层或所述源漏金属层的过程中形成多个遮挡连接结构。所述多个遮挡连接结构与所述遮挡图案位于同一膜层；每个遮挡连接结构在第一方向上的尺寸大于其在第二方向上的尺寸；所述第一方向为显示面板的多个子像素排列的行方向，所述第二方向为显示面板的多个子像素排列的列方向。每个所述遮挡连接结构与两个所述遮挡图案连接；所述多个遮挡连接结构排列成多行，每行包括沿所述第一方向依次排列的多个所述遮挡连接结构；每行遮挡连接结构，及该行中的多个遮挡连接结构所连接的多个遮挡图案的部分，形成一个遮挡连接条。
在一些实施例中，在所述使用激光从所述衬底远离所述阴极薄膜的一侧照射所述衬底中对应显示面板的透光区的区域之前，所述制作方法还包括：在所述衬底远离所述阴极薄膜的一侧设置掩膜板。其中，所述掩膜板包括至少一条挡光线，每条所述挡光线在所述衬底上的正投影与至少两个阳极在所述衬底上的正投影连接。
又一方面，提供一种显示装置，所述显示装置包括显示面板和功能器件，显示面板为上述任一实施例中的显示面板。功能器件设置于所述显示面板的背侧，且位于所述显示面板的透光区。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为根据一些实施例的显示面板的俯视图；
图2为图1中沿剖面线A-A的剖视图；
图3为图1中沿剖面线B-B的剖视图；
图4为图1中区域M的放大图；
图5为图4中沿剖面线C-C的剖视图；
图6A为根据一些实施例的透光区的阴极的一种俯视图；
图6B为根据一些实施例的透光区的阳极的一种俯视图；
图6C为图6A中沿剖面线D-D的剖视图；
图7A为根据一些实施例的透光区的阴极的另一种俯视图；
图7B为根据一些实施例的透光区的阳极的另一种俯视图；
图7C为根据一些实施例的遮挡图案的一种俯视图；
图8A为图6A中沿剖面线E＇-E＇至E〞-E〞的一种剖视图；
图8B为图6A中沿剖面线E＇-E＇至E〞-E〞的另一种剖视图；
图8C为图6A中沿剖面线E＇-E＇至E〞-E〞的又一种剖视图；
图8D为图6A中沿剖面线E＇-E＇至E〞-E〞的又一种剖视图；
图9为根据一些实施例的透光区的阴极的又一种俯视图；
图10A为根据一些实施例的遮挡图案的另一种俯视图；
图10B为根据一些实施例的掩膜板的示意图；
图11A为根据一些实施例的遮挡图案的又一种俯视图；
图11B为图9中沿剖面线F-F的剖视图；
图11C为图9中沿剖面线G-G的一种剖视图；
图11D为图9中沿剖面线G-G的另一种剖视图；
图12为根据一些实施例的阴极薄膜对不同波长的光线的透过率曲线图；
图13为根据一些实施例的不同厚度的银层对不同波长的光线的透过率曲线图；
图14为根据一些实施例的阳极和阴极的边界的电镜图；
图15为根据一些实施例的显示面板的制作方法的一种流程图；
图16为根据一些实施例的显示面板的制作方法的另一种流程图；
图17为根据一些实施例的显示面板的制作方法的又一种流程图；
图18为根据一些实施例的显示面板的一种制作步骤的示意图；
图19为根据一些实施例的显示面板的另一种制作步骤的示意图；
图20为根据一些实施例的显示面板的又一种制作步骤的示意图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)” 和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“连接”、“电连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接或间接物理接触。又如，描述一些实施例时可能使用了术语“电连接”以表明两个或两个以上部件有直接或间接电接触。
如本文所使用的那样，“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
本文参阅作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
在本文中，使用了“A在衬底上的正投影覆盖B在衬底上的正投影”这样的表述，其是指A在衬底上的正投影与B在衬底上的正投影的边界重合，或者，A在衬底上的正投影与B在衬底上的正投影的边界至少部分不重合，且B在衬底上的正投影位于A在衬底上的正投影范围之内。
在本文中，使用了“同层设置”这样的表述，其是指利用同一掩模板通过一次构图工艺形成具有特定图形的膜层。根据特定图形的不同，一次构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可 以是连续的也可以是不连续的，这些特定图形还可能处于不同的高度或者具有不同的厚度。
如图1所示，本公开的一些实施例提供了一种显示装置100，显示装置100可以为电视机、显示器、笔记本电脑、平板电脑、手机、导航仪等任何具有显示功能的产品或者部件。
显示装置100采用在屏幕背侧设置功能器件的技术，功能器件例如为前置摄像头组件、屏下指纹组件、3D人脸识别组件、虹膜识别组件、近距离传感器等可以实现特定功能的器件。例如，在屏幕背侧设置前置摄像头组件的情况下，显示装置100即采用了屏下摄像头技术。
参阅图1，显示装置100包括显示面板110，显示面板110具有显示区10，显示区10包括透光区101和位于透光区101周边的主显示区102。
主显示区102中设置有多个子像素，起主要进行画面显示的作用。
透光区101中也设置有多个子像素，以使透光区101能够参与图像显示，且透光区101能够透过光线。透光区101在显示区10中的位置并不唯一，例如可以设置在显示区310的上部中间位置(参阅图1)，或者设置在显示区10上部左侧或右侧，还可以设置在显示区10下部的中间位置，等等。
参阅图2，功能器件120设置在显示面板110的透光区101的背侧。示例性的，透光区101的背侧设置前置摄像头组件。在显示面板110显示画面时，透光区101与主显示区102都能够显示画面，在前置摄像头组件拍摄图像时，外界光线能够穿过透光区101到前置摄像头组件上。
在一些实施例中，显示面板110还可具有周边区20，周边区20可围绕显示区10(参阅图1)，也可仅存在于显示区10的一侧或多侧。周边区20中也可设置子像素，以使周边区也具有显示的功能，从而使显示面板110的屏占比接近或达到100％。
在一些实施例中，显示面板110可以为有机发光二极管(Organic Light-Emitting Diode，简称OLED)显示面板。参阅图3，图3为图1中主显示区102内的一个子像素的剖视图；显示面板110包括衬底11、设置于衬底11上的子像素30，以及用于封装子像素30的封装层40。参阅图3，上述显示面板110的每个子像素30包括设置在衬底11上的像素电路301和发光器件302。
在一些实施例中，参阅图3，像素电路301包括多个薄膜晶体管TFT和至少一个存储电容Cst，其中，薄膜晶体管TFT包括设置在衬底11上的有源层12、栅极13、源极14、以及漏极15；存储电容Cst包括相对设置第一电极 16和第二电极17。
有源层12所在的膜层为半导体层210。栅极13和第一电极16材料相同且同层设置，二者所在的膜层称为第一栅极金属层221，第二电极17所在的膜层可称为第二栅极金属层222，即显示面板110可包括两层栅极金属层220。源极14和漏极15所在的膜层称为第一源漏金属层231。
其中，半导体层210与第一栅极金属层221之间设有栅极绝缘层18；第一栅极金属层221与第二栅极金属层222之间设有第一层间绝缘层19；第二栅极金属层222与第一源漏金属层231之间设有第二层间绝缘层21。
此外，第一源漏金属层231远离衬底11的一侧设有钝化层22和平坦层23。
薄膜晶体管TFT的源极14和漏极15中的一者与发光器件302电连接，以向发光器件302传输电压信号，驱动发光器件302发光。薄膜晶体管TFT的源极14或漏极15可以直接或间接与发光器件302电连接。例如，如图3所示，显示面板110还包括设置于平坦层23远离衬底11一侧的另一层源漏金属层，可称为第二源漏金属层232，第二源漏金属层232中设置有连接电极24，薄膜晶体管TFT的漏极15通过连接电极24与发光器件302电连接。在这种情况下，显示面板110包括两层源漏金属层230。
参阅图3，发光器件302位于像素电路301所在膜层远离衬底11的一侧，包括阳极25、发光层26以及阴极薄膜27。在显示面板110包括两层源漏金属层230的情况下，阳极25与第二源漏金属层232之间设有至少一层绝缘层28，阳极25通过设置于所述至少一层绝缘层28中的过孔与连接电极24电连接。
参阅图3，显示面板还包括像素界定层29，像素界定层29包括多个开口区，一个发光器件302与一个开口区相对应，其发光层26至少部分设置在对应的开口区中。
在一些实施例中，发光器件302还包括电子传输层(election transporting layer，简称ETL)、电子注入层(election injection layer，简称EIL)、空穴传输层(hole transporting layer，简称HTL)以及空穴注入层(hole injection layer，简称HIL)中的一层或多层。
显示面板110可以是顶发射型显示面板，在此情况下，靠近衬底11的阳极25不透明，远离衬底11的阴极薄膜27透明或半透明；显示面板110也可以是底发射型显示面板，在此情况下，靠近衬底11的阳极25透明或半透明，远离衬底11的阴极薄膜27不透明；显示面板110也可以为双面发光型显示 面板，在此情况下，靠近衬底11的阳极25和远离衬底11的阴极薄膜27均透明或半透明。
为了提高设置在显示面板110的透光区101背侧的功能器件120的灵敏度，需要保证功能器件120能够接收到足够量的光线，因此就需要提升透光区101的光线透过率。
在一些实施例中，减小透光区101的分辨率，即减小透光区101的子像素30分布密度，可以提升透光区101的光线透过率。
在另一些实施例中，对于OLED显示面板而言，阴极薄膜27通常为整层设计，阴极薄膜27虽然能够透过可见光，但是其对可见光的透过率较低。因此，可以对显示面板110上，位于透光区101内的阴极薄膜27进行图案化处理，提升透光区101的透光率。
相关技术中，采用掩膜板配合气相沉积的工艺，对透光区的阴极薄膜进行图案化处理。但是，由于定位误差、测量误差、以及制程精度的影响，相关技术中，对阴极薄膜进行图案化的精度较低。
本公开的一些实施例提供一种显示面板110，参阅图6C，显示面板110包括衬底11、多个遮挡图案31和发光器件302。多个遮挡图案31设置在衬底11上，且位于透光区101内。
参阅图6B，多个遮挡图案31在衬底11上的正投影相互分离。
参阅参阅图6A和图6C，多个发光器件302设置于透光区101，并设置于衬底11上；每个发光器件302包括发光层26及位于发光层26远离衬底11一侧的阴极32。每个发光器件302具有有效发光区261，有效发光区261在衬底11上的正投影位于发光器件302的阴极32在衬底11上的正投影范围内。
参阅图6A，多个发光器件302的多个阴极32在衬底11上的正投影相互分离；参阅图6C，多个发光器件302的多个阴极32位于多个遮挡图案31远离衬底11的一侧；一个阴极32与一个遮挡图案31相对应，且每个遮挡图案31在衬底11上的正投影覆盖与其对应的阴极32在衬底11上的正投影。
参阅图图6A～图6C，在制作显示面板110的过程中，先在衬底11上制作多个相互分离的遮挡图案31；然后在多个遮挡图案31远离衬底11的一侧制作发光层26和阴极薄膜27；使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域，去除阴极薄膜27的处于该区域的部分中，未被多个遮挡图案31遮挡的部分，形成多个相互分离的阴极32。
相较于采用掩膜板配合气相沉积的方式，对阴极薄膜进行图案化处理， 本公开实施例的显示面板110，激光从衬底11远离阴极薄膜27的一侧照射衬底11，在此过程中，部分激光被多个遮挡图案31遮挡；未被多个遮挡图案31遮挡的激光照射到阴极薄膜27上，去除阴极薄膜27上被激光照射到的部分，保留未被激光照射到的部分，形成多个独立的阴极32。基于光沿直线传播的原理，阴极32在衬底11上的正投影形状，与遮挡图案31在衬底11上的正投影形状大致相同，且遮挡图案31在衬底11上的正投影覆盖阴极32在衬底11上的正投影。
遮挡图案31可以通过气相沉积、刻蚀等工艺进行图案化处理，其图案化的制作精度较高，可以通过控制多个遮挡图案31的位置、形状和大小，控制多个阴极32形成的图案，从而提升对阴极薄膜27进行图案化处理的精度，尽可能多的去除不需要的阴极材料，提升阴极薄膜27的开口率，进而提升多个阴极32所在膜层对可见光的透过率。
在一些实施例中，阴极32对可见光的透过率大于对红外光的透过率。阴极32位于发光层26远离衬底11的一侧，发光层26发的光需要穿过阴极32射出。若采用可见光波段的激光照射阴极薄膜27，部分激光会穿过阴极薄膜27射出，其激光去除阴极薄膜27的效率较低。因此，可以使用红外光波段的激光照射衬底11上对应显示面板110的透光区101的区域，提升对阴极薄膜27进行图案化处理的效率。阴极32对可见光的透过率大于对红外光的透过率，使阴极32能够穿过至少部分可见光，用于显示画面，且能够吸收至少部分红外光，使得阴极薄膜27被红外光波段的激光照射的部分能够被去除。
在一些实施例中，遮挡图案31对红外光的透过率小于或等于2％，例如为2％、1.5％、1％、0.5％、0％，这样使用红外光波段的激光照射衬底11中对应显示面板110的透光区101的区域时，遮挡图案31能吸收大部分或全部红外光，减少穿过遮挡图案31的红外光波段的激光，避免红外光直接照射到阴极薄膜27上被遮挡图案31遮挡的部分。
在一些实施例中，阴极薄膜27的材料包括镁银合金，一方面，镁银合金可以透过可见光，显示面板显示图像时，光线可以从多个阴极32射出；另一方面，镁银合金可以吸收红外光，红外光照射到由镁银合金制作的阴极薄膜27上，可以将未被遮挡图案31遮挡的部分去除。
参阅图12，图12示出了在阴极薄膜27的厚度为13纳米的情况下，阴极薄膜27对不同波长的光线的透过率曲线。在一些示例中，可以采用波长为900毫米的红外光，此时，阴极薄膜27的透过率大约为29％；还可以采用波长为940毫米的红外光，此时，阴极薄膜27的透过率大约为27.2％；还可以 采用波长为960毫米的红外光，此时，阴极薄膜27的透过率大约为26.1％。需要理解是，还可以采用其他波长的红外光，在此不再一一列举。
在一些实施例中，参阅图6C，每个发光器件302还包括阳极25，阳极25位于发光层26靠近衬底11的一侧；一个阳极25形成一个遮挡图案31。在阳极25材料为不透光的金属的情况下，阳极25可以吸收红外光。可以将阳极25设置成遮挡图案31，这样显示面板110的膜层结构简单，不需要引入新的膜层，制作成本较低。
在一个阳极25形成一个遮挡图案31的情况下，示例性的，阳极25的厚度为100纳米，且阳极25的材料不透光；或者；阳极25的材料在厚度为100纳米的情况下，红外透光率小于或等于2％。
示例性的，参照图6A和图6B，基于光沿直线传播的原理，阴极32在衬底11上的正投影和与之对应的阳极25在衬底11上的正投影形状大致相同，大小大致相等，且一个阳极25在衬底11上的正投影覆盖与其相对的阴极32在衬底11上的正投影。
参照图6C，作为示意，阴极32的边界在衬底11上的正投影与阳极25的边界在衬底11上的正投影重合。然而，在一些实施例中，在激光照射到阳极25的过程中，激光会可能产生衍射现象，基于此，参阅图14，图14为阳极25做遮挡图案31时，阳极25的边界和阴极32边界的微观电镜图，阳极25在衬底11上的正投影的边界超出阴极32在衬底11上的正投影的边界一定距离D4，即阴极32的边界在衬底11上的正投影的边界位于阳极25在衬底11上的正投影的边界内侧，也即阳极25在衬底11上的正投影面积，大于与其相对的阴极32在衬底11上的正投影面积。
在一些实施例中，参阅图8A，每个发光器件302包括阳极25，阳极25位于发光层26靠近衬底11的一侧。多个遮挡图案31位于多个发光器件302的多个阳极25靠近衬底11的一侧；一个遮挡图案31与一个阳极25相对应，且遮挡图案31在衬底11上的正投影与其对应的阳极25在衬底11上的正投影至少部分重叠。
例如，遮挡图案31在衬底11上的正投影与其对应的阳极25在衬底11上的正投影部分重叠，即遮挡图案31在衬底11上的正投影覆盖部分阳极25在衬底11上的正投影，这种情况下，遮挡图案31和阳极25共同确定阴极32的形状，且遮挡图案31能够起到部分保护阳极25的作用。
又例如，遮挡图案31在衬底11上的正投影与其对应的阳极25在衬底11上的正投影完全重叠，即遮挡图案31在衬底11上的正投影完全覆盖阳极25 在衬底11上的正投影，这种情况下，由遮挡图案31确定阴极32的形状，遮挡图案31可以完全保护阳极25。
在阳极25的材料为透明材料或半透明材料，且阳极25的材料能够透过红外光的情况下，或者，在红外光波段的激光存在损伤阳极25的风险的情况下，将多个遮挡图案31设置于多个阳极25靠近衬底11的一侧，且一个遮挡图案31与一个阳极25相对应，遮挡图案31可以对阳极25进行保护。
红外光具有光能量，膜层吸收红外光后，温度会升高。阳极25是构成发光器件302的一部分，阳极25温度升高有可能会对阳极25造成损伤。遮挡图案31能够降低阳极25由于温度升高，出现损伤的风险，提升显示面板110制作工艺的安全性和成品率。
在一些实施例中，参阅图3，显示面板110还包括半导体层210、栅极金属层220和源漏金属层230。半导体层210位于衬底11与多个阳极25之间；栅极金属层220位于衬底11与多个阳极25之间；源漏金属层230相对于半导体层和栅极金属层220远离衬底11，且位于多个阳极25靠近衬底11的一侧。遮挡图案31位于半导体层210或栅极金属层220或源漏金属层230。
需要说明的是，栅极金属层220可以位于半导体层210远离或靠近衬底11的一侧。在栅极金属层220位于半导体层210远离衬底11的一侧的情况下，像素电路的薄膜晶体管的栅极13位于有源层12远离衬底11的一侧，此时薄膜晶体管为顶栅结构；在栅极金属层220位于半导体层210靠近衬底11的一侧的情况下，像素电路的薄膜晶体管的栅极13位于有源层12靠近衬底11的一侧，此时薄膜晶体管为底栅结构。
在上述实施例中，通过将遮挡图案31设置于半导体层210或栅极金属层220或源漏金属层230中，可以不需要在显示面板110增加额外的膜层，从而不影响显示面板110的厚度，且无需增加额外的工艺步骤。
其中，在显示面板110包括两层栅极金属层220的情况下，遮挡图案31可以设置在这两层栅极金属层220中任一；在显示面板110包括两层源漏金属层230的情况下，遮挡图案31可以设置在这两层源漏金属层230中任一中。
示例性的，参阅图8A，遮挡图案31位于薄膜晶体管的源极14和漏极15所在的第一源漏金属层231。示例性的，参阅图8B，遮挡图案31位于薄膜晶体管的栅极13所在的第一栅极金属层221。示例性的，参阅图8C，遮挡图案31位于半导体层210。
此外，如图8A～图8C所示，可以将多个遮挡图案31中的全部遮挡图案均设置于半导体层210、栅极金属层220和源漏金属层230中的同一膜层中。 也可以将多个遮挡图案31分别设置于半导体层210、栅极金属层220和源漏金属层230中的至少两层膜层中，还可以在同一发光器件302的下方设置两层或两层以上遮挡图案31，以利用多层遮挡图案31达到对发光器件302的阳极25的更好地保护效果。示例性的，参阅图8D，每个阳极25靠近衬底11的一侧设置两层遮挡图案31，两层遮挡图案31中的一层位于位于半导体层210，另一层位于第一栅极金属层221。
在遮挡图案31位于半导体层210或栅极金属层220或源漏金属层230的情况下，遮挡图案31的材料可以与其所在膜层的金属材料相同。示例性的，遮挡图案31位于源漏金属层230的情况下，遮挡图案31的材料可以与源漏金属层230的材料相同，这种情况下，可以在制作图案化的源漏金属层230的过程中，形成多个遮挡图案31，不需要增设额外的工艺，简化显示面板的制作流程，降低显示面板的生产成本。
在一些实施例中，遮挡图案31对可见光的透过率大于对红外光的透过率，这样可以利用遮挡图案31遮挡红外激光，避免阳极25受到红外激光照射而被损伤。示例性的，遮挡图案31对对红外光的透过率小于或等于2％，例如为2％、1.5％、1％、0.5％、0％，以阻挡绝大部分或全部红外激光。
在一些实施例中，遮挡图案31的厚度大于阴极32的厚度。由于遮挡图案31和阴极32均对可见光的透过率大于对红外光的透过率，因此若二者采用相同或相近的材料时，使遮挡图案31的厚度大于阴极32的厚度，可以在采用红外光波段的激光照射衬底11上对应显示面板110的透光区101的区域时，在保证阴极薄膜27上被红外光照射到的部分可以被去除的前提下，保证遮挡图案31在红外光照射下，不会融化成液态，也不会蒸发成气态。
在前文中提到，在激光照射到遮挡图案31的过程中，激光产生衍射会使遮挡图案31在衬底11上的正投影的边界超出阴极32在衬底11上的正投影的边界。在显示面板110的使用过程中，可见光从显示面板110的出光侧射入透光区101的过程中，部分可见光会射到遮挡图案31的超出阴极32边界的部分，降低透光区101对可见光的透过率。
基于此，在一些实施例中，遮挡图案31的材料包括银，银可以吸收红外光，且能够透过可见光。在采用红外光波段的激光图案化透光区的阴极薄膜的过程中，遮挡图案31能够吸收红外光，从而可挡住照射至阳极的红外光。在显示面板110的使用过程中，可见光从显示面板110的出光侧射入透光区101，照射到遮挡图案31的超出阴极32边界的部分的可见光能够穿过遮挡图案31，从而减小遮挡图案31的超出阴极32边界的部分对可见光的遮挡的影 响。需要说明的是，遮挡图案31的材料不仅限于银，遮挡图案31的材料还可以是其他对可见光透过率大于对红外光透过率的材料。此外，在遮挡图案31的材料包括银的情况下，阴极32的材料可包括镁银合金。
在遮挡图案31的材料包括银的情况下，可以通过控制遮挡图案31的厚度，控制其对红外光的透过率。参阅图13，图13为不同厚度的银层对不同波长的光线的透光率的示意图；示例性的，若采用波长为920纳米的红外光，银层的厚度为20纳米时的透过率大约为7.992％，银层的厚度为25纳米时的透过率大约为4.169％，银层的厚度为30纳米时的透过率大约为2.773％。因此，在采用波长为920纳米的红外光作为激光源时，可以采用30纳米厚或者厚度大于30纳米的银作为遮挡图案31；比如，可以采用35纳米、38纳米、45纳米。
由于每个子像素30的发光器件302的阴极32所需要的电压是相同的，因此透光区101的相互分离的阴极32之间需要相互连通。将多个相互分离的阴极32互相连接的方式有多种，例如，可以通过设置透明导电层，将多个相互分离的阴极32均与透明导电层连通。又例如，可以在多个相互分离的阴极32之间设置阴极连接结构将多个相互分离的阴极32电连接。
对于通过设置透明导电层将多个相互分离的阴极32连通的方式，在一些实施例中，参阅图7A，阴极32包括阴极主体部321和阴极连接部322。参阅图8A，阳极25在衬底11上的正投影覆盖阴极主体部321在衬底11上的正投影；阴极连接部322与阴极主体部321电连接(参阅图7A)，且阴极连接部322在衬底11上的正投影，与阳极25在衬底11上的正投影不重叠(参阅图8A)。
参阅图8A，显示面板110还包括透明导电层33和第一绝缘层281。透明导电层33位于遮挡图案31所在膜层与多个阳极25之间；第一绝缘层281位于透明导电层33与多个阴极32之间。第一绝缘层281内设置有多个第一过孔34，每个第一过孔34在衬底11上的正投影与阳极25在衬底11上的正投影之间具有间隙；每个第一过孔34在衬底11上的正投影位于阴极连接部322在衬底11上的正投影范围内，每个阴极32通过至少一个第一过孔34与透明导电层33电连接。示例性的，参阅图8A，每个阴极32可以通过一个第一过孔34与透明导电层33电连接。示例性的，透明导电层33的材料可以为掺锡氧化铟(英文：Indium Tin Oxide；简称：ITO)。
这样，通过在阴极32中设置相对于阳极25的边界伸出的阴极连接部322，并在阴极32和透明导电层33之间的第一绝缘层281设置第一过孔34，使阴 极连接部322通过第一过孔34与透明导电层33实现电连接；并且，由于第一过孔34在衬底11上的正投影与阳极25在衬底11上的正投影之间具有间隙，因此使得第一过孔34与阳极25具有避让间隔，从而阴极32能够与阳极25保持电性绝缘，防止阴极32与阳极25之间短路。
参阅图7C，为了形成包括阴极主体部321和阴极连接部322的阴极32，与阴极32相对应的，遮挡图案31包括遮挡图案主体部311和遮挡图案连接部312。参阅图8A，遮挡图案主体部311在衬底11上的正投影覆盖阴极主体部231在衬底11上的正投影；遮挡图案连接部312与遮挡图案主体部311连接(参阅图7C)，且遮挡图案连接部312在衬底11上的正投影覆盖阴极连接部321在衬底11上的正投影(参阅图8A)，以便于形成具有上述结构的阴极32。基于光沿直线传播的原理，阴极32在衬底11上的正投影，和与其相对的遮挡图案31在衬底11上的正投影形状大致相同、大小大致相等。
在上述实施例中，透光区101内多个分离设置的阴极32通过透明导电层33电连接，透明导电层33可以直接与设置在显示区10周围的用于传输阴极电压信号的信号线电连接，也可以与主显示区102内的阴极薄膜27电连接，以获取阴极电压信号，并将阴极电压信号传输给每个阴极32。
需要说明的是，透明导电层33与多个阴极32之间除了包括第一绝缘层281外，还包括像素界定层29，因此第一过孔34除了贯通第一绝缘层281外，还需要贯通像素界定层29，以使阴极32能够通过第一过孔34与透明导电层33电连接。
对于通过设置阴极连接结构将多个相互分离的阴极连通的方式，在一些实施例中，参阅图9，显示面板110还包括至少一个阴极连接结构35，所述至少一个阴极连接结构35与阴极32材料相同且同层设置。阴极连接结构35在第一方向L1上的尺寸大于其在第二方向L2上的尺寸；每个阴极连接结构35与相邻两个阴极32电连接。其中，第一方向为显示面板110的多个子像素30排列的行方向，即图9中的直线L1所示的方向；第二方向为显示面板110的多个子像素30排列的列方向，即图9中的直线L2所示的方向。
在上述实施例中，多个相互分离的阴极32通过阴极连接结构35电连接，阴极连接结构35在第一方向L1上的尺寸大于其在第二方向L2上的尺寸，阴极连接结构35连接沿第一方向L1相邻的两个阴极32。示例性的，阴极连接结构35可以直接与设置在显示区10周围的用于传输阴极电压信号的信号线电连接，也可以与主显示区102内的阴极薄膜27电连接，以获取阴极电压信号，并将阴极电压信号传输给每个阴极32。
阴极连接结构35与阴极32材料相同，且阴极连接结构35与阴极32同层设置，这样阴极连接结构35可以与阴极32一起制作，例如在使用红外光照射阴极薄膜27，对阴极薄膜27对应显示面板100的透光区101的区域进行图像化处理时，同时形成阴极32和阴极连接结构35。
示例性的，参阅图9，显示面板110包括排列成多行的多个阴极连接结构35，每行包括沿第一方向L1依次排列的多个阴极连接结构35。每行阴极连接结构35，及该行中的多个阴极连接结构35所连接的多个阴极32的部分，形成一个阴极连接条50；阴极连接条50在第二方向上具有与阴极连接结构35大致相等的尺寸。
例如，每行的多个阴极连接结构35大致位于一条直线上。
又如，阴极连接条50在第二方向L2上的相对两侧中的至少一侧设置有多个阴极32，多个阴极32均连接至阴极连接条50。
又如，同行的多个阴极32中，任意两个相邻的阴极32之间通过一个阴极连接结构35电连接；且同行的多个阴极32的至少部分位于同一直线上，同行的多个阴极连接结构35位于同一直线上。
通过上述设置，有利于减小多个阴极连接结构35的总长度，进而减小多个阴极连接结构35在衬底11上的投影面积，降低阴极连接结构35对多个阴极32所在膜层的透光率的影响。
形成阴极连接结构35的方式有多种。例如，可以在显示面板110上设置与阴极连接结构35形状相同的遮挡连接结构36形成阴极连接结构；又例如，可以通过在衬底11远离阴极薄膜27的一侧设置掩膜板200，利用掩膜板200形成阴极连接结构35。
对于利用与阴极连接结构35形状相同的遮挡连接结构36形成阴极连接结构35的方式，在一些实施例中，参阅图11A，显示面板110还包括至少一个遮挡连接结构36，至少一个遮挡连接结构36与多个遮挡图案31材料相同且同层设置。参照图11D，一个遮挡连接结构36与一个阴极连接结构35相对应，遮挡连接结构36在衬底11上的正投影覆盖与其相对应的阴极连接结构35在衬底11上的正投影。参阅图11B，一个遮挡图案31与一个阴极32相对应，遮挡图案31在衬底11上的正投影覆盖阴极32在衬底11上的正投影。遮挡连接结构36的材料与遮挡图案31的材料相同，且遮挡连接结构36与遮挡图案31同层设置，可以在制作图案化的遮挡图案31的同时制作遮挡连接结构36，不需要增加额外的工艺流程和膜层，有利于降低显示面板的制作成本。
例如，遮挡连接结构36和遮挡图案31可以均位于半导体层210，或者均位于栅极金属层220，或者均位于源漏金属层230；栅极金属层220包括两层栅极金属层220时，遮挡连接结构36和遮挡图案31可以位于两层栅极金属层220中的任一；源漏金属层230包括两层源漏金属层230时，遮挡连接结构36和遮挡图案31可以位于两层源漏金属层230中的任一。
在一些实施例中，遮挡连接结构36也可以与遮挡图案31设置于不同的膜层。示例性的，可以将至少一个遮挡连接结构36设置于遮挡图案31所在膜层与多个阳极25之间，或者，将至少一个遮挡连接结构36设置在衬底11与遮挡图案31所在膜层之间。示例性的，在显示面板110以阳极23作为遮挡图案31的情况下，可以将至少一个遮挡连接结构36设置在衬底11与阳极25之间。
在显示面板110包括多个阴极连接条50的情况下，显示面板110包括排列成多行的多个遮挡连接结构36，每行包括沿第一方向L1依次排列的多个遮挡连接结构36。参阅图11A，每行遮挡连接结构36，及该行中的多个遮挡连接结构36所连接的多个遮挡图案31的部分，形成一个遮挡连接条60；参阅图11D，一个遮挡连接条60在衬底11上的正投影覆盖一个阴极连接条50在衬底11上的正投影。
对于利用掩膜板200形成阴极连接结构35的方式，参阅图9和图10A，遮挡图案31的形状与阴极32的形状大致相同；参阅图10B，掩膜板200包括至少一条遮光线210。每条挡光线210在衬底11上的正投影与至少两个阳极25在衬底11上的正投影连接。每条挡光线210在衬底11上的正投影覆盖一条阴极连接条50在衬底11上的正投影。
在一些实施例中，参阅图7B，阳极25包括第一阳极部251和第二阳极部252；第一阳极部251与其所在的发光器件302的有效发光区261的形状大致相同，且第一阳极部251的边界与阳极25的边界部分重合。第二阳极部252与第一阳极部251电连接，第二阳极部252的一端与第一阳极部251电连接，另一端用于与薄膜晶体管电连接。
在一些实施例中，参阅图7A，阴极32包括第一阴极部323和第二阴极部324，第二阴极部322与第一阴极部321电连接；参阅图8A，第一阴极部321在衬底11的正投影被第一阳极部251在衬底11的正投影覆盖；且第二阴极部322在衬底11的正投影被第二阳极部252在衬底11的正投影覆盖。
参阅图7A，在阴极32包括阴极主体部321和阴极连接部322的情况下，第一阴极部323和第二阴极部324形成阴极主体部321，参照图7A和图7B， 且阴极主体部321的形状与阳极25的形状大致相同。
参阅图9和图7B，在显示面板110还包括至少一个阴极连接结构35的情况下，阴极32的形状与阳极25的形状大致相同。
在一些实施例中，参阅图4，将透光区101内的子像素30的像素电路设在透光区101的周边，可以提升透光区101的光线透过率。
为了区分透光区101内的子像素30的像素电路301和主显示区102内的子像素30的像素电路301，将透光区101内的子像素30的像素电路称为第一像素电路3011(参见图4)，将主显示区102内的子像素30的像素电路301称为第二像素电路3012(参见图3)。在上述实施例中，将透光区101内的子像素30的第一像素电路3011设在透光区101的周边，利用连接线37(参见图4中的371、372、373)将透光区101内的每个发光器件302与一个第一像素电路3011电连接。
由于透光区101内的子像素30的数量为多个，因此需要多条连接线37，称连接线37的膜层为连接线层240(参见图5)，所述多条连接线37可以设置于同一连接线层240中，也可以设置于不同的连接线层240中，以为所述多条连接线37提供足够的布线空间。
例如，所述多条连接线37包括分别位于三层连接线层240中的第一连接线371、第二连接线372和第三连接线373，第一连接线371、第二连接线372和第三连接线373分别用于将透光区101中不同区域的发光器件302与相应的第一像素电路3011电连接。
基于上述设计，示例性的，参阅图5，显示面板110的透光区10及其周边区域的剖面结构如下：显示面板110包括沿垂直于衬底11且由衬底11指向阳极25的方向依次设置，且设置于衬底11与多个阳极25所在膜层之间的像素电路层70、第二绝缘层282、连接线层240、及第三绝缘层283。像素电路层70包括半导体层210、栅极绝缘层18、第一栅极金属层221、第一层间绝缘层19、第二栅极金属层222、第二层间绝缘层21、第一源漏金属层231、钝化层22、平坦层23以及第二源漏金属层232。
像素电路层70包括多个第一像素电路3011，多个第一像素电路3011设置于透光区101的周边。第二绝缘层282内设置有多个第二过孔38；第三绝缘层283内设置有多个第三过孔39。连接线层240中的连接线37的第一端至少穿过一个第二过孔38与一个第一像素电路3011电连接，第二端至少穿过一个第三过孔39与一个阳极25的第二连接部252电连接。
以显示面板110包括三层连接线层240为例，参阅图4和图5，沿垂直于 衬底11的方向，且由衬底11指向阳极的方向，三层连接线层240依次为第一连接线层、第二连接线层和第三连接线层。其中，第一连接线层包括多条第一连接线371，第二连接线层包括多条第一连接线372，第三连接线层包括多条第一连接线373。第一连接线层与第二连接线层之间设有第四绝缘层284，第二连接线层与第三连接线层之间设有第五绝缘层285。
请继续参见图5，对于第二连接线372，第二过孔38除了贯通第二绝缘层282，还贯通第四绝缘层284，以使第二连接线372穿过第二过孔38与第一像素电路301电连接；第三过孔39除了贯通第三绝缘层283，还贯通第五绝缘层285，以使第二连接线372穿过第三过孔39与阳极25电连接。
示例性的，参阅图8A，在显示面板110还包括透明导电层33的情况下，透明导电层33位于第三绝缘层283远离衬底11的一侧；在显示面板110包括三层连接线层240的情况下，透明导电层33位于第五绝缘层285远离衬底11的一侧；这样便于多个阴极32与透明导电层33进行电连接。透明导电层33还可以设置于阳极25下方的任意位置，本公开中不限于此。
示例性的，用于连接阴极连接部322和透明导电层33的第一过孔34在衬底11上的正投影，与用于连接第二阳极部252和连接线37的第三过孔39在衬底11上的正投影不重叠，以使阴极32和阳极25保持电性绝缘。
如图8A所示，连接线层240还包括多个垫块41，每个垫块41与一条连接线37的第二端电连接，且每个垫块41通过一个第三过孔39与一个阳极25的第二阳极部252电连接。在显示面板110包括多个阴极连接条50的情况下，第三过孔39和垫块41在衬底11上的正投影均与一个阴极连接条50在衬底11上的正投影至少部分交叠，使第二阳极部252能够通过第三过孔39与垫块41电连接，进而使阳极25与连接线37电连接。
在显示面板110包括多层连接线层240的情况下，对于需要通过连接线进行电连接的第一像素电路3011和发光器件302的阳极25而言，除了在设置连接线37的连接线层240中设置垫块41外，还可在其他连接线层的相应位置设置辅助垫块42，通过连接线37、垫块41和辅助垫块42实现第一像素电路3011与相应的发光器件302的阳极25电连接。
请继续参见图8A，以显示面板110包括三层连接线层240，用于电连接第一像素电路3011和发光器件302的阳极25连接线37位于三层连接线层240中最靠近衬底11的连接线层为例，即连接线37为处于第一连接线层的第一连接线371(参阅图4)，可在第一连接线层设置于与第一连接线371电连接的垫块41，除此之外，还在第二连接线层和第三连接线层中分别设置辅助垫 块42。这样，第一像素电路3011可依次通过连接线37、垫块41和两个辅助垫块42与阳极25电连接。
在上述实施例中，通过垫块41与辅助垫块42的转接作用，可以避免第一像素电路3011和发光器件302的阳极25之间连接过孔深度过深，提高了阳极25与第一像素电路3011电连接的可靠性。
示例性的，辅助垫块42在衬底11上的正投影与其对应的垫块41在衬底11上的正投影至少部分重叠，例如完全重叠，这样可以尽量缩小垫块41和辅助垫块42的占用面积。此外，沿垂直于衬底11的方向，用于电连接相邻的两个导电块(包括垫块41和辅助垫块)的各过孔(参见图8A中的过孔43、44)可交错布置，这样可以避免在垂直于衬底11的方向上相邻的两个过孔在衬底11上的正投影交叠，进一步提高电连接的可靠性。
例如，继续参阅图8A，以显示面板110包括三层连接线层240，用于电连接第一像素电路3011和发光器件302的阳极25连接线37位于三层连接线层240中最靠近衬底11的连接线层为例，垫块41远离衬底11的一侧设置有两个辅助垫块42，垫块41与相邻的辅助垫块42之间通过第四过孔43连接；相邻两个辅助垫块42之间通过第五过孔44连接；第二阳极部252通过第三过孔39与远离垫块41的辅助垫块42连接。第三过孔39在衬底11上的正投影与第五过孔44在衬底11上的正投影不重叠，第五过孔44在衬底11上的正投影与第四过孔43在衬底上的正投影不重叠，这样避免沿垂直于衬底11方向上相邻的两个过孔位于同一位置上，进一步提升阳极25与第一像素电路3011电连接的可靠性。
在一些实施例中，参阅图6A，显示面板110的多个子像素30包括多个红色子像素303、多个绿色子像素304和多个蓝色子像素305；绿色子像素304的发光器件302的阴极32的第一阴极部323的形状大致为圆形；红色子像素303的发光器件302的阴极32的第一阴极部323的形状大致为椭圆形，蓝色子像素305的发光器件的阴极32的第一阴极323的形状大致为圆形或椭圆形。
需要说明的是，红色子像素303、绿色子像素304和蓝色子像素305的第一阴极部323的形状不限于此。比如，绿色子像素304的第一阴极部323的形状还可以为椭圆形、方形或六边形等；红色子像素303的第一阴极部323的形状还可以为圆形、方形或六边形等；蓝色子像素305的第一阴极部323的形状还可以为方形或六边形等。
在一些实施例中，两个绿色子像素304的第一阴极部323之间的最小间距，小于其他相同颜色的两个子像素的第一阴极部之间的最小间距。参阅图 6A，两个绿色子像素304的第一阴极部323之间的最小间距D1，小于两个红色子像素303的第一阴极部323之间的最小间距D2，还小于两个蓝色子像素305的第一阴极部323之间的最小间距D3。
在一些实施例中，参阅图6A，红色子像素303和蓝色子像素302的发光器件302的有效发光区沿第一方向L1交替排列；绿色子像素304的发光器件302的有效发光区沿第二方向L2排列。其中，子像素30的有效发光区在衬底11上的投影被阴极主体部323在衬底11上的正投影覆盖。
需要说明的是，在本文中，剖面图图5、图6C、图8A、图8C、图8C、图11B、图11C、图11D中，在多个阳极25所在膜层与衬底11之间示出了多层绝缘层，这些剖面图是以显示面板110包括两层栅极金属层、两层源漏金属层、三层连接线层这些导电层膜层为背景进行示意的。事实上，本公开各个实施例中显示面板110的多个阳极25所在膜层与衬底11之间的绝缘层的数量并不限于此，在显示面板110采用其它膜层架构的情况下，绝缘层的数量可以有所减少或增加。
本公开的一些实施例还提供了一种显示面板的制作方法，包括：
S100，在衬底11上制作多个相互分离的遮挡图案31。
遮挡图案31可以为上述任一实施例中的遮挡图案31。遮挡图案31可以通过气相沉积、曝光、刻蚀等工艺制作，在此不做具体限定。
在制作遮挡图案31之前，需要在衬底11上制作一层或多层导电膜层以及一层或多层绝缘层80。所述一层或多层导电膜层可以是半导体层210、栅极金属层220、源漏金属层230等导电膜层中的至少一者，每相邻两层导电膜层之间设置有至少一层绝缘层80。在显示面板110的透光区101中的子像素30的第一像素电路3011设置于透光区101的周边的情况下，在透光区101中可能存在上述导电膜层中用于形成第一像素电路3011的导电图案，图18～图20中所示意的为显示面板110的透光区的剖面结构，因此在图18～图20中并不能看到上述导电膜层，而仅能看到绝缘层80。
S200，在多个遮挡图案31远离衬底11的一侧制作多个发光层26。每个发光层26对应一个发光器件302。
在上述步骤中，可采用蒸镀或喷墨打印工艺制作多个发光层26。
需要说明的是，在制作多个发光层26之前还包括制作像素界定层29的步骤，像素界定层29包括多个开口区，每个开口区界定出一个发光器件302的有效发光区261。
S300，在多个发光层26远离衬底11的一侧制作阴极薄膜27。阴极薄膜 27覆盖显示面板110的显示区10。
在上述步骤中，可采用蒸镀工艺制作阴极薄膜27。
S400,使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域，以去除阴极薄膜27的处于该区域的部分中，未被多个遮挡图案31遮挡的部分，形成多个相互分离的阴极32。
其中，遮挡图案31在衬底11上的正投影覆盖多个分离的阴极32在衬底11上正投影。
每个发光层26及其对应的阴极32形成一个发光器件302的部分，每个发光器件302具有有效发光区，有效发光区在衬底11上的正投影位于该发光器件302的阴极32在衬底11上的正投影范围内。
在一些实施例中，阴极薄膜27能够透过可见光，且能够吸收红外光；遮挡图案31能够吸收红外光；激光为红外光光束。
遮挡图案31在衬底11上的正投影，与阴极32在衬底11上的正投影，形状大致相同，大小大致相等，且遮挡图案31在衬底11上的正投影覆盖多个分离的阴极32在衬底11上正投影。遮挡图案31可以通过气相沉积、刻蚀等工艺进行图案化处理，其制作精度较高，可以通过精确控制遮挡图案31的图案，控制多个阴极32的图案，进而提升对阴极薄膜27进行图案化处理的精度，提升多个阴极32所在膜层的开口率，提升多个阴极32所在膜层对可见光的透过率。
在一些实施例中，如图15和图18所示，采用阳极作为遮挡图案31，则S100(在衬底11上制作多个相互分离的遮挡图案31)包括S110。
S110，在衬底11上制作多个相互分离的阳极25。
其中，每个发光器件302包括一个阳极25，一个阳极25形成一个遮挡图案31。
在一个阳极25形成一个遮挡图案31的情况下，参阅图15和图18，显示面板110的制作方法包括：
S110，在衬底11上制作多个相互分离的阳极25。
S200，在多个遮阳极25远离衬底11的一侧制作多个发光层26。
S300，在多个发光层26远离衬底11的一侧制作阴极薄膜27。
S400,使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域。
在一个阳极25形成一个遮挡图案31的情况下，所述一层或多层绝缘层80至少包括像素电路层70中所有绝缘层以及像素电路层70与阳极25所在膜 层之间的至少一层绝缘层28。示例性的，参照图5，所述像素电路层70中所有绝缘层包括栅极绝缘层18、第一层间绝缘层19、第二层间绝缘层21、钝化层22和平坦层23；所述至少一层绝缘层28包括第二绝缘层282、第四绝缘层284、第五绝缘层285和第三绝缘层283。所述一层或多层绝缘层80还可以包括其他绝缘层，在此不再一一赘述。
在一些实施例中，如图16、图17、图19和图20所示，在发光器件302包括阳极25，多个遮挡图案31位于多个发光器件302的多个阳极25靠近衬底的一侧的情况下，S100(在衬底11上制作多个相互分离的遮挡图案31)包括S120。
S120，在衬底11上制作图案化的半导体层210、图案化的栅极金属层220和图案化的源漏金属层230；在图案化半导体层210或栅极金属层220或源漏金属层230的过程中形成多个遮挡图案31。其中，源漏金属层230相对于半导体层210和栅极金属层220远离衬底11。
在S100(在衬底11上制作多个相互分离的遮挡图案31)与S200(制作多个发光层26)之间，还包括S130。
S130，在衬底11上制作多个阳极25；每个发光器件302包括一个阳极25。
在一些实施例中，在多个阴极32通过透明导电层33电连接的情况下，S100(在衬底上制作多个相互分离的遮挡图案)与S130(制作多个阳极之间)还包括S121～S123。
S121，在源漏金属层230远离衬底11的一侧制作透明导电层33。
S122，在透明导电层33远离衬底11的一侧制作第一绝缘层281。
S123，在第一绝缘层281中制作多个第一过孔34。
其中，每个第一过孔34在衬底11上的正投影与阳极25在衬底11上的正投影之间具有间隙，每个第一过孔34在衬底11上的正投影位于遮挡图案31在衬底11上的正投影范围内，且多个第一过孔34贯穿第一绝缘层281与透明导电层33连通。
在第一绝缘层281中制作多个第一过孔34的情况下，S300(在多个发光层26远离衬底11的一侧制作阴极薄膜27)的过程中，阴极薄膜27的材料进入多个第一过孔34内，使得阴极薄膜27通过多个第一过孔34内的阴极材料与透明导电层33连接。
参阅图17和图19，在遮挡图案31位于半导体层210或栅极金属层220或源漏金属层230的情况下，显示面板110的制作方法包括：
S120，在衬底11上制作图案化的半导体层210或栅极金属层220或源漏金属层230的过程中形成多个遮挡图案31。
S121，在源漏金属层230远离衬底11的一侧制作透明导电层33。
S122，在透明导电层33远离衬底11的一侧制作第一绝缘层281。
S123，在第一绝缘层281中制作多个第一过孔34。
S130，在衬底11上制作多个阳极25。
S200，在多个遮阳极25远离衬底11的一侧制作多个发光层26。
S300，在多个发光层26远离衬底11的一侧制作阴极薄膜27。
S400,使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域。
在上述实施例中，遮挡图案31设置在阳极25靠近衬底11的一侧，且遮挡图案31在衬底11上的正投影覆盖阳极25在衬底11上的正投影。此时，
所述一层或多层绝缘层80包括衬底11与遮挡图案31所在膜层之间的绝缘层。示例性的，在遮挡图案31位于栅极金属层220所在膜层的情况下，一层或多层绝缘层80包括栅极绝缘层18。
在一些实施例中，多个相互分离的阴极32之间采用同层设置的阴极连接结构35电连接，在此情况下可通过如下两种方式形成阴极连接结构35和阴极32。
方式一：如图11A所示，在图案化半导体层210或栅极金属层220或源漏金属层230的过程中形成多个遮挡连接结构36。其中，多个遮挡连接结构36与遮挡图案31位于同一膜层；每个遮挡连接结构36在第一方向L1上的尺寸大于其在第二方向L2上的尺寸；第一方向L1为显示面板110的多个子像素30排列的行方向，第二方向L2为显示面板110的多个子像素30排列的列方向。每个遮挡连接结构36与两个遮挡图案31连接；多个遮挡连接结构36排列成多行，每行包括沿第一方向L1依次排列的多个遮挡连接结构36；每行遮挡连接结构36，及该行中的多个遮挡连接结构36所连接的多个遮挡图案31的部分，形成一个遮挡连接条60。
通过上述方式，在S400(使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域)后，参阅图9，可以在阴极薄膜27上形成多个阴极32，和多个阴极连接结构35；多个阴极连接结构35与多个阴极32位于同一膜层，每个阴极连接结构35在第一方向L1上的尺寸大于其在第二方向L2上的尺寸。每个阴极连接结构35与两个阴极32电连接。多个阴极连接结构35排列成多行，每行包括多个沿第一方向L1依 次排列的多个阴极连接结构35；每行阴极连接结构35，及该行中的多个阴极连接结构35所连接的多个阴极32的部分，形成一个阴极连接条50。
方式二：如图17和图20所示，S400(使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域)之前，显示面板的制作方法还包括S310。
S310，在衬底11远离阴极薄膜27的一侧设置掩膜板200。
其中，掩膜板200包括至少一条挡光线210，每条挡光线210在衬底11上的正投影与至少两个阳极25在衬底11上的正投影连接。
通过上述方式，参阅图9，也可以在阴极薄膜27上形成多个阴极32，和多个阴极连接结构35；多个阴极连接结构35与多个阴极32位于同一膜层，每个阴极连接结构35在第一方向L1上的尺寸大于其在第二方向L2上的尺寸。每个阴极连接结构35与两个阴极32电连接。多个阴极连接结构35排列成多行，每行包括多个沿第一方向L1依次排列的多个阴极连接结构35；每行阴极连接结构35，及该行中的多个阴极连接结构35所连接的多个阴极32的部分，形成一个阴极连接条50。
参阅图18和图20，在使用掩膜版200形成阴极连接结构35的情况下，显示面板110的制作方法包括：
S120，在衬底11上制作图案化的半导体层210或栅极金属层220或源漏金属层230的过程中形成多个遮挡图案31。
S130，在衬底11上制作多个阳极25。
S200，在多个遮阳极25远离衬底11的一侧制作多个发光层26。
S300，在多个发光层26远离衬底11的一侧制作阴极薄膜27。
S310，在衬底11远离阴极薄膜27的一侧设置掩膜板200。
S400,使用激光从衬底11远离阴极薄膜27的一侧照射衬底11中对应显示面板110的透光区101的区域。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (26)

  1. 一种显示面板，具有显示区，所述显示区包括透光区和位于所述透光区周边的主显示区；所述显示面板包括：
    衬底；
    多个遮挡图案，设置于所述衬底上，且位于所述透光区；所述多个遮挡图案在所述衬底上的正投影相互分离；
    多个发光器件，设置于所述透光区，并设置于所述衬底上；每个发光器件包括：发光层，及位于所述发光层远离所述衬底一侧的阴极；每个发光器件具有有效发光区，所述有效发光区在所述衬底上的正投影位于所述发光器件的阴极在所述衬底上的正投影范围内；
    其中，所述多个发光器件的多个阴极在所述衬底上的正投影相互分离，且位于所述多个遮挡图案远离所述衬底的一侧；一个阴极与一个遮挡图案相对应，且每个所述遮挡图案在所述衬底上的正投影覆盖与其对应的阴极在所述衬底上的正投影。
  2. 根据权利要求1所述的显示面板，其中，
    所述阴极对可见光的透过率大于对红外光的透过率；
    所述遮挡图案对红外光的透过率小于或等于2％。
  3. 根据权利要求1或2所述的显示面板，其中，每个发光器件还包括：
    阳极，位于所述发光层靠近所述衬底的一侧；一个所述阳极形成一个所述遮挡图案。
  4. 根据权利要求1或2所述的显示面板，其中，每个发光器件还包括：阳极，位于所述发光层靠近所述衬底的一侧；
    所述多个遮挡图案位于所述多个发光器件的多个阳极靠近所述衬底的一侧；
    一个遮挡图案与一个阳极相对应，且所述遮挡图案在所述衬底上的正投影与其对应的阳极在所述衬底上的正投影至少部分重叠。
  5. 根据权利要求4所述的显示面板，还包括：
    半导体层，位于所述衬底与所述多个阳极之间；
    栅极金属层，位于所述衬底与所述多个阳极之间；
    源漏金属层，相对于所述半导体层和所述栅极金属层远离所述衬底，且位于所述多个阳极靠近所述衬底的一侧；
    所述遮挡图案位于所述半导体层或所述栅极金属层或所述源漏金属层。
  6. 根据权利要求4或5所述的显示面板，其中，所述遮挡图案对可见光的透过率大于对红外光的透过率；
    所述遮挡图案的厚度大于所述阴极的厚度。
  7. 根据权利要求6所述的显示面板，其中，所述阴极的材料包括镁银合金，所述遮挡图案的材料包括银。
  8. 根据权利要求4～7中任一项所述的显示面板，其中，所述阴极包括：
    阴极主体部，所述阳极在所述衬底上的正投影覆盖所述阴极主体部在所述衬底上的正投影；
    阴极连接部，与所述阴极主体部电连接，所述阴极连接部在所述衬底上的正投影，与所述阳极在所述衬底上的正投影不重叠。
  9. 根据权利要求8所述的显示面板，其中，所述遮挡图案包括：
    遮挡图案主体部，所述遮挡图案主体部在所述衬底上的正投影覆盖所述阴极主体部在所述衬底上的正投影；
    遮挡图案连接部，与所述遮挡图案主体部连接，所述遮挡图案连接部在所述衬底上的正投影覆盖所述阴极连接部在所述衬底上的正投影。
  10. 根据权利要求8或9所述的显示面板，还包括：
    透明导电层，位于所述遮挡图案所在膜层与所述多个阳极之间；
    第一绝缘层，位于所述透明导电层与所述多个阴极之间；
    其中，所述第一绝缘层内设置有多个第一过孔，每个第一过孔在所述衬底上的正投影与所述阳极在所述衬底上的正投影之间具有间隙，且每个第一过孔在所述衬底上的正投影位于所述阴极连接部在所述衬底上的正投影范围内，每个所述阴极通过至少一个所述第一过孔与所述透明导电层电连接。
  11. 根据权利要求3～7中任一项所述的显示面板，还包括：
    至少一个阴极连接结构，与所述阴极材料相同且同层设置；
    所述阴极连接结构在第一方向上的尺寸大于其在第二方向上的尺寸；其中，所述第一方向为所述显示面板的多个子像素排列的行方向，所述第二方向为所述显示面板的多个子像素排列的列方向；
    每个所述阴极连接结构与相邻两个所述阴极电连接。
  12. 根据权利要求11所述的显示面板，其中，所述显示面板包括排列成多行的多个所述阴极连接结构，每行包括沿所述第一方向依次排列的多个所述阴极连接结构；
    每行阴极连接结构，及该行中的多个阴极连接结构所连接的多个阴极的部分，形成一个阴极连接条；所述阴极连接条在所述第二方向上具有与所述阴极连接结构大致相等的尺寸。
  13. 根据权利要求11或12所述的显示面板，还包括：
    至少一个遮挡连接结构，与所述多个遮挡图案材料相同且同层设置；
    在所述显示面板包括多个阴极连接条的情况下，所述显示面板包括排列成多行的多个所述遮挡连接结构，每行包括沿所述第一方向依次排列的多个所述遮挡连接结构；每行遮挡连接结构，及该行中的多个遮挡连接结构所连接的多个遮挡图案的部分，形成一个遮挡连接条；一个所述遮挡连接条在所述衬底上的正投影覆盖一个所述阴极连接条在所述衬底上的正投影。
  14. 根据权利要求3～13中任一项所述的显示面板，其中，
    所述阳极包括：
    第一阳极部，与其所在的发光器件的有效发光区的形状大致相同，且所述第一阳极部的边界与所述阳极的边界部分重合；
    第二阳极部，与所述第一阳极部电连接；
    所述阴极包括：
    第一阴极部，所述第一阴极部在衬底的正投影被所述第一阳极部在衬底的正投影覆盖；
    第二阴极部，与所述第一阴极部电连接，且第二阴极部在衬底的正投影被第二阳极部在衬底的正投影覆盖；
    在所述阴极包括阴极主体部和阴极连接部的情况下，所述第一阴极部和所述第二阴极部形成所述阴极主体部，且所述阴极主体部的形状与所述阳极的形状大致相同；
    在所述显示面板还包括至少一个阴极连接结构的情况下，所述阴极的形状与所述阳极的形状大致相同。
  15. 根据权利要求14所述的显示面板，还包括：沿垂直于所述衬底且由所述衬底指向所述阳极的方向依次设置，且设置于所述衬底与所述多个阳极所在膜层之间的像素电路层、第二绝缘层、连接线层、及第三绝缘层；
    其中，所述像素电路层包括多个第一像素电路，设置于所述透光区的周边；
    所述第二绝缘层内设置有多个第二过孔；所述第三绝缘层内设置有多个第三过孔；
    所述连接线层包括多条连接线，每条连接线的第一端通过一个第二过孔与一个第一像素电路电连接，第二端通过一个第三过孔与一个阳极的第二阳极部电连接；
    在所述显示面板还包括透明导电层的情况下，所述透明导电层位于所述第三绝缘层远离所述衬底的一侧，所述第三过孔穿过所述透明导电层，且所 述第三过孔中用于电连接所述连接线和对应的阳极的导电材料与所述透明导电层电性绝缘。
  16. 根据权利要求15所述的显示面板，其中，所述连接线层还包括：多个垫块，每个垫块与一条所述连接线的第二端电连接，且每个垫块通过一个所述第三过孔与一个阳极的第二阳极部电连接；
    在所述显示面板包括多个阴极连接条的情况下，所述第三过孔和所述垫块在所述衬底上的正投影均与一个阴极连接条在所述衬底上的正投影至少部分交叠。
  17. 根据权利要求14～16中任一项所述的显示面板，其中，所述显示面板包括多个子像素，每个子像素包括一个发光器件；所述多个子像素包括多个红色子像素、多个绿色子像素和多个蓝色子像素；
    绿色子像素的发光器件的阴极的第一阴极部的形状大致为圆形；
    红色子像素的发光器件的阴极的第一阴极部的形状大致为椭圆形。
  18. 根据权利要求17所述的显示面板，其中，两个绿色子像素的第一阴极部之间的最小间距，小于其他相同颜色的两个子像素的第一阴极部之间的最小间距。
  19. 根据权利要求17或18所述的显示面板，其中，红色子像素和蓝色子像素的发光器件的有效发光区沿所述第一方向交替排列；绿色子像素的发光器件的有效发光区沿所述第二方向排列。
  20. 一种显示面板的制作方法，包括：
    在衬底上制作多个相互分离的遮挡图案；
    在所述多个遮挡图案远离所述衬底的一侧制作多个发光层；
    在所述多个发光层远离所述衬底的一侧制作阴极薄膜；
    使用激光从所述衬底远离所述阴极薄膜的一侧照射所述衬底中对应显示面板的透光区的区域，去除所述阴极薄膜的处于该区域的部分中，未被所述多个遮挡图案遮挡的部分，形成多个相互分离的阴极；
    其中，每个发光层及其对应的阴极形成一个发光器件的部分，每个发光器件具有有效发光区，所述有效发光区在所述衬底上的正投影位于所述发光器件的阴极在所述衬底上的正投影范围内。
  21. 根据权利要求20所述制作方法，其中，所述在衬底上制作多个相互分离的遮挡图案，包括：
    在所述衬底上制作多个相互分离的阳极；
    其中，每个所述发光器件包括一个阳极，一个阳极形成一个所述遮挡图 案。
  22. 根据权利要求20所述的制作方法，其中，所述在衬底上制作多个相互分离的遮挡图案，包括：
    在所述衬底上制作图案化的半导体层、图案化的栅极金属层和图案化的源漏金属层；其中，所述源漏金属层相对于所述半导体层和所述栅极金属层远离所述衬底；
    在图案化所述半导体层或所述栅极金属层或所述源漏金属层的过程中形成多个所述遮挡图案；
    在所述在衬底上制作多个相互分离的遮挡图案，与，所述制作多个发光层之间，还包括：
    在所述衬底上制作多个阳极；每个所述发光器件包括一个阳极。
  23. 根据权利要求22所述的制作方法，在所述在衬底上制作多个相互分离的遮挡图案，与，所述制作多个阳极之间，还包括：
    在所述源漏金属层远离所述衬底的一侧制作透明导电层；
    在所述透明导电层远离所述衬底的一侧制作第一绝缘层；
    在所述第一绝缘层中制作多个第一过孔；其中，每个第一过孔在所述衬底上的正投影与所述阳极在所述衬底上的正投影之间具有间隙，且每个第一过孔在所述衬底上的正投影位于所述遮挡图案在所述衬底上的正投影范围内。
  24. 根据权利要求22所述的制作方法，其中，在图案化所述半导体层或所述栅极金属层或所述源漏金属层的过程中形成多个遮挡连接结构；
    其中，所述多个遮挡连接结构与所述遮挡图案位于同一膜层；每个遮挡连接结构在第一方向上的尺寸大于其在第二方向上的尺寸；所述第一方向为显示面板的多个子像素排列的行方向，所述第二方向为显示面板的多个子像素排列的列方向；
    每个所述遮挡连接结构与两个所述遮挡图案连接；
    所述多个遮挡连接结构排列成多行，每行包括沿所述第一方向依次排列的多个所述遮挡连接结构；
    每行遮挡连接结构，及该行中的多个遮挡连接结构所连接的多个遮挡图案的部分，形成一个遮挡连接条。
  25. 根据权利要求22所述的制作方法，在所述使用激光从所述衬底远离所述阴极薄膜的一侧照射所述衬底中对应显示面板的透光区的区域之前，还包括：
    在所述衬底远离所述阴极薄膜的一侧设置掩膜板；
    其中，所述掩膜板包括至少一条挡光线，每条所述挡光线在所述衬底上的正投影与至少两个阳极在所述衬底上的正投影连接。
  26. 一种显示装置，包括：
    如权利要求1～19中任一项所述的显示面板；
    功能器件，设置于所述显示面板的背侧，且位于所述显示面板的透光区。
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