WO2022230014A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2022230014A1
WO2022230014A1 PCT/JP2021/016615 JP2021016615W WO2022230014A1 WO 2022230014 A1 WO2022230014 A1 WO 2022230014A1 JP 2021016615 W JP2021016615 W JP 2021016615W WO 2022230014 A1 WO2022230014 A1 WO 2022230014A1
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WO
WIPO (PCT)
Prior art keywords
region
sense
igbt
diode
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2021/016615
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English (en)
French (fr)
Japanese (ja)
Inventor
毅 大佐賀
保夫 阿多
佑貴 秦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
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Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to US18/254,665 priority Critical patent/US20240014206A1/en
Priority to CN202180097332.4A priority patent/CN117242580A/zh
Priority to JP2023516870A priority patent/JP7613564B2/ja
Priority to PCT/JP2021/016615 priority patent/WO2022230014A1/ja
Priority to DE112021007588.8T priority patent/DE112021007588T5/de
Publication of WO2022230014A1 publication Critical patent/WO2022230014A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617—Combinations of vertical BJTs and only diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/422—PN diodes having the PN junctions in mesas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates

Definitions

  • the present disclosure relates to semiconductor devices.
  • Reverse conducting insulated gate bipolar transistors are widely used in power converters such as inverters.
  • the element size of RC-IGBTs mounted on inverters has been reduced for the purpose of miniaturization and cost reduction. If the area ratio of the IGBT region is increased in order to reduce conduction loss and switching loss, the diode region becomes relatively narrow. In this case, the peak surge forward current of the diode may be exceeded during freewheeling, and the diode may be destroyed. Therefore, it has been proposed to provide a sense diode region for monitoring the conduction current of the diode and detect the application of a current leading to destruction (see, for example, Patent Document 1).
  • the present disclosure has been made to solve the problems described above, and its object is to obtain a semiconductor device capable of improving the current detection accuracy of the sense diode region.
  • a semiconductor device includes a semiconductor substrate having a drift layer, an IGBT region and a diode region provided in the semiconductor substrate and having an emitter electrode on a surface of the semiconductor substrate, and the IGBT region provided in the semiconductor substrate and having an emitter electrode on the surface of the semiconductor substrate.
  • a sense IGBT region having an area smaller than that of the semiconductor substrate and having a sense emitter electrode separated from the emitter electrode on the surface of the semiconductor substrate; and a sense diode region having a sense anode electrode separated from the emitter electrode on the surface, wherein the sense diode region is separated from the IGBT region by a thickness of the drift layer or more.
  • the sense diode region is separated from the IGBT region and the sense IGBT region by at least the thickness of the drift layer. As a result, it is possible to prevent the return current from flowing into the IGBT region and the sense IGBT region during the return operation, and improve the accuracy of current detection in the sense diode region.
  • FIG. 1 is a plan view showing a semiconductor device according to a first embodiment
  • FIG. 2 is a cross-sectional view along I-II of FIG. 1
  • FIG. 2 is a cross-sectional view along III-IV of FIG. 1
  • FIG. 2 is a cross-sectional view along V-VI in FIG. 1
  • FIG. FIG. 4 shows a diode current detection circuit
  • FIG. 11 is a top view showing a semiconductor device according to a second embodiment
  • FIG. 7 is a cross-sectional view along I-II of FIG. 6
  • FIG. 11 is a top view showing a semiconductor device according to a third embodiment
  • FIG. 9 is a cross-sectional view along I-II of FIG. 8;
  • FIG. 1 is a plan view showing a semiconductor device according to Embodiment 1.
  • FIG. This semiconductor device is an RC-IGBT in which an IGBT region 2 and a diode region 3 are provided on one semiconductor substrate 1 .
  • a semiconductor substrate 1 is provided with a sense IGBT region 4 , a sense diode region 5 and a gate pad 6 .
  • a termination region 7 is provided on the outer periphery of the semiconductor substrate 1 so as to surround these regions.
  • FIG. 2 is a cross-sectional view along I-II of FIG.
  • the semiconductor substrate 1 has an N ⁇ -type drift layer 8 .
  • a P-type body layer 9 is provided on the drift layer 8 .
  • An N-type buffer layer 10 is provided under the drift layer 8 .
  • An N-type emitter layer 11 is provided on the surface layer of the P-type body layer 9 in the IGBT region 2 .
  • a trench gate 12 is provided in a trench passing through N-type emitter layer 11 and P-type body layer 9 with a gate insulating film interposed therebetween.
  • a P-type collector layer 13 is provided under the N-type buffer layer 10 .
  • Trench gate 12 is connected to gate pad 6 for connection to a gate power supply.
  • a P-type anode layer 14 is provided on the surface layer of the P-type body layer 9 in the diode region 3 .
  • a trench gate 12 is provided in a trench penetrating through the P-type body layer 9 with a gate insulating film interposed therebetween.
  • An N-type cathode layer 15 is provided under the N-type buffer layer 10 .
  • An emitter electrode 16 is provided on the surface of the semiconductor substrate 1 in both the IGBT region 2 and the diode region 3 .
  • Emitter electrode 16 is connected to P-type body layer 9 , N-type emitter layer 11 and P-type anode layer 14 .
  • An insulating film 17 is provided on the trench gate 12 to insulate the trench gate 12 and the emitter electrode 16 from each other.
  • a collector electrode 18 is provided on the back surface of the semiconductor substrate 1 in both the IGBT region 2 and the diode region 3 .
  • a collector electrode 18 is connected to the P-type collector layer 13 and the N-type cathode layer 15 .
  • FIG. 3 is a cross-sectional view along III-IV in FIG.
  • the structure of sense IGBT region 4 is similar to that of IGBT region 2 .
  • a sense emitter electrode 20 provided on the surface of the semiconductor substrate 1 in the sense IGBT region 4 is connected to the P-type body layer 9 and the N-type emitter layer 11 and separated from the emitter electrode 16 .
  • An isolation region 19 exists between the IGBT region 2 and the sense IGBT region 4 .
  • the isolation region 19 is a region where the N-type emitter layer 11, the P-type anode layer 14 and the trench gate 12 do not exist.
  • Sense IGBT region 4 is provided only directly under sense emitter electrode 20 .
  • FIG. 4 is a cross-sectional view along V-VI in FIG.
  • the structure of sense diode region 5 is similar to that of diode region 3 .
  • a sense anode electrode 21 provided on the surface of the semiconductor substrate 1 in the sense diode region 5 is connected to the P-type body layer 9 and the P-type anode layer 14 and separated from the emitter electrode 16 .
  • Sense diode region 5 is provided only directly under sense anode electrode 21 .
  • the total sum SI of the areas of the IGBT regions 2 is larger than the total sum SD of the areas of the diode regions 3 (SI>SD).
  • the area SSI of the sense IGBT region 4 is smaller than the total sum SI of the areas of the IGBT regions 2 (SI>SSI).
  • the area SSD of the sense diode region 5 is smaller than the total area SD of the diode regions 3 (SD>SSD).
  • FIG. 5 is a diagram showing a diode current detection circuit.
  • the sense emitter electrode 20 of the sense IGBT region 4 and the emitter electrode 16 of the main portion including the IGBT region 2 and the diode region 3 are connected via a sense resistor Ra.
  • the sense anode electrode 21 of the sense diode region 5 and the emitter electrode 16 of the main portion are connected via the sense resistor Rb.
  • the sense diode region 5 By monitoring the current in the diode region 3 using the sense diode region 5, it is possible to detect overcurrent in the diode region 3 and feed it back to the protection function.
  • a current flows through the drift layer 8 within an oblique range of 45 degrees from the back surface of the substrate during the freewheeling operation. If this current flows through the IGBT region 2 and the sense IGBT region 4, the current detection accuracy of the sense diode region 5 is lowered. Therefore, in the present embodiment, the sense diode region 5 is separated from the IGBT region 2 and the sense IGBT region 4 by the thickness of the drift layer 8 or more. As a result, it is possible to prevent the current from flowing into the IGBT region 2 during the freewheeling operation, and the current detection accuracy of the sense diode region 5 can be improved.
  • the current detection accuracy of the sense diode region 5 is further improved.
  • the width d1 of the isolation region 19 separating the IGBT region 2 and the sense IGBT region 4 is also larger than the thickness d2 of the drift layer 8 (d1>d2). That is, the sense IGBT region 4 is separated from the IGBT region 2 by the thickness of the drift layer 8 or more. This suppresses the current from flowing into the IGBT region 2 and improves the current detection accuracy of the sense IGBT region 4 .
  • FIG. 6 is a top view showing the semiconductor device according to the second embodiment.
  • FIG. 7 is a cross-sectional view along I-II of FIG.
  • the diode region 3 is arranged around the sense diode region 5 . Assuming that the distance from the outer end of the sense diode region 5 to the boundary between the diode region 3 surrounding the sense diode region 5 and the IGBT region 2 is d3, d3>d1.
  • diode region 3 is arranged in a region within the thickness of drift layer 8 from sense diode region 5 .
  • the diode region 3 around the sense diode region 5 also performs the freewheeling operation. Therefore, the current flowing through the sense diode region 5 can be ensured without providing a wide isolation region 19 that does not contribute to current flow. Therefore, the current detection accuracy of the sense diode region 5 can be improved, and the separation region 19 can be narrowed to make it possible to reduce the size of the semiconductor device.
  • the isolation region 19 is a region without the P-type anode layer 14 and the like, and it is necessary to electrically separate the anode of the diode region 3 and the anode of the sense diode region 5 . Since it is assumed that the potential difference between the diode region 3 and the sense diode region 5 is increased by several volts by adding the sense resistor, the width of the isolation region 19 is set to 20 ⁇ m or more.
  • FIG. 8 is a top view showing the semiconductor device according to the third embodiment.
  • FIG. 9 is a cross-sectional view along I-II of FIG.
  • the IGBT regions 2 and the diode regions 3 are alternately arranged in stripes along the trench gates 12 in plan view.
  • a semiconductor substrate 1 is divided into two or more regions including a first region 22 and a second region 23 .
  • the first region 22 and the second region 23 are adjacent to each other in the extending direction of the trench gate 12 .
  • the trench gate 12 and the diffusion layer are separated between adjacent regions.
  • the repetition of the IGBT region 2 and the diode region 3 is reversed.
  • the IGBT regions 2 that mainly generate heat during inverter operation are arranged apart from each other, so that the heat generation of the semiconductor device as a whole can be suppressed and the power supply capability can be improved.
  • the IGBT region 2 around the sense IGBT region 4 and arrange the diode region 3 around the sense diode region 5 .
  • one trench gate 12 is provided in both the IGBT region 2 and the diode region 3 in the peripheral regions of the sense IGBT region 4 and the sense diode region 5. It will be. In this case, the trench gate 12 cannot be grounded to the emitter. Therefore, the diode region 3 will have a capacitance, and the input capacitance and feedback capacitance of the semiconductor device will increase.
  • the sense IGBT region 4 is arranged in the IGBT region 2 of the first region 22 and the sense diode region 5 is arranged in the diode region 3 of the second region 23 .
  • the IGBT region 2 of the first region 22 where the sense IGBT region 4 is arranged and the diode region 3 of the second region 23 where the sense diode region 5 is arranged are adjacent to each other.
  • the trench gates 12 respectively provided in the adjacent IGBT regions 2 of the first region 22 and the diode regions 3 of the second region 23 are not connected. Therefore, by grounding the trench gate 12 provided in the diode region 3 to the emitter, an increase in capacitance can be suppressed. As a result, the input capacitance and feedback capacitance of the semiconductor device are limited to the IGBT region, so switching loss can be reduced and the size of the semiconductor device can be reduced.
  • d4 >d1
  • d4 is the distance from the outer end of the sense diode region 5 to the boundary between the diode region 3 surrounding the sense diode region 5 and the IGBT region 2.
  • the semiconductor substrate 1 is not limited to being made of silicon, and may be made of a wide bandgap semiconductor having a larger bandgap than silicon.
  • Wide bandgap semiconductors are, for example, silicon carbide, gallium nitride-based materials, or diamond.
  • a semiconductor chip formed of such a wide bandgap semiconductor can be miniaturized because of its high withstand voltage and allowable current density.
  • a semiconductor device incorporating this semiconductor chip can also be miniaturized and highly integrated.
  • the heat resistance of the semiconductor chip is high, the radiation fins of the heat sink can be made smaller, and the water-cooled portion can be air-cooled, so that the semiconductor device can be further made smaller.
  • the power loss of the semiconductor chip is low and the efficiency is high, the efficiency of the semiconductor device can be improved.

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
PCT/JP2021/016615 2021-04-26 2021-04-26 半導体装置 Ceased WO2022230014A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US18/254,665 US20240014206A1 (en) 2021-04-26 2021-04-26 Semiconductor device
CN202180097332.4A CN117242580A (zh) 2021-04-26 2021-04-26 半导体装置
JP2023516870A JP7613564B2 (ja) 2021-04-26 2021-04-26 半導体装置
PCT/JP2021/016615 WO2022230014A1 (ja) 2021-04-26 2021-04-26 半導体装置
DE112021007588.8T DE112021007588T5 (de) 2021-04-26 2021-04-26 Halbleitervorrichtung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/016615 WO2022230014A1 (ja) 2021-04-26 2021-04-26 半導体装置

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WO2022230014A1 true WO2022230014A1 (ja) 2022-11-03

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US (1) US20240014206A1 (https=)
JP (1) JP7613564B2 (https=)
CN (1) CN117242580A (https=)
DE (1) DE112021007588T5 (https=)
WO (1) WO2022230014A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102023116868B3 (de) 2023-06-27 2024-10-17 Infineon Technologies Ag RC-IGBT und Verfahren zum Betreiben einer Halbbrückenschaltung

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7540600B2 (ja) * 2021-07-20 2024-08-27 株式会社デンソー 半導体装置
JP2024098458A (ja) * 2023-01-10 2024-07-23 富士電機株式会社 半導体装置

Citations (4)

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Publication number Priority date Publication date Assignee Title
WO2014167824A1 (ja) * 2013-04-10 2014-10-16 株式会社デンソー 半導体装置
WO2015118714A1 (ja) * 2014-02-10 2015-08-13 トヨタ自動車株式会社 半導体装置
JP2017103400A (ja) * 2015-12-03 2017-06-08 富士電機株式会社 半導体装置
JP2019068036A (ja) * 2017-05-30 2019-04-25 富士電機株式会社 半導体装置

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JP4577425B2 (ja) 2007-11-07 2010-11-10 株式会社デンソー 半導体装置
KR101276407B1 (ko) * 2010-05-07 2013-06-19 도요타지도샤가부시키가이샤 반도체 장치
US8716746B2 (en) * 2010-08-17 2014-05-06 Denso Corporation Semiconductor device
CN104995737B (zh) * 2013-02-13 2017-10-27 丰田自动车株式会社 半导体装置
JP5918288B2 (ja) * 2014-03-03 2016-05-18 トヨタ自動車株式会社 半導体装置
JP2015176927A (ja) * 2014-03-13 2015-10-05 株式会社東芝 半導体装置および絶縁ゲート型バイポーラトランジスタ
WO2020090923A1 (ja) * 2018-11-02 2020-05-07 ローム株式会社 半導体装置、半導体モジュール、リレーユニット、バッテリユニット、及び車両

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014167824A1 (ja) * 2013-04-10 2014-10-16 株式会社デンソー 半導体装置
WO2015118714A1 (ja) * 2014-02-10 2015-08-13 トヨタ自動車株式会社 半導体装置
JP2017103400A (ja) * 2015-12-03 2017-06-08 富士電機株式会社 半導体装置
JP2019068036A (ja) * 2017-05-30 2019-04-25 富士電機株式会社 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102023116868B3 (de) 2023-06-27 2024-10-17 Infineon Technologies Ag RC-IGBT und Verfahren zum Betreiben einer Halbbrückenschaltung

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US20240014206A1 (en) 2024-01-11
JP7613564B2 (ja) 2025-01-15
DE112021007588T5 (de) 2024-02-15
CN117242580A (zh) 2023-12-15
JPWO2022230014A1 (https=) 2022-11-03

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