WO2021248563A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

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Publication number
WO2021248563A1
WO2021248563A1 PCT/CN2020/097797 CN2020097797W WO2021248563A1 WO 2021248563 A1 WO2021248563 A1 WO 2021248563A1 CN 2020097797 W CN2020097797 W CN 2020097797W WO 2021248563 A1 WO2021248563 A1 WO 2021248563A1
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WO
WIPO (PCT)
Prior art keywords
layer
conversion terminal
display panel
substrate
display device
Prior art date
Application number
PCT/CN2020/097797
Other languages
English (en)
French (fr)
Inventor
周菁
张毅先
鲜于文旭
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/056,458 priority Critical patent/US20210391404A1/en
Publication of WO2021248563A1 publication Critical patent/WO2021248563A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/03—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes specially adapted for displays having non-planar surfaces, e.g. curved displays

Definitions

  • This application relates to the field of display technology, and in particular to a display panel, a manufacturing method thereof, and a display device.
  • the existing display panels are designed in the direction of high screen-to-body ratio to obtain a full screen.
  • the frame of the display panel is larger.
  • the frame area cannot be displayed, resulting in a relatively low screen occupancy of the display panel.
  • the existing display device 1 includes a display area 12 and a non-display area 11.
  • the non-display area 11 includes a first power supply voltage line 111, Panel test line 112, gate drive circuit 113, second power supply voltage line 114, electrostatic protection circuit 115, first fan-out area 116, third power supply voltage line 117, array test line 118, bending area 119, second fan
  • FIG. 1 includes a first power supply voltage line 111, Panel test line 112, gate drive circuit 113, second power supply voltage line 114, electrostatic protection circuit 115, first fan-out area 116, third power supply voltage line 117, array test line 118, bending area 119, second fan
  • each wiring, each area, and each circuit are distributed around the display panel, and the number and width of the wiring are relatively large, resulting in non-uniformity.
  • the width of the display area is larger, which results in a larger frame of the display device and a lower screen occupancy of the display device.
  • the existing display device has a technical problem that more wires lead to a wider frame, which in turn leads to a lower screen occupancy of the display device.
  • the embodiments of the present application provide a display panel, a manufacturing method thereof, and a display device, which are used to alleviate the technical problem that the existing display device has a large number of traces leading to a wider frame, which in turn leads to a lower screen occupancy of the display device.
  • An embodiment of the present application provides a display panel, which includes:
  • the conversion terminal layer is arranged on the first substrate and is formed with conversion terminals
  • the barrier layer is arranged on the conversion terminal layer
  • the buffer layer is arranged on the barrier layer
  • the driving circuit layer includes an active layer, a first gate insulating layer, a first metal layer, a second gate insulating layer, a second metal layer, an interlayer insulating layer, and a source and drain layer.
  • the driving circuit layer is disposed on On the buffer layer;
  • the first substrate is formed with a first opening at a corresponding position of the conversion terminal, and the data line formed by the source drain layer is connected to the conversion terminal through a first via hole.
  • the conversion terminal layer is formed with a fan-out trace, one end of the fan-out trace is connected to the conversion terminal, and the other end of the fan-out trace is connected to the source and drain through a first via hole.
  • the data line connection of the layer is formed with a fan-out trace, one end of the fan-out trace is connected to the conversion terminal, and the other end of the fan-out trace is connected to the source and drain through a first via hole.
  • the conversion terminal layer is formed with a clock signal line, one end of the clock signal line is connected to the conversion terminal, and the other end of the clock signal line is connected to the gate drive circuit of the display panel.
  • the first metal layer is etched to form a gate, and the clock signal line is connected to the gate through a second via hole.
  • the conversion terminal layer is formed with an electrostatic protection circuit wiring, one end of the electrostatic protection circuit wiring is connected to the conversion terminal, and the other end of the electrostatic protection circuit wiring is connected to the electrostatic protection of the display panel. Circuit connection.
  • a test terminal is formed on the conversion terminal layer, and a second opening is formed on the first substrate at a position corresponding to the test terminal.
  • the barrier layer includes a first barrier layer, a second barrier layer, and a second substrate located between the first barrier layer and the second barrier layer, and the first barrier layer is disposed at On the first substrate, the conversion terminal layer includes a first part disposed on the first substrate and a second part disposed on the second substrate.
  • the material of the conversion terminal layer is the same as the material of the source drain layer.
  • an embodiment of the present application provides a method for manufacturing a display panel.
  • the method for manufacturing a display panel includes:
  • An active layer, a first gate insulating layer, a first metal layer, a second gate insulating layer, a second metal layer, and an interlayer insulating layer are formed on the buffer layer, and the holes are exposed, and the holes are exposed
  • the first via hole is obtained by etching
  • a planarization layer, a pixel definition layer and a light-emitting function layer are formed on the source and drain layers to obtain a display panel.
  • an embodiment of the present application provides a display device, which includes:
  • the display panel includes a first substrate, a conversion terminal layer, a barrier layer, a buffer layer, a driving circuit layer, a planarization layer, a pixel definition layer, and a light-emitting function layer, and the conversion terminal layer is disposed on the first substrate.
  • a conversion terminal is formed on the substrate, the barrier layer is disposed on the conversion terminal layer, the buffer layer is disposed on the barrier layer, and the driving circuit layer includes an active layer and a first gate insulating layer , A first metal layer, a second gate insulating layer, a second metal layer, an interlayer insulating layer and a source and drain layer, the driving circuit layer is disposed on the buffer layer, wherein the first substrate is A first opening is formed at a corresponding position of the conversion terminal, and the data line formed by the source and drain layer is connected to the conversion terminal through a first via;
  • the auxiliary function layer is arranged under the display panel
  • the driving chip is arranged under the display panel and connected with the conversion terminal.
  • the auxiliary function layer is formed with a third opening, and the driving chip passes through the third opening to be connected to the conversion terminal.
  • the auxiliary function layer includes a support layer, a heat dissipation layer and a back plate.
  • the conversion terminal layer is formed with a fan-out trace, one end of the fan-out trace is connected to the conversion terminal, and the other end of the fan-out trace is connected to the source and drain through a first via hole.
  • the data line connection of the layer is formed with a fan-out trace, one end of the fan-out trace is connected to the conversion terminal, and the other end of the fan-out trace is connected to the source and drain through a first via hole.
  • the conversion terminal layer is formed with a clock signal line, one end of the clock signal line is connected to the conversion terminal, and the other end of the clock signal line is connected to the gate drive circuit of the display panel.
  • the first metal layer is etched to form a gate, and the clock signal line is connected to the gate through a second via hole.
  • the conversion terminal layer is formed with an electrostatic protection circuit wiring, one end of the electrostatic protection circuit wiring is connected to the conversion terminal, and the other end of the electrostatic protection circuit wiring is connected to the electrostatic protection of the display panel. Circuit connection.
  • a test terminal is formed on the conversion terminal layer, and a second opening is formed on the first substrate at a position corresponding to the test terminal.
  • the barrier layer includes a first barrier layer, a second barrier layer, and a second substrate located between the first barrier layer and the second barrier layer, and the first barrier layer is disposed at On the first substrate, the conversion terminal layer includes a first part disposed on the first substrate and a second part disposed on the second substrate.
  • the material of the conversion terminal layer is the same as the material of the source drain layer.
  • the material of the conversion terminal layer includes at least one of titanium, aluminum, and copper.
  • the present application provides a display panel, a manufacturing method thereof, and a display device.
  • the display panel includes a first substrate, a conversion terminal layer, a barrier layer, a buffer layer, a driving circuit layer, a planarization layer, a pixel definition layer, and a light-emitting function layer,
  • the conversion terminal layer is disposed on the first substrate to form conversion terminals
  • the barrier layer is disposed on the conversion terminal layer
  • the buffer layer is disposed on the barrier layer
  • the drive circuit layer It includes an active layer, a first gate insulating layer, a first metal layer, a second gate insulating layer, a second metal layer, an interlayer insulating layer, and a source-drain layer.
  • the driving circuit layer is disposed on the buffer layer Above, wherein the first substrate is formed with a first opening at a corresponding position of the conversion terminal, and the data line formed by the source and drain layer is connected to the conversion terminal through a first via; A conversion terminal layer is formed on the first substrate, and the conversion terminal layer is formed to form a conversion terminal.
  • the first substrate forms a first opening at the corresponding position of the conversion terminal, so that the data line formed by the source and drain layer passes through the first via hole.
  • the conversion terminal is connected, so that in the process of connecting the driver chip and the display panel, the driver chip is connected to the data line of the source and drain layer through the conversion terminal layer, so as to realize the connection between the driver chip and the display panel, without setting the bottom frame of the display panel
  • the fan-out area, binding terminals, and bending area reduce the width of the frame of the display panel, increase the screen-to-body ratio of the display panel, and alleviate the widening of the frame due to the large number of traces in the existing display device, which in turn leads to the display device
  • Fig. 1 is a schematic diagram of a conventional display panel.
  • FIG. 2 is a first schematic diagram of a display panel provided by an embodiment of the application.
  • FIG. 3 is a second schematic diagram of a display panel provided by an embodiment of the application.
  • FIG. 4 is a schematic diagram of the wiring arrangement of the conversion terminal layer provided by an embodiment of the application.
  • FIG. 5 is a schematic diagram of the arrangement position of the via hole in the existing display panel provided by the embodiment of the application.
  • FIG. 6 is a schematic diagram of the arrangement position of the via hole in the existing circuit arrangement area provided by the embodiment of the application.
  • FIG. 7 is a flowchart of a display panel driving method provided by an embodiment of the application.
  • FIG. 8 is a schematic diagram of a display device provided by an embodiment of the application.
  • the present application provides a display panel, a manufacturing method thereof, and a display device.
  • a display panel a manufacturing method thereof, and a display device.
  • the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not used to limit the present application.
  • an embodiment of the present application provides a display panel, and the display panel includes:
  • the conversion terminal layer 22 is disposed on the first substrate 22, and the conversion terminal 221 is formed;
  • the barrier layer 23 is disposed on the conversion terminal layer 22;
  • the buffer layer 24 is disposed on the barrier layer 23;
  • the driving circuit layer 25 includes an active layer 251, a first gate insulating layer 252, a first metal layer 253, a second gate insulating layer 254, a second metal layer 255, an interlayer insulating layer 256, and a source and drain layer 257 ,
  • the driving circuit layer 25 is disposed on the buffer layer 24;
  • Pixel definition layer 27
  • the first substrate 21 has a first opening 211 formed at a corresponding position of the conversion terminal 221, and the data line formed by the source drain layer 257 is connected to the conversion terminal 221 through a first via hole.
  • the present application provides a display panel, a manufacturing method thereof, and a display device.
  • the display panel includes a first substrate, a conversion terminal layer, a barrier layer, a buffer layer, a driving circuit layer, a planarization layer, a pixel definition layer, and a light-emitting function layer,
  • the conversion terminal layer is disposed on the first substrate to form conversion terminals
  • the barrier layer is disposed on the conversion terminal layer
  • the buffer layer is disposed on the barrier layer
  • the drive circuit layer It includes an active layer, a first gate insulating layer, a first metal layer, a second gate insulating layer, a second metal layer, an interlayer insulating layer, and a source-drain layer.
  • the driving circuit layer is disposed on the buffer layer Above, wherein the first substrate is formed with a first opening at a corresponding position of the conversion terminal, and the data line formed by the source and drain layer is connected to the conversion terminal through a first via; A conversion terminal layer is formed on the first substrate, and the conversion terminal layer is formed to form a conversion terminal.
  • the first substrate forms a first opening at the corresponding position of the conversion terminal, so that the data line formed by the source and drain layer passes through the first via hole.
  • the conversion terminal is connected, so that in the process of connecting the driver chip and the display panel, the driver chip is connected to the data line of the source and drain layer through the conversion terminal layer, so as to realize the connection between the driver chip and the display panel, without setting the bottom frame of the display panel
  • the fan-out area, binding terminals, and bending area reduce the width of the frame of the display panel, increase the screen-to-body ratio of the display panel, and alleviate the widening of the frame due to the large number of traces in the existing display device, which in turn leads to the display device
  • the data line is not shown in FIG. 2, and at the same time, the first via is not shown in FIG. 2, and the first via is blocked by the source and drain layer.
  • the light-emitting functional layer 28 includes a pixel electrode layer 281, a light-emitting material layer 282, and a common electrode layer 283, the material of the pixel electrode layer includes indium tin oxide, and the light-emitting material layer is disposed on the The pixel area defined by the pixel defining layer, and the material of the common electrode layer includes indium tin oxide.
  • the display panel includes a display area 291 and a perforated area 292, and via holes are formed so that the metal traces of the source drain layer and the gate layer are connected through the via holes.
  • the via hole can be formed in the perforated area, so as to prevent the via hole from affecting the normal operation of the circuit in the display area.
  • the perforated area is arranged around the display area, so that the perforated area is arranged around the display area, so that in the existing display device, all the traces located on the periphery of the display device can be set In the conversion terminal layer, it is then connected to the drive circuit of the display area through via holes, so that each circuit of the display panel works normally, and the width of the frame of the display panel is reduced, and the screen-to-body ratio of the display panel is increased.
  • the barrier layer 23 includes a first barrier layer 311, a second barrier layer 313, and a first barrier layer 311 and a second barrier layer 313.
  • the second substrate 312, the first barrier layer 311 is disposed on the first substrate 21, and the conversion terminal layer includes a first portion disposed on the first substrate, and a second substrate disposed on the second substrate.
  • the height of the metal traces or terminals of the first metal layer and the source/drain layer is relatively low, and the first metal layer and the source/drain layer The possibility of breakage of metal traces or terminals of the layer is reduced.
  • the opening when an opening is formed on the lower side of the first substrate, the opening can be packaged after the driver chip in the display device is installed to prevent water and oxygen from corroding the conversion terminal layer and the driver chip, wherein,
  • the packaging means and process can adopt the existing packaging vias and openings, and the embodiment of the present application is not limited to this, and any method that can avoid the intrusion of water and oxygen can be used.
  • the conversion terminal is arranged in the perforated area, so that the data line is directly connected to the conversion terminal through the via hole.
  • the conversion terminal layer is formed with a fan-out trace, one end of the fan-out trace is connected to the conversion terminal, and the other end of the fan-out trace is connected to the source and drain through a first via hole.
  • the data line connection of the pole layer specifically, as shown in FIG.
  • a fan-out area 411 and a driver chip bonding area 412 are provided on the lower side of the conversion terminal layer 22, and fan-out wiring 4111 is provided in the fan-out area 411 ,
  • the conversion terminal layer can be formed with fan-out wiring, and then the data line and the fan-out wiring are connected through the first via,
  • the fan-out wiring is connected to the conversion terminal to realize the connection between the data line and the fan-out wiring, so that even if the driver chip is located in the display area, the data line can still be connected to the driver chip.
  • the settings can also be set according to needs, so that the terminals and wiring of the conversion terminal layer can be arranged regularly, so as to make full use of the space of the conversion terminal layer, and set the wiring located around the display device in the conversion terminal in the existing display device. Layer, reduce the width of the frame of the display panel, and increase the screen-to-body ratio of the display panel.
  • the conversion terminal layer is formed with a clock signal line, one end of the clock signal line is connected to the conversion terminal, and the other end of the clock signal line is connected to the gate drive circuit of the display panel, Specifically, as shown in FIG. 4, clock signal lines 413 are formed on both sides of the conversion terminal layer 22, so that the clock signal lines are formed in the display area and the via area of the display panel, and do not need to be on the frame of the display panel.
  • the clock signal line is formed, the width of the frame of the display panel is reduced, and the screen-to-body ratio of the display panel is increased.
  • the first metal layer is etched to form a gate
  • the clock signal line is connected to the gate through a second via hole.
  • the gate can be connected to the clock signal line of the conversion terminal layer through the via hole, so that the clock signal line provides a signal to the gate driving circuit.
  • the conversion terminal layer is formed with an electrostatic protection circuit trace, one end of the electrostatic protection circuit trace is connected to the conversion terminal, and the other end of the electrostatic protection circuit trace is connected to the static electricity of the display panel. Protection circuit connection.
  • the electrostatic protection circuit trace is arranged on the conversion terminal layer.
  • via holes and connection traces can be provided to connect the electrostatic protection circuit to the electrostatic protection circuit trace, thereby enabling electrostatic protection Function, at the same time, the width of the frame of the display panel is reduced, and the screen-to-body ratio of the display panel is increased.
  • the conversion terminal layer is formed with a power supply voltage line.
  • the conversion terminal layer 22 is formed with a power supply voltage line 414.
  • the power supply voltage line is formed.
  • the embodiment of the present application can reduce the frame of the display panel and increase the screen-to-body ratio of the display panel.
  • the conversion terminal layer is formed with a test terminal
  • the first substrate is formed with a second opening at a position corresponding to the test terminal
  • the test terminal is formed in the conversion terminal layer, so that the test terminal It is connected with the display circuit
  • a second opening is formed on the first substrate, so that when the display panel is prepared, the second opening can be provided to test the display circuit, so as to ensure the normal operation of the circuit of the display panel.
  • the embodiment of the present application forms a via hole on the display device, wherein the via hole 51 is arranged around the display device, so that the display device There are vias around the device.
  • the wiring located at the border of the display device is set on the conversion terminal layer, and through holes are provided to convert each of the terminal layers.
  • the wiring is connected with the driving circuit layer to realize the functions of each circuit and each wiring. Because there are only the display area and the perforated area around the display area, the area of the perforated area is small and even will be affected in the actual product.
  • Encapsulation increases the screen-to-body ratio of the display panel, and even realizes a full screen; for example, the display panel in the prior art has clock signal lines arranged on the frame on both sides of the display panel, and the embodiment of the application uses the conversion terminal layer to form the clock signal The width of the frame on both sides of the display panel is reduced.
  • the conversion terminal layer forms the ESD protection circuit trace, the power supply voltage line, and the test terminal, which can also reduce the width of the corresponding frame or even eliminate the frame.
  • a power supply voltage line exists on the upper frame.
  • the power supply voltage line is arranged on the conversion terminal layer, so that the upper frame of the display panel is eliminated, thereby increasing the screen ratio of the display panel.
  • the width of the via hole is determined according to the size of the actual via hole.
  • the switching terminal layers respectively form the power supply voltage lines of the display panel on the upper side, thereby reducing the width of the upper frame compared with the display panel in the prior art;
  • the terminal layer forms a fan-out area and a driving circuit bonding area on the lower side, thereby reducing the width of the lower frame compared with the display panel in the prior art;
  • the conversion terminal layer forms clock signal lines on the left and right sides, which is compared with
  • the display panel in the prior art reduces the width of the borders on both sides, so that the widths of the borders around the display panel are reduced, thereby increasing the screen-to-body ratio of the display panel; of course, other traces can also be formed on the conversion terminal layer
  • the embodiment of the present application is not limited to this.
  • each wiring is formed by the conversion terminal layer
  • the wiring is set according to the setting position of each wiring in the display panel of the prior art, such as the display in the prior art.
  • the panel has clock signal lines arranged on both sides of the display panel.
  • the clock signal lines can also be arranged on both sides of the conversion terminal layer, so that the routing directions of the wires located in other areas of the display panel can be aligned with each other.
  • the wiring method does not need to be changed.
  • the wiring method of the wiring in the display area may not be changed, and the function of the clock signal line can be realized by directly connecting to the conversion terminal layer through the via hole.
  • the wiring will not change significantly, which makes it easier to form wiring on the display panel.
  • the circuit setting area 61 includes a gate drive circuit setting area 611, and a gate drive circuit setting area 611 located between the gate drive circuit setting area 611
  • a plurality of transistors, storage capacitors and connecting wires are provided in the gate driving circuit setting area 611, and a plurality of clock signal wires are provided in the clock signal line setting area.
  • the signal line setting area 612 is provided with vias 621, so that the wires in the clock signal line setting area 612 and the gate driving circuit setting area 611 can be provided on the switching terminal layer, and the transistors can be connected to the respective wires through the vias, so that The gate driving circuit works normally, and the width of the circuit setting area is reduced accordingly, and the screen-to-body ratio of the display panel is increased.
  • the material of the conversion terminal layer is the same as the material of the source and drain layers. In the via holes of the conversion terminal layer, it is considered that the material of each trace formed by etching the conversion terminal layer is Existing display panels are made of source and drain layer materials. In the embodiment of the present application, the material of the conversion terminal layer is the same as the material of the source and drain layers, so that the performance of the wiring formed by the conversion terminal layer does not change, so that each driver The circuit and drive traces work normally.
  • a conductive material is provided in the first via hole, the data line of the source and drain layer is connected to the conductive material, the conversion terminal is connected to the conductive material, and the first via is connected to the conductive material.
  • a conductive material is arranged in a via hole so that the data line is connected to the conversion terminal through the conductive material, which can prevent the data line from crossing the first barrier layer, the second substrate, and the second barrier layer when the first metal layer is directly connected to the conversion terminal ,
  • a conductive material is provided in the second via hole, the gate is connected to the conductive material, the clock signal line is connected to the conductive material, and the gate is connected to a clock signal line
  • the conductive material is provided in the second via to connect the gate and the clock signal line, thereby avoiding that when the gate is directly connected to the clock signal line, the gate needs to cross the first barrier layer and the second barrier layer.
  • the flexible layer, the second barrier layer, the buffer layer, the active layer, and the first gate insulating layer, and the span is relatively large, the embodiment of the present application is connected by conductive material, which prevents the gate from being broken or connected in the second via hole The bad problem makes the gate and the clock signal line connect well, so as to realize the corresponding function.
  • the material of the conductive material includes one of titanium, aluminum, and copper.
  • an embodiment of the present application provides a method for preparing a display panel, and the method for preparing a display panel includes:
  • the embodiment of the present application provides a method for preparing a display panel.
  • the method for preparing a display panel includes forming a conversion terminal layer on a first substrate, etching the conversion terminal layer to form a conversion terminal, and then forming a barrier layer on the conversion terminal layer, After the buffer layer, the active layer, the first gate insulating layer, the first metal layer, the second gate insulating layer, the second metal layer, and the interlayer insulating layer, the holes are exposed, and the exposure holes are etched to obtain the first Via holes, so that after the source and drain layers are formed on the interlayer insulating layer, the source and drain layers can be connected to the conversion terminal through the first via hole, and then a planarization layer, a pixel definition layer and a light-emitting function are formed on the source and drain layers Layer to obtain a display panel; in the display panel, a conversion terminal layer is formed on a first substrate, and the conversion terminal layer forms a conversion terminal, and the first substrate forms a first opening at the corresponding
  • the method before the step of providing the first substrate, the method further includes providing a substrate, and coating polyimide on the substrate to obtain the first substrate.
  • the method before the step of forming the source-drain layer on the interlayer insulating layer, the method further includes depositing a conductive material in the first via hole, so that the source-drain layer data line is connected to the conversion terminal through the conductive material .
  • an active layer, a first gate insulating layer, a first metal layer, a second gate insulating layer, a second metal layer, and an interlayer insulating layer are formed on the buffer layer, and holes are formed.
  • the step of exposing and etching the exposure hole to obtain the first via hole includes: forming a first metal layer on the first gate insulating layer.
  • the method before the step of forming the first metal layer on the first gate insulating layer, the method further includes: performing hole exposure, and etching the exposure hole to obtain a second via hole, and forming a second via hole in the second via hole. Conductive material.
  • an embodiment of the present application provides a display device, which includes:
  • the display panel includes a first substrate 21, a conversion terminal layer 22, a barrier layer 23, a buffer layer 24, a driving circuit layer 25, a planarization layer 26, a pixel definition layer 27, and a light-emitting function layer 28.
  • the terminal layer 22 is disposed on the first substrate 21, and a conversion terminal 221 is formed, the barrier layer 23 is disposed on the conversion terminal layer 22, and the buffer layer 24 is disposed on the barrier layer 23.
  • the driving circuit layer 25 includes an active layer 251, a first gate insulating layer 252, a first metal layer 253, a second gate insulating layer 254, a second metal layer 255, an interlayer insulating layer 256, and a source and drain layer 257.
  • the driving circuit layer 25 is disposed on the buffer layer 24, wherein the first substrate 21 is formed with a first opening 211 at a corresponding position of the conversion terminal 221, and the source and drain layer 257 is formed
  • the data line is connected to the conversion terminal 221 through a first via;
  • the auxiliary function layer 81 is arranged under the display panel
  • the driving chip 82 is arranged under the display panel and connected to the conversion terminal 221.
  • the embodiment of the application provides a display device, which includes a display panel, an auxiliary function layer and a driving chip.
  • a first opening is formed at the corresponding position of the conversion terminal, so that the data line formed by the source and drain layer is connected to the conversion terminal through the first via hole, so that in the process of connecting the driving chip and the display panel, the driving chip is connected to the source through the conversion terminal layer.
  • the data line of the drain layer is connected to realize the connection between the driver chip and the display panel.
  • the screen-to-body ratio of the panel alleviates the technical problem that the existing display device has more wires and causes a wider frame, which in turn leads to a low screen-to-body ratio of the display device.
  • the auxiliary function layer 81 is formed with a third opening 811, the driving chip 82 passes through the third opening 811 and is connected to the conversion terminal 221, and the driving chip During the connection process with the conversion terminal, the driver chip can be set under the auxiliary function layer, and then the conversion terminal can be connected through the via hole to connect the driver chip to the conversion terminal, or as shown in Figure 8, the auxiliary function can be directly connected
  • the layer and the first substrate form an opening so that the driving chip is directly connected to the conversion terminal layer.
  • the auxiliary function layer includes a support layer, a heat dissipation layer and a back plate.
  • the auxiliary function layer is provided under the display panel, so that the back plate and the support layer support the display panel and ensure the flatness of the display panel.
  • the heat dissipation layer is used to dissipate the driver chip and the display panel to avoid excessive temperature of the driver chip and protect the driver chip.
  • the conversion terminal layer is formed with a fan-out wire, one end of the fan-out wire is connected to the conversion terminal, and the other end of the fan-out wire passes through the first
  • the via hole is connected to the data line of the source and drain layer.
  • the conversion terminal layer is formed with a clock signal line, one end of the clock signal line is connected to the conversion terminal, and the other end of the clock signal line is connected to the display panel
  • the gate drive circuit is connected.
  • the first metal layer is etched to form a gate, and the clock signal line is connected to the gate through a second via hole.
  • the conversion terminal layer is formed with an electrostatic protection circuit trace, one end of the electrostatic protection circuit trace is connected to the conversion terminal, and the electrostatic protection circuit trace is The other end is connected to the electrostatic protection circuit of the display panel.
  • the conversion terminal layer is formed with a test terminal
  • the first substrate is formed with a second opening at a position corresponding to the test terminal.
  • the barrier layer includes a first barrier layer, a second barrier layer, and a second substrate located between the first barrier layer and the second barrier layer,
  • the first barrier layer is disposed on the first substrate
  • the conversion terminal layer includes a first part disposed on the first substrate and a second part disposed on the second substrate.
  • the material of the conversion terminal layer is the same as the material of the source and drain layer.
  • the material of the conversion terminal layer includes at least one of titanium, aluminum, and copper.
  • the embodiments of the present application provide a display panel, a manufacturing method thereof, and a display device.
  • the display panel includes a first substrate, a conversion terminal layer, a barrier layer, a buffer layer, a driving circuit layer, a planarization layer, a pixel definition layer, and a light emitting function
  • the conversion terminal layer is disposed on the first substrate to form conversion terminals
  • the barrier layer is disposed on the conversion terminal layer
  • the buffer layer is disposed on the barrier layer
  • the circuit layer includes an active layer, a first gate insulating layer, a first metal layer, a second gate insulating layer, a second metal layer, an interlayer insulating layer, and a source and drain layer.
  • the frame has a fan-out area, binding terminals, and bending area, which reduces the width of the frame of the display panel, increases the screen-to-body ratio of the display panel, and alleviates the existing display devices with more wiring leading to a wider frame, which in turn leads to The technical problem of the relatively low screen occupancy of the display device.

Abstract

一种显示面板及制备方法、显示装置，显示面板通过在第一衬底（21）上形成转换端子层（22），并使转换端子层（22）形成转换端子（221），第一衬底（21）在转换端子（221）对应位置形成第一开口（211），使得源漏极层（257）形成的数据线通过第一过孔与转换端子（221）连接，使得在驱动芯片（82）与显示面板的连接过程中，驱动芯片（82）通过转换端子层（22）与源漏极层（257）的数据线连接。

Description

显示面板及其制备方法、显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制备方法、显示装置。
 背景技术
随着显示技术的发展，现有显示面板都朝着高屏占比的方向设计，以得到全面屏，但由于显示面板的边框处存在电路和金属走线区域，使得显示面板的边框较大，而边框区域无法显示，导致显示面板的屏占比较低，如图1所示，现有显示装置1包括显示区12和非显示区11，所述非显示区11包括第一电源电压线111、面板测试线112、栅极驱动电路113、第二电源电压线114、静电防护电路115、第一扇出区116、第三电源电压线117、阵列测试线118、弯折区119、第二扇出区120、驱动芯片121、柔性电路板122，从图1中可以看出，各个走线、各个区域、以及各个电路分布在显示面板的四周，且走线的数量、宽度较大，导致非显示区的宽度较大，从而导致显示装置的边框较大，显示装置的屏占比较低。
所以，现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
 技术问题
本申请实施例提供一种显示面板及其制备方法、显示装置，用以缓解现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请实施例提供一种显示面板，该显示面板包括：
第一衬底；
转换端子层，设置于所述第一衬底上，形成有转换端子；
阻挡层，设置于所述转换端子层上；
缓冲层，设置于所述阻挡层上；
驱动电路层，包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层、源漏极层，所述驱动电路层设置于所述缓冲层上；
平坦化层；
像素定义层；
发光功能层；
其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接。
在一些实施例中，所述转换端子层形成有扇出走线，所述扇出走线的一端与所述转换端子连接，所述扇出走线的另一端通过第一过孔与所述源漏极层的数据线连接。
在一些实施例中，所述转换端子层形成有时钟信号线，所述时钟信号线的一端与所述转换端子连接，所述时钟信号线的另一端与显示面板的栅极驱动电路连接。
在一些实施例中，所述第一金属层刻蚀形成有栅极，所述时钟信号线通过第二过孔与所述栅极连接。
在一些实施例中，所述转换端子层形成有静电保护电路走线，所述静电保护电路走线一端与所述转换端子连接，所述静电保护电路走线的另一端与显示面板的静电保护电路连接。
在一些实施例中，所述转换端子层形成有测试端子，在对应所述测试端子的设置位置，所述第一衬底形成有第二开口。
在一些实施例中，所述阻挡层包括第一阻挡层、第二阻挡层、以及位于所述第一阻挡层和第二阻挡层之间的第二衬底，所述第一阻挡层设置于所述第一衬底上，所述转换端子层包括设置于所述第一衬底上的第一部分、以及设置于所述第二衬底上的第二部分。
在一些实施例中，所述转换端子层的材料与所述源漏极层的材料相同。
同时，本申请实施例提供一种显示面板制备方法，该显示面板制备方法包括：
提供第一衬底；
在所述第一衬底上形成转换端子层，并蚀刻所述转换端子层形成转换端子；
在所述转换端子层上形成阻挡层；
在所述阻挡层上形成缓冲层；
在所述缓冲层上形成有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层和层间绝缘层，并进行孔曝光，并对曝光孔进行蚀刻得到第一过孔；
在所述层间绝缘层上形成源漏极层，得到驱动电路层，所述源漏极层通过所述第一过孔与转换端子连接；
在所述源漏极层上形成平坦化层、像素定义层和发光功能层，得到显示面板。
同时，本申请实施例提供一种显示装置，该显示装置包括：
显示面板，所述显示面板包括第一衬底、转换端子层、阻挡层、缓冲层、驱动电路层、平坦化层、像素定义层和发光功能层，所述转换端子层设置于所述第一衬底上，形成有转换端子，所述阻挡层设置于所述转换端子层上，所述缓冲层设置于所述阻挡层上，所述驱动电路层包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层和源漏极层，所述驱动电路层设置于所述缓冲层上，其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接；
辅助功能层，设置于所述显示面板下；
驱动芯片，设置于所述显示面板下，与所述转换端子连接。
在一些实施例中，所述辅助功能层形成有第三开口，所述驱动芯片穿过所述第三开口与所述转换端子连接。
在一些实施例中，所述辅助功能层包括支撑层，散热层和背板。
在一些实施例中，所述转换端子层形成有扇出走线，所述扇出走线的一端与所述转换端子连接，所述扇出走线的另一端通过第一过孔与所述源漏极层的数据线连接。
在一些实施例中，所述转换端子层形成有时钟信号线，所述时钟信号线的一端与所述转换端子连接，所述时钟信号线的另一端与显示面板的栅极驱动电路连接。
在一些实施例中，所述第一金属层刻蚀形成有栅极，所述时钟信号线通过第二过孔与所述栅极连接。
在一些实施例中，所述转换端子层形成有静电保护电路走线，所述静电保护电路走线一端与所述转换端子连接，所述静电保护电路走线的另一端与显示面板的静电保护电路连接。
在一些实施例中，所述转换端子层形成有测试端子，在对应所述测试端子的设置位置，所述第一衬底形成有第二开口。
在一些实施例中，所述阻挡层包括第一阻挡层、第二阻挡层、以及位于所述第一阻挡层和第二阻挡层之间的第二衬底，所述第一阻挡层设置于所述第一衬底上，所述转换端子层包括设置于所述第一衬底上的第一部分、以及设置于所述第二衬底上的第二部分。
在一些实施例中，所述转换端子层的材料与所述源漏极层的材料相同。
在一些实施例中，所述转换端子层的材料包括钛、铝、铜中的至少一种。
 有益效果
本申请提供一种显示面板及其制备方法、显示装置，该显示面板包括第一衬底、转换端子层、阻挡层、缓冲层、驱动电路层、平坦化层、像素定义层和发光功能层，所述转换端子层设置于所述第一衬底上，形成有转换端子，所述阻挡层设置于所述转换端子层上，所述缓冲层设置于所述阻挡层上，所述驱动电路层包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层和源漏极层，所述驱动电路层设置于所述缓冲层上，其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接；本申请通过在第一衬底上形成转换端子层，并使转换端子层形成转换端子，第一衬底在转换端子对应位置形成第一开口，使得源漏极层形成的数据线通过第一过孔与所述转换端子连接，使得在驱动芯片与显示面板的连接过程中，驱动芯片通过转换端子层与源漏极层的数据线连接，从而实现驱动芯片与显示面板的连接，无需在显示面板的下边框设置扇出区、绑定端子、弯折区，使得显示面板的边框的宽度降低，提高了显示面板的屏占比，缓解了现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
 附图说明
图1为现有显示面板的示意图。
图2为本申请实施例提供的显示面板的第一示意图。
图3为本申请实施例提供的显示面板的第二示意图。
图4为本申请实施例提供的转换端子层的走线排布示意图。
图5为本申请实施例提供的过孔在现有显示面板的设置位置的示意图。
图6为本申请实施例提供的过孔在现有电路设置区的设置位置的示意图。
图7为本申请实施例提供的显示面板驱动方法的流程图。
图8为本申请实施例提供的显示装置的示意图。
 本发明的实施方式
本申请提供一种显示面板及其制备方法、显示装置，为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
如图2所示，本申请实施例提供一种显示面板，该显示面板包括：
第一衬底21；
转换端子层22，设置于所述第一衬底22上，形成有转换端子221；
阻挡层23，设置于所述转换端子层22上；
缓冲层24，设置于所述阻挡层23上；
驱动电路层25，包括有源层251、第一栅极绝缘层252、第一金属层253、第二栅极绝缘层254、第二金属层255、层间绝缘层256、源漏极层257，所述驱动电路层25设置于所述缓冲层24上；
平坦化层26；
像素定义层27；
发光功能层28；
其中，所述第一衬底21在所述转换端子221的对应位置形成有第一开口211，所述源漏极层257形成的数据线通过第一过孔与所述转换端子221连接。
本申请提供一种显示面板及其制备方法、显示装置，该显示面板包括第一衬底、转换端子层、阻挡层、缓冲层、驱动电路层、平坦化层、像素定义层和发光功能层，所述转换端子层设置于所述第一衬底上，形成有转换端子，所述阻挡层设置于所述转换端子层上，所述缓冲层设置于所述阻挡层上，所述驱动电路层包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层和源漏极层，所述驱动电路层设置于所述缓冲层上，其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接；本申请通过在第一衬底上形成转换端子层，并使转换端子层形成转换端子，第一衬底在转换端子对应位置形成第一开口，使得源漏极层形成的数据线通过第一过孔与所述转换端子连接，使得在驱动芯片与显示面板的连接过程中，驱动芯片通过转换端子层与源漏极层的数据线连接，从而实现驱动芯片与显示面板的连接，无需在显示面板的下边框设置扇出区、绑定端子、弯折区，使得显示面板的边框的宽度降低，提高了显示面板的屏占比，缓解了现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
需要说明的是，图2中未示出数据线，同时，图2中未示出第一过孔，第一过孔被源漏极层遮挡。
在一种实施例中，所述发光功能层28包括像素电极层281、发光材料层282和公共电极层283，所述像素电极层的材料包括氧化铟锡，所述发光材料层设置于所述像素定义层定义出的像素区域，所述公共电极层的材料包括氧化铟锡。
在一种实施例中，如图2所示，所述显示面板包括显示区291和打孔区292，在形成过孔，以使源漏极层和栅极层的金属走线通过过孔连接至转换端子层时，可将过孔形成在打孔区，从而避免过孔影响到显示区的电路的正常工作。
在一种实施例中，所述打孔区围绕所述显示区设置，使打孔区围绕所述显示区设置，从而使得现有显示装置中，位于显示装置的四周边框的走线均可以设置在转换端子层，然后通过过孔连接到显示区的驱动电路，从而使得显示面板的各个电路正常工作，且降低显示面板的边框的宽度，提高显示面板的屏占比。
在一种实施例中，如图3所示，所述阻挡层23包括第一阻挡层311、第二阻挡层313、以及位于所述第一阻挡层311和第二阻挡层313之间的第二衬底312，所述第一阻挡层311设置于所述第一衬底21上，所述转换端子层包括设置于所述第一衬底上的第一部分、以及设置于所述第二衬底上的第二部分；对于阻挡层包括第一阻挡层、第二衬底和第二阻挡层的显示面板，通过在第一衬底上形成转换端子层的第一部分，使得第一部分形成转换端子，然后在第二衬底上形成转换端子层的第二部分，使得第二部分可以形成走线，而转换端子设置在第一衬底上，使得驱动芯片在与显示面板连接时，无需在多个膜层上形成开口，且开口较浅，不会对阻挡层的隔绝水氧的能力产生影响，避免水氧的侵蚀，同时，对于设置在第二衬底上的转换端子层的第二部分，针对在第一金属层和源漏极层的金属直接连接到转换端子层时，第一金属层和源漏极层的金属走线或者端子的高度较低，第一金属层和源漏极层的金属走线或者端子的断裂的可能性降低。
在一种实施例中，在第一衬底下侧形成有开口时，可以在完成显示装置中驱动芯片的设置后，对开口处进行封装，避免水氧对转换端子层和驱动芯片侵蚀，其中，封装的手段和过程可以采用现有封装过孔和开口的方式，本申请实施例不限于此，对于能够避免水氧入侵的方式均可采用。
在一种实施例中，将转换端子设置在打孔区，使得数据线直接穿过过孔与转换端子连接。
在一种实施例中，所述转换端子层形成有扇出走线，所述扇出走线的一端与所述转换端子连接，所述扇出走线的另一端通过第一过孔与所述源漏极层的数据线连接，具体的，如图4所示，在转换端子层22的下侧设有扇出区411和驱动芯片绑定区412，在扇出区411内设有扇出走线4111，在驱动芯片绑定区12内设有转换端子，在转换端子与数据线连接的过程中，可以使转换端子层形成扇出走线，然后通过第一过孔将数据线和扇出走线连接，而扇出走线又与转换端子连接，从而实现将数据线与扇出走线连接，这样可以使得驱动芯片即使位于显示区内，数据线仍然能够与驱动芯片连接，相应的，其他走线与端子的设置也可以根据需要设定，使得转换端子层的端子与走线可以规则的排布，从而充分利用转换端子层的空间，将现有显示装置中，位于显示装置四周的走线设置在转换端子层，降低显示面板的边框的宽度，提高显示面板的屏占比。
在一种实施例中，所述转换端子层形成有时钟信号线，所述时钟信号线的一端与所述转换端子连接，所述时钟信号线的另一端与显示面板的栅极驱动电路连接，具体的，如图4所示，将转化端子层22的两侧形成有时钟信号线413，使得时钟信号线形成在显示面板的显示区和过孔区内，而不需要在显示面板的边框上形成时钟信号线，降低了显示面板的边框的宽度，提高了显示面板的屏占比。
在一种实施例中，所述第一金属层刻蚀形成有栅极，所述时钟信号线通过第二过孔与所述栅极连接，在时钟信号线与栅极驱动电路的连接过程中，可以使得栅极通过过孔连接至转换端子层的时钟信号线，从而使得时钟信号线对栅极驱动电路提供信号。
在一种实施例中，所述转换端子层形成有静电保护电路走线，所述静电保护电路走线一端与所述转换端子连接，所述静电保护电路走线的另一端与显示面板的静电保护电路连接，在显示面板中，将静电保护电路走线设置在转换端子层，相应的，可以提供设置过孔和连接走线，使得静电保护电路与静电保护电路走线连接，从而使得静电保护功能，同时使得显示面板的边框的宽度降低，提高了显示面板的屏占比。
在一种实施例中，所述转换端子层形成有电源电压线，具体的，如图4所示，转换端子层22形成有电源电压线414，相较于现有技术中将电源电压线设置在显示装置的边框处，本申请实施例可以降低显示面板的边框，提高显示面板的屏占比。
在一种实施例中，所述转换端子层形成有测试端子，在对应所述测试端子的设置位置，所述第一衬底形成有第二开口，在转换端子层形成测试端子，使得测试端子与显示电路连接，并在第一衬底上形成第二开口，使得在制备显示面板时，可以提供第二开口对显示电路进行测试，从而保证显示面板的电路正常工作。
在一种实施例中，如图5所示，针对于现有技术中的显示装置，本申请实施例通过在显示装置上形成过孔，其中过孔51围绕所述显示装置设置，使得在显示装置的四周均存在过孔，相应的在不改变显示区域的走线和元件的排列的同时，将位于显示装置边框处的走线设置在转换端子层，并提供过孔将转换端子层的各个走线与驱动电路层连接，从而实现各个电路和各个走线的功能，且由于仅存在显示区、以及位于显示区四周的打孔区，而打孔区面积较小甚至在实际产品中会被封装，使得显示面板的屏占比提高，甚至实现全面屏；例如现有技术中的显示面板是将时钟信号线设置在显示面板的两侧的边框，本申请实施例使用转换端子层形成时钟信号线，使得显示面板的两侧的边框的宽度减小，相应的，转换端子层形成静电防护电路走线、电源电压线、测试端子，也可以相应的降低对应的边框的宽度，甚至消除边框，例如现有技术中的显示面板中，上边框存在电源电压线，本申请实施例将电源电压线设置在转换端子层，使得显示面板的上边框被消除，从而提高显示面板屏占比。
需要说明的是，图5中为了使过孔设置的位置较为清楚的示出，以虚线示出，在实际过孔中，过孔的宽度根据实际过孔的大小决定。
从图4中可以看出，对应于现有技术中的显示面板，转换端子层分别在上侧形成显示面板的电源电压线，从而相较于现有技术的显示面板降低上边框的宽度；转换端子层在下侧形成扇出区和驱动电路绑定区，从而相较于现有技术中的显示面板降低下边框的宽度；转换端子层在左侧和右侧形成时钟信号线，从而相较于现有技术中的显示面板降低两侧边框的宽度，从而使得显示面板的四周的边框的宽度均降低，从而提高了显示面板的屏占比；当然，在转换端子层还可以形成其他各个走线，本申请实施例不限于此，同时，由于转换端子层形成各个走线时，是根据现有技术的显示面板中的各个走线的设置位置对走线进行设置，例如现有技术中的显示面板将时钟信号线设置在显示面板两侧，本申请实施例中也可以将时钟信号线设置在转换端子层的两侧，这样可以使得在显示面板中位于其他区域的走线的走线方向和走线方式均不需要改变，例如走线在显示区内的走线方式可以不改变，直接通过过孔连接至转换端子层即可实现时钟信号线的功能，即本申请实施例对显示面板的线路不会产生较大的改变，使得在显示面板形成走线时较为简单。
具体的，如图6所述，针对现有显示装置中右侧的电路设置区61，所述电路设置区61包括栅极驱动电路设置区611、以及位于栅极驱动电路设置区611之间的时钟信号线设置区612，在栅极驱动电路设置区611内设有多个晶体管、存储电容和连接走线，在时钟信号线设置区设有多条时钟信号走线，本申请实施例在时钟信号线设置区612设置过孔621，使得时钟信号线设置区612和栅极驱动电路设置区611内的走线均可设置在转换端子层，而晶体管可以通过过孔连接至各个走线，使得栅极驱动电路正常工作，相应的缩小电路设置区所占的宽度，提高显示面板的屏占比。
在一种实施例中，所述转换端子层的材料与所述源漏极层的材料相同，在转换端子层的设置过孔中，考虑到转换端子层刻蚀形成的各个走线的材料在现有显示面板中采用源漏极层材料制备，本申请实施例通过使转换端子层的材料与源漏极层的材料相同，使得转换端子层形成的走线的性能不改变，从而使得各个驱动电路和驱动走线正常工作。
在一种实施例中，所述第一过孔内设有导电材料，所述源漏极层的数据线与所述导电材料连接，所述转换端子与所述导电材料连接，在所述第一过孔内设置导电材料，使得数据线通过导电材料与转换端子连接，可以避免第一金属层直接连接转换端子时，数据线需要跨过第一阻挡层、第二衬底、第二阻挡层、缓冲层、有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层，避免了数据线在第一过孔中出现断裂或者连接不良的问题，使得数据线与转换端子具有良好的接触，从而实现相应的功能。
在一种实施例中，所述第二过孔内设有导电材料，所述栅极与所述导电材料连接，所述时钟信号线与所述导电材料连接，在栅极与时钟信号线连接的过程中，通过在第二过孔中设置导电材料，使得导电材料连接栅极和时钟信号线，从而避免了栅极直接连接时钟信号线时，栅极需要跨过第一阻挡层、第二柔性层、第二阻挡层、缓冲层、有源层和第一栅极绝缘层，而该跨度较大，本申请实施例通过导电材料连接，避免了栅极在第二过孔中断裂或者连接不良的问题，使得栅极与时钟信号线连接良好，从而实现相应的功能。
在一种实施例中，所述导电材料的材料包括钛、铝、铜中的一种。
如图7所示，本申请实施例提供一种显示面板制备方法，该显示面板制备方法包括：
S1，提供第一衬底；
S2，在所述第一衬底上形成转换端子层，并蚀刻所述转换端子层形成转换端子；
S3，在所述转换端子层上形成阻挡层；
S4，在所述阻挡层上形成缓冲层；
S5，在所述缓冲层上形成有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层和层间绝缘层，并进行孔曝光，并对曝光孔进行蚀刻得到第一过孔；
S6，在所述层间绝缘层上形成源漏极层，得到驱动电路层，所述源漏极层的数据线通过所述第一过孔与转换端子连接；
S7，在所述源漏极层上形成平坦化层、像素定义层和发光功能层，得到显示面板。
本申请实施例提供一种显示面板制备方法，该显示面板制备方法通过在第一衬底上形成转换端子层，并蚀刻所述转换端子层形成转换端子，然后在转换端子层上形成阻挡层、缓冲层、有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层和层间绝缘层后，进行孔曝光，并对曝光孔进行蚀刻得到第一过孔，使得在层间绝缘层上形成源漏极层后，源漏极层能够通过第一过孔与转换端子连接，然后在源漏极层上形成平坦化层、像素定义层和发光功能层，得到显示面板；该显示面板中在第一衬底上形成转换端子层，并使转换端子层形成转换端子，第一衬底在转换端子对应位置形成第一开口，使得源漏极层形成的数据线通过第一过孔与所述转换端子连接，使得在驱动芯片与显示面板的连接过程中，驱动芯片通过转换端子层与源漏极层的数据线连接，从而实现驱动芯片与显示面板的连接，无需在显示面板的下边框设置扇出区、绑定端子、弯折区，使得显示面板的边框的宽度降低，提高了显示面板的屏占比，缓解了现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
在一种实施例中，在提供第一衬底的步骤之前，还包括提供基板，在所述基板上涂布聚酰亚胺得到第一衬底。
在一种实施例中，在所述层间绝缘层上形成源漏极层的步骤之前，还包括在第一过孔中沉积导电材料，使得源漏极层数据线通过导电材料与转换端子连接。
在一种实施例中，在所述缓冲层上形成有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层和层间绝缘层，并进行孔曝光，并对曝光孔进行蚀刻得到第一过孔的步骤包括：在第一栅极绝缘层上形成第一金属层。
在一种实施例中，在第一栅极绝缘层上形成第一金属层的步骤前，还包括：进行孔曝光，并对曝光孔进行蚀刻得到第二过孔，在第二过孔内形成导电材料。
如图8所示，本申请实施例提供一种显示装置，该显示装置包括：
显示面板，所述显示面板包括第一衬底21、转换端子层22、阻挡层23、缓冲层24、驱动电路层25、平坦化层26、像素定义层27和发光功能层28，所述转换端子层22设置于所述第一衬底21上，形成有转换端子221，所述阻挡层23设置于所述转换端子层22上，所述缓冲层24设置于所述阻挡层23上，所述驱动电路层25包括有源层251、第一栅极绝缘层252、第一金属层253、第二栅极绝缘层254、第二金属层255、层间绝缘层256和源漏极层257，所述驱动电路层25设置于所述缓冲层24上，其中，所述第一衬底21在所述转换端子221的对应位置形成有第一开口211，所述源漏极层257形成的数据线通过第一过孔与所述转换端子221连接；
辅助功能层81，设置于所述显示面板下；
驱动芯片82，设置于所述显示面板下，与所述转换端子221连接。
本申请实施例提供一种显示装置，该显示装置包括显示面板、辅助功能层和驱动芯片，通过在第一衬底上形成转换端子层，并使转换端子层形成转换端子，第一衬底在转换端子对应位置形成第一开口，使得源漏极层形成的数据线通过第一过孔与所述转换端子连接，使得在驱动芯片与显示面板的连接过程中，驱动芯片通过转换端子层与源漏极层的数据线连接，从而实现驱动芯片与显示面板的连接，无需在显示面板的下边框设置扇出区、绑定端子、弯折区，使得显示面板的边框的宽度降低，提高了显示面板的屏占比，缓解了现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
在一种实施例中，如图8所示，所述辅助功能层81形成有第三开口811，所述驱动芯片82穿过所述第三开口811与所述转换端子221连接，在驱动芯片与转换端子的连接过程中，可以通过采用驱动芯片设置在辅助功能层的下方，然后通过过孔连接转换端子的方式使得驱动芯片与转换端子连接，也可以如图8所示，直接将辅助功能层和第一衬底形成开口，使得驱动芯片直接与转换端子层连接。
在一种实施例中，所述辅助功能层包括支撑层，散热层和背板，通过在显示面板的下方设置辅助功能层，使得背板和支撑层对显示面板进行支撑，保证显示面板的平整性，同时，采用散热层对驱动芯片和显示面板进行散热，避免驱动芯片温度过高，保护驱动芯片。
在一种实施例中，在所述显示装置中，所述转换端子层形成有扇出走线，所述扇出走线的一端与所述转换端子连接，所述扇出走线的另一端通过第一过孔与所述源漏极层的数据线连接。
在一种实施例中，在所述显示装置中，所述转换端子层形成有时钟信号线，所述时钟信号线的一端与所述转换端子连接，所述时钟信号线的另一端与显示面板的栅极驱动电路连接。
在一种实施例中，在所述显示装置中，所述第一金属层刻蚀形成有栅极，所述时钟信号线通过第二过孔与所述栅极连接。
在一种实施例中，在所述显示装置中，所述转换端子层形成有静电保护电路走线，所述静电保护电路走线一端与所述转换端子连接，所述静电保护电路走线的另一端与显示面板的静电保护电路连接。
在一种实施例中，在所述显示装置中，所述转换端子层形成有测试端子，在对应所述测试端子的设置位置，所述第一衬底形成有第二开口。
在一种实施例中，在所述显示装置中，所述阻挡层包括第一阻挡层、第二阻挡层、以及位于所述第一阻挡层和第二阻挡层之间的第二衬底，所述第一阻挡层设置于所述第一衬底上，所述转换端子层包括设置于所述第一衬底上的第一部分、以及设置于所述第二衬底上的第二部分。
在一种实施例中，在所述显示装置中，所述转换端子层的材料与所述源漏极层的材料相同。
在一种实施例中，在所述显示装置中，所述转换端子层的材料包括钛、铝、铜中的至少一种。
根据以上实施例可知：
本申请实施例提供一种显示面板及其制备方法、显示装置，该显示面板包括第一衬底、转换端子层、阻挡层、缓冲层、驱动电路层、平坦化层、像素定义层和发光功能层，所述转换端子层设置于所述第一衬底上，形成有转换端子，所述阻挡层设置于所述转换端子层上，所述缓冲层设置于所述阻挡层上，所述驱动电路层包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层和源漏极层，所述驱动电路层设置于所述缓冲层上，其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接；本申请通过在第一衬底上形成转换端子层，并使转换端子层形成转换端子，第一衬底在转换端子对应位置形成第一开口，使得源漏极层形成的数据线通过第一过孔与所述转换端子连接，使得在驱动芯片与显示面板的连接过程中，驱动芯片通过转换端子层与源漏极层的数据线连接，从而实现驱动芯片与显示面板的连接，无需在显示面板的下边框设置扇出区、绑定端子、弯折区，使得显示面板的边框的宽度降低，提高了显示面板的屏占比，缓解了现有显示装置存在走线较多导致边框较宽，进而导致显示装置的屏占比较低的技术问题。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (20)

  1. 一种显示面板，其包括：
    第一衬底；
    转换端子层，设置于所述第一衬底上，形成有转换端子；
    阻挡层，设置于所述转换端子层上；
    缓冲层，设置于所述阻挡层上；
    驱动电路层，包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层、源漏极层，所述驱动电路层设置于所述缓冲层上；
    平坦化层；
    像素定义层；
    发光功能层；
    其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接。
  2. 如权利要求1所述的显示面板，其中，所述转换端子层形成有扇出走线，所述扇出走线的一端与所述转换端子连接，所述扇出走线的另一端通过第一过孔与所述源漏极层的数据线连接。
  3. 如权利要求1所述的显示面板，其中，所述转换端子层形成有时钟信号线，所述时钟信号线的一端与所述转换端子连接，所述时钟信号线的另一端与显示面板的栅极驱动电路连接。
  4. 如权利要求3所述的显示面板，其中，所述第一金属层刻蚀形成有栅极，所述时钟信号线通过第二过孔与所述栅极连接。
  5. 如权利要求1所述的显示面板，其中，所述转换端子层形成有静电保护电路走线，所述静电保护电路走线一端与所述转换端子连接，所述静电保护电路走线的另一端与显示面板的静电保护电路连接。
  6. 如权利要求1所述的显示面板，其中，所述转换端子层形成有测试端子，在对应所述测试端子的设置位置，所述第一衬底形成有第二开口。
  7. 如权利要求1所述的显示面板，其中，所述阻挡层包括第一阻挡层、第二阻挡层、以及位于所述第一阻挡层和第二阻挡层之间的第二衬底，所述第一阻挡层设置于所述第一衬底上，所述转换端子层包括设置于所述第一衬底上的第一部分、以及设置于所述第二衬底上的第二部分。
  8. 如权利要求1所述的显示面板，其中，所述转换端子层的材料与所述源漏极层的材料相同。
  9. 一种显示面板制备方法，其包括：
    提供第一衬底；
    在所述第一衬底上形成转换端子层，并蚀刻所述转换端子层形成转换端子；
    在所述转换端子层上形成阻挡层；
    在所述阻挡层上形成缓冲层；
    在所述缓冲层上形成有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层和层间绝缘层，并进行孔曝光，并对曝光孔进行蚀刻得到第一过孔；
    在所述层间绝缘层上形成源漏极层，得到驱动电路层，所述源漏极层通过所述第一过孔与转换端子连接；
    在所述源漏极层上形成平坦化层、像素定义层和发光功能层，得到显示面板。
  10. 一种显示装置，其包括：
    显示面板，所述显示面板包括第一衬底、转换端子层、阻挡层、缓冲层、驱动电路层、平坦化层、像素定义层和发光功能层，所述转换端子层设置于所述第一衬底上，形成有转换端子，所述阻挡层设置于所述转换端子层上，所述缓冲层设置于所述阻挡层上，所述驱动电路层包括有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层、层间绝缘层和源漏极层，所述驱动电路层设置于所述缓冲层上，其中，所述第一衬底在所述转换端子的对应位置形成有第一开口，所述源漏极层形成的数据线通过第一过孔与所述转换端子连接；
    辅助功能层，设置于所述显示面板下；
    驱动芯片，设置于所述显示面板下，与所述转换端子连接。
  11. 如权利要求10所述的显示装置，其中，所述辅助功能层形成有第三开口，所述驱动芯片穿过所述第三开口与所述转换端子连接。
  12. 如权利要求10所述的显示装置，其中，所述辅助功能层包括支撑层，散热层和背板。
  13. 如权利要求10所述的显示装置，其中，所述转换端子层形成有扇出走线，所述扇出走线的一端与所述转换端子连接，所述扇出走线的另一端通过第一过孔与所述源漏极层的数据线连接。
  14. 如权利要求10所述的显示装置，其中，所述转换端子层形成有时钟信号线，所述时钟信号线的一端与所述转换端子连接，所述时钟信号线的另一端与显示面板的栅极驱动电路连接。
  15. 如权利要求14所述的显示装置，其中，所述第一金属层刻蚀形成有栅极，所述时钟信号线通过第二过孔与所述栅极连接。
  16. 如权利要求10所述的显示装置，其中，所述转换端子层形成有静电保护电路走线，所述静电保护电路走线一端与所述转换端子连接，所述静电保护电路走线的另一端与显示面板的静电保护电路连接。
  17. 如权利要求10所述的显示装置，其中，所述转换端子层形成有测试端子，在对应所述测试端子的设置位置，所述第一衬底形成有第二开口。
  18. 如权利要求10所述的显示装置，其中，所述阻挡层包括第一阻挡层、第二阻挡层、以及位于所述第一阻挡层和第二阻挡层之间的第二衬底，所述第一阻挡层设置于所述第一衬底上，所述转换端子层包括设置于所述第一衬底上的第一部分、以及设置于所述第二衬底上的第二部分。
  19. 如权利要求10所述的显示装置，其中，所述转换端子层的材料与所述源漏极层的材料相同。
  20. 如权利要求19所述的显示装置，其中，所述转换端子层的材料包括钛、铝、铜中的至少一种。
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112435988B (zh) * 2020-12-14 2024-02-27 合肥维信诺科技有限公司 阵列基板、显示面板和显示装置
CN112885877A (zh) * 2021-01-19 2021-06-01 京东方科技集团股份有限公司 显示面板及其制备方法、显示装置
KR20220129141A (ko) * 2021-03-15 2022-09-23 삼성디스플레이 주식회사 표시 장치 및 이를 포함하는 타일형 표시 장치
CN116096168A (zh) * 2021-11-02 2023-05-09 武汉华星光电半导体显示技术有限公司 显示面板和显示装置
CN114171563B (zh) * 2021-11-30 2023-07-04 武汉华星光电半导体显示技术有限公司 显示面板和显示装置
CN114220822A (zh) * 2021-12-13 2022-03-22 武汉华星光电半导体显示技术有限公司 显示面板、拼接屏
WO2023159511A1 (zh) * 2022-02-25 2023-08-31 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104485349A (zh) * 2014-12-26 2015-04-01 昆山工研院新型平板显示技术中心有限公司 无边框显示屏器件
CN104992956A (zh) * 2015-05-15 2015-10-21 深圳市华星光电技术有限公司 无边框显示装置及其制作方法
CN207517684U (zh) * 2017-11-30 2018-06-19 云谷（固安）科技有限公司 阵列基板及显示屏
CN109585462A (zh) * 2019-01-23 2019-04-05 京东方科技集团股份有限公司 一种阵列基板及其制作方法、柔性显示面板、拼接屏
WO2019135783A1 (en) * 2018-01-04 2019-07-11 Didrew Technology (Bvi) Limited Frameless lcd display with embedded ic system and method of manufacturing thereof
CN110265440A (zh) * 2019-06-06 2019-09-20 惠州市华星光电技术有限公司 显示面板及其制作方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101401988B1 (ko) * 2012-09-07 2014-05-30 주식회사 동부하이텍 반도체 패키지 및 반도체 패키지 형성 방법
CN106653680A (zh) * 2015-11-04 2017-05-10 中芯国际集成电路制造(上海)有限公司 接触孔的形成方法
CN105244365B (zh) * 2015-11-18 2018-09-25 上海天马有机发光显示技术有限公司 显示装置、制造方法及显示设备
KR102423813B1 (ko) * 2015-11-27 2022-07-22 삼성전자주식회사 반도체 소자
US10409102B2 (en) * 2016-09-08 2019-09-10 Japan Display Inc. Display device
CN106384740A (zh) * 2016-09-20 2017-02-08 昆山工研院新型平板显示技术中心有限公司 无边框显示装置及其制备方法
CN106298813B (zh) * 2016-09-30 2019-11-01 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置
KR102614612B1 (ko) * 2016-10-25 2023-12-19 엘지디스플레이 주식회사 관통홀을 통해 기판의 앞면과 배면을 연결한 평판 표시장치
CN107256870A (zh) * 2017-06-09 2017-10-17 京东方科技集团股份有限公司 一种阵列基板及制作方法、柔性显示面板、显示装置
CN109411619B (zh) * 2017-08-17 2020-05-26 京东方科技集团股份有限公司 Oled阵列基板及其制备方法、显示面板及显示装置
CN107808895B (zh) * 2017-10-24 2019-10-01 深圳市华星光电半导体显示技术有限公司 透明oled显示器及其制作方法
CN108155220B (zh) * 2018-01-29 2019-08-02 武汉华星光电半导体显示技术有限公司 显示装置的制造方法
CN108615820B (zh) * 2018-04-27 2020-04-28 武汉华星光电技术有限公司 Oled显示装置
CN108878444B (zh) * 2018-06-07 2021-11-19 武汉天马微电子有限公司 显示面板及显示装置
CN108649063A (zh) * 2018-07-25 2018-10-12 京东方科技集团股份有限公司 一种oled基板、显示面板
CN109599421B (zh) * 2018-11-21 2020-06-02 武汉华星光电半导体显示技术有限公司 Oled显示装置及其制作方法
TWI686648B (zh) * 2019-01-08 2020-03-01 友達光電股份有限公司 顯示面板
CN209150099U (zh) * 2019-01-09 2019-07-23 昆山工研院新型平板显示技术中心有限公司 一种显示面板和显示装置
TWI694280B (zh) * 2019-03-05 2020-05-21 友達光電股份有限公司 顯示裝置及其製造方法
CN110034150B (zh) * 2019-03-25 2020-11-27 厦门天马微电子有限公司 显示面板及其制作方法、显示装置
CN109872637B (zh) * 2019-04-02 2020-09-08 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制作方法、显示装置
CN110010627B (zh) * 2019-04-12 2021-02-02 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置
CN111244129B (zh) * 2019-06-18 2021-10-22 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板、显示装置
CN110310575A (zh) * 2019-06-28 2019-10-08 云谷（固安）科技有限公司 一种显示面板及其制作方法和显示装置
CN111211156B (zh) * 2020-03-23 2022-08-05 武汉华星光电半导体显示技术有限公司 Oled显示面板及其制备方法、oled显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104485349A (zh) * 2014-12-26 2015-04-01 昆山工研院新型平板显示技术中心有限公司 无边框显示屏器件
CN104992956A (zh) * 2015-05-15 2015-10-21 深圳市华星光电技术有限公司 无边框显示装置及其制作方法
CN207517684U (zh) * 2017-11-30 2018-06-19 云谷（固安）科技有限公司 阵列基板及显示屏
WO2019135783A1 (en) * 2018-01-04 2019-07-11 Didrew Technology (Bvi) Limited Frameless lcd display with embedded ic system and method of manufacturing thereof
CN109585462A (zh) * 2019-01-23 2019-04-05 京东方科技集团股份有限公司 一种阵列基板及其制作方法、柔性显示面板、拼接屏
CN110265440A (zh) * 2019-06-06 2019-09-20 惠州市华星光电技术有限公司 显示面板及其制作方法

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