WO2020113731A1 - Amoled 显示面板 - Google Patents

Amoled 显示面板 Download PDF

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Publication number
WO2020113731A1
WO2020113731A1 PCT/CN2018/125210 CN2018125210W WO2020113731A1 WO 2020113731 A1 WO2020113731 A1 WO 2020113731A1 CN 2018125210 W CN2018125210 W CN 2018125210W WO 2020113731 A1 WO2020113731 A1 WO 2020113731A1
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WO
WIPO (PCT)
Prior art keywords
area
driving
drain
display
source
Prior art date
Application number
PCT/CN2018/125210
Other languages
English (en)
French (fr)
Inventor
孙亮
王硕晟
曾勉
易士娟
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/330,091 priority Critical patent/US20200185467A1/en
Publication of WO2020113731A1 publication Critical patent/WO2020113731A1/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the present application relates to a display technology, in particular to an AMOLED display panel.
  • the flexible AMOLED display panel includes a driving unit 11 ′ and a display unit 12 ′.
  • the driving unit 11 ′ corresponds to the display unit 12 ′ in one-to-one correspondence.
  • the size design of the driving unit 11 ′ and the display unit 12 ′ are the same.
  • the design area is the same, the two are connected through vias.
  • Embodiments of the present application provide a narrow-frame AMOLED display panel; to solve the technical problem of the lower width of the existing AMOLED display panel.
  • An embodiment of the present application provides an AMOLED display panel, which includes a driving circuit area for driving the display light-emitting area to emit light, a fan-out area for setting a fan-out trace, and a fan-out area disposed above the driving circuit area and the fan-out area The display light-emitting area, wherein,
  • the area of the driving circuit area is smaller than the area of the display light emitting area, and the display light emitting area completely covers the driving circuit area and covers at least part of the fan-out area;
  • the driving circuit area includes a plurality of driving units, the display light-emitting area includes a plurality of display units, each of the driving units is electrically connected to one of the display units, and the area of the driving unit is smaller than that of the display unit.
  • the driving circuit area includes an intermediate region and a lower edge region disposed below the intermediate region, and a distance between the driving units located in the intermediate region is greater than that between the driving units located in the lower edge region distance;
  • the display light-emitting area includes a first display light-emitting area corresponding to the lower edge area and a third display light-emitting area corresponding to the fan-out area, at least part of the driving unit of the lower edge area and the third light-emitting area
  • the display unit of the display area is electrically connected;
  • the fan-out area is located on one side of the lower edge area, wherein the fan-out area includes a first portion covered by the display light-emitting area and a second portion provided outside the display light-emitting area.
  • each of the driving units includes a driving thin film transistor for driving the display unit to emit light, and the driving thin film transistor includes a source/drain and a flat layer disposed on the source/drain ;
  • Each of the display units includes an anode provided on the flat layer and a pixel definition layer provided on the anode and provided with openings;
  • the source/drain is electrically connected to the anode
  • the lower edge region has a first edge, and the first edge is located on a side of the lower edge region near the middle region;
  • the source/drain of the driving unit is closer to the side of the first edge relative to the anode Staggered.
  • the source/drain of the driving unit approaches toward the anode The greater the distance of one side of the first edge.
  • the source of the driving unit electrically connected to the anode of the display unit /The longer the drain length.
  • each of the driving thin film transistors includes a substrate, an active layer provided on the substrate, a first gate provided on the active layer, and a first gate provided on the active layer A second gate on the pole and the source/drain provided on the second gate and the flat layer provided on the source/drain;
  • the source/drain of the driving thin film transistor is electrically connected to the anode of the corresponding display unit through the via.
  • each of the driving thin film transistors includes a substrate, an active layer provided on the substrate, a first gate provided on the active layer, and a first gate provided on the active layer A second gate on the pole, a source/drain disposed on the second gate, and a flat layer disposed on the source/drain, and an active/drain trace is disposed on the flat layer;
  • the source/drain of the driving thin film transistor is electrically connected to the anode of the corresponding display unit through the source/drain wiring;
  • the length of the source/drain trace of the driving unit electrically connected to the anode of the display unit is longer .
  • the driving circuit area further includes two side edge regions disposed on both sides of the middle region, and a distance between the driving units located in the middle region is greater than that located on the two side edges The distance between the drive units of the area.
  • An embodiment of the present application further provides an AMOLED display panel, which includes a driving circuit area for driving the display light-emitting area to emit light, a fan-out area for setting a fan-out wiring, and a fan-out area disposed above the driving circuit area and the fan-out area Of the display light-emitting area,
  • the area of the driving circuit area is smaller than the area of the display light emitting area, and the display light emitting area completely covers the driving circuit area and covers at least part of the fan-out area.
  • the drive circuit area includes a plurality of drive units, and the display light-emitting area includes a plurality of display units, and each of the drive units is electrically connected to one of the display units, and The area of the driving unit is smaller than the area of the display unit.
  • the driving circuit area includes an intermediate region and a lower edge region disposed below the intermediate region, and the distance between the driving units located in the intermediate region is greater than that of the driving unit located in the lower edge region To reduce the area of the lower edge driving area.
  • each of the driving units includes a driving thin film transistor for driving the display unit to emit light
  • the driving thin film transistor includes a source/drain and a flat disposed on the source/drain Floor
  • Each of the display units includes an anode provided on the flat layer and a pixel definition layer provided on the anode and provided with openings;
  • the source/drain is electrically connected to the anode
  • the display light-emitting area includes a first display light-emitting area corresponding to the lower edge area and a third display light-emitting area corresponding to the fan-out area, at least part of the driving unit of the lower edge area and the third light-emitting area
  • the display unit in the display area is electrically connected.
  • the lower edge area in the lower edge area, has a first edge, and the first edge is located on a side of the lower edge area close to the middle area;
  • the source/drain of the driving unit is closer to the side of the first edge relative to the anode Staggered.
  • the source/drain of the driving unit in the lower edge region, from the side near the first edge to the side away from the first edge, is oriented relative to the anode The greater the distance of the side close to the first edge.
  • the drive unit electrically connected to the anode of the display unit The longer the source/drain length.
  • the fan-out area is located on one side of the lower edge driving area, wherein the fan-out area includes a first portion covered by the display light-emitting area and is provided on the display to emit light The second part outside the zone.
  • the driving circuit area includes an upper edge area disposed above the intermediate area, and a distance between the driving units located in the intermediate area is greater than that of the upper edge area The distance between the driving units to reduce the area of the upper edge driving area.
  • the driving circuit area includes two side edge regions disposed on both sides of the middle region, and a distance between the driving units located in the middle region is greater than that located on the two side edges The distance between the driving units of the area, so as to reduce the area of the edge driving areas on both sides.
  • the driving circuit area includes a plurality of driving units
  • the display light-emitting area includes a plurality of display units
  • each of the driving units is electrically connected to one of the display units
  • the driving circuit area includes an intermediate area and a lower edge area provided below the intermediate area, in which the area of the driving unit is equal to the area of the display unit; in the lower edge area, The area of the driving unit is smaller than the area of the display unit.
  • each of the driving units includes a driving thin film transistor, and the driving thin film transistor includes a source/drain and a flat layer disposed on the source/drain;
  • Each of the display units includes an anode provided on the flat layer and a pixel definition layer provided on the anode and provided with openings;
  • the source/drain is electrically connected to the anode
  • the display light-emitting area includes a first display light-emitting area corresponding to the lower edge area and a third display light-emitting area corresponding to the fan-out area, at least part of the driving unit of the lower edge area and the third light-emitting area
  • the display unit in the display area is electrically connected.
  • the lower edge region in the lower edge region, has a first edge, and the first edge is located on a side of the lower edge region close to the middle region;
  • the source/drain of the driving unit is closer to the side of the first edge relative to the anode Staggered.
  • the source/drain of the driving unit in the lower edge region, from the side near the first edge to the side away from the first edge, is oriented relative to the anode The greater the distance of the side close to the first edge.
  • the drive unit electrically connected to the anode of the display unit The longer the source/drain length.
  • the fan-out area is located on one side of the lower edge area, wherein the fan-out area includes a first portion covered by the display light-emitting area and provided in the display light-emitting area Outside the second part.
  • each of the driving thin film transistors includes a substrate, an active layer provided on the substrate, a first gate provided on the active layer, and a first gate provided on the active layer A second gate on the top, the source/drain disposed on the second gate, and the flat layer disposed on the source/drain;
  • the source/drain of the driving thin film transistor is electrically connected to the anode of the corresponding display unit through the via hole; the wiring of the fan-out area extends outward from the lower edge area of the driving circuit area.
  • each of the driving thin-film transistors includes a substrate, an active layer provided on the substrate, a first gate provided on the active layer, and a first gate provided on the first A second gate on the gate, a source/drain provided on the second gate, and the flat layer provided on the source/drain, and the active/drain provided on the flat layer Traces;
  • the source/drain of the driving thin film transistor is electrically connected to the anode of the corresponding display unit through the source/drain wiring;
  • the length of the source/drain trace of the driving unit electrically connected to the anode of the display unit is longer .
  • the AMOLED display panel of the present application reduces the occupied area of the lower edge area of the driving circuit area on the premise of keeping the area of the display light-emitting area unchanged, and saves a certain amount of space for Set the routing of the fan-out area, thereby reducing the width of the lower side of the display panel;
  • the area of the upper edge of the driving circuit area is reduced to save space for setting the source driving circuit or the VSS wiring, thereby reducing the width of the upper border of the display panel; reducing the edge areas on both sides of the driving circuit area It takes up area and saves space for setting gate drive circuits or VSS traces, thereby reducing the width of the borders on both sides of the display panel; solving the technical problem of the lower width of the existing AMOLED display panel.
  • FIG. 1 is a schematic structural diagram of an AMOLED display panel in the prior art
  • FIG. 2 is a schematic structural diagram of a driving unit and a display unit in the prior art
  • FIG. 3 is a schematic structural diagram of a first embodiment of an AMOLED display panel of this application.
  • Figure 4 is an enlarged view of A in Figure 3;
  • Figure 5 is an enlarged view of B in Figure 3;
  • FIG. 6 is a schematic cross-sectional view of the driving unit and corresponding display unit in the middle region and the lower edge region of the first embodiment of the AMOLED display panel of the present application;
  • FIG. 7 is a schematic cross-sectional view of a driving unit and a corresponding display unit in the middle region and the lower edge region of the second embodiment of the AMOLED display panel of the present application;
  • FIG. 8 is a schematic diagram of the arrangement structure of the driving unit and the display unit of the third embodiment of the AMOLED display panel of the present application;
  • FIG. 9 is a schematic cross-sectional view of a driving unit and a corresponding display unit in the middle region and the lower edge region of the third embodiment of the AMOLED display panel of the present application.
  • FIG. 3 is a schematic structural diagram of a first embodiment of an AMOLED display panel of the present application.
  • the AMOLED display panel of the first embodiment includes a driving circuit area D2 for driving the display light-emitting area D1 to emit light, a fan-out area D3 for setting a fan-out wiring, and a fan-out area D3 disposed above the driving circuit area D2 and the fan-out area D3
  • the light-emitting area D1 and the bending area D4 are shown.
  • the area of the driving circuit area D2 is smaller than the area of the display light emitting area D1, and the display light emitting area D1 completely covers the driving circuit area D2 and covers at least a part of the fan-out area D3.
  • the first embodiment reduces the area of the lower edge area of the driving circuit area D2 while keeping the area of the display light-emitting area D1 unchanged, thereby saving a certain amount of space for setting the wiring of the fan-out area D3, thereby further reducing The width of the lower side of the display panel.
  • the driving circuit area D2 includes a plurality of driving units 11, the display light-emitting area D1 includes a plurality of display units 12, each driving unit 11 corresponds to a display unit 12 electrically connected, and the driving unit 11 The area of is smaller than the area of the display unit 12 to minimize the area of the driving circuit area D2.
  • the driving circuit area D2 includes an intermediate area D21 and a lower edge area D22 disposed below the intermediate area D21.
  • the distance between the driving units 11 in the intermediate area D21 is greater than the distance between the driving units 11 in the lower edge area D22, To reduce the area of the lower edge region D22.
  • the area of the display light-emitting area D1 is the sum of the areas of the orthographic projections of the multiple display units 12 on the substrate 111
  • the area of the single display unit 12 is the opening of one pixel definition layer and the side of the opening Part of the pixels define the area of the orthographic projection of the layer (see FIG. 6) on the substrate 111
  • the area of the drive circuit area D2 is the sum of the areas of the orthographic projections of the multiple drive units 11 on the substrate 111
  • the area of the single drive unit 11 is the area occupied by the layout of the sub-pixel circuit, such as the orthographic projection of 7T1C and 6T1C on the substrate The total area.
  • the area of a single drive unit 11 is the total area of the orthographic projection of the 7T1C or 6T1C circuit on the substrate.
  • only one drive thin film transistor is drawn, and the area of the single drive unit includes the drive thin film transistor and at least one Switching thin film transistors is a technique well known to those skilled in the art and will not be described in detail.
  • Each driving unit 11 includes a driving thin film transistor for driving the display unit 12 to emit light and at least one switching thin film transistor (not shown in the figure) that functions as a switch.
  • the size of the drive unit 11 and the display unit 12 are designed differently, wherein the display unit 12 is designed according to the size and area calculated by the original panel size and resolution, and the area of the drive unit 11 is reduced, that is, the drive unit 11 The area is smaller than the area of the display unit 12.
  • the arrangement distance of the driving units 11 in the lower edge area D22 is shortened, the occupied area of the lower edge area D22 is reduced, thereby saving space, and for arranging the wiring of the fan-out area D3, thereby reducing the lower border of the panel The width.
  • Each driving unit 11 includes a driving thin film transistor.
  • the driving thin film transistor includes a source/drain 115 and a flat layer 116 disposed on the source/drain 115.
  • Each display unit 12 includes an anode 121 provided on the flat layer 116 and a pixel definition layer 122 provided on the anode 121 and provided with an opening.
  • the source/drain 115 is electrically connected to the anode 121.
  • the display light-emitting area D1 includes a first display light-emitting area D11 corresponding to the lower edge area D22, a second display light-emitting area D12 corresponding to the middle area D21, and a third display light-emitting area D13 corresponding to the fan-out area D3. At least part of the driving unit 11 of the lower edge region D22 is electrically connected to the display unit 12 of the third light-emitting display area D13.
  • the lower edge region D22 has a first edge M.
  • the first edge M is located on the side of the lower edge region D22 close to the middle region D21.
  • the source/drain 115 of the driving unit 11 is staggered toward the side closer to the first edge M relative to the anode 121. So that no driving unit is provided directly under the third display light-emitting area D13, so that it is used to set the fan-out wiring of the fan-out area D3.
  • Such an arrangement reduces the occupied area of the lower edge area D22, and uses the vacant space for routing the fan-out area D3, thereby reducing the width of the lower border of the panel.
  • the distance from the source/drain 115 of the driving unit 11 to the side closer to the first edge M with respect to the anode 121 increases from the side closer to the first edge M to the side away from the first edge M Big. This arrangement maximizes the area of the third display light-emitting area D13, and facilitates setting up the most fan-out traces directly below it.
  • the fan-out area D3 is located on one side of the lower edge driving area D22, wherein the fan-out area D3 includes a first portion D31 covered by the display light-emitting area D1 and a second portion D32 provided outside the display light-emitting area D1, that is, the third display emits light
  • the area D13 is correspondingly disposed above the first portion D31 of the fan-out area D3.
  • the driving circuit area D2 further includes an upper edge region D23 disposed above the intermediate region D21, and the distance between the driving units 11 located in the intermediate region D21 is greater than that between the driving units 11 located in the upper edge region D23 To reduce the occupied area of the upper edge area D23.
  • the driving unit 11 in the upper edge region D23 When the arrangement distance of the driving units 11 in the upper edge region D23 is shortened, that is, in a vertical space, the driving unit 11 in the upper edge region D22 and the corresponding display unit 12 are misaligned, and the driving unit 11 in the upper edge region D23 faces
  • the direction of the middle region D21 is arranged close to reduce the occupied area of the upper edge region D23, thereby saving space for arranging the source driving circuit or the VSS wiring, and thus reducing the width of the frame on the panel.
  • the driving circuit area D2 includes two side edge regions D24 disposed on both sides of the middle region D21, and the distance between the driving units 11 located in the middle region D21 is greater than that located on both side edge regions D24 The distance between the driving units 11 is to reduce the occupied area of the edge regions D24 on both sides.
  • the arrangement distance of the driving units 11 on the edge regions on both sides of the driving circuit area D2 is shortened, that is, in the vertical space, the driving unit 11 located on the edge regions D24 on both sides and the corresponding display unit 12 are misaligned and located on the edges on both sides
  • the drive unit 11 in the area D24 is arranged closer to the direction of the intermediate drive area D21, so as to reduce the occupied area of the edge area D24 on both sides, thereby saving space, and for arranging the gate drive circuit or the VSS wiring, thereby reducing the panel two The width of the side border.
  • the distance between the driving units located in the middle area D21 is not necessarily equal, for example, the distance between the driving units located in the middle area D21 may also be gradually reduced from the center to the surrounding edges, in order to Further reduce the occupied area of the driving circuit area D2.
  • each driving thin film transistor includes a substrate 111, an active layer 112 provided on the substrate 111, a first gate 113 provided on the active layer 112, and a A second gate 114 on a gate 113, a source/drain 115 disposed on the second gate 114, and a flat layer 116 disposed on the source/drain 115.
  • a first insulating layer is provided between the active layer 112 and the first gate 113
  • a second insulating layer is provided between the first gate 113 and the second gate 114
  • An interlayer dielectric layer is provided between the poles 115.
  • the display unit 12 includes an anode 121 provided on the flat layer 116, a pixel definition layer 122 provided on the set value anode 121, and an organic light-emitting layer (not shown).
  • the traces of the fan-out region D3 are disposed in the same layer as the first gate 113, the second gate 114, or the source/drain 115.
  • the wiring of the fan-out area D3 extends outward from the lower edge area of the driving circuit area D2.
  • the driving unit 11 and the display unit 12 electrically connected to the peripheral edge area of the driving circuit area D2 are misaligned, that is, the source/drain 115 of the driving unit 11 is opposite to the anode 121
  • the side close to the first edge M is staggered, resulting in the drive unit 11 not being completely under the corresponding display unit 12.
  • the length of the source/drain 115 can be appropriately extended to just below the anode 121.
  • the driving unit 11 located in the peripheral edge area (upper, lower, and both side edge areas) of the driving circuit area D2 and the display unit 12 electrically connected thereto are electrically connected through vias.
  • the length of the source/drain 115 of the driving unit 11 electrically connected to the anode 121 of the display unit 12 is longer from the side close to the first edge M to the side away from the first edge M.
  • the display light-emitting area D1 includes a first display light-emitting area D11 corresponding to the lower edge area D22, a second display light-emitting area D12 corresponding to the middle area D21, and a fan-out area D3 Corresponding third display light emitting area D13.
  • the driving unit 21 includes a driving thin film transistor.
  • the driving thin film transistor further includes a substrate 211, an active layer 212 provided on the substrate 211, a first gate 213 provided on the active layer 212, and a A second gate 214 on a gate 213, a source/drain 215 disposed on the second gate 214, and a flat layer 217 disposed on the source/drain 215.
  • Active/drain traces 216 are provided on the flat layer 217.
  • a first insulating layer is provided between the active layer 212 and the first gate 213, a second insulating layer is provided between the first gate 213 and the second gate 214, the second gate 214 and the source/drain An interlayer dielectric layer is provided between the electrodes 215, and another flat layer 218 is provided between the source/drain 215 and the source/drain traces 216.
  • the display unit 22 includes an anode 221 provided on another flat layer 218, a pixel definition layer 222 provided on the anode 221 and provided with an opening, and an organic light-emitting layer (not shown).
  • the source/drain 215 of the driving thin film transistor is electrically connected to the anode 221 of the corresponding display unit 22 through the source/drain trace 216.
  • the driving unit 21 and the corresponding display unit 22 in the peripheral edge area of the driving circuit area are misaligned, that is, the source/drain 215 of the driving unit 21 is closer to the first than the anode 221
  • One side of the edge M is staggered, resulting in the driving unit 21 not completely under the corresponding display unit 22, so when the space of the source/drain 215 is insufficient, it is located in the peripheral edge area (upper, lower, and both sides of the driving circuit area)
  • the driving unit 21 and the display unit 22 electrically connected thereto are electrically connected through source/drain traces 216.
  • the length of the source/drain trace 216 of the driving unit 21 electrically connected to the anode 221 of the display unit 22 from the side close to the first edge M to the side away from the first edge M is longer.
  • this embodiment differs from the first and second embodiments in that the driving circuit area includes a plurality of driving units 31, and the display light emitting area includes a plurality of There are one display unit 32, and each drive unit 31 is correspondingly electrically connected to one display unit 32.
  • the driving circuit area includes an intermediate area D21 and a lower edge area D22 provided below the intermediate area D21.
  • the area of the driving unit 31 is equal to the area of the display unit 32.
  • the area of the driving unit 31 is smaller than the area of the display unit 32.
  • the display light-emitting area D1 includes a first display light-emitting area D11 corresponding to the lower edge area D22, a second display light-emitting area D12 corresponding to the middle area D21, and a third display light-emitting area D13 corresponding to the fan-out area D3. At least part of the driving unit 31 of the lower edge region D22 is electrically connected to the display unit 32 of the third light-emitting display area D13.
  • the lower edge region D22 has a first edge M.
  • the first edge M is located on the side of the lower edge region D22 close to the middle region D21.
  • the source/drain 315 of the driving unit 31 is staggered toward the side closer to the first edge M relative to the anode 321. In this way, the fan-out wiring of the fan-out area D3 is provided directly under the third display light-emitting area D13.
  • Such an arrangement reduces the occupied area of the lower edge region D22, and sets up the routing of the fan-out area D3 with free space.
  • the fan-out area is located on one side of the lower edge area D22, wherein the fan-out area D3 includes a first portion covered by the display light-emitting area and a second portion provided outside the display light-emitting area.
  • the AMOLED display panel of the present application reduces the occupied area of the lower edge area of the driving circuit area on the premise of keeping the area of the display light-emitting area unchanged, and saves a certain amount of space for Set the routing of the fan-out area, thereby reducing the width of the lower side of the display panel;
  • the area of the upper edge of the driving circuit area is reduced to save space for setting the source driving circuit or the VSS wiring, thereby reducing the width of the upper border of the display panel; reducing the edge areas on both sides of the driving circuit area It takes up area and saves space for setting gate drive circuits or VSS traces, thereby reducing the width of the borders on both sides of the display panel; solving the technical problem of the lower width of the existing AMOLED display panel.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种AMOLED显示面板，包括显示发光区(D1)、设置在显示发光区(D1)下方的驱动电路区(D2)和扇出区(D3)，驱动电路区(D2)的面积小于显示发光区(D1)的面积，且显示发光区(D1)完全覆盖驱动电路区(D2)和覆盖至少部分扇出区(D3)。AMOLED显示面板通过缩小驱动电路区(D2)的下边缘区域(D22)的面积，节省出一定的空间以用于设置扇出区(D3)的走线，进而缩小显示面板下边框的宽度。

Description

AMOLED显示面板 技术领域
本申请涉及一种显示技术，特别涉及一种AMOLED显示面板。
 背景技术
随着显示行业技术的发展，客户对显示面板的要求越来越高，如对于一些高端显示面板，客户会要求做窄边框设计。
随着柔性AMOLED显示面板的发展，针对刚性面板的下边框较大的问题，提出了一种新的Pad bending（区域弯折）技术。将现有显示面板下方的放置COF的Bonding Pad（绑定区）或者COP的IC bonding pad区域，和连接至AA区像素电路中Data信号的fanout（扇出）走线以及一些测试电路区域一起弯折至面板的下方，可以将原有刚性显示面板的下边框变小，如附图1所示。
然而如附图1所示的现有柔性AMOLED显示面板架构示意图，在现有设计中，柔性AMOLED显示面板为了保证E值的宽度(面板做edge curve设计所需的宽度) , AA边至Bending area（弯折区C2）的边的距离D值依然有较大，其中主要是需要考虑扇出区C3(将AA区C1的Data线扇入至Bending区域，E值越大，D所需值就越大)的布线空间。另外，再加上弯折区域所需要的空间(弯折精度以及弯折半径)，整个面板的下边框依然较大。
其中如图2所示，柔性AMOLED显示面板包括驱动单元11＇和显示单元12＇，驱动单元11＇与显示单元12＇一一对应，驱动单元11＇和显示单元12＇的尺寸大小设计一样，且其设计的区域也一致，两者通过过孔连接。
故，需要提供一种窄边框的AMOLED显示面板，以解决上述技术问题。
 技术问题
本申请实施例提供一种窄边框的AMOLED显示面板；以解决现有的AMOLED显示面板的下边宽较大的技术问题。
 技术解决方案
本申请实施例提供一种AMOLED显示面板，包括有用于驱动显示发光区发光的驱动电路区、用于设置扇出走线的扇出区和设置在所述驱动电路区和所述扇出区上方的所述显示发光区，其中，
所述驱动电路区的面积小于所述显示发光区的面积，且所述显示发光区完全覆盖所述驱动电路区和覆盖至少部分所述扇出区；
所述驱动电路区包括多个驱动单元，所述显示发光区包括多个显示单元，每个所述驱动单元对应电性连接一个所述显示单元，且所述驱动单元的面积小于所述显示单元的面积；
所述驱动电路区包括中间区域和设置在所述中间区域下方的下边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述下边缘区域的所述驱动单元之间的距离；
所述显示发光区包括与所述下边缘区域对应的第一显示发光区和与所述扇出区对应的第三显示发光区，所述下边缘区域的至少部分驱动单元与所述第三发光显示区的显示单元电连接；
所述扇出区位于所述下边缘区域的一侧，其中，所述扇出区包括被所述显示发光区覆盖的第一部分和设置在所述显示发光区外的第二部分。
在本申请的AMOLED显示面板，每一所述驱动单元包括一用于驱动所述显示单元发光的驱动薄膜晶体管，所述驱动薄膜晶体管包括源/漏极及设置在源/漏极上的平坦层；
每一所述显示单元包括设置所述平坦层上的阳极及设置在所述阳极上且设有开口的像素定义层；
所述源/漏极与所述阳极电连接；
在所述下边缘区域中，所述下边缘区域具有一第一边缘，所述第一边缘位于所述下边缘区域靠近所述中间区域的一侧；
在所述下边缘区域的驱动单元和与所述下边缘区域的驱动单元电连接的显示单元中，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开。
在本申请的AMOLED显示面板，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开的距离越大。
在本申请的AMOLED显示面板，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极的长度越长。
在本申请的AMOLED显示面板，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极和设置在所述第二栅极上的所述源/漏极和设置在所述源/漏极的所述平坦层；
所述驱动薄膜晶体管的源/漏极通过过孔和对应显示单元的阳极电连接。
在本申请的AMOLED显示面板，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极、设置在所述第二栅极上的源/漏极和设置在所述源/漏极上的平坦层，所述平坦层上设置有源/漏极走线；
所述驱动薄膜晶体管的源/漏极通过所述源/漏极走线和对应显示单元的阳极电连接；
在所述下边缘区域，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极走线的长度越长。
在本申请的AMOLED显示面板，所述驱动电路区还包括设置在所述中间区域两侧的两侧边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述两侧边缘区域的所述驱动单元之间的距离。
本申请实施例还提供一种AMOLED显示面板，包括有用于驱动显示发光区发光的驱动电路区、用于设置扇出走线的扇出区和设置在所述驱动电路区和所述扇出区上方的所述显示发光区，
所述驱动电路区的面积小于所述显示发光区的面积，且所述显示发光区完全覆盖所述驱动电路区和覆盖至少部分所述扇出区。
在本申请的AMOLED显示面板中，所述驱动电路区包括多个驱动单元，设置在所述显示发光区包括多个显示单元，每个所述驱动单元对应电性连接一个所述显示单元，且所述驱动单元的面积小于所述显示单元的面积。
其中，所述驱动电路区包括中间区域和设置在所述中间区域下方的下边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述下边缘区域的所述驱动单元之间的距离，以缩小所述下边缘驱动区域的面积。
在本申请的AMOLED显示面板中，每一所述驱动单元包括一用于驱动所述显示单元发光的驱动薄膜晶体管，所述驱动薄膜晶体管包括源/漏极及设置在源/漏极上的平坦层；
每一所述显示单元包括设置所述平坦层上的阳极及设置在所述阳极上且设有开口的像素定义层；
所述源/漏极与所述阳极电连接；
所述显示发光区包括与所述下边缘区域对应的第一显示发光区和与所述扇出区对应的第三显示发光区，所述下边缘区域的至少部分驱动单元与所述第三发光显示区的显示单元电连接。
在本申请的AMOLED显示面板中，在所述下边缘区域中，所述下边缘区域具有一第一边缘，所述第一边缘位于所述下边缘区域靠近所述中间区域的一侧；
在所述下边缘区域的驱动单元和与所述下边缘区域的驱动单元电连接的显示单元中，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开。
在本申请的AMOLED显示面板中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开的距离越大。
在本申请的AMOLED显示面板中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极的长度越长。
在本申请的AMOLED显示面板中，所述扇出区位于所述下边缘驱动区域的一侧，其中，所述扇出区包括被所述显示发光区覆盖的第一部分和设置在所述显示发光区外的第二部分。
在本申请的AMOLED显示面板中，所述驱动电路区包括设置在所述中间区域上方的上边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述上边缘区域的所述驱动单元之间的距离，以缩小所述上边缘驱动区域的面积。
在本申请的AMOLED显示面板中，所述驱动电路区包括设置在所述中间区域两侧的两侧边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述两侧边缘区域的所述驱动单元之间的距离，以缩小所述两侧边缘驱动区域的面积。
在本申请的AMOLED显示面板中，所述驱动电路区包括多个驱动单元，所述显示发光区包括多个显示单元，每个所述驱动单元对应电性连接一个所述显示单元，
所述驱动电路区包括中间区域和设置在所述中间区域下方的下边缘区域，在所述中间区域中，所述驱动单元的面积等于所述显示单元的面积；在所述下边缘区域中，所述驱动单元的面积小于所述显示单元的面积。
在本申请的AMOLED显示面板中，每一所述驱动单元包括一驱动薄膜晶体管，所述驱动薄膜晶体管包括源/漏极及设置在源/漏极上的平坦层；
每一所述显示单元包括设置所述平坦层上的阳极及设置在所述阳极上且设有开口的像素定义层；
所述源/漏极与所述阳极电连接；
所述显示发光区包括与所述下边缘区域对应的第一显示发光区和与所述扇出区对应的第三显示发光区，所述下边缘区域的至少部分驱动单元与所述第三发光显示区的显示单元电连接。
在本申请的AMOLED显示面板中，在所述下边缘区域，所述下边缘区域具有一第一边缘，所述第一边缘位于所述下边缘区域靠近所述中间区域的一侧；
在所述下边缘区域的驱动单元和与所述下边缘区域的驱动单元电连接的显示单元中，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开。
在本申请的AMOLED显示面板中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开的距离越大。
在本申请的AMOLED显示面板中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极的长度越长。
在本申请的AMOLED显示面板中，所述扇出区位于所述下边缘区域的一侧，其中，所述扇出区包括被所述显示发光区覆盖的第一部分和设置在所述显示发光区外的第二部分。
在本申请的AMOLED显示面板中，每个所述驱动薄膜晶体管包括基板、设置在基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极、设置在所述第二栅极上的所述源/漏极和设置在所述源/漏极的所述平坦层；
所述驱动薄膜晶体管的源/漏极通过过孔和对应显示单元的阳极电连接；所述扇出区的走线自所述驱动电路区的下边缘区域向外延伸形成。
在本申请的AMOLED显示面板中，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极、设置在所述第二栅极上的源/漏极和设置在所述源/漏极上的所述平坦层，所述平坦层上设置有源/漏极走线；
所述驱动薄膜晶体管的源/漏极通过所述源/漏极走线和对应显示单元的阳极电连接；
在所述下边缘区域，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极走线的长度越长。
在本申请中，需要说明的是，就目前的工艺水平而言，当像素PPI小于530时，驱动单元的面积可以做到小于与其电性连接的显示单元的面积。当然随着工艺水准的发展，像素PPI大于等于530时，应该也是可以做到上述的结构。因此在本申请并不限制像素PPI的情况。
 有益效果
相较于现有技术的AMOLED显示面板，本申请的AMOLED显示面板通过在保留显示发光区面积不变的前提下，缩小驱动电路区的下边缘区域的占用面积，节省出一定的空间以用于设置扇出区的走线，进而缩小显示面板下边宽的宽度；
且进一步的，缩小驱动电路区的上边缘区域的占用面积，节省出空间用于设置源驱动电路或VSS走线，进而缩小了显示面板上边框的宽度；缩小驱动电路区的两侧边缘区域的占用面积，节省出空间用于设置栅驱动电路或VSS走线，进而缩小了显示面板两侧边框的宽度；解决了现有的AMOLED显示面板的下边宽较大的技术问题。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面对实施例中所需要使用的附图作简单的介绍。下面描述中的附图仅为本申请的部分实施例，对于本领域普通技术人员而言，在不付出创造性劳动的前提下，还可以根据这些附图获取其他的附图。
图1为现有技术的AMOLED显示面板的结构示意图；
图2为现有技术的驱动单元和显示单元的结构示意图；
图3为本申请的AMOLED显示面板的第一实施例的结构示意图；
图4为图3中A的放大图；
图5为图3中B的放大图；
图6为本申请的AMOLED显示面板的第一实施例的中间区域和下边缘区域的驱动单元和对应的显示单元的截面示意图；
图7为本申请的AMOLED显示面板的第二实施例的中间区域和下边缘区域的驱动单元和对应的显示单元的截面示意图；
图8为本申请的AMOLED显示面板的第三实施例的驱动单元和显示单元的排列布置结构示意图；
图9为本申请的AMOLED显示面板的第三实施例的中间区域和下边缘区域的驱动单元和对应的显示单元的截面示意图。
 本发明的实施方式
请参照附图中的图式，其中相同的组件符号代表相同的组件。以下的说明是基于所例示的本申请具体实施例，其不应被视为限制本申请未在此详述的其它具体实施例。
请参照图3，图3为本申请的AMOLED显示面板的第一实施例的结构示意图。
本第一实施例的AMOLED显示面板，包括有用于驱动显示发光区D1发光的驱动电路区D2、用于设置扇出走线的扇出区D3和设置在驱动电路区D2和扇出区D3上方的显示发光区D1和进行弯折的弯折区D4。
驱动电路区D2的面积小于显示发光区D1的面积，且显示发光区D1完全覆盖驱动电路区D2和覆盖至少部分扇出区D3。
本第一实施例通过在保留显示发光区面积D1不变的前提下，缩小驱动电路区D2的下边缘区域的面积，节省出一定的空间以用于设置扇出区D3的走线，进而缩小显示面板下边宽的宽度。
具体的，请参照图4，驱动电路区D2包括有多个驱动单元11，显示发光区D1包括有多个显示单元12，每个驱动单元11对应电性连接一个显示单元12，且驱动单元11的面积小于显示单元12的面积，以最大程度的压缩驱动电路区D2的面积。
其中，驱动电路区D2包括中间区域D21和设置在中间区域D21下方的下边缘区域D22，位于中间区域D21的驱动单元11之间的距离大于位于下边缘区域D22的驱动单元11之间的距离，以缩小下边缘区域D22的面积。
在本第一实施例中，显示发光区D1的面积为多个显示单元12于基板111上的正投影的面积的总和，单个显示单元12的面积为一像素定义层的开口和该开口一侧的部分像素定义层（如图6）于基板111上的正投影的面积。驱动电路区D2的面积为多个驱动单元11于基板111上的正投影的面积的总和，单个驱动单元11的面积为子像素电路的版图所占据的面积，比如7T1C、6T1C在基板的正投影面积的总和。即单个驱动单元11的面积为如7T1C或6T1C电路在基板上的正投影的面积总和，而本实施例中只画出了一个驱动薄膜晶体管，而单个驱动单元的面积包括驱动薄膜晶体管和至少一个开关薄膜晶体管是本领域技术人员公知的技术，不再赘述。其中每一驱动单元11包括一用于驱动显示单元12发光的驱动薄膜晶体管和至少一个起到开关作用的开关薄膜晶体管（图中未示出）。
驱动单元11和显示单元12的大小进行区别设计，其中显示单元12按原有面板尺寸和分辨率计算得出的尺寸面积设计，而将驱动单元11的面积进行缩减设计，即使得驱动单元11的面积小于显示单元12的面积。
另外，在将下边缘区域D22的驱动单元11的排列距离缩短，缩小了下边缘区域D22的占用面积，进而节省出了空间，用于布置扇出区D3的走线，进而缩小了面板下边框的宽度。
其中，每一驱动单元11包括一驱动薄膜晶体管。驱动薄膜晶体管包括源/漏极115及设置在源/漏极115上的平坦层116。每一显示单元12包括设置平坦层116上的阳极121及设置在阳极121上且设有开口的像素定义层122。源/漏极115与阳极121电连接。
显示发光区D1包括与下边缘区域D22对应的第一显示发光区D11、与中间区域D21对应的第二显示发光区D12和与扇出区D3对应的第三显示发光区D13。下边缘区域D22的至少部分驱动单元11与第三发光显示区D13的显示单元12电连接。
下边缘区域D22具有一第一边缘M。第一边缘M位于下边缘区域D22靠近中间区域D21的一侧。
在下边缘区域D22的驱动单元11和与下边缘区域D22的驱动单元11电连接的显示单元12中，驱动单元11的源/漏极115相对于阳极121向靠近第一边缘M的一侧错开。以使得第三显示发光区D13的正下方未设置驱动单元，从而使其用于设置扇出区D3的扇出走线。
这样的设置以缩小下边缘区域D22的占用面积，并将空余出的空间用于布置扇出区D3的走线，进而缩小面板下边框的宽度。
另外，在下边缘区域D22中，从靠近第一边缘M到远离第一边缘M的一侧，驱动单元11的源/漏极115相对于阳极121向靠近第一边缘M的一侧错开的距离越大。这样的设置，以使得第三显示发光区D13的面积最大化，便于在其正下方设置最多的扇出走线。
扇出区D3位于下边缘驱动区域D22的一侧，其中，扇出区D3包括被显示发光区D1覆盖的第一部分D31和设置在显示发光区D1外的第二部分D32，即第三显示发光区D13对应设置在扇出区D3的第一部分D31上方。
进一步的，请参照图5，驱动电路区D2还包括设置在中间区域D21上方的上边缘区域D23，位于中间区域D21的驱动单元11之间的距离大于位于上边缘区域D23的驱动单元11之间的距离，以缩小上边缘区域D23的占用面积。
在将上边缘区域D23的驱动单元11的排列距离缩短，即在垂直空间中，位于上边缘区域D22的驱动单元11和对应的显示单元12错位设置，且位于上边缘区域D23的驱动单元11向中间区域D21的方向靠近设置，以缩小了上边缘区域D23的占用面积，进而节省出了空间，用于布置源驱动电路或VSS走线，进而缩小了面板上边框的宽度。
进一步的，请参照图4和图5，驱动电路区D2包括设置在中间区域D21两侧的两侧边缘区域D24，位于中间区域D21的驱动单元11之间的距离大于位于两侧边缘区域D24的驱动单元11之间的距离，以缩小两侧边缘区域D24的占用面积。
在将驱动电路区D2 的两侧边缘区域的驱动单元11的排列距离缩短，即在垂直空间中，位于两侧边缘区域D24的驱动单元11和对应的显示单元12错位设置，且位于两侧边缘区域D24的驱动单元11向中间驱区域D21的方向靠近设置,以缩小了两侧边缘区域D24的占用面积，进而节省出了空间，用于布置栅驱动电路或VSS走线，进而缩小了面板两侧边框的宽度。
另外，在本申请中，位于中间区域D21的驱动单元之间的距离并不一定是相等的，比如位于中间区域D21的驱动单元之间的距离也可以是从中心处向四周边缘逐渐缩小，以进一步的缩小驱动电路区D2的占用面积。
在本第一实施例中，请参照图6，每个驱动薄膜晶体管包括基板111、设置在基板111上的有源层112、设置在有源层112上的第一栅极113、设置在第一栅极113上的第二栅极114和设置在第二栅极114上的源/漏极115以及设置在源/漏极115上的平坦层116。其中，有源层112和第一栅极113之间设置有第一绝缘层，第一栅极113和第二栅极114之间设置有第二绝缘层，第二栅极114和源/漏极115之间设置有层间介电层。
显示单元12包括设置在平坦层116上的阳极121、设置值阳极121上的像素定义层122和有机发光层（图未示出）。
扇出区D3的走线与第一栅极113、第二栅极114或源/漏极115同层设置。扇出区D3的走线自驱动电路区D2的下边缘区域向外延伸形成。
在本第一实施例中，由于驱动电路区D2的四周边缘区域的驱动单元11和与其电连接的显示单元12之间相错设置，即驱动单元11的源/漏极115相对于阳极121向靠近第一边缘M的一侧错开，导致驱动单元11不完全在对应的显示单元12的正下方。当源/漏极115之间的空间足够时，源/漏极115长度可适当延长至阳极121的正下方。位于驱动电路区D2的四周边缘区域（上、下和两侧边缘区域）的驱动单元11和与其电连接的显示单元12，则通过过孔电性连接。
在下边缘区域D21中，从靠近第一边缘M到远离第一边缘M的一侧，与显示单元12的阳极121电连接的驱动单元11的源/漏极115的长度越长。
在本第二实施例中，请参照图7，显示发光区D1包括与下边缘区域D22对应的第一显示发光区D11、与中间区域D21对应的第二显示发光区D12和与扇出区D3对应的第三显示发光区D13。驱动单元21包括驱动薄膜晶体管。本实施例和第一实施例的不同之处在于：驱动薄膜晶体管还包括基板211、设置在基板211上的有源层212、设置在有源层212上的第一栅极213、设置在第一栅极213上的第二栅极214和设置在第二栅极214上的源/漏极215和设置在源/漏极215上的平坦层217。平坦层217上设置有源/漏极走线216。其中，有源层212和第一栅极213之间设置有第一绝缘层，第一栅极213和第二栅极214之间设置有第二绝缘层，第二栅极214和源/漏极215之间设置有层间介电层，源/漏极215和源/漏极走线216之间设置有另一平坦层218。
显示单元22包括设置在另一平坦层218上的阳极221、设置在阳极221上的且设有开口的像素定义层222和有机发光层（图未示出）。
其中，驱动薄膜晶体管的源/漏极215通过源/漏极走线216和对应显示单元22的阳极221电连接。
在本第二实施例中，由于驱动电路区的四周边缘区域的驱动单元21和对应的显示单元22之间相错设置，即驱动单元21的源/漏极215相对于阳极221向靠近第一边缘M的一侧错开，导致驱动单元21不完全在对应的显示单元22的正下方，因此当源/漏极215的空间不足时，位于驱动电路区的四周边缘区域（上、下和两侧边缘区域）的驱动单元21和与其电连接的显示单元22通过源/漏极走线216电性连接。
在下边缘区域D21，从靠近第一边缘M到远离第一边缘M的一侧，与显示单元22的阳极221电连接的驱动单元21的源/漏极走线216的长度越长。
在本第三实施例中，请参照图8和图9，本实施例与第一实施例和第二实施例的不同之处在于：驱动电路区包括多个驱动单元31，显示发光区包括多个显示单元32，每个驱动单元31对应电性连接一个显示单元32。
驱动电路区包括中间区域D21和设置在中间区域D21下方的下边缘区域D22，在中间区域D21中，驱动单元31的面积等于显示单元32的面积。在下边缘区域D22中，驱动单元31的面积小于显示单元32的面积。
其中，显示发光区D1包括与下边缘区域D22对应的第一显示发光区D11、与中间区域D21对应的第二显示发光区D12和与扇出区D3对应的第三显示发光区D13。下边缘区域D22的至少部分驱动单元31与第三发光显示区D13的显示单元32电连接。
下边缘区域D22具有一第一边缘M。第一边缘M位于下边缘区域D22靠近中间区域D21的一侧。
在下边缘区域D22的驱动单元31和与下边缘区域D22的驱动单元31电连接的显示单元32中，驱动单元31的源/漏极315相对于阳极321向靠近第一边缘M的一侧错开。以使得第三显示发光区D13的正下方用于设置扇出区D3的扇出走线。
这样的设置以缩小下边缘区域D22的占用面积，以空出空间设置扇出区D3的走线。
扇出区位于下边缘区域D22的一侧，其中，扇出区D3包括被显示发光区覆盖的第一部分和设置在显示发光区外的第二部分。
相较于现有技术的AMOLED显示面板，本申请的AMOLED显示面板通过在保留显示发光区面积不变的前提下，缩小驱动电路区的下边缘区域的占用面积，节省出一定的空间以用于设置扇出区的走线，进而缩小显示面板下边宽的宽度；
且进一步的，缩小驱动电路区的上边缘区域的占用面积，节省出空间用于设置源驱动电路或VSS走线，进而缩小了显示面板上边框的宽度；缩小驱动电路区的两侧边缘区域的占用面积，节省出空间用于设置栅驱动电路或VSS走线，进而缩小了显示面板两侧边框的宽度；解决了现有的AMOLED显示面板的下边宽较大的技术问题。
综上所述，虽然本申请已以实施例揭露如上，实施例前的序号，如“第一”、“第二”等仅为描述方便而使用，对本申请各实施例的顺序不造成限制。并且，上述实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种AMOLED显示面板，包括有用于驱动显示发光区发光的驱动电路区、用于设置扇出走线的扇出区和设置在所述驱动电路区和所述扇出区上方的所述显示发光区，其中，
    所述驱动电路区的面积小于所述显示发光区的面积，且所述显示发光区完全覆盖所述驱动电路区和覆盖至少部分所述扇出区；
    所述驱动电路区包括多个驱动单元，所述显示发光区包括多个显示单元，每个所述驱动单元对应电性连接一个所述显示单元，且所述驱动单元的面积小于所述显示单元的面积；
    所述驱动电路区包括中间区域和设置在所述中间区域下方的下边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述下边缘区域的所述驱动单元之间的距离；
    所述显示发光区包括与所述下边缘区域对应的第一显示发光区和与所述扇出区对应的第三显示发光区，所述下边缘区域的至少部分驱动单元与所述第三发光显示区的显示单元电连接；
    所述扇出区位于所述下边缘区域的一侧，其中，所述扇出区包括被所述显示发光区覆盖的第一部分和设置在所述显示发光区外的第二部分。
  2. 根据权利要求1所述的AMOLED显示面板，其中，每一所述驱动单元包括一用于驱动所述显示单元发光的驱动薄膜晶体管，所述驱动薄膜晶体管包括源/漏极及设置在源/漏极上的平坦层；
    每一所述显示单元包括设置所述平坦层上的阳极及设置在所述阳极上且设有开口的像素定义层；
    所述源/漏极与所述阳极电连接；
    在所述下边缘区域中，所述下边缘区域具有一第一边缘，所述第一边缘位于所述下边缘区域靠近所述中间区域的一侧；
    在所述下边缘区域的驱动单元和与所述下边缘区域的驱动单元电连接的显示单元中，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开。
  3. 根据权利要求2所述的AMOLED显示面板，其中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开的距离越大。
  4. 根据权利要求2所述的AMOLED显示面板，其中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极的长度越长。
  5. 根据权利要求4所述的AMOLED显示面板，其中，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极和设置在所述第二栅极上的所述源/漏极和设置在所述源/漏极的所述平坦层；
    所述驱动薄膜晶体管的源/漏极通过过孔和对应显示单元的阳极电连接。
  6. 根据权利要求2所述的AMOLED显示面板，其中，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极、设置在所述第二栅极上的源/漏极和设置在所述源/漏极上的平坦层，所述平坦层上设置有源/漏极走线；
    所述驱动薄膜晶体管的源/漏极通过所述源/漏极走线和对应显示单元的阳极电连接；
    在所述下边缘区域，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极走线的长度越长。
  7. 根据权利要求1所述的AMOLED显示面板，其中，所述驱动电路区还包括设置在所述中间区域两侧的两侧边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述两侧边缘区域的所述驱动单元之间的距离。
  8. 一种AMOLED显示面板，包括有用于驱动显示发光区发光的驱动电路区、用于设置扇出走线的扇出区和设置在所述驱动电路区和所述扇出区上方的所述显示发光区，其中，
    所述驱动电路区的面积小于所述显示发光区的面积，且所述显示发光区完全覆盖所述驱动电路区和覆盖至少部分所述扇出区。
  9. 根据权利要求8所述的AMOLED显示面板，其中，所述驱动电路区包括多个驱动单元，所述显示发光区包括多个显示单元，每个所述驱动单元对应电性连接一个所述显示单元，且所述驱动单元的面积小于所述显示单元的面积。
  10. 根据权利要求8所述的AMOLED显示面板，其中，所述驱动电路区包括多个驱动单元，所述显示发光区包括多个显示单元，每个所述驱动单元对应电性连接一个所述显示单元；
    所述驱动电路区包括中间区域和设置在所述中间区域下方的下边缘区域，在所述中间区域中，所述驱动单元的面积等于所述显示单元的面积；在所述下边缘区域中，所述驱动单元的面积小于所述显示单元的面积。
  11. 根据权利要求9所述的AMOLED显示面板，其中，所述驱动电路区包括中间区域和设置在所述中间区域下方的下边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述下边缘区域的所述驱动单元之间的距离。
  12. 根据权利要求11所述的AMOLED显示面板，其中，所述显示发光区包括与所述下边缘区域对应的第一显示发光区和与所述扇出区对应的第三显示发光区，所述下边缘区域的至少部分驱动单元与所述第三发光显示区的显示单元电连接。
  13. 根据权利要求12所述的AMOLED显示面板，其中，每一所述驱动单元包括一用于驱动所述显示单元发光的驱动薄膜晶体管，所述驱动薄膜晶体管包括源/漏极及设置在源/漏极上的平坦层；
    每一所述显示单元包括设置所述平坦层上的阳极及设置在所述阳极上且设有开口的像素定义层；
    所述源/漏极与所述阳极电连接；
    在所述下边缘区域中，所述下边缘区域具有一第一边缘，所述第一边缘位于所述下边缘区域靠近所述中间区域的一侧；
    在所述下边缘区域的驱动单元和与所述下边缘区域的驱动单元电连接的显示单元中，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开。
  14. 根据权利要求13所述的AMOLED显示面板，其中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，所述驱动单元的源/漏极相对于所述阳极向靠近所述第一边缘的一侧错开的距离越大。
  15. 根据权利要求13所述的AMOLED显示面板，其中，在所述下边缘区域中，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极的长度越长。
  16. 根据权利要求15所述的AMOLED显示面板，其中，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极和设置在所述第二栅极上的所述源/漏极和设置在所述源/漏极的所述平坦层；
    所述驱动薄膜晶体管的源/漏极通过过孔和对应显示单元的阳极电连接。
  17. 根据权利要求13所述的AMOLED显示面板，其中，每个所述驱动薄膜晶体管包括基板、设置在所述基板上的有源层、设置在所述有源层上的第一栅极、设置在所述第一栅极上的第二栅极、设置在所述第二栅极上的源/漏极和设置在所述源/漏极上的平坦层，所述平坦层上设置有源/漏极走线；
    所述驱动薄膜晶体管的源/漏极通过所述源/漏极走线和对应显示单元的阳极电连接；
    在所述下边缘区域，从靠近所述第一边缘到远离所述第一边缘的一侧，与所述显示单元的阳极电连接的所述驱动单元的源/漏极走线的长度越长。
  18. 根据权利要求11所述的AMOLED显示面板，其中，所述扇出区位于所述下边缘区域的一侧，其中，所述扇出区包括被所述显示发光区覆盖的第一部分和设置在所述显示发光区外的第二部分。
  19. 根据权利要求11所述的AMOLED显示面板，其中，所述驱动电路区还包括设置在所述中间区域两侧的两侧边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述两侧边缘区域的所述驱动单元之间的距离。
  20. 根据权利要求11所述的AMOLED显示面板，其中，所述驱动电路区包括设置在所述中间区域上方的上边缘区域，位于所述中间区域的所述驱动单元之间的距离大于位于所述上边缘区域的所述驱动单元之间的距离。
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