WO2023004768A1 - 显示基板和显示装置 - Google Patents

显示基板和显示装置 Download PDF

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Publication number
WO2023004768A1
WO2023004768A1 PCT/CN2021/109672 CN2021109672W WO2023004768A1 WO 2023004768 A1 WO2023004768 A1 WO 2023004768A1 CN 2021109672 W CN2021109672 W CN 2021109672W WO 2023004768 A1 WO2023004768 A1 WO 2023004768A1
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WO
WIPO (PCT)
Prior art keywords
orthographic projection
base
substrate
layer
display
Prior art date
Application number
PCT/CN2021/109672
Other languages
English (en)
French (fr)
Inventor
周桢力
王格
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202180002040.8A priority Critical patent/CN116235649A/zh
Priority to DE112021008071.7T priority patent/DE112021008071T5/de
Priority to PCT/CN2021/109672 priority patent/WO2023004768A1/zh
Publication of WO2023004768A1 publication Critical patent/WO2023004768A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display substrate and a display device.
  • Organic Light-Emitting Diode (English: Organic Light-Emitting Diode, referred to as: OLED) display device, with its light and thin, high brightness, low power consumption, fast response, high definition, good flexibility, high luminous efficiency field.
  • OLED Organic Light-Emitting Diode
  • OLED display devices generally include a light-emitting element and an encapsulation layer.
  • the encapsulation layer covers the light-emitting element to prevent water vapor and oxygen from intruding into the light-emitting element, which will corrode the organic light-emitting material layer in the light-emitting element, thereby affecting the reliability of the OLED display device.
  • the purpose of the present disclosure is to provide a display substrate and a display device.
  • a first aspect of the present disclosure provides a display substrate, including: a display area and a peripheral area surrounding the display area; the display substrate further includes:
  • a signal line including a first portion located in the peripheral area
  • the layout density of the compensation spacer is greater than the layout density of the basic spacer
  • An encapsulation structure includes an organic encapsulation layer and an inorganic encapsulation layer stacked, and the organic encapsulation layer and the inorganic encapsulation layer cover the plurality of compensation spacers.
  • the first part includes a first target part, the side of the first target part has a recess; part of the inorganic encapsulation layer and part of the organic encapsulation layer are filled in the recess;
  • the orthographic projection of the first peripheral area on the base of the display substrate is located on a side of the orthographic projection of the first target portion on the base close to the display area.
  • the first part also includes:
  • a second target portion at least part of which is located between the first target portion and the display area; an orthographic projection of the first peripheral area on the base of the display substrate, and the The orthographic projections of the second target portion on the substrate at least partially overlap.
  • the display substrate further includes:
  • an orthographic projection of the first target portion on the substrate does not overlap an orthographic projection of the pixel-defining layer on the substrate, and does not overlap an orthographic projection of the planar layer on the substrate .
  • the orthographic projection of the second target portion on the substrate at least partially overlaps with the orthographic projection of the pixel defining layer on the substrate;
  • the orthographic projections on the bases at least partially overlap.
  • the plurality of compensation spacers include a plurality of first compensation spacers and/or a plurality of second compensation spacers, and positive
  • the projection and the orthographic projection of the signal line on the substrate do not overlap; the orthographic projection of the plurality of second compensation spacers on the substrate and the orthographic projection of the signal line on the substrate are at least partially overlapped.
  • the peripheral area includes a binding area
  • the display substrate further includes: a first retaining wall and a second retaining wall, the first retaining wall surrounds the display area, and the second retaining wall surrounds the first retaining wall;
  • the signal line includes a power line, the orthographic projection of the first part of the power line on the base, the orthographic projection of the first retaining wall on the base and the display area on the base between the orthographic projections on ; the first part is close to the binding region.
  • the display substrate further includes a scan line, at least part of the scan line is located in the display area, and the scan line includes a portion extending along the first direction;
  • the power line includes a positive power line and a negative power line
  • the orthographic projection of the first portion of the positive power line on the base along the side of the first direction at least partially overlaps the orthographic projection of the first peripheral region on the base;
  • the orthographic projection of the first part of the negative power supply line on the base along the side in the first direction at least partially overlaps the orthographic projection of the first peripheral region on the base.
  • the signal line includes a positive power line
  • the positive power line includes: a first common connection portion; at least part of the first common connection portion extends along a first direction, and the first common connection portion includes the first target portion.
  • the first common connection part includes a first sub-figure to an Nth sub-figure, N is greater than or equal to 3, and along a direction away from the display area, the first sub-figure to the Nth sub-figure Arranged in sequence, the width of the first sub-figure to the Nth sub-figure gradually narrows in the first direction; the second sub-figure includes the second target part; the third sub-figure includes the first target section and the second target section.
  • the orthographic projection of the first sub-pattern on the substrate includes a first layout area; at least part of the orthographic projection of the compensation spacer on the substrate is evenly distributed in the first layout area ;or,
  • the orthographic projection of a part of the basic spacers on the substrate is located in the first layout area, and the layout density of the basic spacers in the first layout area is equal to that of the basic spacers in the display area. layout density.
  • the positive power line further includes: a second common connection part, a plurality of conductive connection parts and two first line-entry parts;
  • At least part of the second common connection part extends along the first direction, and the second common connection part is located on a side of the first common connection part away from the display area; the second common connection part and The first common connection parts are coupled through the plurality of conductive connection parts;
  • At least a part of the first wire inlet part extends along a second direction, and the second direction intersects with the first direction; the first wire inlet part is located at the side of the second common connection part away from the display area On one side, the two first line inlets are respectively coupled to the second common connection.
  • the signal line further includes a negative power line
  • the negative power line includes: a surrounding portion and two second line-entry portions; the surrounding portion half surrounds the display area, and the two surrounding portions
  • the end portion is coupled to the two second wire-entry portions in one-to-one correspondence; at least part of the second wire-entry portion extends along the second direction; the end portion of the surrounding portion includes the first target portion and the second target section.
  • the orthographic projection of part of the compensation spacer on the base at least partially overlaps the orthographic projection of the end of the surrounding portion on the base.
  • the display substrate further includes: a first retaining wall and a second retaining wall, the first retaining wall surrounds the display area, and the second retaining wall surrounds the first retaining wall;
  • the first separation area is located between the orthographic projection of the first wall on the base and the orthographic projection of the display area on the base; at least part of the orthographic projection of the compensation spacer on the base , evenly distributed in the first interval area.
  • At least part of the orthographic projection of the first common connection portion on the base is at least part of the orthographic projection of the end portion of the surrounding portion on the base, which is the same as that of the display area on the base.
  • Between the orthographic projections of , along the second direction, between at least part of the orthographic projection of the first common connection portion on the base and the orthographic projection of the end of the surrounding portion on the base has A second spacer; an orthographic projection of a part of the compensation spacer on the substrate, located in the second spacer.
  • the encapsulation structure includes a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer stacked in sequence along a direction away from the substrate; part of the first inorganic encapsulation layer and part of the organic encapsulation layer layers are all filled in the recess, and the second inorganic encapsulation layer is not filled in the recess.
  • the compensation spacer and the pixel defining layer or the basic spacer are provided in the same layer and material.
  • the display substrate further includes a first source-drain metal layer and a second source-drain metal layer, the first source-drain metal layer is located between the second source-drain metal layer and the substrate; A part of the signal line is provided in the same layer and material as the first source-drain metal layer, and another part of the signal line is provided in the same layer and material as the second source-drain metal layer.
  • a second aspect of the present disclosure provides a display device, including the display substrate provided in the above embodiment.
  • FIG. 1 is a first schematic diagram of a package structure near a notch provided by an embodiment of the present disclosure
  • FIG. 2 is a second schematic diagram of a package structure near a notch provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic layout diagram of a positive power line and a negative power line in a display substrate provided by an embodiment of the present disclosure
  • FIG. 4 is a first schematic diagram of a positive power line in a display substrate provided by an embodiment of the present disclosure
  • FIG. 5 is a second schematic diagram of a positive power line in a display substrate provided by an embodiment of the present disclosure.
  • Fig. 6 is the enlarged schematic diagram of part X1 in Fig. 3;
  • FIG. 7 is a schematic diagram of a compartment area and a layout area in FIG. 6;
  • Fig. 8 is an enlarged schematic diagram of part X2 in Fig. 3;
  • Fig. 9 is a schematic diagram of a compartment area and a layout area in Fig. 8;
  • FIG. 10 is a schematic layout diagram of signal lines and compensation spacers provided by an embodiment of the present disclosure.
  • FIG. 11 is a schematic diagram of a first peripheral region in a display substrate provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides a display substrate, including a substrate, a signal line 30 disposed on the substrate, and a packaging structure; the side of the signal line 30 has a notch 310; the packaging structure includes A first inorganic encapsulation layer CVD1, an organic encapsulation layer (not shown in FIG. 1 ) and a second inorganic encapsulation layer CVD2 disposed on the substrate are sequentially stacked in a direction away from the substrate, and the first inorganic encapsulation layer CVD1 Filled in the recess 310 , the organic encapsulation layer is not filled in the recess 310 .
  • the stress of the first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2 are concentrated near the notch 310, and the second The surface of the inorganic encapsulation layer CVD2 facing away from the substrate is not flat enough, and it is easy to break near the notch 310, providing a channel for the intrusion of water vapor and oxygen; thus, during the reliability test of the display substrate, the display area of the display substrate is prone to GDSX (growth of small black spots) Defective.
  • an embodiment of the present disclosure provides a display substrate, including: a display area 10 and a peripheral area 20 surrounding the display area 10; the display substrate also include:
  • a signal line 30 (including a positive power line VDD and a negative power line VSS as shown in FIG. 3 ), the signal line 30 includes a first portion located in the peripheral area 20;
  • a plurality of basic spacers 41, at least part of the plurality of basic spacers 41 are located in the display area 10;
  • a plurality of compensation spacers 40 are arranged in the first peripheral area 201, the orthographic projection of the first peripheral area 201 on the base of the display substrate, and the orthographic projection of the side surface of the first part on the base overlap at least partially; the layout density of the compensation spacer 40 is greater than the layout density of the basic spacer 41;
  • a packaging structure comprising a stacked organic packaging layer IJP and an inorganic packaging layer (such as: the first inorganic packaging layer CVD1), the organic packaging layer IJP and the inorganic packaging layer cover the plurality of compensation spacers 40 .
  • the peripheral area includes a binding area, an orthographic projection of the first part on the base, an orthographic projection of the display area on the base and the binding area on the base between the orthographic projections of .
  • the layout density of the compensation spacer 40 is greater than the layout density of the basic spacer 41 .
  • a part of the plurality of basic spacers 41 is located in the display area 10 , and another part of the basic spacers 41 is located in the peripheral area 20 .
  • another part of the basic spacer 41 is located between the compensation spacer 40 and the display area 10 .
  • both the basic spacer 41 and the compensation spacer 40 can play a supporting role.
  • the layout density of the compensation spacers 40 is greater than or equal to twice the layout density of the basic spacers 41 .
  • the layout density of the compensation spacer 40 set above is greater than the layout density of the basic spacer 41, which is conducive to the introduction of organic packaging materials into the area where the compensation spacer 40 is located, and realizes the compensation of the compensation spacer 40. A valid package for the region.
  • the compensation spacers 40 are distributed in the peripheral area 20 .
  • the orthographic projection of the first peripheral area 201 on the base is located between the orthographic projection of the display area on the base and the orthographic projection of the binding area on the base.
  • the function of the compensating spacer 40 is the same as that of a conventional spacer for supporting.
  • the compensation spacer 40 is columnar.
  • the display substrate includes: an active layer sequentially stacked along a direction away from the base, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, and a second gate metal layer , an interlayer insulating layer, a first source-drain metal layer, a first planar layer, a second source-drain metal layer, a second planar layer, an anode layer, a pixel defining layer, a light-emitting functional layer, a cathode and an encapsulation structure.
  • the display substrate does not include a passivation layer.
  • the encapsulation structure includes an organic encapsulation layer IJP and an inorganic encapsulation layer that are stacked.
  • the inorganic encapsulation layer includes a first inorganic encapsulation layer CVD1 and a second inorganic encapsulation layer CVD2.
  • the first inorganic encapsulation layer CVD1 is located at Between the organic encapsulation layer IJP and the substrate, the second inorganic encapsulation layer CVD2 is located on a side of the organic encapsulation layer IJP facing away from the substrate.
  • a plurality of compensation spacers 40 are arranged in the first peripheral region 201, and the first peripheral region 201 is arranged in the display substrate.
  • the orthographic projection on the base of the substrate at least partially overlaps the orthographic projection of the sides of the first part on the base; such that the plurality of compensating spacers 40 is able to drain the liquid organic encapsulation material to the first part.
  • the side surface is not only conducive to improving the flatness of the subsequently formed inorganic packaging material on the side of the first part, but also avoids direct contact between the inorganic packaging layers above and below the organic packaging layer IJP on the side of the first part, The stress of the package structure near the side of the first part is effectively distributed.
  • the package structure has a better package edge morphology on the side facing away from the substrate, which reduces the risk of the package structure breaking near the side of the first part, thereby effectively Reduced risk of bad GDSX for display substrates.
  • the liquid organic encapsulation material is introduced into the side of the first part through the compensation spacer 40, without increasing the amount of the liquid organic encapsulation material, thus avoiding the organic
  • the encapsulation material overflows to the outside of the wall structure showing the perimeter of the substrate.
  • the first part includes a first target part 31, and the side of the first target part 31 has a notch 310; part of the inorganic package Layers (such as: the first inorganic encapsulation layer CVD1) and part of the organic encapsulation layer IJP are both filled in the recess 310;
  • the orthographic projection of the first peripheral area 201 on the base of the display substrate is located on a side of the orthographic projection of the first target portion 31 on the base that is close to the display area 10 .
  • the signal line 30 is fabricated by stacking a titanium metal layer (Ti), an aluminum metal layer (Al) and a titanium metal layer (Ti). After the signal line 30 is fabricated, etching During the process of forming the anode layer, the aluminum metal layer in the middle of the signal line 30 will be undercut, so that on the side of the signal line 30, the boundary between the two titanium metal layers will exceed the boundary of the aluminum metal layer. A notch 310 is formed on the side of the signal line 30 .
  • the orthographic projection of the plurality of compensation spacers 40 on the base of the display substrate is located within a predetermined range around the orthographic projection of the side surface of the first target portion 31 on the base.
  • the preset range includes: taking the center point of the orthographic projection of the side surface of the first target portion 31 on the substrate as the center, and a circular area with R as the radius. R is greater than or equal to 500 microns.
  • the orthographic projection of the plurality of compensation spacers 40 on the base of the display substrate is distributed in an array around the orthographic projection of the side surface of the first target portion 31 on the base.
  • the first inorganic encapsulation layer CVD1 and the organic encapsulation layer IJP fill up the notch 310 .
  • the orthographic projection of the first peripheral region 201 on the base of the display substrate at least partially overlaps the orthographic projection of the first target portion 31 on the base.
  • the first target portion is in direct contact with the encapsulation structure.
  • a plurality of compensation spacers 40 are arranged around the side notch 310 of the first target portion 31, and these compensation spacers 40 have a drainage effect, which is beneficial to improve the liquid organic packaging.
  • the fluidity of the material, the liquid organic packaging material is introduced into the notch 310, and the notch 310 is filled; this avoids the subsequently formed inorganic encapsulation layer from filling the notch 310, which not only helps to improve the subsequent formation of the inorganic encapsulation
  • the flatness of the material also avoids direct contact between the inorganic encapsulation layers above and below the organic encapsulation layer IJP near the notch 310 , effectively dispersing the stress of the encapsulation structure near the notch 310 .
  • the packaging structure has a better packaging edge morphology on the side facing away from the substrate, and the risk of the packaging structure breaking near the notch 310 is reduced, thereby effectively reducing the cost of the display substrate. Risk of bad GDSX.
  • the liquid organic packaging material is introduced into the notch 310 through the compensation spacer 40, without increasing the amount of the liquid organic packaging material, thus avoiding the overflow of the organic packaging material. Flow to the outside of the retaining wall structure showing the perimeter of the substrate.
  • the first part further includes:
  • the second target part 32, the second target part 32 is located in the peripheral area 20, at least part of the second target part 32 is located between the first target part 31 and the display area 10;
  • An orthographic projection of a peripheral area 201 on the base of the display substrate at least partially overlaps an orthographic projection of the second target portion on the base.
  • the orthographic projection of the first peripheral region 201 on the base of the display substrate covers the orthographic projection of the second target portion on the base.
  • the orthographic projections of the plurality of compensation spacers 40 on the substrate are also located around the orthographic projection of the second target portion 32 on the substrate.
  • the side of the second target portion 32 also has a notch.
  • the second target part 32 is coupled to the first target part 31 .
  • the orthographic projection of the plurality of compensation spacers 40 on the base of the display substrate is located within a predetermined range around the orthographic projection of the side surface of the second target portion 32 on the base.
  • the preset range includes: taking the center point of the orthographic projection of the side surface of the second target portion 32 on the substrate as the center, and a circular area with R as the radius. R is greater than or equal to 500 microns.
  • the orthographic projection of the plurality of compensation spacers 40 on the base of the display substrate is distributed in an array around the orthographic projection of the side surface of the second target portion 32 on the base.
  • the orthographic projection of the first peripheral region 201 on the base of the display substrate is set to at least partially overlap with the orthographic projection of the second target portion on the base, so that the plurality of compensation spacers
  • the orthographic projection of 40 on the substrate can be located at the periphery of the orthographic projection of the second target portion 32 on the substrate such that these compensating spacers 40 are able to drain the organic encapsulating material to the second target portion 32, and further drain to the area where the first target part 31 is located. Therefore, the display substrate provided by the above embodiment can more effectively introduce the liquid organic encapsulation material into the notch 310 to fill the notch 310 , thereby more effectively reducing the risk of GDSX failure of the display substrate.
  • the display substrate further includes:
  • FIGS. 6 and 8 illustrate the boundary PDL of the pixel defining layer and the boundary PLN2 of the flat layer.
  • a pixel defining layer is provided between the boundary PDL of the pixel defining layer and the display area 10
  • a second flat layer is provided between the boundary PLN2 of the flat layer and the display area 10 .
  • the pixel defining layer and the second flat layer may also be disposed at other locations.
  • the orthographic projection of the first target portion 31 on the substrate does not overlap with the orthographic projection of the pixel defining layer on the substrate, and does not intersect the orthographic projection of the planar layer on the substrate stack.
  • the signal line 30 includes a first conductive layer coupled to a second conductive layer, and the first conductive layer is located between the base and the second conductive layer.
  • the first conductive layer is made of the first source-drain metal layer
  • the second conductive layer is made of the second source-drain metal layer.
  • the first conductive layer is covered by the pixel defining layer and the first flat layer.
  • the second conductive layer includes the first target portion 31 and the second target portion 32 .
  • both VDD and VSS include the first conductive layer and the second conductive layer.
  • the third sub-pattern in Figure 6 includes a stacked first conductive layer and a second conductive layer, the first conductive layer has a darker color and a smaller area, and the first conductive layer is provided with Square via holes distributed in an array; the second conductive layer has a lighter color and a larger area.
  • the side of the first conductive layer also has a notch, but the notch can be covered by the pixel defining layer and the first flat layer, therefore, it will not affect the flatness of the package structure, nor Will affect the stress of the package structure.
  • the first target portion 31 is not covered by the second flat layer and the pixel defining layer, and the first target portion 31 can be in contact with the encapsulation structure.
  • the orthographic projection of the second target portion 32 on the substrate at least partially overlaps the orthographic projection of the pixel defining layer on the substrate; And/or at least partially overlap with an orthographic projection of the planar layer on the substrate.
  • the second target portion 32 and/or the planar layer can cover at least part of the second target portion 32 , preventing the notch on the side of the second target portion 32 from affecting the flatness and stress of the packaging structure.
  • the plurality of compensation spacers 40 includes a plurality of first compensation spacers 401 and/or a plurality of second compensation spacers 402, and the plurality of first compensation spacers 402
  • the orthographic projection of a compensation spacer 401 on the substrate does not overlap the orthographic projection of the signal line 30 on the substrate; the orthographic projection of the plurality of second compensation spacers 402 on the substrate The projection at least partially overlaps the orthographic projection of the signal line 30 on the substrate.
  • the above arrangement is beneficial for the compensation spacer 40 to better drain the organic packaging material to the vicinity of the notch 310 of the signal line 30, and more effectively introduce the liquid organic packaging material into the notch 310, and the notch The opening 310 is filled up, thereby more effectively reducing the risk of GDSX defects on the display substrate.
  • the peripheral area includes a binding area
  • the display substrate further includes: a first retaining wall Dam1 and a second retaining wall Dam2, the first retaining wall Dam1 surrounds the display area 10, and the second retaining wall Dam2 surrounds the first retaining wall Dam1;
  • the signal line 30 includes a power line, the orthographic projection of the first part of the power line on the base, the orthographic projection of the first retaining wall Dam1 on the base is in the same position as the display area 10 Between the orthographic projections on the substrate; the first portion is adjacent to the binding region.
  • the first barrier Dam1 and the second barrier Dam2 are used to block the organic encapsulation material, so as to define the boundary of the organic encapsulation layer IJP when the second barrier Dam2 faces the display area 10 side.
  • the power supply line includes a positive power supply line and/or a negative power supply line.
  • the orthographic projection of the first part of the power line on the base is set above, the orthographic projection of the first retaining wall Dam1 on the base and the orthographic projection of the display area 10 on the base Between, so that the first part of the power line can be well covered by the organic encapsulation layer IJP.
  • setting the display substrate further includes scanning lines, at least part of the scanning lines are located in the display area, and the scanning lines include a portion extending along the first direction;
  • the power line includes a positive power line and a negative power line
  • the orthographic projection of the first part of the positive power supply line on the base along the side in the first direction at least partially overlaps the orthographic projection of the first peripheral region 201 on the base;
  • the orthographic projection of the first part of the negative power supply line on the substrate along the side of the first direction at least partially overlaps the orthographic projection of the first peripheral region 201 on the substrate.
  • the scan lines include gate lines.
  • the above arrangement enables the compensation spacer 40 to better introduce the organic packaging material to the vicinity of the first part of the positive power supply and the first part of the negative power supply, realizing the adjustment of the first part of the positive power supply and the first part of the negative power supply.
  • the good packaging effect of the first part of the negative power supply reduces the risk of breakage of the packaging structure near the first part of the positive power supply and the first part of the negative power supply, and prevents water vapor and oxygen from entering the first part of the positive power supply.
  • a part and the first part of the negative power supply are transmission paths, which are transmitted to the display area 10 .
  • the signal line 30 includes a positive power line VDD
  • the positive power line VDD includes: a first common connection portion VDD1; At least part of a common connection portion VDD1 extends along the first direction, the first common connection portion VDD1 including the first target portion 31 .
  • the display substrate further includes a plurality of sub-power supply lines, at least part of which are disposed in the display area 10 for providing power signals to the sub-pixel driving circuits in the display area 10 .
  • At least part of the sub-power lines extend along the second direction, and the plurality of sub-power lines are respectively coupled to the first common connection portion VDD1, and the first common connection portion VDD1 is used to connect each of the sub-power lines Transmits a positive power signal.
  • the first common connection portion VDD1 includes the first conductive layer and the second conductive layer.
  • the above setting that the first common connection portion VDD1 includes the first target portion 31 enables the compensation spacer 40 to better introduce the organic packaging material to the vicinity of the first common connection portion VDD1, realizing The good packaging effect on the first common connection part VDD1 reduces the risk of breakage of the packaging structure near the first common connection part VDD1 and prevents water vapor and oxygen from using the first common connection part VDD1 as a transmission path , transmitted to the display area 10 .
  • the first common connection portion VDD1 includes a first sub-pattern VDD10 to an N-th sub-pattern, where N is greater than or equal to 3, and along a direction away from the display area 10, the The first sub-pattern VDD10 to the Nth sub-pattern are arranged in sequence, and the width of the first sub-pattern VDD10 to the Nth sub-pattern gradually narrows in the first direction; the second sub-pattern VDD11 includes the first sub-pattern VDD11 Two object parts 32; the third sub-pattern VDD12 includes the first object part 31 and the second object part 32.
  • the first sub-pattern VDD10 to the second sub-pattern VDD11 all include the first conductive layer and the second conductive layer.
  • the orthographic projection of the first conductive layer in the first sub-pattern VDD10 on the substrate is at least partly the same as the orthographic projection of the second conductive layer in the first sub-pattern VDD10 on the substrate.
  • the orthographic projection of the first conductive layer in the second sub-pattern VDD11 on the substrate is at least partly the same as the orthographic projection of the second conductive layer in the second sub-pattern VDD11 on the substrate.
  • the orthographic projection of the first conductive layer in the third sub-pattern VDD12 on the substrate is at least partly the same as the orthographic projection of the second conductive layer in the third sub-pattern VDD12 on the substrate. overlapping.
  • the fourth sub-pattern VDD13 to the Nth sub-pattern only include the first conductive layer.
  • the widths of the first sub-pattern VDD10 to the Nth sub-pattern gradually narrow in the first direction, forming a similar ladder structure on both sides of the first common connection portion VDD1.
  • This setting method is not only beneficial to reduce the resistance of the positive power supply line VDD, but also can reduce the interference between the positive power supply line VDD and the negative power supply line VSS, and reduce the interference between the positive power supply line VDD and the negative power supply line VSS. risk of short circuit.
  • the orthographic projection of the first sub-pattern VDD10 on the substrate includes a first layout area; at least part of the orthographic projection of the compensation spacer 40 on the substrate is evenly distributed on the substrate.
  • the first layout area is a first layout area.
  • the above setting at least part of the orthographic projection of the compensation spacer 40 on the substrate is evenly distributed in the first layout area, so that the compensation spacer 40 can better introduce the organic packaging material into the
  • the first layout area achieves a good packaging effect on the first sub-pattern VDD10, reduces the risk of breakage of the packaging structure near the first sub-pattern VDD10, and prevents water vapor and oxygen from forming on the first sub-pattern VDD10. is a transmission path, and is transmitted to the display area 10 .
  • the orthographic projection of part of the basic spacers 41 on the substrate is located in the first layout area, and the layout density of the basic spacers 41 in the first layout area is equal to that of the basic spacers.
  • the layout density of the pads 41 in the display area 10 is equal to that of the basic spacers.
  • the orthographic projection of the basic spacer 41 on the substrate is located in the first layout area, so that the basic spacer 41 can better introduce the organic packaging material into the first layout area, realizing
  • the good packaging effect on the first sub-pattern VDD10 reduces the risk of breakage of the packaging structure near the first sub-pattern VDD10, and prevents water vapor and oxygen from being transmitted to the The display area 10 .
  • the positive power supply line VDD further includes: a second common connection part VDD2, a plurality of conductive connection parts VDD3 and two first line-in parts VDD4;
  • At least part of the second common connection portion VDD2 extends along the first direction, and the second common connection portion VDD2 is located on a side of the first common connection portion VDD1 away from the display area 10;
  • the common connection part VDD2 is coupled to the first common connection part VDD1 through the plurality of conductive connection parts VDD3;
  • At least part of the first line inlet portion VDD4 extends along a second direction, and the second direction intersects with the first direction; the first line inlet portion VDD4 is located at the second common connection portion VDD2 away from the On one side of the display area 10 , the two first line-in portions VDD4 are respectively coupled to the second common connection portion VDD2 .
  • the second common connection part VDD2 is disposed opposite to the first common connection part VDD1 along the second direction, at least part of the conductive connection part VDD3 extends along the second direction, and the first common connection part VDD3 extends along the second direction.
  • the second common connection part VDD2 is coupled to the first common connection part VDD1 through the plurality of conductive connection parts VDD3, and the plurality of conductive connection parts VDD3 are arranged at intervals along the second direction.
  • the conductive connection portion VDD3 only includes the first conductive layer.
  • the first direction includes a horizontal direction
  • the second direction includes a vertical direction
  • the two first line-in portions VDD4 are coupled to both ends of the second common connection portion VDD2 in a one-to-one correspondence.
  • the signal line 30 further includes a negative power supply line VSS
  • the negative power supply line VSS includes: a surrounding part VSS1 and two second line-entry parts VSS2
  • the surrounding part VSS1 half surrounds the display area 10, and the two ends of the surrounding part VSS1 are coupled to the two second wire-inlet parts VSS2 in one-to-one correspondence; the second wire-inlet part VSS2 extending at least partly along said second direction; the end of said surrounding portion VSS1 comprises said first target portion 31 and said second target portion 32 .
  • the surrounding portion VSS1 half surrounds the display area 10 , and the opening of the surrounding portion VSS1 faces the location of the driving chip of the display substrate.
  • the surrounding portion VSS1 is coupled to the cathode in the display substrate for transmitting a negative power supply signal to the cathode.
  • At least part of the second wire inlet part VSS2 extends along the second direction, and the two ends of the surrounding part VSS1 are coupled to the two second wire inlet parts VSS2 one by one, And the two second line-in parts VSS2 are respectively coupled to the driving chip included in the display substrate, and receive the negative power supply signal provided by the driving chip.
  • the surrounding portion VSS1 includes the first conductive layer and the second conductive layer.
  • the second wire inlet portion VSS2 only includes the first conductive layer.
  • the end portion of the surrounding portion VSS1 is set to include the first target portion 31 and the second target portion 32, so that the compensation spacer 40 can better introduce the organic packaging material into the surrounding portion Near the end of VSS1, a good packaging effect on the end of the surrounding portion VSS1 is achieved, the risk of the packaging structure breaking near the end of the surrounding portion VSS1 is reduced, and water vapor and oxygen are prevented from entering the surrounding portion.
  • the end of VSS1 is a transmission path, which is transmitted to the display area 10 .
  • the display substrate further includes: a first barrier Dam1 and a second barrier Dam2, the first barrier Dam1 surrounds the display area 10, the The second retaining wall Dam2 surrounds the first retaining wall Dam1;
  • the orthographic projection of the first target part 31 on the base and the orthographic projection of the second target part 32 on the base are both located at the orthographic projection of the first retaining wall Dam1 on the base, and the orthographic projection of the display area 10 on the substrate.
  • the first barrier Dam1 and the second barrier Dam2 are used to block the organic encapsulation material, so as to define the boundary of the organic encapsulation layer IJP when the second barrier Dam2 faces the display area 10 side.
  • the orthographic projection of the first target part 31 on the base and the orthographic projection of the second target part 32 on the base are set above the orthographic projection of the first retaining wall Dam1 on the base. Between the projection and the orthographic projection of the display area 10 on the substrate, both the first target portion 31 and the second target portion 32 can be well covered by the organic encapsulation layer IJP.
  • the display substrate further includes: a first barrier Dam1 and a second barrier Dam2, the first barrier Dam1 surrounds the display area 10, the The second retaining wall Dam2 surrounds the first retaining wall Dam1;
  • first interval region 50 Between the first direction, there is a first interval region 50 between the orthographic projection of the first common connection portion VDD1 on the substrate and the orthographic projection of the end of the surrounding portion VSS1 on the substrate, so
  • the first spacer area 50 is located between the orthographic projection of the first retaining wall Dam1 on the base and the orthographic projection of the display area 10 on the base; at least part of the compensation spacer 40 is in the The orthographic projections on the base are uniformly distributed in the first interval area 50 .
  • the first target portion 31 and the second target portion 32 are located around the first separation area 50 .
  • the above setting at least part of the orthographic projection of the compensation spacer 40 on the substrate is evenly distributed in the first spacer region 50, so that the compensation spacer 40 can better introduce the organic packaging material into the first spacer region 50.
  • the first spacing region 50 achieves a good packaging effect on the first spacing region 50 and the first target portion 31 and the second target portion 32 near the first spacing region 50, reducing the encapsulation structure in the first spacing region 50.
  • the risk of fracture near the spacer area 50 avoids the transmission of water vapor and oxygen to the display area 10 through the first spacer area 50 as a transmission path.
  • the orthographic projection of the first common connection portion VDD1 on the substrate forms a first layout area 51, and the first layout area 51 is located at the first retaining wall Dam1. Between the orthographic projection on the substrate and the orthographic projection of the display area 10 on the substrate; at least part of the orthographic projection of the compensation spacer 40 on the substrate is evenly distributed on the second A layout area 51 .
  • the orthographic projection of the second sub-pattern VDD11 on the substrate and at least part of the orthographic projection of the third sub-pattern VDD12 on the substrate form the first layout area 51 .
  • the above setting at least part of the orthographic projection of the compensation spacer 40 on the substrate is evenly distributed in the first layout area 51, so that the compensation spacer 40 can better introduce the organic packaging material into the substrate.
  • the positions where at least part of the second sub-pattern VDD11 and the third sub-pattern VDD12 are located achieve a good packaging effect on the second sub-pattern VDD11 and the third sub-pattern VDD12, reducing the packaging structure in the
  • the risk of fracture near the second sub-pattern VDD11 and the third sub-pattern VDD12 avoids the transmission of water vapor and oxygen to the display area by using the second sub-pattern VDD11 and the third sub-pattern VDD12 as transmission paths 10.
  • the orthographic projection of part of the compensation spacer 40 on the base is set, and the orthographic projection of the end of the surrounding portion VSS1 on the base is set. overlap at least partially.
  • the above method enables the compensation spacer 40 to better introduce the organic packaging material to the position where the end of the surrounding portion VSS1 is located, so as to achieve a good packaging effect on the end of the surrounding portion VSS1 and reduce the packaging cost.
  • the risk of structural breakage near the end of the surrounding portion VSS1 prevents water vapor and oxygen from being transmitted to the display region 10 by taking the end of the surrounding portion VSS1 as a transmission path.
  • At least part of the orthographic projection of the first common connection portion VDD1 on the substrate is located where the end of the surrounding portion VSS1 is on the substrate.
  • At least a part of the orthographic projection of the first common connection portion VDD1 on the base is in line with the surrounding
  • There is a second spacer 52 between the orthographic projections of the ends of the portion VSS1 on the substrate; part of the orthographic projection of the compensation spacer 40 on the substrate is located in the second spacer 52 .
  • At least part of the orthographic projection of the first sub-pattern VDD10 included in the first common connection portion VDD1 on the substrate is located at the orthographic projection of the surrounding portion VSS1 on the substrate, and the display Region 10 is between orthographic projections on said substrate.
  • the second spacer 52 between at least part of the orthographic projection of the first sub-pattern VDD10 on the substrate and the orthographic projection of the end of the surrounding portion VSS1 on the substrate.
  • the orthographic projection of the compensation spacer 40 on the substrate in the above setting part is located in the second spacer 52, so that the compensation spacer 40 can better introduce the organic packaging material into the second spacer.
  • the spacer 52 achieves a good packaging effect on the second spacer 52, reduces the risk of cracking of the packaging structure near the second spacer 52, and prevents water vapor and oxygen from forming in the second spacer 52.
  • the transmission path is transmitted to the display area 10 .
  • setting the packaging structure includes sequentially stacking the first inorganic packaging layer CVD1, the organic packaging layer IJP and the second inorganic packaging layer CVD2 along the direction away from the substrate; Both the first inorganic encapsulation layer CVD1 and part of the organic encapsulation layer IJP are filled in the notch 310 , and the second inorganic encapsulation layer CVD2 is not filled in the notch 310 .
  • part of the first inorganic encapsulation layer CVD1 and part of the organic encapsulation layer IJP can fill up the notch 310 .
  • the above arrangement prevents the second inorganic encapsulation layer CVD2 from filling the notch 310, which is beneficial to improve the flatness of the second inorganic encapsulation material, thereby reducing the risk of fracture of the second inorganic encapsulation layer CVD2, Reduced risk of bad GDSX for display substrates.
  • the compensation spacer 40 and the pixel defining layer or the base spacer 41 are provided in the same layer and material.
  • both the basic spacer 41 and the compensation spacer 40 can be formed with the pixel defining layer in one patterning process.
  • the compensation spacer 40 and the basic spacer 41 can also be made of other organic or inorganic materials.
  • the compensation spacer 40 and the pixel defining layer or the basic spacer 41 are set in the same layer and the same material, so that the basic spacer 41, the compensation spacer 40 and the pixel definition Layers can be formed in the same patterning process, which is beneficial to simplify the manufacturing process of the display substrate and reduce the manufacturing cost of the display substrate.
  • the display substrate further includes a first source-drain metal layer and a second source-drain metal layer, the first source-drain metal layer is located between the second source-drain metal layer and the substrate; A part of the signal line 30 is provided in the same layer and material as the first source-drain metal layer; another part of the signal line 30 is provided in the same layer and material as the second source-drain metal layer.
  • the second conductive layer included in the signal line 30 is provided in the same layer and with the same material as the second source-drain metal layer.
  • Embodiments of the present disclosure also provide a display device, including the display substrate provided in the above embodiments.
  • a plurality of compensation spacers 40 are arranged in the first peripheral area 201, and an orthographic projection of the first peripheral area 201 on the base of the display substrate is set, which is consistent with the The orthographic projections of the sides of the first part on the substrate at least partially overlap; in this way, the plurality of compensation spacers 40 can drain the liquid organic packaging material to the sides of the first part, which is not only conducive to improving the subsequent formation of inorganic packaging
  • the flatness of the material on the sides of the first part also avoids direct contact between the inorganic encapsulation layers above and below the organic encapsulation layer IJP on the sides of the first part, effectively dispersing the Stress in package structure.
  • the package structure has a better package edge morphology on the side facing away from the substrate, and the risk of the package structure breaking near the side of the first part is reduced, thereby effectively reducing the To avoid the risk of poor GDSX showing the substrate.
  • the liquid organic packaging material is introduced into the side of the first part through the compensation spacer 40, without increasing the amount of the liquid organic packaging material, thus avoiding the problem of organic packaging. Material overflows to the outside of the retaining wall structure showing the perimeter of the substrate.
  • the display device provided by the embodiments of the present disclosure also has the above-mentioned beneficial effects when it includes the above-mentioned display substrate, which will not be repeated here.
  • the display device can be any product or component with display function such as TV, monitor, digital photo frame, mobile phone, tablet computer, etc.
  • the display device also includes flexible circuit boards, printed circuit boards and backplanes, etc. .
  • “same layer” in the embodiments of the present disclosure may refer to film layers on the same structural layer.
  • the film layers in the same layer may be a layer structure formed by using the same film forming process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a patterning process.
  • one patterning process may include multiple exposure, development or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. These specific graphics may also be at different heights or have different thicknesses.
  • each embodiment in this specification is described in a progressive manner, the same and similar parts of each embodiment can be referred to each other, and each embodiment focuses on the differences from other embodiments.
  • the description is relatively simple, and for relevant parts, please refer to part of the description of the product embodiments.

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Abstract

一种显示基板和显示装置。显示基板包括：显示区域（10）和包围显示区域（10）的周边区域（20）；显示基板还包括：信号线（30），多个基础隔垫物（41），多个补偿隔垫物（40）和封装结构，信号线（30）包括位于周边区域（20）的第一部分；多个基础隔垫物（41）的至少部分位于显示区域（10）；多个补偿隔垫物（40）设置在第一周边区域（201），第一周边区域（201）在显示基板的基底上的正投影，与第一部分的侧面在基底上的正投影至少部分重叠；补偿隔垫物（40）的布局密度大于基础隔垫物（41）的布局密度；封装结构包括层叠设置的有机封装层（IJP）和无机封装层（CVD1,CVD2），有机封装层（IJP）和无机封装层（CVD1,CVD2）覆盖多个补偿隔垫物（40）。

Description

显示基板和显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板和显示装置。
背景技术
有机发光二极管(英文：Organic Light-Emitting Diode，简称：OLED)显示器件，以其轻薄、亮度高、功耗低、响应快、清晰度高、柔性好、发光效率高等优点，被广泛应用在各个领域。
OLED显示器件一般包括发光元件和封装层，封装层覆盖发光元件，以防止水汽和氧气入侵至发光元件内部，对发光元件中的有机发光材料层产生侵蚀，进而影响OLED显示器件的信赖性。
发明内容
本公开的目的在于提供一种显示基板和显示装置。
为了实现上述目的，本公开提供如下技术方案：
本公开的第一方面提供一种显示基板，包括：显示区域和包围所述显示区域的周边区域；所述显示基板还包括：
信号线，所述信号线包括位于所述周边区域的第一部分；
多个基础隔垫物，所述多个基础隔垫物的至少部分位于所述显示区域；
多个补偿隔垫物，设置在第一周边区域，所述第一周边区域在所述显示基板的基底上的正投影，与所述第一部分的侧面在所述基底上的正投影至少部分重叠；所述补偿隔垫物的布局密度大于所述基础隔垫物的布局密度；
封装结构，所述封装结构包括层叠设置的有机封装层和无机封装层，所述有机封装层和无机封装层覆盖所述多个补偿隔垫物。
可选的，所述第一部分包括第一目标部分，所述第一目标部分的侧面具有凹口；部分所述无机封装层和部分所述有机封装层均填充在所述凹口中；
所述第一周边区域在所述显示基板的基底上的正投影，位于所述第一目标部分在所述基底上的正投影靠近所述显示区域的一侧。
可选的，所述第一部分还包括：
第二目标部分，所述第二目标部分的至少部分位于所述第一目标部分与所述显示区域之间；所述第一周边区域在所述显示基板的基底上的正投影，与所述第二目标部分在所述基底上的正投影至少部分交叠。
可选的，所述显示基板还包括：
层叠设置的像素界定层和平坦层，所述平坦层位于所述像素界定层与所述基底之间；
所述第一目标部分在所述基底上的正投影，与所述像素界定层在所述基底上的正投影不交叠，且与所述平坦层在所述基底上的正投影不交叠。
可选的，所述第二目标部分在所述基底上的正投影，与所述像素界定层在所述基底上的正投影至少部分交叠；和/或，与所述平坦层在所述基底上的正投影至少部分交叠。
可选的，所述多个补偿隔垫物包括多个第一补偿隔垫物和/或多个第二补偿隔垫物，所述多个第一补偿隔垫物在所述基底上的正投影与所述信号线在所述基底上的正投影不交叠；所述多个第二补偿隔垫物在所述基底上的正投影与所述信号线在所述基底上的正投影至少部分交叠。
可选的，所述周边区域包括绑定区域；
所述显示基板还包括：第一挡墙和第二挡墙，所述第一挡墙包围所述显示区域，所述第二挡墙包围所述第一挡墙；
所述信号线包括电源线，所述电源线的所述第一部分在所述基底上的正投影，位于所述第一挡墙在所述基底上的正投影与所述显示区域在所述基底上的正投影之间；所述第一部分靠近所述绑定区域。
可选的，所述显示基板还包括扫描线，所述扫描线的至少部分位于所述显示区域，所述扫描线包括沿第一方向延伸的部分；
所述电源线包括正电源线和负电源线；
所述正电源线的第一部分沿第一方向的侧面在所述基底上的正投影，与所述第一周边区域在所述基底上的正投影至少部分交叠；
和/或，所述负电源线的第一部分沿第一方向的侧面在所述基底上的正投影，与所述第一周边区域在所述基底上的正投影至少部分交叠。
可选的，所述信号线包括正电源线，所述正电源线包括：第一公共连接部；所述第一公共连接部的至少部分沿第一方向延伸，所述第一公共连接部包括所述第一目标部分。
可选的，所述第一公共连接部包括第一子图形至第N子图形，N大于或等于3，沿远离所述显示区域的方向，所述第一子图形至所述第N子图形依次排列，所述第一子图形至所述第N子图形在所述第一方向的宽度逐渐变窄；第二子图形包括所述第二目标部分；第三子图形包括所述第一目标部分和所述第二目标部分。
可选的，所述第一子图形在所述基底上的正投影包括第一布局区；至少部分所述补偿隔垫物在所述基底上的正投影，均匀分布在所述第一布局区；或者，
部分基础隔垫物在所述基底上的正投影位于所述第一布局区，所述基础隔垫物在所述第一布局区的布局密度等于所述基础隔垫物在所述显示区域的布局密度。
可选的，所述正电源线还包括：第二公共连接部，多个导电连接部和两个第一进线部；
所述第二公共连接部的至少部分沿所述第一方向延伸，所述第二公共连接部位于所述第一公共连接部远离所述显示区域的一侧；所述第二公共连接部与所述第一公共连接部之间通过所述多个导电连接部耦接；
所述第一进线部的至少部分沿第二方向延伸，所述第二方向与所述第一方向相交；所述第一进线部位于所述第二公共连接部远离所述显示区域的一侧，所述两个第一进线部分别与所述第二公共连接部耦接。
可选的，所述信号线还包括负电源线，所述负电源线包括：环绕部和两个第二进线部；所述环绕部半包围所述显示区域，所述环绕部的两个端部与所述两个第二进线部一一对应耦接；所述第二进线部的至少部分沿所述第二方向延伸；所述环绕部的端部包括所述第一目标部分和所述第二目标部分。
可选的，部分所述补偿隔垫物在所述基底上的正投影，与所述环绕部的端部在所述基底上的正投影至少部分重叠。
可选的，所述显示基板还包括：第一挡墙和第二挡墙，所述第一挡墙包 围所述显示区域，所述第二挡墙包围所述第一挡墙；
沿所述第一方向，所述第一公共连接部在所述基底上的正投影与所述环绕部的端部在所述基底上的正投影之间具有第一间隔区域，所述第一间隔区域位于所述第一挡墙在所述基底上的正投影，与所述显示区域在所述基底上的正投影之间；至少部分所述补偿隔垫物在所述基底上的正投影，均匀分布在所述第一间隔区域。
可选的，所述第一公共连接部在所述基底上的正投影的至少部分，位于所述环绕部的端部在所述基底上的正投影，与所述显示区域在所述基底上的正投影之间，沿所述第二方向，所述第一公共连接部在所述基底上的正投影的至少部分与所述环绕部的端部在所述基底上的正投影之间具有第二间隔区；部分所述补偿隔垫物在所述基底上的正投影，位于所述第二间隔区。
可选的，所述封装结构包括沿远离所述基底的方向依次层叠设置的第一无机封装层，有机封装层和第二无机封装层；部分所述第一无机封装层和部分所述有机封装层均填充在所述凹口中，所述第二无机封装层未填充在所述凹口中。
可选的，所述补偿隔垫物与所述像素界定层或所述基础隔垫物同层同材料设置。
可选的，所述显示基板还包括第一源漏金属层和第二源漏金属层，所述第一源漏金属层位于所述第二源漏金属层与所述基底之间；所述信号线的一部分与所述第一源漏金属层同层同材料设置，所述信号线的另一部分与所述第二源漏金属层同层同材料设置。
基于上述显示基板的技术方案，本公开的第二方面提供一种显示装置，包括上述实施例提供的显示基板。
附图说明
此处所说明的附图用来提供对本公开的进一步理解，构成本公开的一部分，本公开的示意性实施例及其说明用于解释本公开，并不构成对本公开的不当限定。在附图中：
图1为本公开实施例提供的凹口附近封装结构的第一示意图；
图2为本公开实施例提供的凹口附近封装结构的第二示意图；
图3为本公开实施例提供的显示基板中正电源线和负电源线的布局示意图；
图4为本公开实施例提供的显示基板中正电源线的第一示意图；
图5为本公开实施例提供的显示基板中正电源线的第二示意图；
图6为图3中X1部分的放大示意图；
图7为图6中间隔区和布局区的示意图；
图8为图3中X2部分的放大示意图；
图9为图8中间隔区和布局区的示意图；
图10为本公开实施例提供的信号线与补偿隔垫物的布局示意图；
图11为本公开实施例提供的显示基板中第一周边区域的示意图。
具体实施方式
为了进一步说明本公开实施例提供的显示基板和显示装置，下面结合说明书附图进行详细描述。
如图1所示，本公开实施例提供一种显示基板，包括基底以及设置在所述基底上的信号线30和封装结构；所述信号线30的侧面具有凹口310；所述封装结构包括沿远离所述基底的方向依次层叠设置在所述基底上的第一无机封装层CVD1，有机封装层(图1中未示出)和第二无机封装层CVD2，所述第一无机封装层CVD1填充在所述凹口310中，所述有机封装层未填充在所述凹口310中。
上述显示基板中，由于在所述凹口310处没有有机封装层，使得在所述凹口310附近，所述第一无机封装层CVD1和所述第二无机封装层CVD2应力集中，且第二无机封装层CVD2背向基底的表面不够平坦，容易在凹口310附近发生断裂，为水汽和氧气的入侵提供通道；从而导致在显示基板进行信赖性测试过程中，显示基板的显示区域容易出现GDSX(生长的小黑点)不良。
请参阅图2，图3，图6，图8和图11，本公开实施例提供了一种显示基板，包括：显示区域10和包围所述显示区域10的周边区域20；所述显示基 板还包括：
信号线30(包括如图3中的正电源线VDD和负电源线VSS)，所述信号线30包括位于所述周边区域20的第一部分；
多个基础隔垫物41，所述多个基础隔垫物41的至少部分位于所述显示区域10；
多个补偿隔垫物40，设置在第一周边区域201，所述第一周边区域201在所述显示基板的基底上的正投影，与所述第一部分的侧面在所述基底上的正投影至少部分重叠；所述补偿隔垫物40的布局密度大于所述基础隔垫物41的布局密度；
封装结构，所述封装结构包括层叠设置的有机封装层IJP和无机封装层(如：第一无机封装层CVD1)，所述有机封装层IJP和无机封装层覆盖所述多个补偿隔垫物40。
示例性的，所述周边区域包括绑定区域，所述第一部分在所述基底上的正投影，位于所述显示区域在所述基底上的正投影与所述绑定区域在所述基底上的正投影之间。
如图6和图8所示，所述多个基础隔垫物41的至少部分位于所述显示区域10。所述补偿隔垫物40的布局密度大于所述基础隔垫物41的布局密度。
示例性的，所述多个基础隔垫物41的一部分位于所述显示区域10，所述基础隔垫物41的另一部分位于所述周边区域20。示例性的，所述基础隔垫物41的另一部分位于所述补偿隔垫物40与所述显示区域10之间。
示例性的，所述基础隔垫物41和所述补偿隔垫物40均能够起到支撑作用。
示例性的，所述补偿隔垫物40的布局密度大于或等于所述基础隔垫物41的布局密度的二倍。
上述设置所述补偿隔垫物40的布局密度大于所述基础隔垫物41的布局密度，有利于将有机封装材料引入所述补偿隔垫物40所在区域，实现对所述补偿隔垫物40所在区域的有效封装。
示例性的，所述补偿隔垫物40分布在所述周边区域20。
示例性的，所述第一周边区域201在所述基底上的正投影，位于所述显 示区域在所述基底上的正投影与所述绑定区域在所述基底上的正投影之间。
示例性的，所述补偿隔垫物40与常规的用于支撑的隔垫物的作用相同。
示例性的，所述补偿隔垫物40呈柱状。
示例性的，所述显示基板包括：沿远离所述基底的方向依次层叠设置的有源层，第一栅极绝缘层，第一栅金属层，第二栅极绝缘层，第二栅金属层，层间绝缘层，第一源漏金属层，第一平坦层，第二源漏金属层，第二平坦层，阳极层，像素界定层，发光功能层，阴极和封装结构。
示例性的，所述显示基板中不包括钝化层。
示例性的，所述封装结构包括层叠设置的有机封装层IJP和无机封装层，所述无机封装层包括第一无机封装层CVD1和第二无机封装层CVD2，所述第一无机封装层CVD1位于所述有机封装层IJP与所述基底之间，所述第二无机封装层CVD2位于所述有机封装层IJP背向所述基底的一侧。
根据所述显示基板的具体结构可知，本公开实施例提供的显示基板中，在所述第一周边区域201设置多个补偿隔垫物40，并设置所述第一周边区域201在所述显示基板的基底上的正投影，与所述第一部分的侧面在所述基底上的正投影至少部分重叠；这样所述多个补偿隔垫物40能够将液态有机封装材料引流至所述第一部分的侧面，不仅有利于提升后续形成的无机封装材料在所述第一部分的侧面的平坦性，还避免了在所述第一部分的侧面位于有机封装层IJP上方和下方的无机封装层之间直接接触，有效分散了所述第一部分的侧面附近的封装结构的应力。因此，本公开实施例提供的显示基板中，保证了封装结构在背向基底的一面具有较好的封装边缘形貌，降低了封装结构在所述第一部分的侧面附近发生断裂的风险，从而有效降低了显示基板出现GDSX不良的风险。
而且，本公开实施例提供的显示基板中，是通过所述补偿隔垫物40将液态有机封装材料引入所述第一部分的侧面，无需增加液态有机封装材料的用量，从而很好的避免了有机封装材料溢流到显示基板周边的挡墙结构的外侧。
请参阅图2，图3，图6和图8，在一些实施例中，所述第一部分包括第一目标部分31，所述第一目标部分31的侧面具有凹口310；部分所述无机封装层(如：第一无机封装层CVD1)和部分所述有机封装层IJP均填充在所述 凹口310中；
所述第一周边区域201在所述显示基板的基底上的正投影，位于所述第一目标部分31在所述基底上的正投影靠近所述显示区域10的一侧。
如图2所示，示例性的，所述信号线30采用层叠的钛金属层(Ti)，铝金属层(Al)和钛金属层(Ti)制作，在制作完成信号线30之后，刻蚀形成阳极层的过程中，所述信号线30中间的铝金属层会发生侧蚀，使得在所述信号线30的侧面，两层钛金属层的边界会超出铝金属层的边界，在所述信号线30的侧面形成凹口310。
示例性的，所述多个补偿隔垫物40在所述显示基板的基底上的正投影，位于所述第一目标部分31的侧面在所述基底上的正投影的周边预设范围内。示例性的，所述预设范围包括：以所述第一目标部分31的侧面在所述基底上的正投影的中心点为圆心，以R为半径的圆形区域。R大于或等于500微米。
示例性的，所述多个补偿隔垫物40在所述显示基板的基底上的正投影，在所述第一目标部分31的侧面在所述基底上的正投影的周边呈阵列分布。
示例性的，所述第一无机封装层CVD1和所述有机封装层IJP将所述凹口310填满。
示例性的，所述第一周边区域201在所述显示基板的基底上的正投影，与所述第一目标部分31在所述基底上的正投影至少部分交叠。
示例性的，所述第一目标部分与所述封装结构直接接触。
上述实施例提供的显示基板中，在所述第一目标部分31的侧面凹口310的周边设置了多个补偿隔垫物40，这些补偿隔垫物40具有引流作用，有利于提升液态有机封装材料的流动性，将液态有机封装材料引入凹口310中，将所述凹口310填满；这样避免了后续形成的无机封装层填充所述凹口310，不仅有利于提升后续形成的无机封装材料的平坦性，还避免了在凹口310附近位于有机封装层IJP上方和下方的无机封装层之间直接接触，有效分散了凹口310附近的封装结构的应力。因此，上述实施例提供的显示基板中，保证了封装结构在背向基底的一面具有较好的封装边缘形貌，降低了封装结构在凹口310附近发生断裂的风险，从而有效降低了显示基板出现GDSX不良的风险。
而且，上述实施例提供的显示基板中，是通过所述补偿隔垫物40将液态有机封装材料引入凹口310中，无需增加液态有机封装材料的用量，从而很好的避免了有机封装材料溢流到显示基板周边的挡墙结构的外侧。
如图3，图6和图8所示，在一些实施例中，所述第一部分还包括：
第二目标部分32，所述第二目标部分32位于所述周边区域20，所述第二目标部分32的至少部分位于所述第一目标部分31与所述显示区域10之间；所述第一周边区域201在所述显示基板的基底上的正投影，与所述第二目标部分在所述基底上的正投影至少部分交叠。
示例性的，所述第一周边区域201在所述显示基板的基底上的正投影，覆盖所述第二目标部分在所述基底上的正投影。
示例性的，所述多个补偿隔垫物40在所述基底上的正投影，还位于所述第二目标部分32在所述基底上的正投影的周边。
示例性的，所述第二目标部分32的侧面也具有凹口。
示例性的，所述第二目标部分32与所述第一目标部分31耦接。
示例性的，所述多个补偿隔垫物40在所述显示基板的基底上的正投影，位于所述第二目标部分32的侧面在所述基底上的正投影的周边预设范围内。示例性的，所述预设范围包括：以所述第二目标部分32的侧面在所述基底上的正投影的中心点为圆心，以R为半径的圆形区域。R大于或等于500微米。
示例性的，所述多个补偿隔垫物40在所述显示基板的基底上的正投影，在所述第二目标部分32的侧面在所述基底上的正投影的周边呈阵列分布。
上述设置所述第一周边区域201在所述显示基板的基底上的正投影，与所述第二目标部分在所述基底上的正投影至少部分交叠，使得所述多个补偿隔垫物40在所述基底上的正投影，能够位于所述第二目标部分32在所述基底上的正投影的周边，使得这些补偿隔垫物40能够将有机封装材料引流至所述第二目标部分32所在的区域，并进一步引流至所述第一目标部分31所在区域。因此，上述实施例提供的显示基板，更有效的将液态有机封装材料引入凹口310中，将所述凹口310填满，从而更有效降低了显示基板出现GDSX不良的风险。
如图6和图8所示，在一些实施例中，所述显示基板还包括：
层叠设置的像素界定层和平坦层，所述平坦层位于所述像素界定层与所述基底之间；图6和图8中示意了像素界定层的边界PDL和平坦层的边界PLN2。在图6和图8中，在像素界定层的边界PDL与所述显示区域10之间设置像素界定层，在平坦层的边界PLN2与所述显示区域10之间设置有第二平坦层。所述像素界定层和所述第二平坦层也可以设置在其他位置。
所述第一目标部分31在所述基底上的正投影，与所述像素界定层在所述基底上的正投影不交叠，且与所述平坦层在所述基底上的正投影不交叠。
示例性的，所述信号线30包括相耦接第一导电层和第二导电层，所述第一导电层位于所述基底与所述第二导电层之间。示例性的，所述第一导电层采用所述第一源漏金属层制作，所述第二导电层采用所述第二源漏金属层制作。示例性的，所述第一导电层被所述像素界定层和所述第一平坦层覆盖。所述第二导电层包括所述第一目标部分31和所述第二目标部分32。
需要说明，图6至图9中，VDD和VSS均示意了包括第一导电层和第二导电层。以图6为例，图6中第三子图形包括层叠的第一导电层和第二导电层，所述第一导电层颜色较深，且面积较小，所述第一导电层上设置有阵列分布的方形过孔；所述第二导电层颜色较浅，且面积较大。
示例性的，所述第一导电层的侧面也具有凹口，但该凹口能够被所述像素界定层和所述第一平坦层覆盖，因此，不会影响封装结构的平整度，也不会影响到封装结构的应力。
示例性的，所述第一目标部分31未被所述第二平坦层和所述像素界定层覆盖，所述第一目标部分31能够与所述封装结构接触。
如图6和图8所示，在一些实施例中，所述第二目标部分32在所述基底上的正投影，与所述像素界定层在所述基底上的正投影至少部分交叠；和/或，与所述平坦层在所述基底上的正投影至少部分交叠。
所述第二目标部分32和/或所述平坦层能够覆盖所述第二目标部分32的至少部分，避免所述第二目标部分32的侧面的凹口影响封装结构的平整度和应力。
如图10所示，在一些实施例中，设置所述多个补偿隔垫物40包括多个第一补偿隔垫物401和/或多个第二补偿隔垫物402，所述多个第一补偿隔垫 物401在所述基底上的正投影与所述信号线30在所述基底上的正投影不交叠；所述多个第二补偿隔垫物402在所述基底上的正投影与所述信号线30在所述基底上的正投影至少部分交叠。
上述设置方式有利于所述补偿隔垫物40更好的将有机封装材料引流至所述信号线30的凹口310附近，更有效的将液态有机封装材料引入凹口310中，将所述凹口310填满，从而更有效降低了显示基板出现GDSX不良的风险。
如图6和图8所示，在一些实施例中，所述周边区域包括绑定区域；
所述显示基板还包括：第一挡墙Dam1和第二挡墙Dam2，所述第一挡墙Dam1包围所述显示区域10，所述第二挡墙Dam2包围所述第一挡墙Dam1；
所述信号线30包括电源线，所述电源线的所述第一部分在所述基底上的正投影，位于所述第一挡墙Dam1在所述基底上的正投影与所述显示区域10在所述基底上的正投影之间；所述第一部分靠近所述绑定区域。
示例性的，所述第一挡墙Dam1和所述第二挡墙Dam2用于阻挡有机封装材料，以限定所述有机封装层IJP的边界在所述第二挡墙Dam2朝向所述显示区域10的一侧。
示例性的，所述电源线包括正电源线和/或负电源线。
上述设置所述电源线的所述第一部分在所述基底上的正投影，位于所述第一挡墙Dam1在所述基底上的正投影与所述显示区域10在所述基底上的正投影之间，使得所述电源线的第一部分能够被所述有机封装层IJP很好的覆盖。
在一些实施例中，设置所述显示基板还包括扫描线，所述扫描线的至少部分位于所述显示区域，所述扫描线包括沿第一方向延伸的部分；
所述电源线包括正电源线和负电源线；
所述正电源线的第一部分沿第一方向的侧面在所述基底上的正投影，与所述第一周边区域201在所述基底上的正投影至少部分交叠；
和/或，所述负电源线的第一部分沿第一方向的侧面在所述基底上的正投影，与所述第一周边区域201在所述基底上的正投影至少部分交叠。
示例性的，所述扫描线包括栅线。
上述设置方式使得所述补偿隔垫物40能够将有机发封装材料更好的引入至所述正电源的第一部分和所述负电源的第一部分的附近，实现对所述正电源的第一部分和所述负电源的第一部分良好的封装效果，降低了封装结构在所述正电源的第一部分和所述负电源的第一部分附近发生断裂的风险，避免了水汽和氧气以所述正电源的第一部分和所述负电源的第一部分为传输路径，传输至所述显示区域10。
如图3，图4，图6和图8所示，在一些实施例中，所述信号线30包括正电源线VDD，所述正电源线VDD包括：第一公共连接部VDD1；所述第一公共连接部VDD1的至少部分沿第一方向延伸，所述第一公共连接部VDD1包括所述第一目标部分31。
示例性的，所述显示基板还包括多条子电源线，所述子电源线的至少部分设置于所述显示区域10，用于为显示区域10中的各子像素驱动电路提供电源信号。所述子电源线的至少部分沿第二方向延伸，所述多条子电源线分别与所述第一公共连接部VDD1耦接，所述第一公共连接部VDD1用于向各所述子电源线传输正电源信号。
示例性的，所述第一公共连接部VDD1包括所述第一导电层和所述第二导电层。
上述设置所述第一公共连接部VDD1包括所述第一目标部分31，使得所述补偿隔垫物40能够将有机发封装材料更好的引入至所述第一公共连接部VDD1的附近，实现对所述第一公共连接部VDD1良好的封装效果，降低了封装结构在所述第一公共连接部VDD1附近发生断裂的风险，避免了水汽和氧气以所述第一公共连接部VDD1为传输路径，传输至所述显示区域10。
如图4所示，在一些实施例中，所述第一公共连接部VDD1包括第一子图形VDD10至第N子图形，N大于或等于3，沿远离所述显示区域10的方向，所述第一子图形VDD10至所述第N子图形依次排列，所述第一子图形VDD10至所述第N子图形在所述第一方向的宽度逐渐变窄；第二子图形VDD11包括所述第二目标部分32；第三子图形VDD12包括所述第一目标部分31和所述第二目标部分32。
示例性的，所述第一子图形VDD10至所述第二子图形VDD11均包括所 述第一导电层和所述第二导电层。示例性的，所述第一子图形VDD10中的第一导电层在所述基底上的正投影，与所述第一子图形VDD10中的第二导电层在所述基底上的正投影至少部分重叠。示例性的，所述第二子图形VDD11中的第一导电层在所述基底上的正投影，与所述第二子图形VDD11中的第二导电层在所述基底上的正投影至少部分重叠。示例性的，所述第三子图形VDD12中的第一导电层在所述基底上的正投影，与所述第三子图形VDD12中的第二导电层在所述基底上的正投影至少部分重叠。
示例性的，所述第四子图形VDD13至所述第N子图形仅包括所述第一导电层。
示例性的，所述第一子图形VDD10至所述第N子图形在所述第一方向的宽度逐渐变窄，在所述第一公共连接部VDD1的两侧形成类似阶梯结构。这种设置方式不仅有利于降低所述正电源线VDD的电阻，还能够降低所述正电源线VDD与负电源线VSS之间的干扰，降低所述正电源线VDD与所述负电源线VSS之间发生短路的风险。
在一些实施例中，所述第一子图形VDD10在所述基底上的正投影包括第一布局区；至少部分所述补偿隔垫物40在所述基底上的正投影，均匀分布在所述第一布局区。
上述设置至少部分所述补偿隔垫物40在所述基底上的正投影，均匀分布在所述第一布局区，使得所述补偿隔垫物40能够将有机封装材料更好的引入至所述第一布局区，实现对所述第一子图形VDD10良好的封装效果，降低了封装结构在所述第一子图形VDD10附近发生断裂的风险，避免了水汽和氧气以所述第一子图形VDD10为传输路径，传输至所述显示区域10。
在一些实施例中，部分基础隔垫物41在所述基底上的正投影位于所述第一布局区，所述基础隔垫物41在所述第一布局区的布局密度等于所述基础隔垫物41在所述显示区域10的布局密度。
上述设置部分基础隔垫物41在所述基底上的正投影位于所述第一布局区，使得所述基础隔垫物41能够将有机封装材料更好的引入至所述第一布局区，实现对所述第一子图形VDD10良好的封装效果，降低了封装结构在所述第一子图形VDD10附近发生断裂的风险，避免了水汽和氧气以所述第一子图 形VDD10为传输路径，传输至所述显示区域10。
如图3和图4所示，在一些实施例中，所述正电源线VDD还包括：第二公共连接部VDD2，多个导电连接部VDD3和两个第一进线部VDD4；
所述第二公共连接部VDD2的至少部分沿所述第一方向延伸，所述第二公共连接部VDD2位于所述第一公共连接部VDD1远离所述显示区域10的一侧；所述第二公共连接部VDD2与所述第一公共连接部VDD1之间通过所述多个导电连接部VDD3耦接；
所述第一进线部VDD4的至少部分沿第二方向延伸，所述第二方向与所述第一方向相交；所述第一进线部VDD4位于所述第二公共连接部VDD2远离所述显示区域10的一侧，所述两个第一进线部VDD4分别与所述第二公共连接部VDD2耦接。
示例性的，所述第二公共连接部VDD2与所述第一公共连接部VDD1沿所述第二方向相对设置，所述导电连接部VDD3的至少部分沿所述第二方向延伸，所述第二公共连接部VDD2与所述第一公共连接部VDD1之间通过所述多个导电连接部VDD3耦接，所述多个导电连接部VDD3延所述第二方向间隔设置。
示例性的，所述导电连接部VDD3仅包括所述第一导电层。
示例性的，所述第一方向包括水平方向，所述第二方向包括竖直方向。
示例性的，所述两个第一进线部VDD4与所述第二公共连接部VDD2的两端一一对应耦接。
将所述正电源线VDD设置为上述结构，有利于降低所述正电源线VDD的电阻。
如图3，图6和图8所示，在一些实施例中，所述信号线30还包括负电源线VSS，所述负电源线VSS包括：环绕部VSS1和两个第二进线部VSS2；所述环绕部VSS1半包围所述显示区域10，所述环绕部VSS1的两个端部与所述两个第二进线部VSS2一一对应耦接；所述第二进线部VSS2的至少部分沿所述第二方向延伸；所述环绕部VSS1的端部包括所述第一目标部分31和所述第二目标部分32。
示例性的，所述环绕部VSS1半包围所述显示区域10，所述环绕部VSS1 的开口处朝向所述显示基板的驱动芯片所在位置。所述环绕部VSS1与所述显示基板中的阴极耦接，用于将负电源信号传输至所述阴极。
示例性的，所述第二进线部VSS2的至少部分沿所述第二方向延伸，所述环绕部VSS1的两个端部与所述两个第二进线部VSS2一一对应耦接，且所述两个第二进线部VSS2分别与所述显示基板包括的驱动芯片耦接，接收所述驱动芯片提供的负电源信号。
示例性的，所述环绕部VSS1包括所述第一导电层和所述第二导电层。示例性的，所述第二进线部VSS2仅包括所述第一导电层。
上述设置所述环绕部VSS1的端部包括所述第一目标部分31和所述第二目标部分32，使得所述补偿隔垫物40能够将有机发封装材料更好的引入至所述环绕部VSS1的端部附近，实现对所述环绕部VSS1的端部的良好封装效果，降低了封装结构在所述环绕部VSS1的端部附近发生断裂的风险，避免了水汽和氧气以所述环绕部VSS1的端部为传输路径，传输至所述显示区域10。
如图6和图8所示，在一些实施例中，所述显示基板还包括：第一挡墙Dam1和第二挡墙Dam2，所述第一挡墙Dam1包围所述显示区域10，所述第二挡墙Dam2包围所述第一挡墙Dam1；
所述第一目标部分31在所述基底上的正投影，以及所述第二目标部分32在所述基底上的正投影均位于所述第一挡墙Dam1在所述基底上的正投影，与所述显示区域10在所述基底上的正投影之间。
示例性的，所述第一挡墙Dam1和所述第二挡墙Dam2用于阻挡有机封装材料，以限定所述有机封装层IJP的边界在所述第二挡墙Dam2朝向所述显示区域10的一侧。
上述设置所述第一目标部分31在所述基底上的正投影，以及所述第二目标部分32在所述基底上的正投影均位于所述第一挡墙Dam1在所述基底上的正投影，与所述显示区域10在所述基底上的正投影之间，使得所述第一目标部分31和所述第二目标部分32均能够被所述有机封装层IJP很好的覆盖。
如图6至图9所示，在一些实施例中，所述显示基板还包括：第一挡墙Dam1和第二挡墙Dam2，所述第一挡墙Dam1包围所述显示区域10，所述第 二挡墙Dam2包围所述第一挡墙Dam1；
沿所述第一方向，所述第一公共连接部VDD1在所述基底上的正投影与所述环绕部VSS1的端部在所述基底上的正投影之间具有第一间隔区域50，所述第一间隔区域50位于所述第一挡墙Dam1在所述基底上的正投影，与所述显示区域10在所述基底上的正投影之间；至少部分所述补偿隔垫物40在所述基底上的正投影，均匀分布在所述第一间隔区域50。
示例性的，所述第一目标部分31和所述第二目标部分32位于所述第一间隔区域50的周边。
上述设置至少部分所述补偿隔垫物40在所述基底上的正投影，均匀分布在所述第一间隔区域50，使得所述补偿隔垫物40能够将有机封装材料更好的引入至所述第一间隔区域50，实现对所述第一间隔区域50，以及第一间隔区域50附近的第一目标部分31和第二目标部分32良好的封装效果，降低了封装结构在所述第一间隔区域50附近发生断裂的风险，避免了水汽和氧气以所述第一间隔区域50为传输路径，传输至所述显示区域10。
如图5所示，在一些实施例中，所述第一公共连接部VDD1在所述基底上的正投影形成第一布局区51，所述第一布局区51位于所述第一挡墙Dam1在所述基底上的正投影，与所述显示区域10在所述基底上的正投影之间；至少部分所述补偿隔垫物40在所述基底上的正投影，均匀分布在所述第一布局区51。
示例性的，所述第二子图形VDD11在所述基底上的正投影，以及所述第三子图形VDD12的至少部分在所述基底上的正投影形成所述第一布局区51。
上述设置至少部分所述补偿隔垫物40在所述基底上的正投影，均匀分布在所述第一布局区51，使得所述补偿隔垫物40能够将有机封装材料更好的引入至所述第二子图形VDD11和所述第三子图形VDD12的至少部分所在的位置，实现对所述第二子图形VDD11和所述第三子图形VDD12良好的封装效果，降低了封装结构在所述第二子图形VDD11和所述第三子图形VDD12附近发生断裂的风险，避免了水汽和氧气以所述第二子图形VDD11和所述第三子图形VDD12为传输路径，传输至所述显示区域10。
如图6和图8所示，在一些实施例中，设置部分所述补偿隔垫物40在所 述基底上的正投影，与所述环绕部VSS1的端部在所述基底上的正投影至少部分重叠。
上述方式使得所述补偿隔垫物40能够将有机封装材料更好的引入至所述环绕部VSS1的端部所在的位置，实现对所述环绕部VSS1的端部良好的封装效果，降低了封装结构在所述环绕部VSS1的端部附近发生断裂的风险，避免了水汽和氧气以所述环绕部VSS1的端部为传输路径，传输至所述显示区域10。
如图6至图9所示，在一些实施例中，所述第一公共连接部VDD1在所述基底上的正投影的至少部分，位于所述环绕部VSS1的端部在所述基底上的正投影，与所述显示区域10在所述基底上的正投影之间，沿所述第二方向，所述第一公共连接部VDD1在所述基底上的正投影的至少部分与所述环绕部VSS1的端部在所述基底上的正投影之间具有第二间隔区52；部分所述补偿隔垫物40在所述基底上的正投影，位于所述第二间隔区52。
示例性的，所述第一公共连接部VDD1包括的第一子图形VDD10在所述基底上的正投影的至少部分，位于所述环绕部VSS1在所述基底上的正投影，与所述显示区域10在所述基底上的正投影之间。
示例性的，所述第一子图形VDD10在所述基底上的正投影的至少部分与所述环绕部VSS1的端部在所述基底上的正投影之间具有所述第二间隔区52。
上述设置部分所述补偿隔垫物40在所述基底上的正投影，位于所述第二间隔区52，使得所述补偿隔垫物40能够将有机封装材料更好的引入至所述第二间隔区52，实现对所述第二间隔区52良好的封装效果，降低了封装结构在所述第二间隔区52附近发生断裂的风险，避免了水汽和氧气以所述第二间隔区52为传输路径，传输至所述显示区域10。
如图2所示，在一些实施例中，设置所述封装结构包括沿远离所述基底的方向依次层叠设置的第一无机封装层CVD1，有机封装层IJP和第二无机封装层CVD2；部分所述第一无机封装层CVD1和部分所述有机封装层IJP均填充在所述凹口310中，所述第二无机封装层CVD2未填充在所述凹口310中。
示例性的，部分所述第一无机封装层CVD1和部分所述有机封装层IJP能够将所述凹口310填满。
上述设置方式避免了所述第二无机封装层CVD2填充所述凹口310，有利于提升所述第二无机封装材料的平坦性，从而降低了所述第二无机封装层CVD2发生断裂的风险，降低了显示基板出现GDSX不良的风险。
在一些实施例中，所述补偿隔垫物40与所述像素界定层或所述基础隔垫物41同层同材料设置。
示例性的，所述基础隔垫物41，所述补偿隔垫物40均能够与所述像素界定层在一次构图工艺中形成。
示例性的，所述补偿隔垫物40和所述基础隔垫物41也可以采用其他有机或者无机材料制作。
上述将所述补偿隔垫物40与所述像素界定层或所述基础隔垫物41同层同材料设置，使得所述基础隔垫物41，所述补偿隔垫物40和所述像素界定层能够在同一次构图工艺中形成，有利于简化显示基板的制作流程，降低所述显示基板的制作成本。
在一些实施例中，所述显示基板还包括第一源漏金属层和第二源漏金属层，所述第一源漏金属层位于所述第二源漏金属层与所述基底之间；所述信号线30的一部分与所述第一源漏金属层同层同材料设置；所述信号线30的另一部分与所述第二源漏金属层同层同材料设置。
示例性的，所述第二源漏金属层与所述像素界定层之间没有钝化层。
示例性的，所述信号线30包括的第二导电层与所述第二源漏金属层同层同材料设置。
上述设置所述第二源漏金属层与所述像素界定层之间没有钝化层，减少了制作钝化层的mask工艺，有效简化了显示基板的制作流程，降低了显示基板的制作成本。
本公开实施例还提供了一种显示装置，包括上述实施例提供的显示基板。
上述实施例提供的显示基板中，在所述第一周边区域201设置多个补偿隔垫物40，并设置所述第一周边区域201在所述显示基板的基底上的正投影，与所述第一部分的侧面在所述基底上的正投影至少部分重叠；这样所述多个 补偿隔垫物40能够将液态有机封装材料引流至所述第一部分的侧面，不仅有利于提升后续形成的无机封装材料在所述第一部分的侧面的平坦性，还避免了在所述第一部分的侧面位于有机封装层IJP上方和下方的无机封装层之间直接接触，有效分散了所述第一部分的侧面附近的封装结构的应力。因此，上述实施例提供的显示基板中，保证了封装结构在背向基底的一面具有较好的封装边缘形貌，降低了封装结构在所述第一部分的侧面附近发生断裂的风险，从而有效降低了显示基板出现GDSX不良的风险。
而且，上述实施例提供的显示基板中，是通过所述补偿隔垫物40将液态有机封装材料引入所述第一部分的侧面，无需增加液态有机封装材料的用量，从而很好的避免了有机封装材料溢流到显示基板周边的挡墙结构的外侧。
因此，本公开实施例提供的显示装置在包括上述显示基板时同样具有上述有益效果，此处不再赘述。
需要说明的是，所述显示装置可以为：电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件，所述显示装置还包括柔性电路板、印刷电路板和背板等。
需要说明的是，本公开实施例的“同层”可以指的是处于相同结构层上的膜层。或者例如，处于同层的膜层可以是采用同一成膜工艺形成用于形成特定图形的膜层，然后利用同一掩模板通过一次构图工艺对该膜层图案化所形成的层结构。根据特定图形的不同，一次构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可以是连续的也可以是不连续的。这些特定图形还可能处于不同的高度或者具有不同的厚度。
在本公开各方法实施例中，所述各步骤的序号并不能用于限定各步骤的先后顺序，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，对各步骤的先后变化也在本公开的保护范围之内。
需要说明，本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于方法实施例而言，由于其基本相似于产品实施例，所以描述得比较简单，相关之处参见产品实施例的部分说明即可。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属 领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”、“耦接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
在上述实施方式的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (20)

  1. 一种显示基板，包括：显示区域和包围所述显示区域的周边区域；所述显示基板还包括：
    信号线，所述信号线包括位于所述周边区域的第一部分；
    多个基础隔垫物，所述多个基础隔垫物的至少部分位于所述显示区域；
    多个补偿隔垫物，设置在第一周边区域，所述第一周边区域在所述显示基板的基底上的正投影，与所述第一部分的侧面在所述基底上的正投影至少部分重叠；所述补偿隔垫物的布局密度大于所述基础隔垫物的布局密度；
    封装结构，所述封装结构包括层叠设置的有机封装层和无机封装层，所述有机封装层和无机封装层覆盖所述多个补偿隔垫物。
  2. 根据权利要求1所述的显示基板，其中，所述第一部分包括第一目标部分，所述第一目标部分的侧面具有凹口；部分所述无机封装层和部分所述有机封装层均填充在所述凹口中；
    所述第一周边区域在所述显示基板的基底上的正投影，位于所述第一目标部分在所述基底上的正投影靠近所述显示区域的一侧。
  3. 根据权利要求1所述的显示基板，其中，所述第一部分还包括：
    第二目标部分，所述第二目标部分的至少部分位于所述第一目标部分与所述显示区域之间；所述第一周边区域在所述显示基板的基底上的正投影，与所述第二目标部分在所述基底上的正投影至少部分交叠。
  4. 根据权利要求3所述的显示基板，其中，所述显示基板还包括：
    层叠设置的像素界定层和平坦层，所述平坦层位于所述像素界定层与所述基底之间；
    所述第一目标部分在所述基底上的正投影，与所述像素界定层在所述基底上的正投影不交叠，且与所述平坦层在所述基底上的正投影不交叠。
  5. 根据权利要求4所述的显示基板，其中，所述第二目标部分在所述基底上的正投影，与所述像素界定层在所述基底上的正投影至少部分交叠；和/或，与所述平坦层在所述基底上的正投影至少部分交叠。
  6. 根据权利要求1所述的显示基板，其中，所述多个补偿隔垫物包括多 个第一补偿隔垫物和/或多个第二补偿隔垫物，所述多个第一补偿隔垫物在所述基底上的正投影与所述信号线在所述基底上的正投影不交叠；所述多个第二补偿隔垫物在所述基底上的正投影与所述信号线在所述基底上的正投影至少部分交叠。
  7. 根据权利要求1所述的显示基板，其中，所述周边区域包括绑定区域；
    所述显示基板还包括：第一挡墙和第二挡墙，所述第一挡墙包围所述显示区域，所述第二挡墙包围所述第一挡墙；
    所述信号线包括电源线，所述电源线的所述第一部分在所述基底上的正投影，位于所述第一挡墙在所述基底上的正投影与所述显示区域在所述基底上的正投影之间；所述第一部分靠近所述绑定区域。
  8. 根据权利要求7所述的显示基板，其中，所述显示基板还包括扫描线，所述扫描线的至少部分位于所述显示区域，所述扫描线包括沿第一方向延伸的部分；
    所述电源线包括正电源线和负电源线；
    所述正电源线的第一部分沿第一方向的侧面在所述基底上的正投影，与所述第一周边区域在所述基底上的正投影至少部分交叠；
    和/或，所述负电源线的第一部分沿第一方向的侧面在所述基底上的正投影，与所述第一周边区域在所述基底上的正投影至少部分交叠。
  9. 根据权利要求3所述的显示基板，其中，所述信号线包括正电源线，所述正电源线包括：第一公共连接部；所述第一公共连接部的至少部分沿第一方向延伸，所述第一公共连接部包括所述第一目标部分。
  10. 根据权利要求9所述的显示基板，其中，所述第一公共连接部包括第一子图形至第N子图形，N大于或等于3，沿远离所述显示区域的方向，所述第一子图形至所述第N子图形依次排列，所述第一子图形至所述第N子图形在所述第一方向的宽度逐渐变窄；第二子图形包括所述第二目标部分；第三子图形包括所述第一目标部分和所述第二目标部分。
  11. 根据权利要求10所述的显示基板，其中，所述第一子图形在所述基底上的正投影包括第一布局区；至少部分所述补偿隔垫物在所述基底上的正投影，均匀分布在所述第一布局区；或者，
    部分基础隔垫物在所述基底上的正投影位于所述第一布局区，所述基础隔垫物在所述第一布局区的布局密度等于所述基础隔垫物在所述显示区域的布局密度。
  12. 根据权利要求9所述的显示基板，其中，所述正电源线还包括：第二公共连接部，多个导电连接部和两个第一进线部；
    所述第二公共连接部的至少部分沿所述第一方向延伸，所述第二公共连接部位于所述第一公共连接部远离所述显示区域的一侧；所述第二公共连接部与所述第一公共连接部之间通过所述多个导电连接部耦接；
    所述第一进线部的至少部分沿第二方向延伸，所述第二方向与所述第一方向相交；所述第一进线部位于所述第二公共连接部远离所述显示区域的一侧，所述两个第一进线部分别与所述第二公共连接部耦接。
  13. 根据权利要求9所述的显示基板，其中，所述信号线还包括负电源线，所述负电源线包括：环绕部和两个第二进线部；所述环绕部半包围所述显示区域，所述环绕部的两个端部与所述两个第二进线部一一对应耦接；所述第二进线部的至少部分沿所述第二方向延伸；所述环绕部的端部包括所述第一目标部分和所述第二目标部分。
  14. 根据权利要求13所述的显示基板，其中，部分所述补偿隔垫物在所述基底上的正投影，与所述环绕部的端部在所述基底上的正投影至少部分重叠。
  15. 根据权利要求13所述的显示基板，其中，所述显示基板还包括：第一挡墙和第二挡墙，所述第一挡墙包围所述显示区域，所述第二挡墙包围所述第一挡墙；
    沿所述第一方向，所述第一公共连接部在所述基底上的正投影与所述环绕部的端部在所述基底上的正投影之间具有第一间隔区域，所述第一间隔区域位于所述第一挡墙在所述基底上的正投影，与所述显示区域在所述基底上的正投影之间；至少部分所述补偿隔垫物在所述基底上的正投影，均匀分布在所述第一间隔区域。
  16. 根据权利要求13所述的显示基板，其中，所述第一公共连接部在所述基底上的正投影的至少部分，位于所述环绕部的端部在所述基底上的正投 影，与所述显示区域在所述基底上的正投影之间，沿所述第二方向，所述第一公共连接部在所述基底上的正投影的至少部分与所述环绕部的端部在所述基底上的正投影之间具有第二间隔区；部分所述补偿隔垫物在所述基底上的正投影，位于所述第二间隔区。
  17. 根据权利要求2所述的显示基板，其中，所述封装结构包括沿远离所述基底的方向依次层叠设置的第一无机封装层，有机封装层和第二无机封装层；部分所述第一无机封装层和部分所述有机封装层均填充在所述凹口中，所述第二无机封装层未填充在所述凹口中。
  18. 根据权利要求4所述的显示基板，其中，所述补偿隔垫物与所述像素界定层或所述基础隔垫物同层同材料设置。
  19. 根据权利要求1所述的显示基板，其中，所述显示基板还包括第一源漏金属层和第二源漏金属层，所述第一源漏金属层位于所述第二源漏金属层与所述基底之间；所述信号线的一部分与所述第一源漏金属层同层同材料设置，所述信号线的另一部分与所述第二源漏金属层同层同材料设置。
  20. 一种显示装置，包括如权利要求1～19中任一项所述的显示基板。
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