WO2020134995A1 - 显示装置的阵列基板制作方法和显示装置 - Google Patents
显示装置的阵列基板制作方法和显示装置 Download PDFInfo
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- WO2020134995A1 WO2020134995A1 PCT/CN2019/123956 CN2019123956W WO2020134995A1 WO 2020134995 A1 WO2020134995 A1 WO 2020134995A1 CN 2019123956 W CN2019123956 W CN 2019123956W WO 2020134995 A1 WO2020134995 A1 WO 2020134995A1
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- layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Definitions
- the present application relates to the field of display technology, and in particular, to an array substrate manufacturing method of a display device and a display device.
- TFT-LCD Thin Film Transistor-Liquid Crystal Display (thin film transistor liquid crystal display) type display equipment.
- a color film is made on a TFT substrate to form a COA structure, that is, CF (color filter, color filter) on A structure of Array.
- CF color filter, color filter
- the structure of making CF on TFT is made on TFT according to the process of CF. It is completely borrowed and transferred. It is used in making BPS (Black photo Spacer, black spacer), it is made on the color resist layer to form a black spacer structure.
- BPS Black photo Spacer, black spacer
- stage difference When forming the display device stage difference, if only relying on the photoresist itself or the gray-scale mask/half-mask mask design to make different stage differences, either the stage difference is too small, or the uniformity of the stage difference is not good, resulting in the formation of TFT-LCD production The size of the step difference is different, and the uniformity is poor, resulting in poor display effect of the liquid crystal panel.
- An aspect of the present application provides a method for manufacturing an array substrate of a display device.
- the method for manufacturing an array substrate of the display device includes the following steps:
- a spacer color resist layer is coated on the second color resist layer, and the spacer color resist layer is patterned to form a spacer layer, wherein the spacer layer includes a primary spacer region and a secondary spacer region having a height difference, so The height of the spacer in the main septum area is greater than the height of the spacer in the auxiliary septum area.
- the present application also provides a method for manufacturing an array substrate of a display device.
- the method for manufacturing the display device includes the following steps:
- a spacer color resist layer over the second color resist layer to pattern the spacer color resist layer to form a spacer layer, wherein the spacer layer includes a main spacer region and an auxiliary spacer region having a height difference, The height of the spacer in the main spacer area is greater than the height of the spacer in the auxiliary spacer area; the second color resist layer completely covers the active switch layer in the area of the main spacer area, in the auxiliary The area of the spacer area partially covers the active switching layer.
- Another aspect of the present application also provides a display device including: a memory, a processor, and a computer program stored on the memory and executable on the processor, the computer program being processed by the computer program When the device is executed, the steps of the method described above are realized.
- the color resist layer formed on the active switching layer of the substrate directly forms a step difference to the active switch layer, so that the uniformity of the spacer layer at different positions is increased, to avoid the unevenness of the spacer to cause the TFT and LCD step difference
- the unevenness improves the display uniformity and display effect of the display device.
- FIG. 1 is a schematic structural diagram of a display device of a hardware operating environment according to an embodiment of the present application
- FIG. 2 is a schematic flowchart of an embodiment of a method for manufacturing an array substrate of a display device of the present application
- FIG. 3 is a schematic flow chart of manufacturing an active switch layer in an embodiment of this application.
- FIG. 4 is a schematic flow chart of manufacturing an active switch layer in another embodiment of the present application.
- FIG. 5 is a schematic diagram of an architecture conversion of a spacer made in an embodiment of this application.
- FIG. 6 is a schematic diagram of an architecture conversion of a spacer made in another embodiment of this application.
- FIG. 7 is a schematic diagram of a framework conversion for making spacers in another embodiment of the present application.
- FIG. 8 is a schematic diagram of a framework conversion for making spacers in another embodiment of the present application.
- the main solutions of the embodiments of the present application are: providing a substrate; fabricating an active switch layer above the substrate; fabricating a first color resist layer on the active switch layer by patterning, the first color resist layer Completely cover the active switch layer; a second color resist layer is patterned on the first color resist layer, the second color resist layer partially covers the active switch layer in the first area, and completely in the second area Covering the active switch layer; coating a spacer color resist layer over the second color resist layer to pattern the spacer color resist layer to form a spacer layer, wherein the spacer layer includes a main spacer having a height difference And the auxiliary septum area, the height of the spacer of the main septum area is greater than the height of the spacer of the auxiliary septum area.
- stage difference of the display device Due to the current stage difference of the display device, if only the photoresist itself or the gray scale mask/half-mask mask design is used to make different stage differences, either the stage difference is too small or the uniformity of the stage difference is not good, resulting in the production of TFT-LCD
- the formed step sizes vary in size and the uniformity is poor, resulting in the problem of poor display effect of the liquid crystal panel.
- the present application provides a solution to directly form a step difference by using a color resist layer formed on an active switching layer of an array substrate to cover the active switching layer differently, so that the uniformity of the spacer layer at different positions is increased and the spacer is avoided.
- the unevenness leads to a situation where the TFT and LCD are not evenly segmented, which improves the display uniformity and display effect of the display device.
- FIG. 1 is a schematic structural diagram of a display device of a hardware operating environment according to an embodiment of the present application.
- the display device may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, and a communication bus 1002.
- the communication bus 1002 is used to implement connection communication between these components.
- the user interface 1003 may include a display screen (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 1003 may further include a standard wired interface and a wireless interface.
- the network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a WI-FI interface).
- the memory 1005 may be a SRAM memory (Static Random-Access Memory, static random access memory), or a stable memory (non-volatile memory), such as disk storage.
- the memory 1005 may optionally be a storage device independent of the foregoing processor 1001.
- the display device may also include a camera, RF (Radio Frequency (radio frequency) circuits, sensors, audio circuits, WiFi modules, etc.
- RF Radio Frequency (radio frequency) circuits
- terminal structure shown in FIG. 1 does not constitute a limitation on the display device, and may include more or less components than those illustrated, or combine certain components, or have different component arrangements.
- the memory 1005 as a computer-readable storage medium may include an operating system, a network communication module, a user interface module, and an array substrate manufacturing application program of a display device.
- the network interface 1004 is mainly used to connect to the background server and perform data communication with the background server;
- the user interface 1003 is mainly used to connect to the client (user side) and perform data communication with the client;
- the device 1001 can be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
- a spacer color resist layer is coated on the second color resist layer, and the spacer color resist layer is patterned to form a spacer layer, wherein the spacer layer includes a primary spacer region and a secondary spacer region having a height difference, so The height of the spacer in the main septum area is greater than the height of the spacer in the auxiliary septum area.
- the processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations: the second color resist layer partially covers the active switch layer in the first area, and The two areas completely covering the active switching layer include: completely covering the active switching layer in the area of the main spacer area, and partially covering the active switching layer in the area of the auxiliary spacer area.
- processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
- At least two color resist layers are retained in the shading area, and the color resist layers are at least two of the red color resist layer, the blue color resist layer, or the green color resist layer.
- processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
- a through hole is formed in the protective layer, and a pixel electrode layer is formed on the protective layer in a patterned manner.
- the pixel electrode layer is partially formed in the through hole and is in contact with the drain metal layer directly below.
- the processor 1001 may be used to call the memory 1005 Create an application program for the array substrate of the display device stored in and perform the following operations:
- a pixel electrode is formed in a patterned manner, the pixel electrode is not formed on the protective layer, and the pixel electrode is directly connected to the drain metal layer.
- the processor 1001 may be used to call an array substrate manufacturing application program of the display device stored in the memory 1005, and perform the following operations: when manufacturing the color resist layer on the substrate, the color resist in the pixel area and the color resist A first color resist pad high layer formed by stacking at least one layer of color resist in the pixel area; the spacer above the first color resist pad high layer is in contact with the counter substrate of the array substrate.
- the processor 1001 may be used to call an array substrate manufacturing application program of the display device stored in the memory 1005, and perform the following operations: when manufacturing the color resist layer on the substrate, a second color resist located in a non-pixel area is also included A high-level pad, and the spacer above the high-level second color resist pad is spaced toward the opposite substrate of the array substrate.
- an embodiment of the present application provides a method for manufacturing an array substrate of a display device.
- the method for manufacturing an array substrate of the display device includes:
- Step S10 providing a substrate
- TFT-LCD Thin Film Transistor-Liquid Crystal Display, thin-film transistor liquid crystal display
- a substrate is provided, the substrate is a glass substrate, and the provided substrate is a cleaned substrate.
- Step S20 forming an active switch layer above the substrate
- an active switching layer is formed on the substrate. After the active switching layer is turned on, it will control the deflection of liquid crystal molecules, and the active switching layer may be a thin film transistor TFT or other substances or devices that can control the deflection of liquid crystal molecules;
- the process of the active switching layer includes:
- Step S21 a gate, a gate insulating layer, an active layer, a source/drain metal layer and a protective layer of the active switching layer are sequentially formed on the substrate;
- Step S22 a through hole is formed in the protective layer, and a pixel electrode layer is formed on the protective layer in a patterned manner, and the pixel electrode layer is partially formed in the through hole and is in contact with the drain metal layer directly below .
- the manufacturing process takes a thin film transistor as an example, depositing a first metal layer on the array substrate; performing a first photomask exposure and etching manufacturing process to define the pattern of the first metal layer to form in the first metal layer A gate; depositing an insulating layer on the substrate to cover the surface of the first metal layer; sequentially depositing a semiconductor layer, a doped silicon layer and a second metal layer for the second mask and An etching process is used to define the patterns of the semiconductor layer, the doped silicon layer and the second metal layer to form a thin film transistor island structure; a third photomask and etching manufacturing process are performed to A source/drain metal layer is formed in the two metal layers and the doped silicon layer, and the fabrication of the thin film transistor is completed.
- a protective layer
- CVD Chemical Vapor Deposition
- CVD passivation coating photoresist coating/exposure/development, passivation etching, photoresist removal.
- dry etching is performed to dig a contact hole in the protective layer to form a protective layer pattern.
- an insulating layer, a semiconductor layer, a doped silicon layer and a second metal layer are deposited on the substrate.
- the semiconductor layer is selected from polysilicon or amorphous silicon materials, and is set according to the manufacturing process and display requirements.
- a second photomask etching manufacturing process is performed to define a semiconductor layer, a doped silicon layer and the second metal layer pattern to form a thin film transistor island structure.
- a third photomask etching manufacturing process is performed to form a signal line, source and drain metal layers in the second metal layer and the doped silicon layer to complete the fabrication of the TFT thin film transistor.
- a protective layer is formed on the substrate and covers the surface of the TFT thin film transistor and the signal line.
- the dry etching of the protective layer is performed to form the source contact hole, the drain contact hole and the signal line contact hole, so that when the pixel electrode is fabricated, the pixel electrode fills the contact hole, and the pixel electrode is connected to the drain electrode through the contact hole;
- a pixel electrode is formed in a patterned manner, the pixel electrode is not formed on the protective layer, and the pixel electrode is directly connected to the drain metal layer.
- step S23 after forming a protective layer, a pixel electrode is formed by patterning, the pixel electrode is not formed in On the protective layer, and the pixel electrode is directly connected to the drain metal layer. That is, after the protective layer is applied, a dry etching operation is not performed, a contact hole is not formed, and a fourth illumination and etching manufacturing process is performed to define the pattern of the pixel electrode so that the pixel electrode is formed on the gate insulating layer Instead of forming on the protective layer.
- ITO Indium
- ITO OVEN baking
- Step S30 a first color resist layer is formed on the active switch layer by patterning, and the first color resist layer completely covers the active switch layer;
- a color resist layer is formed above the pixel electrode layer.
- the color resist layer is a red color resist layer, a green color resist layer, and a blue color resist layer.
- the thickness of each color resist layer is different.
- the order of the manufacturing process can be random and unlimited. Generally, the red color resist layer is completed first, then the green color resist layer is completed, and finally the blue color resist layer is manufactured.
- the production process is completed in a patterned manner.
- the first photoresist layer is coated first, either red or green or blue.
- a first color resist layer is produced by patterning, the first color resist layer completely covers the active switch layer, that is, the active switch layer at any position is The first color resist layer is completely covered.
- Step S40 a second color resist layer is formed on the first color resist layer by patterning, the second color resist layer partially covers the active switch layer in the first area, and completely covers the active switch in the second area Floor;
- the second color resist layer is a color resist layer with a color different from that of the first color resist layer.
- the second color resist layer adopts a method of different light transmittance.
- the second color resist layer partially covers the active switching layer in the first area, and completely covers the active switching layer in the second area.
- the second color resist layer partially covers the active switching layer in the first area, and completely covering the active switching layer in the second area includes: completely covering the active switching layer in the area of the main spacer area, The area of the auxiliary spacer area partially covers the active switching layer, the second area is the area corresponding to the auxiliary spacer area, and the first area is the area corresponding to the main spacer area.
- the position of the second area corresponding to the partially covered part may be different, and the position of the area corresponding to the partially covered auxiliary spacer area may be different, for example, the area directly below the auxiliary spacer or the lower left of the auxiliary spacer The area or the lower right area of the auxiliary spacer.
- Step S50 a spacer color resist layer is coated on the second color resist layer, and the spacer color resist layer is patterned to form a spacer layer, wherein the spacer layer includes a primary spacer region and a secondary spacer having a height difference Area, the height of the spacer in the main septum area is greater than the height of the spacer in the secondary septum area.
- the spaced color resist layer is coated on top of the second color resist layer, that is, the photosensitive material is applied by
- the light of the patterning parameter determined in the above step S40 irradiates the photosensitive material, and the light irradiates the photosensitive material layer through the mask plate to form a spacer layer, wherein the spacer layer includes a main spacer region and an auxiliary spacer having a height difference In the pad area, the height of the spacer in the main septum area is greater than the height of the spacer in the auxiliary septum area.
- the main spacer area is formed on the color resist layer, and the auxiliary spacer area is formed on the non-light-transmitting area that does not cover the color resist layer.
- the color resist in the pixel area and the non-pixel area are formed by stacking at least one layer of color resist The upper layer of the first color resist pad; the spacer above the upper layer of the first color resist pad is in contact with the counter substrate of the array substrate.
- the color resist layer is fabricated on the array substrate, it also includes a second color resist pad high layer located in the non-pixel area, and the spacer above the second color resist pad high layer is spaced toward the opposite substrate of the array substrate.
- the color resist layer is composed of a first color resist layer and a second color resist layer, that is, the first color resist pad upper layer and the second color resist pad upper layer may be the first color resist layer and/or the second Color resist layer.
- the color resist layer formed on the active switch layer of the array substrate directly forms the step difference to the active switch layer, so that the uniformity of the spacer layer at different positions is increased, and the unevenness of the spacer causes the TFT and the The uneven LCD segment difference improves the display uniformity and display effect of the display device.
- the COA color filter on In the Array
- the R/G/B color layer is formed on the TFT substrate.
- the color layer order can be arbitrary.
- the light shielding is assisted by the color layer stacking method, and the stacking method is R/G/ Two of the three colors of B
- an organic insulating layer is covered to protect the R/G/B color layer, and finally a spacer photoresist layer is coated;
- the second color layer In the main (main spacer area) spacer, when the first color layer covers the TFT, the second color layer completely covers the TFT in the longitudinal direction; in the Sub (auxiliary spacer area) spacer, the second stack
- the layers are designed with different mask openings to partially cover the TFT area.
- the BPS color layer When the BPS color layer is coated, due to the step difference between the color layers, it can be exposed through a common mask to obtain spacer layers with different film thicknesses, making different Stepped spacer liquid crystal panel.
- the second stacked layer is one of R/G/B, and the size of the step is determined by the coverage area; the position of the second stacked layer may not be fixed above the first color layer.
- Figure 5, Figure 6, Figure 7, and Figure 8 for a schematic of the step difference.
- the first color resist layer 31, the second color resist layer 32 and the spacer layer 33 are coated, and the portion of the second color resist layer corresponding to the spacer layer 33 is completely covered, corresponding to the auxiliary spacer
- the region of the object layer 34 is partially covered, and the main spacer layer 33 and the auxiliary spacer layer 34 form a step ⁇ H4.
- the recipe (patterning pattern parameter) for the coated photoresist layer of the color resist layer and the spacer layer can be set in advance at the beginning of production line production, without having to make it during the production process Switching, through early switching and detection, improve production efficiency.
- the present application also provides a method for manufacturing an array substrate of a display device.
- the method for manufacturing the display device includes the following steps: providing a substrate; fabricating an active switch layer above the substrate; passing a pattern on the active switch layer
- the first color resist layer is made in a chemical manner, and the first color resist layer completely covers the active switch layer
- the second color resist layer is made by patterning on the first color resist layer, and the second color resist layer Partially covering the active switching layer in the first area and completely covering the active switching layer in the second area; coating a spacer color resist layer above the color resist layer to pattern the spacer color resist layer to form a spacer layer
- the spacer layer includes a main spacer area and an auxiliary spacer area having a height difference, the height of the spacer of the main spacer area is greater than the height of the spacer of the auxiliary spacer area;
- the color resist layer completely covers the active switch layer in the area of the main spacer area, and partially covers the active switch layer in the area of the auxiliary spacer
- the implementation steps of the method refer to the processes of the above method embodiments.
- the color resist layer formed on the active switching layer of the array substrate directly forms a step difference to cover the active switching layer, so that the uniformity of the spacer layer at different positions is increased to avoid unevenness of the spacer This leads to a situation where the TFT and LCD are not evenly segmented, which improves the display uniformity and display effect of the display device.
- an embodiment of the present application also provides a display device including a display panel and a timing controller connected to the display panel, an array substrate manufacturing device loaded with a display device in the timing controller, and the display panel
- the manufacturing process of the array substrate of the display device is completed under the control of the timing controller, and the manufacturing method of the array substrate of the display device stored in the timing controller is completed by the method of manufacturing the array substrate of the display device in the above embodiment.
- the array substrate manufacturing method of the display device is loaded on the array substrate manufacturing device of the display device.
- the display device may be a mobile or fixed display device such as a TV, a mobile phone, a pad, and a machine display.
- the color resist layer formed on the active switching layer of the array substrate directly forms a step difference to cover the active switching layer, so that the uniformity of the spacer layer at different positions is increased to avoid unevenness of the spacer This leads to a situation where the TFT and LCD are not evenly segmented, which improves the display uniformity and display effect of the display device.
- the display device in this embodiment includes an array substrate, a counter substrate, which is disposed opposite to the array substrate, a liquid crystal layer is filled between the counter substrate and the array substrate, and the array substrate is composed of the above embodiments Produced.
- the counter substrate is a glass substrate, and a pixel electrode is provided above it, and the spacer of the main spacer area is in contact with the pixel electrode of the counter substrate, and the spacer of the auxiliary spacer area is spaced from the pixel electrode of the counter substrate .
- the active switching layer of the array substrate of this embodiment is covered with at least two layers of color resisters, and the second layer of color resisters completely covers the active switch layer in the area of the main spacer area and partially covers the area in the area of the auxiliary spacer area. Active switching layer.
- the embodiments of the present application also provide a computer-readable storage medium, a computer-readable storage medium, the computer-readable storage medium stores an array substrate manufacturing program of a display device, the array substrate manufacturing program of the display device is When the processor executes, the method for manufacturing the array substrate of the display device as described in the above embodiment is implemented.
- the methods of the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware, but in many cases the former is optional Implementation.
- the technical solution of the present application can essentially be embodied in the form of software products, and the computer software products are stored in a computer-readable storage medium (such as ROM/ The RAM, magnetic disk, and optical disk include several instructions to enable a terminal device (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the embodiments of the present application.
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Abstract
一种显示装置的阵列基板制作方法,包括:提供一基板;在基板上方制作主动开关层;在主动开关层上通过图案化的方式制作第一色阻层(10),第一色阻层(10)完全覆盖主动开关层;在第一色阻层(10)上通过图案化方式制作第二色阻层(20),第二色阻层(20)在第一区域部分覆盖主动开关层,在第二区域完全覆盖主动开关层;在色阻层上方涂布间隔色阻层,以图案化间隔色阻层形成间隔物层(30,40),其中,主隔垫区的间隔物(30)的高度大于辅隔垫区的间隔物(40)的高度。还公开了一种显示装置。
Description
相关申请
本申请要求于2018年12月25日提交中国专利局、申请号为201811597930.4,发明名称分别为“显示装置的阵列基板制作方法和显示装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域,尤其涉及显示装置的阵列基板制作方法和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息,而不必然地构成现有技术。
随着科技水平的不断提高,越来越多带有显示装置的设备进入人们的日常生活和工作当中,例如,电视、手机等。而大部分的显示装置为TFT-LCD(Thin
Film Transistor-Liquid Crystal Display,薄膜晶体管液晶显示器)型显示设备。
目前在制作TFT-LCD时,会采用将彩膜制作在TFT基板上,形成COA结构,即,CF(color
filter,彩色滤光片) on
Array的一种结构。而目前在TFT上制作CF的结构采用的是按照CF的工艺制作在TFT上,完全的借用和转移使用,在制作BPS(Black photo
Spacer,黑间隔物)时,采取在色阻层上制作,形成黑色间隔物的结构。而形成显示装置段差的时候,如果仅仅依靠光阻自身或灰阶光罩/半掩膜光罩设计来制作不同段差,要么段差太小,要么段差均匀性不好,导致TFT-LCD的制作形成的段差大小不一,均匀性差,导致液晶面板的显示效果差。
发明内容
本申请一方面提供一种显示装置的阵列基板制作方法,所述显示装置的阵列基板制作方法包括以下步骤:
提供一基板;
在所述基板上方制作主动开关层;
在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;
在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;
在第二色阻层上方涂布间隔色阻层,图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。
本申请还提供一种显示装置的阵列基板制作方法,所述显示装置的制作方法包括以下步骤:
提供一基板;
在所述基板上方制作主动开关层;
在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;
在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;
在第二色阻层上方涂布间隔色阻层,以图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度;所述第二色阻层在主隔垫区的区域完全覆盖所述主动开关层,在所述辅隔垫区的区域部分覆盖所述主动开关层。
本申请另一方面还提供一种显示装置,所述显示装置包括:存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序,所述计算机程序被所述处理器执行时实现如上所述的方法的步骤。
本申请通过形成于基板主动开关层上的色阻层对于主动开关层的覆盖面积不同来直接形成段差,使得在不同位置的间隔物层的均匀性增加,避免间隔物不均匀导致TFT与LCD段差不均匀的情况,提高了显示装置的显示均匀性和显示效果。
附图说明
图1为本申请一实施例方案涉及的硬件运行环境的显示装置的结构示意图;
图2为本申请显示装置的阵列基板制作方法的一实施例的流程示意图;
图3为本申请一实施例中制作主动开关层的流程示意图;
图4为本申请另一实施例中制作主动开关层的流程示意图;
图5为本申请一实施例中间隔物制作的架构转换示意图;
图6为本申请另一实施例中间隔物制作的架构转换示意图;
图7为本申请再一实施例中间隔物制作的架构转换示意图;
图8为本申请再一实施例中间隔物制作的架构转换示意图。
本申请目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。
具体实施方式
应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。
本申请实施例的主要解决方案是:提供一基板;在所述基板上方制作主动开关层;在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;在第二色阻层上方涂布间隔色阻层,以图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。
由于目前形成显示装置段差的时候,如果仅仅依靠光阻自身或灰阶光罩/半掩膜光罩设计来制作不同段差,要么段差太小,要么段差均匀性不好,导致TFT-LCD的制作形成的段差大小不一,均匀性差,导致液晶面板的显示效果差的问题。本申请提供一种解决方案,通过形成于阵列基板主动开关层上的色阻层对于主动开关层的覆盖面积不同来直接形成段差,使得在不同位置的间隔物层的均匀性增加,避免间隔物不均匀导致TFT与LCD段差不均匀的情况,提高了显示装置的显示均匀性和显示效果。
如图1所示,图1是本申请实施例方案涉及的硬件运行环境的显示装置结构示意图。
如图1所示,该显示装置可以包括:处理器1001,例如CPU,网络接口1004,用户接口1003,存储器1005,通信总线1002。其中,通信总线1002用于实现这些组件之间的连接通信。用户接口1003可以包括显示屏(Display)、输入单元比如键盘(Keyboard),可选用户接口1003还可以包括标准的有线接口、无线接口。网络接口1004可选的可以包括标准的有线接口、无线接口(如WI-FI接口)。存储器1005可以是SRAM存储器(Static Random-Access Memory,静态随机存取存储器),也可以是稳定的存储器(non-volatile
memory),例如磁盘存储器。存储器1005可选的还可以是独立于前述处理器1001的存储装置。
可选地,显示装置还可以包括摄像头、RF(Radio
Frequency,射频)电路,传感器、音频电路、WiFi模块等等。
本领域技术人员可以理解,图1中示出的终端结构并不构成对显示装置的限定,可以包括比图示更多或更少的部件,或者组合某些部件,或者不同的部件布置。
如图1所示,作为一种计算机可读存储介质的存储器1005中可以包括操作系统、网络通信模块、用户接口模块以及显示装置的阵列基板制作应用程序。
在图1所示的显示装置中,网络接口1004主要用于连接后台服务器,与后台服务器进行数据通信;用户接口1003主要用于连接客户端(用户端),与客户端进行数据通信;而处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:
提供一基板;
在所述基板上方制作主动开关层;
在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;
在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;
在第二色阻层上方涂布间隔色阻层,图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。
进一步地,处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层包括:在主隔垫区的区域完全覆盖所述主动开关层,在所述辅隔垫区的区域部分覆盖所述主动开关层。
进一步地,处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:
在遮光区域至少保留两层色阻层,所述色阻层为红色色阻层、蓝色色阻层或绿色色阻层中的至少两种。
进一步地,处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:
在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层;
在保护层上开设贯穿的通孔,在保护层上按照图案化的方式制作像素电极层,所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。
进一步地,所述在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层的步骤之后,处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:
在形成保护层后,通过图案化方式形成像素电极,所述像素电极不形成于保护层上,且所述像素电极直接与所述漏极金属层连接。
进一步地,处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:在所述基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
进一步地,处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序,并执行以下操作:在所述基板制作色阻层时,还包括位于非像素区域的第二色阻垫高层,所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。
参照图2,本申请的一实施例提供一种显示装置的阵列基板制作方法,所述显示装置的阵列基板制作方法包括:
步骤S10,提供一基板;
在本实施例中,TFT-LCD(Thin Film Transistor-Liquid Crystal
Display,薄膜晶体管液晶显示器)之所以能显示不同的颜色与画面,是因为面板内有很多个R红色像素、G绿色像素、B蓝色像素,这3个像素可以在不同亮度下显示出不同的颜色。配合像素显示的需要提供背光源,背光源给出光线,然后透过液晶和像素产生需要的颜色。
提供一基板,所述基板为玻璃基板,提供的基板为清洗过后的基板。
步骤S20,在所述基板上方制作主动开关层;
在基板上制作主动开关层,所述主动开关层导通后,会控制液晶分子偏转,而所述主动开关层可以是薄膜晶体管TFT,也可以是其他可以控制液晶分子偏转的物质或者器件;参考图3,所述主动开关层的流程包括:
步骤S21,在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层;
步骤S22,在保护层上开设贯穿的通孔,在保护层上按照图案化的方式制作像素电极层,所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。制作过程以薄膜晶体管为例,在所述阵列基板上沉积一第一金属层;进行第一光罩曝光和腐蚀制造工艺来限定所述第一金属层的图案,以在第一金属层中形成一栅极;在所述基板上沉积一绝缘层,使其覆盖所述第一金属层表面;依序沉积一半导体层、一掺杂硅层以及一第二金属层,进行第二光罩和腐蚀工艺来限定所述半导体层、所述掺杂硅层以及所述第二金属层的图案,用以形成一薄膜晶体管岛状结构;进行一第三光罩和腐蚀制造工艺以在所述第二金属层以及所述掺杂硅层中形成一源极/漏极金属层,并完成所述薄膜晶体管的制作。在TFT上形成一保护层,且覆盖薄膜晶体管以及所述信号线的表面。具体的,TFT的制作过程为:A.
Metal 1 Process,第一金属层制作过程;
Metal 1镀膜,光阻涂布/曝光/显影,M1湿蚀刻,去光阻;
B. GIN process,绝缘层制作过程;
CVD(化学气相沉淀)法GIN层镀膜,光阻涂布/曝光/显影,GIN层蚀刻,去光阻;
C. Metal 2 Process,第二金属层制作过程;
Metal 2镀膜,光阻涂布/曝光/显影,M2湿蚀刻,N+蚀刻,去光阻;
D. Passivation Process(钝化过程),保护层制作过程;
CVD passivation镀膜,光阻涂布/曝光/显影,passivation蚀刻,去光阻。
而这里在形成保护层之后,进行干法蚀刻,在保护层上挖接触孔,形成保护层图案。首先在基板的表面全面沉积第一金属层,接着进行第一光罩腐蚀制造工艺,在基板上形成一栅极与一扫描线,且栅极与扫描线是相连接的,完成第一光罩腐蚀制造工艺之后,接着在基板上全面沉积一绝缘层、一半导体层、一掺杂硅层和第二金属层。半导体层选择多晶硅或是非晶硅材料,根据制造工艺和显示需求等条件设定。接下来,进行第二光罩腐蚀制造工艺,限定半导体层、掺杂硅层以及所述第二金属层图案,用以形成一薄膜晶体管岛状结构。进行第三光罩腐蚀制造工艺,在第二金属层以及掺杂硅层中形成一信号线、源极和漏极金属层,完成TFT薄膜晶体管的制作。在完成第三光罩腐蚀制作工艺后,在所述基板上形成一保护层,且覆盖于TFT薄膜晶体管和所述信号线的表面。而这里进行保护层的干法蚀刻,形成源极接触洞、漏极接触洞和信号线接触洞,以在制作像素电极时,像素电极填充接触洞,像素电极通过接触洞与漏极相连接;在形成保护层后,通过图案化方式形成像素电极,所述像素电极不形成于保护层上,且所述像素电极直接与所述漏极金属层连接。
而在一实施例中,为了减少制作工艺,参考图4,在步骤S21之后,还可以是执行:步骤S23,在形成保护层后,通过图案化方式形成像素电极,所述像素电极不形成于保护层上,且所述像素电极直接与所述漏极金属层连接。即,涂布保护层后,不进行干法蚀刻的操作,不形成接触洞,进行一第四光照和腐蚀制造工艺,限定所述像素电极的图案,使得所述像素电极形成于栅绝缘层上,而不形成于保护层之上。在形成保护层后,在所述基板上全面沉积ITO(Indium
tin oxide,氧化铟锡)光阻,经过第四光罩和腐蚀制造工艺(显影),ITO湿法蚀刻,去光阻,ITO
OVEN(烘烤)在栅极层上形成ITO像素电极,而不形成于保护层上,ITO像素电极直接与漏极金属层Drain电极连接,无需接触洞的方式使得这两者连接。步骤S22和步骤S23为可选执行,只完成其中一个涂布制程。
步骤S30,在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;
在阵列基板上形成主动开关层和像素电极后,在制作所述像素电极层的上方制作色阻层,所述色阻层为红色色阻层、绿色色阻层和蓝色色阻层,而三个色阻层的膜厚不同。制作工艺的顺序可以随机不受限制,一般是先完成红色色阻层,再完成绿色色阻层,最后是蓝色色阻层的制作。制作工艺为图案化的方式来完成。而制作色阻层的时候,除了在像素透光区域制作色阻层,在未透光区域也保留色阻层。先涂布第一光阻层,可以是先涂布红色也可以是先涂布绿色或者蓝色。在涂布第一光阻层时,通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层,即,在任何位置的所述主动开关层均被第一色阻层完全覆盖。
步骤S40,在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;
在制作完第一色阻层后,再制作第二色阻层,所述第二色阻层是与第一色阻层不同颜色的色阻层。所述第二色阻层采取的是不同透光率的方式,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层。具体的,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层包括:在主隔垫区的区域完全覆盖所述主动开关层,在所述辅隔垫区的区域部分覆盖所述主动开关层,第二区域为辅隔垫区对应的区域,第一区域为主隔垫区对应的区域。而对应部分覆盖的部分的第二区域的位置可不同,部分覆盖辅隔垫区对应的区域的位置不同,例如,为正对辅隔垫物的下方的区域,或者辅隔垫物左下方的区域或者辅隔垫物右下方的区域。
步骤S50,在第二色阻层上方涂布间隔色阻层,图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。
在全部色阻层制作完成后,即,在制作完第一色阻层和第二色阻层后,在第二色阻层的上方涂布间隔色阻层,即,涂布感光材料,采用上述步骤S40中确定的图案化参数的光照射感光材料,光透过掩膜板照射感光材料层,形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。主隔垫区形成于色阻层上,而辅隔垫区形成于未覆盖色阻层的未透光区域。
而在一实施例中,在未透光区域,即非像素区域在所述阵列基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。在所述阵列基板制作色阻层时,还包括位于非像素区域的第二色阻垫高层,所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。所述色阻层由第一色阻层和第二色阻层组成,即,所述第一色阻垫高层和所述第二色阻垫高层可以是第一色阻层和/或第二色阻层构成。
本实施例通过形成于阵列基板主动开关层上的色阻层对于主动开关层的覆盖面积不同来直接形成段差,使得在不同位置的间隔物层的均匀性增加,避免间隔物不均匀导致TFT与LCD段差不均匀的情况,提高了显示装置的显示均匀性和显示效果。
而在一实施例中为了更好的描述本申请实施例,在COA(color filter on
Array)结构中,于TFT基板上制作R/G/B色层,其色层顺序可任意,在主动开关层的上方,通过色层堆叠的方式来辅助遮光,其堆叠方式为R/G/B三颜色中的两种
在R/G/B色层之后,覆盖一层有机绝缘层,保护R/G/B色层,最后在涂布间隔光阻层;
在Main(主隔垫区)间隔物的地方,当第一色层覆盖TFT后,第二色层在纵向上完全覆盖TFT;在Sub(辅隔垫区)间隔物的的地方,第二堆叠层利用不同光罩开口设计,使其部分覆盖TFT区,当再涂布BPS色层时,由于色层间段差,即可通过普通光罩曝光,得到不同膜厚的间隔物层,制作出不同段差间隔物液晶面板。
其第二堆叠层是R/G/B中的一种,通过其覆盖面积多少,决定段差的大小);第二叠层位置可位于第一色层上方的位置不固定。而形成段差的示意参考图5、图6、图7和图8,在图5中,(a)
第二堆叠层光罩开口设计,d0>d1; (b) 曝光后形成Pattern图形; (c)有机绝缘层;(d)BPS
曝光;(e)间隔物图形形成段差△H1,涂布第一色阻层10,第二色阻层20和间隔物层30,而对应间隔物层30的部分第二色阻层完全覆盖,对应辅隔垫物层40的区域部分覆盖;在图6中,(f)第二堆叠层,不同光罩开口d2,与图5(a)相比,d2>d1;(g)
间隔物图形,段差△H2与图5(d)相比,△H2<△H1,涂布第一色阻层11、第二色阻层12和间隔物层13,而对应间隔物层13的部分第二色阻层完全覆盖,对应辅隔垫物层14的区域部分覆盖,主隔垫物层13和辅隔垫物层14形成段差△H2。
在图7和图8中,第二堆叠层,光罩开不同位置,但d3=d4,最终形成段差△H1=△H3=△H4,在图7中,涂布第一色阻层21、第二色阻层22和间隔物层23,而对应间隔物层23的部分第二色阻层完全覆盖,对应辅隔垫物层24的区域部分覆盖,主隔垫物和辅隔垫物形成段差△H3;在图8中,涂布第一色阻层31、第二色阻层32和间隔物层33,而对应间隔物层33的部分第二色阻层完全覆盖,对应辅隔垫物层34的区域部分覆盖,主隔垫物层33和辅隔垫物层34形成段差△H4。
而在一实施例中,对于色阻层和间隔物层的涂布的光掩膜板的recipe(图案化承参数)可在产线制作开始时提前设置,而无需在制作的过程中做出切换,通过提前切换和侦测,提高制作效率。
此外,本申请还提出一种显示装置的阵列基板制作方法,所述显示装置的制作方法包括以下步骤:提供一基板;在所述基板上方制作主动开关层;在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;在色阻层上方涂布间隔色阻层,以图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度;所述第二色阻层在主隔垫区的区域完全覆盖所述主动开关层,在所述辅隔垫区的区域部分覆盖所述主动开关层。方法的步骤实施过程参考上述方法实施例的过程。本实施例的显示装置通过形成于阵列基板主动开关层上的色阻层对于主动开关层的覆盖面积不同来直接形成段差,使得在不同位置的间隔物层的均匀性增加,避免间隔物不均匀导致TFT与LCD段差不均匀的情况,提高了显示装置的显示均匀性和显示效果。
此外,本申请实施例还提出一种显示装置,所述显示装置包括显示面板和与显示面板连接的时序控制器,所述时序控制器中加载有显示装置的阵列基板制作装置,所述显示面板在所述时序控制器的控制下完成显示装置的阵列基板制作流程的控制,而时序控制器中存储的显示装置的阵列基板制作方式以上述实施例中的显示装置的阵列基板制作方法完成,该显示装置的阵列基板制作方法加载于显示装置的阵列基板制作装置。所述显示装置可以是电视、手机、pad、机台显示仪等移动或固定显示设备。本实施例的显示装置通过形成于阵列基板主动开关层上的色阻层对于主动开关层的覆盖面积不同来直接形成段差,使得在不同位置的间隔物层的均匀性增加,避免间隔物不均匀导致TFT与LCD段差不均匀的情况,提高了显示装置的显示均匀性和显示效果。
而本实施例中的显示装置包括阵列基板,对向基板,与阵列基板对向设置,液晶层,填充于所述对向基板和所述阵列基板之间,而所述阵列基板由上述实施例制作而形成。对向基板为玻璃基板,在其上方设置有像素电极,通过主隔垫区的间隔物与对向基板的像素电极接触设置,而辅隔垫区的间隔物与对向基板的像素电极间隔设置。本实施例的阵列基板主动开关层上覆盖有至少两层色阻,而第二层色阻在主隔垫区的区域全部覆盖所述主动开关层,在辅隔垫区的区域部分覆盖所述主动开关层。
此外,本申请实施例还提出一种计算机可读存储介质,计算机可读存储介质,所述计算机可读存储介质上存储有显示装置的阵列基板制作程序,所述显示装置的阵列基板制作程序被处理器执行时实现如上实施例所述的显示装置的阵列基板制作方法。
需要说明的是,在本文中,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者系统不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者系统所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括该要素的过程、方法、物品或者系统中还存在另外的相同要素。
上述本申请实施例序号仅仅为了描述,不代表实施例的优劣。
通过以上的实施方式的描述,本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现,当然也可以通过硬件,但很多情况下前者是可选的实施方式。基于这样的理解,本申请的技术方案本质上或者说对技术做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品存储在如上所述的一个计算机可读存储介质(如ROM/RAM、磁碟、光盘)中,包括若干指令用以使得一台终端设备(可以是手机,计算机,服务器,空调器,或者网络设备等)执行本申请各个实施例所述的方法。
以上仅为本申请的可选实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。
Claims (17)
- 一种显示装置的阵列基板制作方法,其中,所述显示装置的制作方法包括以下步骤:提供一基板;在所述基板上方制作主动开关层;在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;以及在第二色阻层上方涂布间隔色阻层,图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。
- 如权利要求1所述的显示装置的阵列基板制作方法,其中,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层包括:在主隔垫区的区域完全覆盖所述主动开关层,在所述辅隔垫区的区域部分覆盖所述主动开关层。
- 如权利要求2所述的显示装置的阵列基板制作方法,其中,部分覆盖辅隔垫区对应的区域的位置不同。
- 如权利要求2所述的显示装置的阵列基板制作方法,其中,在所述基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
- 如权利要求2所述的显示装置的阵列基板制作方法,其中,在所述基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
- 如权利要求1所述的显示装置的阵列基板制作方法,其中,所述在制作所述主动开关层的上方制作色阻层的步骤包括:在遮光区域至少保留两层色阻层,所述色阻层为红色色阻层、蓝色色阻层或绿色色阻层中的至少两种。
- 如权利要求6所述的显示装置的阵列基板制作方法,其中,在所述基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
- 如权利要求6所述的显示装置的阵列基板制作方法,其中,在所述基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
- 如权利要求1所述的显示装置的阵列基板制作方法,其中,所述在所述基板上方制作主动开关层的步骤包括:在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层;以及在保护层上开设贯穿的通孔,在保护层上按照图案化的方式制作像素电极层,所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。
- 如权利要求9所述的显示装置的阵列基板制作方法,其中,所述在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层的步骤之后,还包括:在形成保护层后,通过图案化方式形成像素电极,所述像素电极不形成于保护层上,且所述像素电极直接与所述漏极金属层连接。
- 如权利要求1所述的显示装置的阵列基板制作方法,其中,在所述基板制作色阻层时,包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层;所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
- 如权利要求11所述的显示装置的阵列基板制作方法,其中,在所述阵列基板制作色阻层时,还包括位于非像素区域的第二色阻垫高层,所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。
- 如权利要求1所述的显示装置的阵列基板制作方法,其中,所述第一色阻层和第二色阻层的膜厚不同。
- 如权利要求1所述的显示装置的阵列基板制作方法,其中,所述主动开关层制作的步骤包括:在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层;在保护层上开设贯穿的通孔,在保护层上按照图案化的方式制作像素电极层,所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。
- 一种显示装置,其中,所述显示装置包括:存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序,所述计算机程序被所述处理器执行时实现如下的步骤:提供一基板;在所述基板上方制作主动开关层;在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;以及在第二色阻层上方涂布间隔色阻层,图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度。
- 如权利要求所述15的显示装置,其中,所述显示装置包括阵列基板,其中;所述基板的主动开关层上覆盖有至少两层色阻,而第二层色阻在主隔垫区的区域全部覆盖所述主动开关层,在辅隔垫区的区域部分覆盖所述主动开关层。
- 一种显示装置的阵列基板制作方法,所述阵列基板制作方法包括以下步骤:提供一基板;在所述基板上方制作主动开关层;在所述主动开关层上通过图案化的方式制作第一色阻层,所述第一色阻层完全覆盖所述主动开关层;在第一色阻层上通过图案化方式制作第二色阻层,所述第二色阻层在第一区域部分覆盖所述主动开关层,在第二区域完全覆盖所述主动开关层;以及在第二色阻层上方涂布间隔色阻层,以图案化所述间隔色阻层形成间隔物层,其中,所述间隔物层包括具有高度差的主隔垫区和辅隔垫区,所述主隔垫区的间隔物的高度大于所述辅隔垫区的间隔物的高度;所述第二色阻层在主隔垫区的区域完全覆盖所述主动开关层,在所述辅隔垫区的区域部分覆盖所述主动开关层。
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| CN105759520A (zh) * | 2016-04-21 | 2016-07-13 | 深圳市华星光电技术有限公司 | 液晶显示面板 |
| CN105867039A (zh) * | 2016-06-21 | 2016-08-17 | 武汉华星光电技术有限公司 | 一种液晶面板、其制作方法及显示器 |
| CN106483719A (zh) * | 2016-12-29 | 2017-03-08 | 深圳市华星光电技术有限公司 | 一种电子设备、阵列基板及其制作方法 |
| CN107039352A (zh) * | 2017-04-12 | 2017-08-11 | 深圳市华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
| CN107193162A (zh) * | 2017-07-31 | 2017-09-22 | 深圳市华星光电技术有限公司 | 一种阵列基板及制造方法 |
| CN107290911A (zh) * | 2017-07-19 | 2017-10-24 | 深圳市华星光电半导体显示技术有限公司 | 一种显示面板及其制程 |
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| CN107731863A (zh) * | 2017-11-06 | 2018-02-23 | 友达光电股份有限公司 | 发光二极管显示器 |
| CN108051939A (zh) * | 2017-12-29 | 2018-05-18 | 深圳市华星光电技术有限公司 | 液晶面板及其制作方法 |
| CN108931869A (zh) * | 2018-07-17 | 2018-12-04 | 惠科股份有限公司 | 显示面板和显示装置 |
| CN109814314A (zh) * | 2018-12-25 | 2019-05-28 | 惠科股份有限公司 | 显示装置的阵列基板制作方法和显示装置 |
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| CN106773400A (zh) * | 2016-12-28 | 2017-05-31 | 深圳市华星光电技术有限公司 | 液晶显示面板及其黑隔垫层的制作方法 |
| CN107272232B (zh) * | 2017-07-20 | 2020-12-25 | 深圳市华星光电半导体显示技术有限公司 | 一种液晶显示面板的制造方法 |
| CN109061969B (zh) * | 2018-08-31 | 2021-09-28 | Tcl华星光电技术有限公司 | 阵列基板及其显示面板 |
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| JP2012027328A (ja) * | 2010-07-26 | 2012-02-09 | Toppan Printing Co Ltd | カラーフィルタ、これを用いた液晶表示装置、カラーフィルタの製造方法及びこれに用いられるフォトマスクセット |
| CN105759520A (zh) * | 2016-04-21 | 2016-07-13 | 深圳市华星光电技术有限公司 | 液晶显示面板 |
| CN105867039A (zh) * | 2016-06-21 | 2016-08-17 | 武汉华星光电技术有限公司 | 一种液晶面板、其制作方法及显示器 |
| CN106483719A (zh) * | 2016-12-29 | 2017-03-08 | 深圳市华星光电技术有限公司 | 一种电子设备、阵列基板及其制作方法 |
| CN107039352A (zh) * | 2017-04-12 | 2017-08-11 | 深圳市华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
| CN107290911A (zh) * | 2017-07-19 | 2017-10-24 | 深圳市华星光电半导体显示技术有限公司 | 一种显示面板及其制程 |
| CN107193162A (zh) * | 2017-07-31 | 2017-09-22 | 深圳市华星光电技术有限公司 | 一种阵列基板及制造方法 |
| CN107591360A (zh) * | 2017-09-28 | 2018-01-16 | 深圳市华星光电半导体显示技术有限公司 | Tft基板的制作方法及其结构 |
| CN107731863A (zh) * | 2017-11-06 | 2018-02-23 | 友达光电股份有限公司 | 发光二极管显示器 |
| CN108051939A (zh) * | 2017-12-29 | 2018-05-18 | 深圳市华星光电技术有限公司 | 液晶面板及其制作方法 |
| CN108931869A (zh) * | 2018-07-17 | 2018-12-04 | 惠科股份有限公司 | 显示面板和显示装置 |
| CN109814314A (zh) * | 2018-12-25 | 2019-05-28 | 惠科股份有限公司 | 显示装置的阵列基板制作方法和显示装置 |
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