WO2020134995A1 - Procédé de fabrication de substrat de réseau pour appareil d'affichage et appareil d'affichage - Google Patents

Procédé de fabrication de substrat de réseau pour appareil d'affichage et appareil d'affichage Download PDF

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Publication number
WO2020134995A1
WO2020134995A1 PCT/CN2019/123956 CN2019123956W WO2020134995A1 WO 2020134995 A1 WO2020134995 A1 WO 2020134995A1 CN 2019123956 W CN2019123956 W CN 2019123956W WO 2020134995 A1 WO2020134995 A1 WO 2020134995A1
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WIPO (PCT)
Prior art keywords
layer
color resist
spacer
area
substrate
Prior art date
Application number
PCT/CN2019/123956
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English (en)
Chinese (zh)
Inventor
单剑锋
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惠科股份有限公司
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Publication of WO2020134995A1 publication Critical patent/WO2020134995A1/fr

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells

Definitions

  • the present application relates to the field of display technology, and in particular, to an array substrate manufacturing method of a display device and a display device.
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display (thin film transistor liquid crystal display) type display equipment.
  • a color film is made on a TFT substrate to form a COA structure, that is, CF (color filter, color filter) on A structure of Array.
  • CF color filter, color filter
  • the structure of making CF on TFT is made on TFT according to the process of CF. It is completely borrowed and transferred. It is used in making BPS (Black photo Spacer, black spacer), it is made on the color resist layer to form a black spacer structure.
  • BPS Black photo Spacer, black spacer
  • stage difference When forming the display device stage difference, if only relying on the photoresist itself or the gray-scale mask/half-mask mask design to make different stage differences, either the stage difference is too small, or the uniformity of the stage difference is not good, resulting in the formation of TFT-LCD production The size of the step difference is different, and the uniformity is poor, resulting in poor display effect of the liquid crystal panel.
  • An aspect of the present application provides a method for manufacturing an array substrate of a display device.
  • the method for manufacturing an array substrate of the display device includes the following steps:
  • a spacer color resist layer is coated on the second color resist layer, and the spacer color resist layer is patterned to form a spacer layer, wherein the spacer layer includes a primary spacer region and a secondary spacer region having a height difference, so The height of the spacer in the main septum area is greater than the height of the spacer in the auxiliary septum area.
  • the present application also provides a method for manufacturing an array substrate of a display device.
  • the method for manufacturing the display device includes the following steps:
  • a spacer color resist layer over the second color resist layer to pattern the spacer color resist layer to form a spacer layer, wherein the spacer layer includes a main spacer region and an auxiliary spacer region having a height difference, The height of the spacer in the main spacer area is greater than the height of the spacer in the auxiliary spacer area; the second color resist layer completely covers the active switch layer in the area of the main spacer area, in the auxiliary The area of the spacer area partially covers the active switching layer.
  • Another aspect of the present application also provides a display device including: a memory, a processor, and a computer program stored on the memory and executable on the processor, the computer program being processed by the computer program When the device is executed, the steps of the method described above are realized.
  • the color resist layer formed on the active switching layer of the substrate directly forms a step difference to the active switch layer, so that the uniformity of the spacer layer at different positions is increased, to avoid the unevenness of the spacer to cause the TFT and LCD step difference
  • the unevenness improves the display uniformity and display effect of the display device.
  • FIG. 1 is a schematic structural diagram of a display device of a hardware operating environment according to an embodiment of the present application
  • FIG. 2 is a schematic flowchart of an embodiment of a method for manufacturing an array substrate of a display device of the present application
  • FIG. 3 is a schematic flow chart of manufacturing an active switch layer in an embodiment of this application.
  • FIG. 4 is a schematic flow chart of manufacturing an active switch layer in another embodiment of the present application.
  • FIG. 5 is a schematic diagram of an architecture conversion of a spacer made in an embodiment of this application.
  • FIG. 6 is a schematic diagram of an architecture conversion of a spacer made in another embodiment of this application.
  • FIG. 7 is a schematic diagram of a framework conversion for making spacers in another embodiment of the present application.
  • FIG. 8 is a schematic diagram of a framework conversion for making spacers in another embodiment of the present application.
  • the main solutions of the embodiments of the present application are: providing a substrate; fabricating an active switch layer above the substrate; fabricating a first color resist layer on the active switch layer by patterning, the first color resist layer Completely cover the active switch layer; a second color resist layer is patterned on the first color resist layer, the second color resist layer partially covers the active switch layer in the first area, and completely in the second area Covering the active switch layer; coating a spacer color resist layer over the second color resist layer to pattern the spacer color resist layer to form a spacer layer, wherein the spacer layer includes a main spacer having a height difference And the auxiliary septum area, the height of the spacer of the main septum area is greater than the height of the spacer of the auxiliary septum area.
  • stage difference of the display device Due to the current stage difference of the display device, if only the photoresist itself or the gray scale mask/half-mask mask design is used to make different stage differences, either the stage difference is too small or the uniformity of the stage difference is not good, resulting in the production of TFT-LCD
  • the formed step sizes vary in size and the uniformity is poor, resulting in the problem of poor display effect of the liquid crystal panel.
  • the present application provides a solution to directly form a step difference by using a color resist layer formed on an active switching layer of an array substrate to cover the active switching layer differently, so that the uniformity of the spacer layer at different positions is increased and the spacer is avoided.
  • the unevenness leads to a situation where the TFT and LCD are not evenly segmented, which improves the display uniformity and display effect of the display device.
  • FIG. 1 is a schematic structural diagram of a display device of a hardware operating environment according to an embodiment of the present application.
  • the display device may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, and a communication bus 1002.
  • the communication bus 1002 is used to implement connection communication between these components.
  • the user interface 1003 may include a display screen (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 1003 may further include a standard wired interface and a wireless interface.
  • the network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a WI-FI interface).
  • the memory 1005 may be a SRAM memory (Static Random-Access Memory, static random access memory), or a stable memory (non-volatile memory), such as disk storage.
  • the memory 1005 may optionally be a storage device independent of the foregoing processor 1001.
  • the display device may also include a camera, RF (Radio Frequency (radio frequency) circuits, sensors, audio circuits, WiFi modules, etc.
  • RF Radio Frequency (radio frequency) circuits
  • terminal structure shown in FIG. 1 does not constitute a limitation on the display device, and may include more or less components than those illustrated, or combine certain components, or have different component arrangements.
  • the memory 1005 as a computer-readable storage medium may include an operating system, a network communication module, a user interface module, and an array substrate manufacturing application program of a display device.
  • the network interface 1004 is mainly used to connect to the background server and perform data communication with the background server;
  • the user interface 1003 is mainly used to connect to the client (user side) and perform data communication with the client;
  • the device 1001 can be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
  • a spacer color resist layer is coated on the second color resist layer, and the spacer color resist layer is patterned to form a spacer layer, wherein the spacer layer includes a primary spacer region and a secondary spacer region having a height difference, so The height of the spacer in the main septum area is greater than the height of the spacer in the auxiliary septum area.
  • the processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations: the second color resist layer partially covers the active switch layer in the first area, and The two areas completely covering the active switching layer include: completely covering the active switching layer in the area of the main spacer area, and partially covering the active switching layer in the area of the auxiliary spacer area.
  • processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
  • At least two color resist layers are retained in the shading area, and the color resist layers are at least two of the red color resist layer, the blue color resist layer, or the green color resist layer.
  • processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
  • a through hole is formed in the protective layer, and a pixel electrode layer is formed on the protective layer in a patterned manner.
  • the pixel electrode layer is partially formed in the through hole and is in contact with the drain metal layer directly below.
  • the processor 1001 may be used to call the memory 1005 Create an application program for the array substrate of the display device stored in and perform the following operations:
  • a pixel electrode is formed in a patterned manner, the pixel electrode is not formed on the protective layer, and the pixel electrode is directly connected to the drain metal layer.
  • the processor 1001 may be used to call an array substrate manufacturing application program of the display device stored in the memory 1005, and perform the following operations: when manufacturing the color resist layer on the substrate, the color resist in the pixel area and the color resist A first color resist pad high layer formed by stacking at least one layer of color resist in the pixel area; the spacer above the first color resist pad high layer is in contact with the counter substrate of the array substrate.
  • the processor 1001 may be used to call an array substrate manufacturing application program of the display device stored in the memory 1005, and perform the following operations: when manufacturing the color resist layer on the substrate, a second color resist located in a non-pixel area is also included A high-level pad, and the spacer above the high-level second color resist pad is spaced toward the opposite substrate of the array substrate.
  • an embodiment of the present application provides a method for manufacturing an array substrate of a display device.
  • the method for manufacturing an array substrate of the display device includes:
  • Step S10 providing a substrate
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display, thin-film transistor liquid crystal display
  • a substrate is provided, the substrate is a glass substrate, and the provided substrate is a cleaned substrate.
  • Step S20 forming an active switch layer above the substrate
  • an active switching layer is formed on the substrate. After the active switching layer is turned on, it will control the deflection of liquid crystal molecules, and the active switching layer may be a thin film transistor TFT or other substances or devices that can control the deflection of liquid crystal molecules;
  • the process of the active switching layer includes:
  • Step S21 a gate, a gate insulating layer, an active layer, a source/drain metal layer and a protective layer of the active switching layer are sequentially formed on the substrate;
  • Step S22 a through hole is formed in the protective layer, and a pixel electrode layer is formed on the protective layer in a patterned manner, and the pixel electrode layer is partially formed in the through hole and is in contact with the drain metal layer directly below .
  • the manufacturing process takes a thin film transistor as an example, depositing a first metal layer on the array substrate; performing a first photomask exposure and etching manufacturing process to define the pattern of the first metal layer to form in the first metal layer A gate; depositing an insulating layer on the substrate to cover the surface of the first metal layer; sequentially depositing a semiconductor layer, a doped silicon layer and a second metal layer for the second mask and An etching process is used to define the patterns of the semiconductor layer, the doped silicon layer and the second metal layer to form a thin film transistor island structure; a third photomask and etching manufacturing process are performed to A source/drain metal layer is formed in the two metal layers and the doped silicon layer, and the fabrication of the thin film transistor is completed.
  • a protective layer
  • CVD Chemical Vapor Deposition
  • CVD passivation coating photoresist coating/exposure/development, passivation etching, photoresist removal.
  • dry etching is performed to dig a contact hole in the protective layer to form a protective layer pattern.
  • an insulating layer, a semiconductor layer, a doped silicon layer and a second metal layer are deposited on the substrate.
  • the semiconductor layer is selected from polysilicon or amorphous silicon materials, and is set according to the manufacturing process and display requirements.
  • a second photomask etching manufacturing process is performed to define a semiconductor layer, a doped silicon layer and the second metal layer pattern to form a thin film transistor island structure.
  • a third photomask etching manufacturing process is performed to form a signal line, source and drain metal layers in the second metal layer and the doped silicon layer to complete the fabrication of the TFT thin film transistor.
  • a protective layer is formed on the substrate and covers the surface of the TFT thin film transistor and the signal line.
  • the dry etching of the protective layer is performed to form the source contact hole, the drain contact hole and the signal line contact hole, so that when the pixel electrode is fabricated, the pixel electrode fills the contact hole, and the pixel electrode is connected to the drain electrode through the contact hole;
  • a pixel electrode is formed in a patterned manner, the pixel electrode is not formed on the protective layer, and the pixel electrode is directly connected to the drain metal layer.
  • step S23 after forming a protective layer, a pixel electrode is formed by patterning, the pixel electrode is not formed in On the protective layer, and the pixel electrode is directly connected to the drain metal layer. That is, after the protective layer is applied, a dry etching operation is not performed, a contact hole is not formed, and a fourth illumination and etching manufacturing process is performed to define the pattern of the pixel electrode so that the pixel electrode is formed on the gate insulating layer Instead of forming on the protective layer.
  • ITO Indium
  • ITO OVEN baking
  • Step S30 a first color resist layer is formed on the active switch layer by patterning, and the first color resist layer completely covers the active switch layer;
  • a color resist layer is formed above the pixel electrode layer.
  • the color resist layer is a red color resist layer, a green color resist layer, and a blue color resist layer.
  • the thickness of each color resist layer is different.
  • the order of the manufacturing process can be random and unlimited. Generally, the red color resist layer is completed first, then the green color resist layer is completed, and finally the blue color resist layer is manufactured.
  • the production process is completed in a patterned manner.
  • the first photoresist layer is coated first, either red or green or blue.
  • a first color resist layer is produced by patterning, the first color resist layer completely covers the active switch layer, that is, the active switch layer at any position is The first color resist layer is completely covered.
  • Step S40 a second color resist layer is formed on the first color resist layer by patterning, the second color resist layer partially covers the active switch layer in the first area, and completely covers the active switch in the second area Floor;
  • the second color resist layer is a color resist layer with a color different from that of the first color resist layer.
  • the second color resist layer adopts a method of different light transmittance.
  • the second color resist layer partially covers the active switching layer in the first area, and completely covers the active switching layer in the second area.
  • the second color resist layer partially covers the active switching layer in the first area, and completely covering the active switching layer in the second area includes: completely covering the active switching layer in the area of the main spacer area, The area of the auxiliary spacer area partially covers the active switching layer, the second area is the area corresponding to the auxiliary spacer area, and the first area is the area corresponding to the main spacer area.
  • the position of the second area corresponding to the partially covered part may be different, and the position of the area corresponding to the partially covered auxiliary spacer area may be different, for example, the area directly below the auxiliary spacer or the lower left of the auxiliary spacer The area or the lower right area of the auxiliary spacer.
  • Step S50 a spacer color resist layer is coated on the second color resist layer, and the spacer color resist layer is patterned to form a spacer layer, wherein the spacer layer includes a primary spacer region and a secondary spacer having a height difference Area, the height of the spacer in the main septum area is greater than the height of the spacer in the secondary septum area.
  • the spaced color resist layer is coated on top of the second color resist layer, that is, the photosensitive material is applied by
  • the light of the patterning parameter determined in the above step S40 irradiates the photosensitive material, and the light irradiates the photosensitive material layer through the mask plate to form a spacer layer, wherein the spacer layer includes a main spacer region and an auxiliary spacer having a height difference In the pad area, the height of the spacer in the main septum area is greater than the height of the spacer in the auxiliary septum area.
  • the main spacer area is formed on the color resist layer, and the auxiliary spacer area is formed on the non-light-transmitting area that does not cover the color resist layer.
  • the color resist in the pixel area and the non-pixel area are formed by stacking at least one layer of color resist The upper layer of the first color resist pad; the spacer above the upper layer of the first color resist pad is in contact with the counter substrate of the array substrate.
  • the color resist layer is fabricated on the array substrate, it also includes a second color resist pad high layer located in the non-pixel area, and the spacer above the second color resist pad high layer is spaced toward the opposite substrate of the array substrate.
  • the color resist layer is composed of a first color resist layer and a second color resist layer, that is, the first color resist pad upper layer and the second color resist pad upper layer may be the first color resist layer and/or the second Color resist layer.
  • the color resist layer formed on the active switch layer of the array substrate directly forms the step difference to the active switch layer, so that the uniformity of the spacer layer at different positions is increased, and the unevenness of the spacer causes the TFT and the The uneven LCD segment difference improves the display uniformity and display effect of the display device.
  • the COA color filter on In the Array
  • the R/G/B color layer is formed on the TFT substrate.
  • the color layer order can be arbitrary.
  • the light shielding is assisted by the color layer stacking method, and the stacking method is R/G/ Two of the three colors of B
  • an organic insulating layer is covered to protect the R/G/B color layer, and finally a spacer photoresist layer is coated;
  • the second color layer In the main (main spacer area) spacer, when the first color layer covers the TFT, the second color layer completely covers the TFT in the longitudinal direction; in the Sub (auxiliary spacer area) spacer, the second stack
  • the layers are designed with different mask openings to partially cover the TFT area.
  • the BPS color layer When the BPS color layer is coated, due to the step difference between the color layers, it can be exposed through a common mask to obtain spacer layers with different film thicknesses, making different Stepped spacer liquid crystal panel.
  • the second stacked layer is one of R/G/B, and the size of the step is determined by the coverage area; the position of the second stacked layer may not be fixed above the first color layer.
  • Figure 5, Figure 6, Figure 7, and Figure 8 for a schematic of the step difference.
  • the first color resist layer 31, the second color resist layer 32 and the spacer layer 33 are coated, and the portion of the second color resist layer corresponding to the spacer layer 33 is completely covered, corresponding to the auxiliary spacer
  • the region of the object layer 34 is partially covered, and the main spacer layer 33 and the auxiliary spacer layer 34 form a step ⁇ H4.
  • the recipe (patterning pattern parameter) for the coated photoresist layer of the color resist layer and the spacer layer can be set in advance at the beginning of production line production, without having to make it during the production process Switching, through early switching and detection, improve production efficiency.
  • the present application also provides a method for manufacturing an array substrate of a display device.
  • the method for manufacturing the display device includes the following steps: providing a substrate; fabricating an active switch layer above the substrate; passing a pattern on the active switch layer
  • the first color resist layer is made in a chemical manner, and the first color resist layer completely covers the active switch layer
  • the second color resist layer is made by patterning on the first color resist layer, and the second color resist layer Partially covering the active switching layer in the first area and completely covering the active switching layer in the second area; coating a spacer color resist layer above the color resist layer to pattern the spacer color resist layer to form a spacer layer
  • the spacer layer includes a main spacer area and an auxiliary spacer area having a height difference, the height of the spacer of the main spacer area is greater than the height of the spacer of the auxiliary spacer area;
  • the color resist layer completely covers the active switch layer in the area of the main spacer area, and partially covers the active switch layer in the area of the auxiliary spacer
  • the implementation steps of the method refer to the processes of the above method embodiments.
  • the color resist layer formed on the active switching layer of the array substrate directly forms a step difference to cover the active switching layer, so that the uniformity of the spacer layer at different positions is increased to avoid unevenness of the spacer This leads to a situation where the TFT and LCD are not evenly segmented, which improves the display uniformity and display effect of the display device.
  • an embodiment of the present application also provides a display device including a display panel and a timing controller connected to the display panel, an array substrate manufacturing device loaded with a display device in the timing controller, and the display panel
  • the manufacturing process of the array substrate of the display device is completed under the control of the timing controller, and the manufacturing method of the array substrate of the display device stored in the timing controller is completed by the method of manufacturing the array substrate of the display device in the above embodiment.
  • the array substrate manufacturing method of the display device is loaded on the array substrate manufacturing device of the display device.
  • the display device may be a mobile or fixed display device such as a TV, a mobile phone, a pad, and a machine display.
  • the color resist layer formed on the active switching layer of the array substrate directly forms a step difference to cover the active switching layer, so that the uniformity of the spacer layer at different positions is increased to avoid unevenness of the spacer This leads to a situation where the TFT and LCD are not evenly segmented, which improves the display uniformity and display effect of the display device.
  • the display device in this embodiment includes an array substrate, a counter substrate, which is disposed opposite to the array substrate, a liquid crystal layer is filled between the counter substrate and the array substrate, and the array substrate is composed of the above embodiments Produced.
  • the counter substrate is a glass substrate, and a pixel electrode is provided above it, and the spacer of the main spacer area is in contact with the pixel electrode of the counter substrate, and the spacer of the auxiliary spacer area is spaced from the pixel electrode of the counter substrate .
  • the active switching layer of the array substrate of this embodiment is covered with at least two layers of color resisters, and the second layer of color resisters completely covers the active switch layer in the area of the main spacer area and partially covers the area in the area of the auxiliary spacer area. Active switching layer.
  • the embodiments of the present application also provide a computer-readable storage medium, a computer-readable storage medium, the computer-readable storage medium stores an array substrate manufacturing program of a display device, the array substrate manufacturing program of the display device is When the processor executes, the method for manufacturing the array substrate of the display device as described in the above embodiment is implemented.
  • the methods of the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware, but in many cases the former is optional Implementation.
  • the technical solution of the present application can essentially be embodied in the form of software products, and the computer software products are stored in a computer-readable storage medium (such as ROM/ The RAM, magnetic disk, and optical disk include several instructions to enable a terminal device (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the embodiments of the present application.

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  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
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Abstract

L'invention concerne un procédé de fabrication de substrat de réseau pour un appareil d'affichage, consistant : à utiliser un substrat ; à fabriquer une couche active de commutation sur le substrat ; à fabriquer une première couche colorée de réserve (10) sur la couche active de commutation au moyen d'une formation de motifs, la première couche colorée de réserve (10) recouvrant complètement la couche active de commutation ; à fabriquer une seconde colorée couche de réserve (20) sur la première couche colorée de réserve (10) au moyen d'une formation de motif, la seconde couche colorée de réserve (20) recouvrant partiellement la couche active de commutation dans une première zone et recouvrant complètement la couche active de commutation dans une seconde zone ; et à revêtir la couche colorée de réserve par une couche colorée de réserve d'espaceur, de façon à former une couche d'espaceur (30, 40) par formation de motif sur la couche colorée de réserve d'espaceur, la hauteur d'un espaceur (30) dans une zone principale d'espacement étant supérieure à celle d'un espaceur (40) dans une zone auxiliaire d'espacement. La présente invention concerne également un appareil d'affichage.
PCT/CN2019/123956 2018-12-25 2019-12-09 Procédé de fabrication de substrat de réseau pour appareil d'affichage et appareil d'affichage WO2020134995A1 (fr)

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CN201811597930.4 2018-12-25
CN201811597930.4A CN109814314A (zh) 2018-12-25 2018-12-25 显示装置的阵列基板制作方法和显示装置

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CN109814314A (zh) * 2018-12-25 2019-05-28 惠科股份有限公司 显示装置的阵列基板制作方法和显示装置
CN111354271B (zh) * 2020-03-19 2021-03-23 友达光电（昆山）有限公司 显示装置
CN114428427B (zh) * 2022-01-27 2023-10-03 Tcl华星光电技术有限公司 显示面板及显示装置

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012027328A (ja) * 2010-07-26 2012-02-09 Toppan Printing Co Ltd カラーフィルタ、これを用いた液晶表示装置、カラーフィルタの製造方法及びこれに用いられるフォトマスクセット
CN105759520A (zh) * 2016-04-21 2016-07-13 深圳市华星光电技术有限公司 液晶显示面板
CN105867039A (zh) * 2016-06-21 2016-08-17 武汉华星光电技术有限公司 一种液晶面板、其制作方法及显示器
CN106483719A (zh) * 2016-12-29 2017-03-08 深圳市华星光电技术有限公司 一种电子设备、阵列基板及其制作方法
CN107039352A (zh) * 2017-04-12 2017-08-11 深圳市华星光电技术有限公司 Tft基板的制作方法及tft基板
CN107193162A (zh) * 2017-07-31 2017-09-22 深圳市华星光电技术有限公司 一种阵列基板及制造方法
CN107290911A (zh) * 2017-07-19 2017-10-24 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制程
CN107591360A (zh) * 2017-09-28 2018-01-16 深圳市华星光电半导体显示技术有限公司 Tft基板的制作方法及其结构
CN107731863A (zh) * 2017-11-06 2018-02-23 友达光电股份有限公司 发光二极管显示器
CN108051939A (zh) * 2017-12-29 2018-05-18 深圳市华星光电技术有限公司 液晶面板及其制作方法
CN108931869A (zh) * 2018-07-17 2018-12-04 惠科股份有限公司 显示面板和显示装置
CN109814314A (zh) * 2018-12-25 2019-05-28 惠科股份有限公司 显示装置的阵列基板制作方法和显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106773400A (zh) * 2016-12-28 2017-05-31 深圳市华星光电技术有限公司 液晶显示面板及其黑隔垫层的制作方法
CN107272232B (zh) * 2017-07-20 2020-12-25 深圳市华星光电半导体显示技术有限公司 一种液晶显示面板的制造方法
CN109061969B (zh) * 2018-08-31 2021-09-28 Tcl华星光电技术有限公司 阵列基板及其显示面板

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012027328A (ja) * 2010-07-26 2012-02-09 Toppan Printing Co Ltd カラーフィルタ、これを用いた液晶表示装置、カラーフィルタの製造方法及びこれに用いられるフォトマスクセット
CN105759520A (zh) * 2016-04-21 2016-07-13 深圳市华星光电技术有限公司 液晶显示面板
CN105867039A (zh) * 2016-06-21 2016-08-17 武汉华星光电技术有限公司 一种液晶面板、其制作方法及显示器
CN106483719A (zh) * 2016-12-29 2017-03-08 深圳市华星光电技术有限公司 一种电子设备、阵列基板及其制作方法
CN107039352A (zh) * 2017-04-12 2017-08-11 深圳市华星光电技术有限公司 Tft基板的制作方法及tft基板
CN107290911A (zh) * 2017-07-19 2017-10-24 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制程
CN107193162A (zh) * 2017-07-31 2017-09-22 深圳市华星光电技术有限公司 一种阵列基板及制造方法
CN107591360A (zh) * 2017-09-28 2018-01-16 深圳市华星光电半导体显示技术有限公司 Tft基板的制作方法及其结构
CN107731863A (zh) * 2017-11-06 2018-02-23 友达光电股份有限公司 发光二极管显示器
CN108051939A (zh) * 2017-12-29 2018-05-18 深圳市华星光电技术有限公司 液晶面板及其制作方法
CN108931869A (zh) * 2018-07-17 2018-12-04 惠科股份有限公司 显示面板和显示装置
CN109814314A (zh) * 2018-12-25 2019-05-28 惠科股份有限公司 显示装置的阵列基板制作方法和显示装置

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