CN107591360A - Tft基板的制作方法及其结构 - Google Patents
Tft基板的制作方法及其结构 Download PDFInfo
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- CN107591360A CN107591360A CN201710901865.9A CN201710901865A CN107591360A CN 107591360 A CN107591360 A CN 107591360A CN 201710901865 A CN201710901865 A CN 201710901865A CN 107591360 A CN107591360 A CN 107591360A
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- Prior art keywords
- color blocking
- passivation layer
- blocking block
- tft
- sept
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- 239000000758 substrate Substances 0.000 title claims abstract description 64
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 230000000903 blocking effect Effects 0.000 claims abstract description 139
- 238000002161 passivation Methods 0.000 claims abstract description 64
- 239000011159 matrix material Substances 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000000151 deposition Methods 0.000 claims description 15
- 230000008021 deposition Effects 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 79
- 239000010408 film Substances 0.000 description 21
- 238000005516 engineering process Methods 0.000 description 11
- 239000004973 liquid crystal related substance Substances 0.000 description 10
- 239000005416 organic matter Substances 0.000 description 8
- VPWNQTHUCYMVMZ-UHFFFAOYSA-N 4,4'-sulfonyldiphenol Chemical compound C1=CC(O)=CC=C1S(=O)(=O)C1=CC=C(O)C=C1 VPWNQTHUCYMVMZ-UHFFFAOYSA-N 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000011049 filling Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Classifications
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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Abstract
本发明提供一种TFT基板的制作方法及其结构。该TFT基板的制作方法在第二钝化层(PV2)上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物(61)、次光阻间隔物(62)与黑色矩阵(63)之后,再沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极(71)与公共电极(72),由于一体式的主光阻间隔物(61)、次光阻间隔物(62)与黑色矩阵(63)填充、覆盖了黑色矩阵(63)所在区域内的色阻被挖开的空间,使得像素电极(71)与公共电极(72)形成在较平坦的黑色矩阵(63)上,能够避免由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极(71)与公共电极(72)短路。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种TFT基板的制作方法及其结构。
背景技术
液晶显示面板(Liquid Crystal Display,LCD),简称液晶面板,具有机身薄、省电、无辐射等众多优点,得到了广泛地应用,如:液晶电视、智能手机、数字相机、平板电脑、计算机屏幕、或笔记本电脑屏幕等,在平板显示领域中占主导地位。
液晶面板的结构通常是由一彩色滤光片基板(Color Filter,CF)、一薄膜晶体管阵列基板(Thin Film Transistor Array Substrate,TFT Array Substrate简称TFT基板)、以及一配置于两基板间的液晶层(Liquid Crystal Layer)所构成,其工作原理是通过在两片玻璃基板上施加驱动电压来控制液晶层的液晶分子的旋转,将背光模组的光线折射出来产生画面。
对于传统的液晶面板,在CF基板一侧一般设置有用于滤光的多种颜色的色阻及用于遮光的黑色矩阵(Black Matrix,BM),在TFT基板与CF基板之间设置有专门的光阻间隔物(Photo Space,PS)以支撑液晶层的盒厚。随着显示技术的发展,出现了一种把BM和PS合二为一的技术(Black Photo Spacer,BPS)。
BPS 1 tone技术是一种最节约成本的BPS技术。BPS 1 tone技术指的是BPS制程使用的光罩只有一种透过率,对应的BPS材料也只感受到一种强度的光,但普通的BPS 1 tone技术需要使用到有机物平坦化(PFA)层,这是因为普通的BPS 1 tone技术使用的是岛状(Island)结构,使用两个色阻块叠起来充当主光阻间隔物(Main PS)、一个色阻块来充当次光阻间隔物(Sub PS)由于两个色阻块和一个色阻块的高度差太大,做出来的主光阻间隔物和次光阻间隔物的断差就会过大,需要有机物平坦化层对两层色块阻堆叠的高度进行一个平坦化作用。
为了节约材料成本,省去有机物平坦化层的BPS型TFT基板被开发出来。请同时参阅图1与图2,省去有机物平坦化层的BPS型TFT基板使用单层的第一岛状色阻块402垫起主光阻间隔物701,亦使用单层的第二岛状色阻块403垫起次光阻间隔物702,只是垫起次光阻间隔物702的第二岛状色阻块403是用狭缝衍射型(SLT)光罩做灰阶曝光,使得第二岛状色阻块403处照到的是半透光;相应的主光阻间隔物701和次光阻间隔物702的断差即为第一岛状色阻块402的高度h1与第二岛状色阻块403的高度h2之间的差值,而且断差不会很大,所以在色阻层401、第一岛状色阻块402与第二岛状色阻块403上面就可以不用有机物平坦化层,而是使用氮化硅(SiNx)与氧化硅(SiOx)组合的第二钝化层PV2覆盖在色阻层401、第一岛状色阻块402、第二岛状色阻块403及已有的第一钝化层PV1上。制作该BPS型TFT基板时,先在衬底基板10上制作出TFT T及覆盖TFT T的第一钝化层PV1;然后沉积色阻并做图案化处理,形成色阻层401、第一岛状色阻块402与第二岛状色阻块403;接着沉积第二钝化层PV2并做图案化处理;之后沉积导电薄膜并做刻蚀处理,形成像素电极601与公共电极602;最后在第二钝化层PV2、像素电极601与公共电极602上制作出一体式的主光阻间隔物701、次光阻间隔物702及黑色矩阵703。
结合图3与图4,这种新架构的BPS型TFT基板存在一个问题:由于黑色矩阵703所在区域内的色阻都被挖开,色阻边缘会形成一个斜坡,若斜坡的陡度太大,那么在做完第二钝化层PV2,再做导电薄膜时,斜坡的存在会导致导电薄膜刻蚀不干净产生残留,而残留的导电薄膜会造成像素电极601与公共电极602短路。
发明内容
本发明的目的在于提供一种TFT基板的制作方法,能够避免由于色阻边缘斜坡过陡导致的导电薄膜残留的问题,防止像素电极与公共电极短路。
本发明的目的还在于提供一种TFT基板结构,能够防止像素电极与公共电极短路。
为实现上述目的,本发明首先提供一种TFT基板的制作方法,包括以下步骤:
步骤S1、提供衬底基板,在所述衬底基板上制作出呈阵列式排布的TFT,然后沉积一层覆盖所有TFT的第一钝化层;
步骤S2、在所述第一钝化层上沉积彩色色阻并进行图案化处理,形成色阻层、第一色阻块与第二色阻块,且第一色阻块的高度大于第二色阻块的高度;
步骤S3、在所述第一钝化层、色阻层、第一色阻块与第二色阻块上沉积覆盖第二钝化层;
步骤S4、在所述第二钝化层上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物、次光阻间隔物与黑色矩阵,以及一贯穿所述黑色矩阵、第二钝化层与第一钝化层的过孔;其中,所述主光阻间隔物对应位于第一色阻块上方,所述次光阻间隔物对应位于第二色阻块上方;所述过孔被TFT的漏极完全遮挡;
步骤S5、在所述一体式的主光阻间隔物、次光阻间隔物及黑色矩阵上沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极与公共电极,所述像素电极经由所述过孔连接TFT的漏极。
所述步骤S2使用狭缝衍射型光罩对彩色色阻进行图案化处理。
所述步骤S2沉积的彩色色阻包括红色色阻、绿色色阻与蓝色色阻。
所述透明导电薄膜的材料为氧化铟锡。
所述第一钝化层与第二钝化层的材料均为氮化硅、氧化硅或二者的组合。
所述第一色阻块与第二色阻块均呈岛状。
本发明还提供一种TFT基板,包括:
衬底基板;
设在所述衬底基板上呈阵列式排布的TFT;
覆盖所有TFT的第一钝化层;
设在所述第一钝化层上的色阻层、第一色阻块与第二色阻块,其中,第一色阻块的高度大于第二色阻块的高度;
覆盖所述第一钝化层、色阻层、第一色阻块与第二色阻块的第二钝化层;
设在所述第二钝化层上的一体式的主光阻间隔物、次光阻间隔物与黑色矩阵,其中,所述主光阻间隔物对应位于第一色阻块上方,所述次光阻间隔物对应位于第二色阻块上方;
以及设在所述黑色矩阵上的像素电极与公共电极,所述像素电极经由贯穿所述黑色矩阵、第二钝化层与第一钝化层的过孔连接TFT的漏极;
所述过孔被TFT的漏极完全遮挡。
所述色阻层包括红色色阻、绿色色阻与蓝色色阻;所述第一色阻块与第二色阻块均呈岛状。
所述像素电极71与公共电极72的材料为氧化铟锡。
所述第一钝化层与第二钝化层的材料均为氮化硅、氧化硅或二者的组合。
本发明的有益效果:本发明提供的TFT基板的制作方法,在第二钝化层上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物、次光阻间隔物与黑色矩阵之后,再在所述一体式的主光阻间隔物、次光阻间隔物及黑色矩阵上沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极与公共电极,由于一体式的主光阻间隔物、次光阻间隔物与黑色矩阵填充、覆盖了黑色矩阵所在区域内的色阻被挖开的空间,使得像素电极与公共电极形成在较平坦的黑色矩阵上,能够避免由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极与公共电极短路。本发明提供的TFT基板结构,在所述第二钝化层上设置一体式的主光阻间隔物、次光阻间隔物与黑色矩阵,在所述黑色矩阵上设置像素电极与公共电极,由于一体式的主光阻间隔物、次光阻间隔物与黑色矩阵填充、覆盖了黑色矩阵所在区域内的色阻被挖开的空间,像素电极与公共电极位于较平坦的黑色矩阵上,能够避免在制程过程中由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极与公共电极短路。
附图说明
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为现有的省去有机物平坦化层的BPS型TFT基板的俯视示意图;
图2为对应于图1中A-A处的剖面示意图;
图3为显示现有的省去有机物平坦化层的BPS型TFT基板会出现像素电极与公共电极短路的俯视示意图;
图4为显示现有的省去有机物平坦化层的BPS型TFT基板容易产生导电薄膜蚀刻残留的剖面示意图;
图5为本发明的TFT基板的制作方法的流程图;
图6为显示本发明的TFT基板中色阻层、第一色阻块与第二色阻块的俯视示意图;
图7为发明的TFT基板在图6所示B-B处的剖面示意图;
图8为显示本发明的TFT基板能够避免产生导电薄膜蚀刻残留的剖面示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图5,结合图6与图7,本发明首先提供一种TFT基板的制作方法,包括以下步骤:
步骤S1、提供衬底基板1,在所述衬底基板1上制作出呈阵列式排布的TFT T,然后沉积一层覆盖所有TFT T的第一钝化层PV1。
具体地:
所述衬底基板1优选玻璃基板。
采用现有的常规制程即可在所述衬底基板1上制作出呈阵列式排布的TFT T,此处不做展开描述。所述TFT T包括有栅极、栅极绝缘层、半导体有源层、层间绝缘层、源极与漏极D等,这与现有技术无异,此处不做展开叙述。
所述第一钝化层PV1的材料为氮化硅(SiNx)、氧化硅(SiOx)或二者的组合。
步骤S2、在所述第一钝化层PV1上沉积彩色色阻并进行图案化处理,形成色阻层41、岛状的第一色阻块42与岛状的第二色阻块43,且第一色阻块42的高度h1大于第二色阻块43的高度h2。
具体地:
该步骤S2中所沉积的彩色色阻包括红色色阻R、绿色色阻G与蓝色色阻B。
该步骤S2使用狭缝衍射型光罩对彩色色阻进行图案化处理。狭缝衍射型光罩能够进行灰阶曝光,使得第二色阻块43处照到的光是半透光,第一色阻块42处照到的光的强度大于第二色阻块43处照到的光的强度,从而第一色阻块42的高度h1大于第二色阻块43的高度h2,但二者之间的差值不会很大。
步骤S3、在所述第一钝化层PV1、色阻层41、第一色阻块42与第二色阻块43上沉积覆盖第二钝化层PV2。
具体地:所述第二钝化层PV2的材料亦为SiNx、SiOx或二者的组合。
步骤S4、应用BPS技术,在所述第二钝化层PV2上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物61、次光阻间隔物62与黑色矩阵63,以及一贯穿所述黑色矩阵63、第二钝化层PV2与第一钝化层PV1的过孔V;其中,所述主光阻间隔物61对应位于第一色阻块42上方,所述次光阻间隔物62对应位于第二色阻块43上方。
因为前述步骤S2中形成的第一色阻块42的高度h1大于第二色阻块43的高度h2,由第一色阻块42垫起主光阻间隔物61,由第二色阻块43垫起次光阻间隔物62,所以主光阻间隔物61和次光阻间隔物62之间相应存在断差,该断差即为第一色阻块42的高度h1与第二色阻块43的高度h2之间的差值。
值得一提的是,所述过孔V位于TFT T的漏极D上方而被TFT T的漏极D完全遮挡,这样设计的目的是利用TFT T的漏极D的金属遮光性能来弥补所述黑色矩阵63由于开设过孔V而存在的漏光风险。
步骤S5、在所述一体式的主光阻间隔物61、次光阻间隔物62及黑色矩阵63上沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极71与公共电极72,所述像素电极71经由所述过孔V连接TFT T的漏极D。
具体地,所述透明导电薄膜的材料优选氧化铟锡(Indium Tin Oxide,ITO)。
上述TFT基板的制作方法,在第二钝化层PV2上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物61、次光阻间隔物62与黑色矩阵63之后,再在所述一体式的主光阻间隔物61、次光阻间隔物62、及黑色矩阵63上沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极71与公共电极72,由于一体式的主光阻间隔物61、次光阻间隔物62与黑色矩阵63填充、覆盖了黑色矩阵63所在区域内的色阻被挖开的空间,使得像素电极71与公共电极72形成在较平坦的黑色矩阵63上,能够如图8所示那样避免由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极71与公共电极72短路。此外,将所述过孔V制作于TFT T的漏极D上方,能够利用TFT T的漏极D的金属遮光性能来弥补所述黑色矩阵63由于开设过孔V而存在的漏光风险。
请同时参阅图6至图8,本发明还提供一种TFT基板结构,包括:
衬底基板1;
设在所述衬底基板1上呈阵列式排布的TFT T;
覆盖所有TFT T的第一钝化层PV1;
设在所述第一钝化层PV1上的色阻层41、岛状的第一色阻块42与岛状的第二色阻块43,其中,第一色阻块42的高度h1大于第二色阻块43的高度h2;
覆盖所述第一钝化层PV1、色阻层41、第一色阻块42与第二色阻块43的第二钝化层PV2;
设在所述第二钝化层PV2上的一体式的主光阻间隔物61、次光阻间隔物62与黑色矩阵63,其中,所述主光阻间隔物61对应位于第一色阻块42上方,所述次光阻间隔物62对应位于第二色阻块43上方;
以及设在所述黑色矩阵63上的像素电极71与公共电极72,所述像素电极71经由贯穿所述黑色矩阵63、第二钝化层PV2与第一钝化层PV1的过孔V连接TFT T的漏极D。
具体地:
所述衬底基板1优选玻璃基板;
所述第一钝化层PV1与第二钝化层PV2的材料均为SiNx、SiOx或二者的组合;
所述色阻层41包括红色色阻R、绿色色阻G与蓝色色阻B;
所述像素电极71与公共电极72的材料为氧化铟锡。
由于本发明的TFT基板结构在所述第二钝化层PV2上设置一体式的主光阻间隔物61、次光阻间隔物62与黑色矩阵63,在所述黑色矩阵63上设置像素电极71与公共电极72,由于一体式的主光阻间隔物61、次光阻间隔物62与黑色矩阵63填充、覆盖了黑色矩阵63所在区域内的色阻被挖开的空间,像素电极71与公共电极72位于较平坦的黑色矩阵63上,能够避免在制程过程中由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极71与公共电极72短路。
值得一提的是:所述过孔V设于TFT T的漏极D上方并被TFT T的漏极D完全遮挡,能够利用TFT T的漏极D的金属遮光性能来弥补所述黑色矩阵63由于开设过孔V而存在的漏光风险。
综上所述,本发明的TFT基板的制作方法,在第二钝化层上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物、次光阻间隔物与黑色矩阵之后,再在所述一体式的主光阻间隔物、次光阻间隔物及黑色矩阵上沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极与公共电极,由于一体式的主光阻间隔物、次光阻间隔物与黑色矩阵填充、覆盖了黑色矩阵所在区域内的色阻被挖开的空间,使得像素电极与公共电极形成在较平坦的黑色矩阵上,能够避免由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极与公共电极短路。本发明的TFT基板结构,在所述第二钝化层上设置一体式的主光阻间隔物、次光阻间隔物与黑色矩阵,在所述黑色矩阵上设置像素电极与公共电极,由于一体式的主光阻间隔物、次光阻间隔物与黑色矩阵填充、覆盖了黑色矩阵所在区域内的色阻被挖开的空间,像素电极与公共电极位于较平坦的黑色矩阵上,能够避免在制程过程中由于色阻边缘斜坡过陡导致的导电薄膜蚀刻残留的问题,防止像素电极与公共电极短路。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明的权利要求的保护范围。
Claims (10)
1.一种TFT基板的制作方法,其特征在于,包括以下步骤:
步骤S1、提供衬底基板(1),在所述衬底基板(1)上制作出呈阵列式排布的TFT(T),然后沉积一层覆盖所有TFT(T)的第一钝化层(PV1);
步骤S2、在所述第一钝化层(PV1)上沉积彩色色阻并进行图案化处理,形成色阻层(41)、第一色阻块(42)与第二色阻块(43),且第一色阻块(42)的高度(h1)大于第二色阻块(43)的高度(h2);
步骤S3、在所述第一钝化层(PV1)、色阻层(41)、第一色阻块(42)与第二色阻块(43)上沉积覆盖第二钝化层(PV2);
步骤S4、在所述第二钝化层(PV2)上沉积覆盖黑色光阻并进行图案化处理,形成一体式的主光阻间隔物(61)、次光阻间隔物(62)与黑色矩阵(63),以及一贯穿所述黑色矩阵(63)、第二钝化层(PV2)与第一钝化层(PV1)的过孔(V);其中,所述主光阻间隔物(61)对应位于第一色阻块(42)上方,所述次光阻间隔物(62)对应位于第二色阻块(43)上方;所述过孔(V)被TFT(T)的漏极(D)完全遮挡;
步骤S5、在所述一体式的主光阻间隔物(61)、次光阻间隔物(62)及黑色矩阵(63)上沉积覆盖透明导电薄膜并进行图案化处理,形成像素电极(71)与公共电极(72),所述像素电极(71)经由所述过孔(V)连接TFT(T)的漏极(D)。
2.如权利要求1所述的TFT基板的制作方法,其特征在于,所述步骤S2使用狭缝衍射型光罩对彩色色阻进行图案化处理。
3.如权利要求1所述的TFT基板的制作方法,其特征在于,所述步骤S2沉积的彩色色阻包括红色色阻(R)、绿色色阻(G)与蓝色色阻(B)。
4.如权利要求1所述的TFT基板的制作方法,其特征在于,所述透明导电薄膜的材料为氧化铟锡。
5.如权利要求1所述的TFT基板的制作方法,其特征在于,所述第一钝化层(PV1)与第二钝化层(PV2)的材料均为氮化硅、氧化硅或二者的组合。
6.如权利要求1所述的TFT基板的制作方法,其特征在于,所述第一色阻块(42)与第二色阻块(43)均呈岛状。
7.一种TFT基板结构,其特征在于,包括:
衬底基板(1);
设在所述衬底基板(1)上呈阵列式排布的TFT(T);
覆盖所有TFT(T)的第一钝化层(PV1);
设在所述第一钝化层(PV1)上的色阻层(41)、第一色阻块(42)与第二色阻块(43),其中,第一色阻块(42)的高度(h1)大于第二色阻块(43)的高度(h2);
覆盖所述第一钝化层(PV1)、色阻层(41)、第一色阻块(42)与第二色阻块(43)的第二钝化层(PV2);
设在所述第二钝化层(PV2)上的一体式的主光阻间隔物(61)、次光阻间隔物(62)与黑色矩阵(63),其中,所述主光阻间隔物(61)对应位于第一色阻块(42)上方,所述次光阻间隔物(62)对应位于第二色阻块(43)上方;
以及设在所述黑色矩阵(63)上的像素电极(71)与公共电极(72),所述像素电极(71)经由贯穿所述黑色矩阵(63)、第二钝化层(PV2)与第一钝化层(PV1)的过孔(V)连接TFT(T)的漏极(D);
所述过孔(V)被TFT(T)的漏极(D)完全遮挡。
8.如权利要求7所述的TFT基板结构,其特征在于,所述色阻层(41)包括红色色阻(R)、绿色色阻(G)与蓝色色阻(B);所述第一色阻块(42)与第二色阻块(43)均呈岛状。
9.如权利要求7所述的TFT基板结构,其特征在于,所述像素电极(71)与公共电极(72)的材料为氧化铟锡。
10.如权利要求7所述的TFT基板结构,其特征在于,所述第一钝化层(PV1)与第二钝化层(PV2)的材料均为氮化硅、氧化硅或二者的组合。
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EP17927583.9A EP3690927B1 (en) | 2017-09-28 | 2017-11-20 | Manufacturing method of tft array substrate and structure of tft array substrate |
US15/578,339 US10503034B2 (en) | 2017-09-28 | 2017-11-20 | Manufacturing method of a TFT substrate and structure |
KR1020207011836A KR102299630B1 (ko) | 2017-09-28 | 2017-11-20 | Tft 기판의 제조 방법 및 그 구조 |
PCT/CN2017/111963 WO2019061751A1 (zh) | 2017-09-28 | 2017-11-20 | Tft基板的制作方法及其结构 |
PL17927583.9T PL3690927T3 (pl) | 2017-09-28 | 2017-11-20 | Sposób wytwarzania podłoża matryc TFT oraz konstrukcja podłoża matryc TFT |
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