WO2013159520A1 - Substrat de matrice de transistor à couche mince, son procédé de fabrication et affichage à cristaux liquides - Google Patents

Substrat de matrice de transistor à couche mince, son procédé de fabrication et affichage à cristaux liquides Download PDF

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Publication number
WO2013159520A1
WO2013159520A1 PCT/CN2012/085487 CN2012085487W WO2013159520A1 WO 2013159520 A1 WO2013159520 A1 WO 2013159520A1 CN 2012085487 W CN2012085487 W CN 2012085487W WO 2013159520 A1 WO2013159520 A1 WO 2013159520A1
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WIPO (PCT)
Prior art keywords
layer
primary color
color filter
array substrate
pixel electrode
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PCT/CN2012/085487
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English (en)
Chinese (zh)
Inventor
孔祥春
曹占峰
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京东方科技集团股份有限公司
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Publication of WO2013159520A1 publication Critical patent/WO2013159520A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate

Definitions

  • Thin film transistor array substrate manufacturing method thereof and liquid crystal display
  • Embodiments of the present invention relate to a thin film transistor (TFT) array substrate, a method of fabricating the same, and a liquid crystal display. Background technique
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the structure of the TFT-LCD is composed of an array substrate, a color filter substrate, and a liquid crystal layer filled between the two substrates.
  • the array substrate and the color filter substrate are formed on different glass substrates, respectively.
  • the array substrate includes gate lines, data lines, thin film transistors, and pixel electrodes, and the fabrication of the array substrate is generally performed using a four-time patterning process.
  • the color film substrate comprises a black matrix, a color photoresist, a protective layer and a transparent conductive layer, and four patterning processes are also required to complete the fabrication of the color filter substrate.
  • the patterning process generally includes the processes of coating, masking, exposing, developing, and stripping of the photoresist, and each masking process requires the use of a mask, which is expensive. Therefore, the fabrication of the structure of the TFT-LCD requires a total of at least eight patterning processes, more manufacturing steps, and higher production costs. Summary of the invention
  • a TFT array substrate including: a substrate; a gate, a gate line, and a light-shielding strip formed on the substrate; a gate insulating layer sequentially formed on the gate, a semiconductor active layer, a phase-separated source and drain, and a channel structure, the gate insulating layer is in contact with the semiconductor active layer; a passivation layer formed over the source and the drain; a pixel electrode formed over the gate insulating layer, the pixel electrode being electrically connected to the drain; and at least one primary color filter layer positioned above the pixel electrode.
  • a liquid crystal display comprising the above-described TFT array substrate is provided.
  • a method of fabricating a TFT array substrate for Manufacturing the above TFT array substrate, the method comprising: depositing a metal layer on the substrate, forming a gate, a gate line, and a light shielding strip by performing a first patterning process; at the gate, the gate line, and the light shielding strip Depositing a gate insulating layer, a semiconductor active layer, and a source/drain metal layer in sequence, forming a data line, a phase separated source and drain, and a channel structure by performing a second patterning process; depositing passivation on the substrate a layer, exposing the drain by performing a third patterning process; depositing a transparent conductive film layer on the passivation layer, forming a pixel electrode by performing a patterning process, and at least one primary color filter on the pixel electrode a layer, wherein the pixel electrode is electrically connected to the drain.
  • FIG. 1 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a first patterning process
  • FIG. 2 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a second patterning process
  • FIG. 3 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process;
  • FIG. 4 is a schematic structural view of a method for fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process;
  • FIG. 5 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a fourth patterning process
  • FIG. 6 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a sixth patterning process. detailed description
  • Embodiments of the present invention provide a TFT array substrate and a method of fabricating the same, which are capable of reducing manufacturing steps of a TFT liquid crystal display and reducing production costs. Embodiments of the present invention also provide a liquid crystal display including the above TFT array substrate.
  • the manufacturing method of the TFT array substrate provided by the embodiment of the present invention includes the following steps S101 to S104, for example.
  • FIG. 1 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a first patterning process.
  • a metal layer having a thickness of 500 ⁇ to 5000 ⁇ is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation.
  • the material of the metal layer may be formed using a metal or an alloy such as tungsten, titanium, molybdenum, aluminum, tantalum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium or copper, or several materials mentioned above may be used.
  • a metal or an alloy such as tungsten, titanium, molybdenum, aluminum, tantalum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium or copper, or several materials mentioned above may be used.
  • the combination is formed; the substrate 201 can be formed of glass, quartz or other non-metallic light guiding material.
  • a gate electrode 202, a gate line (not shown in FIG. 1), a common electrode 203, and a light-shielding strip (not shown in FIG. 1) are formed on the substrate 201 by a first patterning process, and a data signal line is also formed (not shown in FIG. Mark).
  • the light-shielding strip is disposed in the peripheral region of the pixel electrode and is disposed in the same layer as the gate electrode 202 to block the edge of the pixel electrode to prevent light leakage. Further, in some embodiments of the present invention, when the light shielding strip is connected to the common electrode, the light shielding strip can also function as a bottom electrode of the storage capacitor.
  • FIG. 2 is a schematic structural view of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a second patterning process.
  • a film having a thickness of 1000 A to 7000 A is deposited as a gate insulating layer 204 on a substrate 201 by a method such as plasma enhanced chemical vapor deposition (PECVD), and the gate insulating layer 204 covers the gate electrode 202 and the gate line. , the common electrode 203 and the light shielding strip.
  • PECVD plasma enhanced chemical vapor deposition
  • the gate insulating layer 204 may be formed using an oxide, a nitride or an oxynitride.
  • a semiconductor active layer 205 having a thickness of 1000 A to 7000 A and an ohmic contact layer 208 having a thickness of 500 A to 6000 A may be sequentially deposited on the substrate 201 on which the gate insulating layer 204 is formed by a chemical deposition method.
  • the film thickness of the ohmic contact layer 208 may be appropriately increased in the case where the TFT structure to be formed allows.
  • a source-drain metal layer having a thickness of 500 A to 5000 A is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation, and the source/drain metal layer may be made of chromium, tungsten, titanium, tantalum, molybdenum, aluminum.
  • a metal such as copper or an alloy thereof.
  • the gate insulating layer 204 can be oxide, nitride or oxynitride is formed, corresponding to the reaction gas may be Si3 ⁇ 4, N3 ⁇ 4, N 2 or a mixed gas of SiH 2 Cl 2, N3 ⁇ 4, N 2
  • the semiconductor active layer 205 may be an amorphous silicon film, and the corresponding reaction gas may be a mixed gas of Si 3 ⁇ 4, N 2 or a mixed gas of Si 3 ⁇ 4, Cl 2 , N 2 , but embodiments of the present invention are not limited thereto. .
  • a photoresist layer is coated on the substrate 201 on which the gate insulating layer 204, the semiconductor active layer 205, the ohmic contact layer 208, and the source/drain metal layer are deposited, and the photolithography is performed by using a halftone or gray mask with slits.
  • the glue layer is exposed to form a fully exposed area, a partially exposed area, and a non-exposed area, and the fully exposed area corresponds to a region other than the TFT area in the pixel area, and the partially exposed area corresponds to the channel area (not shown in FIG. 2)
  • the non-exposed areas correspond to other areas, that is, areas corresponding to the data lines (not shown in FIG. 2), the source 206, and the drain 207.
  • the source/drain metal layer, the ohmic contact layer 208, and the semiconductor active layer 205 of the fully exposed region are etched away by an etching process to form a data line (not shown in FIG. 2); and then, through an ashing process, The photoresist in the partially exposed region is removed to expose the source/drain metal layer of the channel region; and the source/drain metal layer, the ohmic contact layer 208 and the portion of the semiconductor active layer 205 of the partially exposed region are etched away by an etching process.
  • the photoresist is stripped to form the structure shown in FIG.
  • the purpose of performing the third patterning process is to expose the drain such that the pixel electrode formed later is electrically connected to the drain.
  • the drain can be exposed, for example, pixels can be The partial passivation layers of the regions other than the TFT region in the region are all etched away, and via holes may also be formed in the passivation layer, and embodiments of the present invention are not limited thereto.
  • FIG. 3 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a third patterning process.
  • a film having a thickness of 1000 A to 7000 A is deposited as a gate passivation layer 209 on the substrate 201 subjected to the above treatment by, for example, plasma enhanced chemical vapor deposition (PECVD);
  • PECVD plasma enhanced chemical vapor deposition
  • the photoresist layer is coated and exposed by a common mask, and then a part of the passivation layer 209 in the pixel region except the TFT region is completely etched after the development and etching process.
  • the portion of the drain 207 is exposed and exposed; finally, the photoresist is stripped to complete the third patterning process.
  • the passivation layer 209 can be oxide, nitride or oxynitride is formed, corresponding to the reaction gas may be N3 ⁇ 4, N mixed Si3 ⁇ 4, N3 ⁇ 4, N 2 or a mixed gas Si3 ⁇ 4Cl 2, 2 of gas.
  • the film thickness of the gate insulating layer 204 can be appropriately adjusted to ensure a reasonable height difference between the device region and the pixel region, thereby reducing the influence of the common electrode line on the height.
  • FIG. 4 is a schematic structural view of a method for fabricating a TFT array substrate according to an embodiment of the present invention, after performing a third patterning process, the steps before development and etching shown in FIG. 4 and the third composition shown in FIG. The corresponding steps in the process are the same, but during development and etching, a portion of the passivation layer 209 over the drain 207 may be etched away to form vias in the passivation layer 209 through which vias may be implemented. The electrical connection between the pixel electrode and the drain 207 is then formed.
  • a pixel electrode is formed while forming at least one primary color filter layer on the pixel electrode, and the mask is reduced in the manufacturing process of the TFT-LCD compared to the prior art.
  • the number of stencils thus reduces the manufacturing steps of the TFT-LCD and reduces the production cost.
  • step S104 may further include the following steps:
  • a primary color photoresist layer depositing a primary color photoresist layer on the transparent conductive film layer, the primary color may be red, green or blue, or may be other colors required by the designer; 51042, exposing the photoresist layer through a halftone or gray tone mask to form a non-exposed area, a partial exposure area, and a full exposure area, wherein the non-exposure area corresponds to a primary color filter layer on the transparent conductive film layer a preset position, the partial exposure area corresponds to a preset position on the transparent conductive film layer having a non-primary color filter layer, and the full exposure area corresponds to a region other than the partially exposed area and the non-exposed area, that is, the TFT area;
  • the photoresist located in the partially exposed region is subjected to ashing treatment to retain the primary color photoresist located in the non-exposed region.
  • FIG. 5 is a schematic structural diagram of a method of fabricating a TFT array substrate according to an embodiment of the present invention after performing a fourth patterning process.
  • a transparent conductive film layer having a thickness of 100A to 1000A is deposited on the substrate 201 by, for example, magnetron sputtering or thermal evaporation, and the transparent conductive film layer can be
  • indium tin oxide, indium oxide or aluminum oxide can also be used with other metals or metal oxides.
  • a red photoresist film is coated on the transparent conductive film layer, and the red color is applied in the fourth patterning process when a part of the passivation layer 209 in the other region except the TFT region is etched away in the third patterning process.
  • the thickness of the photoresist is greater in the pixel region than the portion of the TFT region (having the passivation layer 209).
  • the exposure is performed by using a halftone or gray tone mask having slits to form a non-exposed area, a partially exposed area, and a fully exposed area, wherein the non-exposed area corresponds to a red filter layer on the transparent conductive film layer.
  • the preset position, the partial exposure area corresponds to a preset position on the transparent conductive film layer having a non-red filter layer
  • the full exposure area corresponds to a region other than the partially exposed area and the non-exposed area, that is, the TFT area.
  • the photoresist located in the partially exposed region is subjected to ashing treatment, and the photoresist in the non-exposed region is also subjected to ashing treatment.
  • the photoresist in the partially exposed region is completely removed, and the thickness of the photoresist in the non-exposed region is reduced, and the red photoresist remaining on the pixel electrode 210 is not peeled off to form a red filter.
  • Layer 211 is
  • the photoresist above the pixel electrode does not need to be stripped.
  • the processing shortens the production cycle.
  • the photoresist is dyed beforehand, and can be used as a part of the color film for color grading, which increases the utilization rate of the material and reduces the cost.
  • the filter layer can be continuously formed on the TFT array substrate with the primary color photoresist.
  • the green and blue photoresists are exemplified, but the embodiment of the present invention is not limited thereto.
  • a green photoresist layer is deposited on the substrate, and a green filter layer is formed by performing exposure, development, and baking processes of a fifth patterning process; then, blue light is deposited on the substrate.
  • the glue layer is formed, and a blue filter layer is formed by performing exposure, development, and baking treatment of the sixth patterning process.
  • the fifth and sixth patterning processes of the green photoresist layer and the blue photoresist layer are substantially the same as or similar to those of the prior art color film process, and thus will not be described herein.
  • a red filter layer 211, a green filter layer 212, and a blue filter layer 213 are formed on the pixel electrode 210, and the three can be used as color film members.
  • the coloring of light its effect is substantially the same as or similar to that of the filter layer on the color filter substrate.
  • step S104 may further include the following steps:
  • first primary color filter layer is located on the transparent conductive film layer and has a first primary color filter layer Preset position
  • red, green, and blue primary color photoresists will be described as an example.
  • a red photoresist layer is deposited on the transparent conductive film layer, and a red filter layer is formed by exposure, development, and baking treatment.
  • a red photoresist layer is deposited, and the red photoresist layer is exposed by a common mask.
  • the red photoresist layer is formed into a fully exposed area and a non-exposed area, and the non-exposed area corresponds to a preset position having a red filter layer on the transparent conductive film layer, completely exposed
  • the light region corresponds to a region other than the non-exposed region; then, development processing is performed, so that the red photoresist in the completely exposed region is completely removed, and the red photoresist in the non-exposed region is completely retained, and is formed after the baking treatment Red filter layer.
  • the above-mentioned patterning process is substantially the same as or similar to the process of forming the color film in the color filter substrate in the prior art, and thus will not be described in detail herein.
  • a green photoresist layer is deposited on the substrate, and a green filter layer is formed by exposure, development, and baking treatment.
  • the step of forming the green filter layer is the same as the patterning process of the red filter layer except that the photoresist is green, and therefore will not be described herein.
  • a blue photoresist layer is deposited on the substrate, and a blue filter layer is formed by exposure, development, and baking treatment.
  • the step of forming the blue filter layer is the same as the patterning process of the red filter layer described above except that the photoresist is blue, and therefore will not be described herein.
  • the transparent conductive film layer exposed between the primary color filter layers is etched to form a pixel electrode.
  • a primary color filter layer is formed after performing steps S1045 to S1048, and the primary color filter layer may include a red filter layer 211, a green filter layer 212, and a blue filter layer 213.
  • the red filter layer 211, the green filter layer 212, and the blue filter layer 213 formed on the pixel electrode 210 can be used as a color filter member for color grading.
  • the effect is substantially the same as or similar to the effect of the filter layer on the color filter substrate.
  • a plurality of primary color filter layers may be formed on the pixel electrode of the TFT array substrate by using the method provided by the embodiment of the present invention, and the primary colors may be determined according to specific conditions. It can be red, green, blue, yellow or other colors that the designer needs.
  • the method for fabricating the TFT array substrate may further include: depositing a light-shielding material on the primary color filter layer, and forming a black matrix by performing a seventh patterning process.
  • the array substrate and the color film substrate are not displaced due to external force, and light leakage can be avoided.
  • the number of patterning processes in the manufacturing method of the TFT-LCD having the three primary colors can be reduced from 8 times to 7 times, thereby reducing the number of manufacturing steps.
  • the manufacturing method of the TFT array substrate provided by the embodiment of the present invention forms a pixel electrode while forming at least one primary color filter layer on the pixel electrode by a patterning process, and the TFT-LCD is reduced compared with the prior art.
  • the number of times the mask is used in the manufacturing process thus reducing
  • the manufacturing steps of the TFT-LCD reduce the production cost.
  • the color type of the primary color filter layer can be adjusted.
  • when a black matrix is formed on the TFT array substrate light leakage can be avoided, and the quality of the displayed image is ensured.
  • the TFT array substrate provided by the embodiment of the present invention includes: a substrate 201; a gate electrode 202 formed on the substrate 201, a gate line (not shown), and a light shielding strip (not shown); a gate insulating layer 204, a semiconductor active layer 205, a phase separated source 206 and a drain 207, and a channel structure (not shown) formed on the electrode 202, and the gate insulating layer 204 is in contact with the semiconductor active layer 205; a passivation layer 209 formed over the source 206 and the drain 207; a pixel electrode 210 formed over the gate insulating layer 204, the pixel electrode 210 is electrically connected to the drain 207; and at least one primary color filter located above the pixel electrode Floor.
  • an ohmic contact layer 208 may also be disposed on the TFT array substrate, and the semiconductor active layer 205 may be in contact with the ohmic contact layer 208; further, the ohmic contact layer 208 and the source 206 and the drain, respectively. 207 is in contact with the channel structure.
  • a common electrode 203 may be disposed on the TFT array substrate, and the pixel electrode 210 is disposed above the common electrode 203 with a gate insulating layer 204 disposed therebetween.
  • the primary color filter layer comprises a primary color photoresist.
  • the primary color filter layer may include a red filter layer 211, a green filter layer 212, a blue filter layer 213, and the like.
  • a black matrix may be formed over the primary color filter layer.
  • the electrical connection structure of the pixel electrode 210 and the drain electrode 207 can be realized by completely etching away part of the passivation layer 209 except for other regions of the TFT region, or by forming a via hole in the passivation layer 209. And realized.
  • the primary color filter layer is formed on the pixel electrode, which reduces the manufacturing steps of the TFT-LCD and reduces the production cost.
  • the type of the primary color filter layer can be adjusted.
  • light leakage can be avoided, and the quality of the displayed image is ensured.
  • An embodiment of the present invention further provides a liquid crystal display, which includes any of the embodiments provided by the embodiments of the present invention.
  • a TFT array substrate is provided.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Thin Film Transistor (AREA)

Abstract

L'invention concerne un substrat de matrice de transistor à couche mince (TFT), son procédé de fabrication et un affichage à cristaux liquides. Le substrat de matrice de TFT (201) comprend un substrat (201) ; une électrode de grille (202), une ligne de grille et une barre d'obturateur étant formées sur le substrat (201) ; une couche isolante de grille (204), une couche active semi-conductrice (205), une électrode de source (206) et une électrode de drain (207) qui sont séparées, et une structure de tranchée étant formées sur l'électrode de grille (202) dans cet ordre, et la couche isolante de grille (204) entrant en contact avec la couche active semi-conductrice (205) ; une couche de passivation (209) qui est formée au-dessus de l'électrode de source (206) et de l'électrode de drain (207) ; une électrode de pixel (210) qui est formée au-dessus de la couche isolante de grille (204), l'électrode de pixel (210) étant électriquement connectée à l'électrode de drain (207) ; et au moins une couche de filtre de couleurs primaires (211, 212, 213) située au-dessus de l'électrode de pixel (210).
PCT/CN2012/085487 2012-04-24 2012-11-28 Substrat de matrice de transistor à couche mince, son procédé de fabrication et affichage à cristaux liquides WO2013159520A1 (fr)

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CN102683341B (zh) * 2012-04-24 2014-10-15 京东方科技集团股份有限公司 一种tft阵列基板及其制造方法和液晶显示器
CN102931138B (zh) * 2012-11-05 2015-04-01 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
CN103107140B (zh) * 2013-01-28 2016-01-13 京东方科技集团股份有限公司 一种薄膜晶体管阵列基板及其制作方法
CN103337477B (zh) * 2013-05-27 2015-06-03 北京京东方光电科技有限公司 阵列基板的制备方法及阵列基板和显示装置
CN103887235B (zh) * 2014-03-10 2016-06-29 京东方科技集团股份有限公司 一种阵列基板及其制造方法、显示装置
CN111128878B (zh) * 2019-12-25 2022-07-12 Tcl华星光电技术有限公司 薄膜晶体管的图案制作方法、薄膜晶体管以及光罩

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CN102683341A (zh) * 2012-04-24 2012-09-19 京东方科技集团股份有限公司 一种tft阵列基板及其制造方法和液晶显示器

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CN1677209A (zh) * 2004-04-01 2005-10-05 Lg.菲利浦Lcd株式会社 液晶显示器件及其制造方法
CN1991555A (zh) * 2005-12-28 2007-07-04 三星电子株式会社 显示基板、其制造方法以及包括其的显示面板
CN101726947A (zh) * 2008-10-10 2010-06-09 乐金显示有限公司 用于液晶显示器件的阵列基板、其制造方法、以及具有其的液晶显示器件
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