WO2020134994A1 - 显示装置及其阵列基板制作方法和计算机可读存储介质 - Google Patents

显示装置及其阵列基板制作方法和计算机可读存储介质 Download PDF

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Publication number
WO2020134994A1
WO2020134994A1 PCT/CN2019/123954 CN2019123954W WO2020134994A1 WO 2020134994 A1 WO2020134994 A1 WO 2020134994A1 CN 2019123954 W CN2019123954 W CN 2019123954W WO 2020134994 A1 WO2020134994 A1 WO 2020134994A1
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Prior art keywords
layer
color resist
spacer
substrate
display device
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PCT/CN2019/123954
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English (en)
French (fr)
Inventor
单剑锋
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惠科股份有限公司
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Publication of WO2020134994A1 publication Critical patent/WO2020134994A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells

Definitions

  • the present application relates to the technical field of liquid crystal display, and in particular to a display device, a method for manufacturing its array substrate, and a computer-readable storage medium.
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display (thin film transistor liquid crystal display) type display equipment.
  • a color film is made on a TFT substrate to form a COA structure, that is, CF (color filter, color filter) on A structure of Array.
  • CF color filter, color filter
  • the structure of making CF on TFT is made on TFT according to the process of CF. It is completely borrowed and transferred to use.
  • BPS black photo Spacer (spacer)
  • it is made on the color resist layer to form a black spacer structure.
  • stage difference When forming the display device stage difference, if only relying on the photoresist itself or the gray-scale mask/half-mask mask design to make different stage differences, either the stage difference is too small, or the uniformity of the stage difference is not good, resulting in the formation of TFT-LCD production The size of the step difference is different, and the uniformity is poor, resulting in poor display effect of the liquid crystal panel.
  • An aspect of the present application provides a method for manufacturing an array substrate of a display device.
  • the method for manufacturing an array substrate of the display device includes the following steps:
  • a spacer color resist layer is coated on the color resist layer, and the spacer color resist layer is patterned with the patterning parameters to form a spacer layer, wherein the spacer layer includes a main spacer region having a height difference and In the auxiliary septum area, the height of the main septum area spacer is greater than the height of the auxiliary septum area spacer.
  • Another aspect of the present application also provides a display device including: a memory, a processor, and a computer program stored on the memory and executable on the processor, the computer program being processed by the computer program When the device is executed, the steps of the method described above are realized.
  • the present application also provides a computer-readable storage medium on which an array substrate manufacturing program for a display device is stored, and when the array substrate manufacturing program for the display device is executed by a processor, the display as described above is realized Method for manufacturing array substrate of device.
  • different patterning parameters for forming a black spacer layer are determined by different information on the number of color resist layers formed on the active switching layer of the substrate.
  • the spacer coating is completed according to the determined patterning parameters.
  • the number of the barrier layers is different, and the uniformity of the spacer layer at different positions is increased to avoid the unevenness of the gap between the TFT and the LCD, thereby improving the display uniformity and display effect of the display device.
  • FIG. 1 is a schematic structural diagram of a display device of a hardware operating environment according to an embodiment of the present application
  • FIG. 2 is a schematic flowchart of an embodiment of a method for manufacturing an array substrate of a display device of the present application
  • FIG. 3 is a schematic flow chart of manufacturing a thin film transistor in an embodiment of the present application.
  • FIG. 4 is a schematic flow chart of manufacturing a thin film transistor in another embodiment of this application.
  • FIG. 5 is a schematic diagram of an architecture conversion of a spacer made in an embodiment of this application.
  • FIG. 6 is a schematic diagram of an architecture conversion of a spacer made in another embodiment of this application.
  • FIG. 7 is a schematic diagram of an architecture conversion of a spacer in another embodiment of the present application.
  • the main solutions of the embodiments of the present application are: providing a substrate; fabricating an active switch layer above the substrate; fabricating a color resist layer above the fabricating the active switch layer; determining the number of color resist layers in the corresponding region of the spacer layer Determine the patterning parameters of the light-shielding layer based on the number of color resist layers; apply a spacer color resist layer on top of the color resist layer, pattern the spacer color resist layer with the patterning parameters to form a spacer layer; , Wherein the spacer layer includes a primary spacer area and a secondary spacer area having a height difference, and the height of the primary spacer area spacer is greater than the height of the secondary spacer area spacer.
  • stage difference of the display device Due to the current stage difference of the display device, if only the photoresist itself or the gray scale mask/half-mask mask design is used to make different stage differences, either the stage difference is too small or the uniformity of the stage difference is not good, resulting in the production of TFT-LCD
  • the formed step sizes vary in size and the uniformity is poor, resulting in the problem of poor display effect of the liquid crystal panel.
  • the present application provides a solution to determine different patterning parameters for forming a spacer layer by different information on the number of color resist layers formed on the active switching layer of the substrate, and to complete the coating of the spacer according to the determined patterning parameters
  • the cloth will be made according to the number of color resist layers, so that the uniformity of the spacer layer at different positions is increased to avoid the unevenness of the gap between the TFT and the LCD, thereby improving the display uniformity of the display device and display effect.
  • FIG. 1 is a schematic structural diagram of a display device of a hardware operating environment according to an embodiment of the present application.
  • the display device may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, and a communication bus 1002.
  • the communication bus 1002 is used to implement connection communication between these components.
  • the user interface 1003 may include a display screen (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 1003 may further include a standard wired interface and a wireless interface.
  • the network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a WI-FI interface).
  • the memory 1005 may be an SRAM memory or a stable memory (non-volatile memory), such as disk storage.
  • the memory 1005 may optionally be a storage device independent of the foregoing processor 1001.
  • the display device may also include a camera, RF (Radio Frequency (radio frequency) circuits, sensors, audio circuits, WiFi modules, etc.
  • RF Radio Frequency (radio frequency) circuits
  • terminal structure shown in FIG. 1 does not constitute a limitation on the display device, and may include more or less components than those illustrated, or combine certain components, or have different component arrangements.
  • the memory 1005 as a computer-readable storage medium may include an operating system, a network communication module, a user interface module, and an array substrate manufacturing application program of a display device.
  • the network interface 1004 is mainly used to connect to the background server and perform data communication with the background server;
  • the user interface 1003 is mainly used to connect to the client (user side) and perform data communication with the client;
  • the device 1001 can be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
  • a spacer color resist layer is coated on the color resist layer, and the spacer color resist layer is patterned with the patterning parameters to form a spacer layer, wherein the spacer layer includes a main spacer region having a height difference and In the auxiliary septum area, the height of the main septum area spacer is greater than the height of the auxiliary septum area spacer.
  • processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
  • the transmittance of the mask plate corresponding to different light-shielding areas is determined according to the information of the number of color resist layers, and the transmittance of different light-shielding areas is different, and the transmittance is a patterning parameter for making the light-shielding layer.
  • the step of forming a color resist layer above the active switch layer includes:
  • At least one color resist layer remains in the shading area, and the color resist layer is a red color resist layer, a blue color resist layer, or a green color resist layer.
  • processor 1001 may be used to call an array substrate manufacturing application of the display device stored in the memory 1005, and perform the following operations:
  • a through hole is formed in the protective layer, and a pixel electrode layer is formed on the protective layer in a patterned manner.
  • the pixel electrode layer is partially formed in the through hole and is in contact with the drain metal layer directly below.
  • the processor 1001 may be used to call the memory 1005 Create an application program for the array substrate of the display device stored in and perform the following operations:
  • a pixel electrode is formed in a patterned manner, the pixel electrode is not formed on the protective layer, and the pixel electrode is directly connected to the drain metal layer.
  • the processor 1001 may be used to call an array substrate manufacturing application program of the display device stored in the memory 1005, and perform the following operations: when manufacturing the color resist layer on the substrate, the color resist in the pixel area and the color resist A first color resist pad high layer formed by stacking at least one layer of color resist in the pixel area; the spacer above the first color resist pad high layer is in contact with the counter substrate of the array substrate.
  • the processor 1001 may be used to call an array substrate manufacturing application program of the display device stored in the memory 1005, and perform the following operations: when manufacturing the color resist layer on the substrate, a second color resist located in a non-pixel area is also included A high-level pad, and the spacer above the high-level second color resist pad is spaced toward the opposite substrate of the array substrate.
  • an embodiment of the present application provides a method for manufacturing an array substrate of a display device.
  • the method for manufacturing an array substrate of the display device includes:
  • Step S10 providing a substrate
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display, thin-film transistor liquid crystal display
  • a substrate is provided, the substrate is a glass substrate, and the provided substrate is a cleaned substrate.
  • Step S20 an active switch layer is fabricated on the substrate; the active switch layer may be a thin film transistor, or may be other switch components that can control the liquid crystal display.
  • the flow of the thin film transistor includes:
  • Step S21 a gate, a gate insulating layer, an active layer, a source/drain metal layer and a protective layer of the thin film transistor are sequentially formed on the substrate;
  • Step S22 a through hole is formed in the protective layer, and a pixel electrode layer is formed on the protective layer in a patterned manner, and the pixel electrode layer is partially formed in the through hole and is in contact with the drain metal layer directly below .
  • a protective layer is formed on
  • CVD Chemical Vapor Deposition
  • CVD passivation coating photoresist coating/exposure/development, passivation etching, photoresist removal.
  • dry etching is performed to dig a contact hole in the protective layer to form a protective layer pattern.
  • an insulating layer, a semiconductor layer, a doped silicon layer and a second metal layer are deposited on the substrate.
  • the semiconductor layer is selected from polysilicon or amorphous silicon materials, and is set according to the manufacturing process and display requirements.
  • a second photomask etching manufacturing process is performed to define a semiconductor layer, a doped silicon layer and the second metal layer pattern to form a thin film transistor island structure.
  • a third photomask etching manufacturing process is performed to form a signal line, source and drain metal layers in the second metal layer and the doped silicon layer to complete the fabrication of the TFT thin film transistor.
  • a protective layer is formed on the substrate and covers the surface of the TFT thin film transistor and the signal line.
  • the dry etching of the protective layer is performed to form the source contact hole, the drain contact hole and the signal line contact hole, so that when the pixel electrode is fabricated, the pixel electrode fills the contact hole, and the pixel electrode is connected to the drain electrode through the contact hole;
  • a pixel electrode is formed in a patterned manner, the pixel electrode is not formed on the protective layer, and the pixel electrode is directly connected to the drain metal layer.
  • step S23 after forming a protective layer, a pixel electrode is formed by patterning, the pixel electrode is not formed in On the protective layer, and the pixel electrode is directly connected to the drain metal layer. That is, after the protective layer is applied, a dry etching operation is not performed, a contact hole is not formed, and a fourth illumination and etching manufacturing process is performed to define the pattern of the pixel electrode so that the pixel electrode is formed on the gate insulating layer Instead of forming on the protective layer.
  • ITO indium tin oxide
  • photoresist is fully deposited on the substrate, after the fourth photomask and etching manufacturing process (development), ITO wet etching, photoresist removal, ITO OVEN (baking) forms an ITO pixel electrode on the gate layer, but not on the protective layer.
  • the ITO pixel electrode is directly connected to the drain metal layer Drain electrode, and the two are connected without a contact hole. Steps S22 and S23 are optional, and only one of the coating processes is completed.
  • Step S30 forming a color resist layer above the active switch layer
  • a color resist layer is formed above the pixel electrode layer.
  • the color resist layer is a red color resist layer, a green color resist layer and a blue color resist layer, and three color resists
  • the thickness of the layers is different.
  • the order of the manufacturing process can be random and unlimited. Generally, the red color resist layer is completed first, then the green color resist layer is completed, and finally the blue color resist layer is manufactured. The production process is completed in a patterned manner.
  • the color resist layer in addition to the color resist layer in the transparent area of the pixel, the color resist layer is also retained in the non-transparent area, and the color resist layer remaining in the non-transparent area is at least one layer of color resist, for example, It may be that only the red color resist layer is retained, or that both the red and green color resist layers are retained.
  • the portion where the color resist layer is retained corresponds to the position where the main spacer is provided, rather than the position where the auxiliary spacer is provided.
  • Step S40 determining the information of the number of color resist layers in the corresponding region of the spacer layer; determining the patterning parameters of the shading layer according to the information of the number of color resist layers;
  • the production of the spacer layer is completed, and the patterning parameters of the production of the spacer need to be based on the information of the number of color resist layers retained in the non-light-transmitting area (shading area, corresponding to the display area) before It is determined that the non-light-transmissive area is the corresponding area of the spacer layer, and the information of the number of color resist layers in the corresponding area of the spacer layer is determined; based on the information of the number of color resist layers, the patterning parameters of the shading layer are determined, for example, the color resist layer Different, the transmittance is different in different non-transparent areas.
  • the transmittance of the mask plate corresponding to different light-shielding areas is determined according to the information of the number of color resist layers.
  • the transmittances of different light-shielding areas are different.
  • the transmittance is a patterning parameter of the light-shielding layer. It is the transmittance set by the mask, the transmittance is different, the light transmittance is different, the thickness of the color resist layer formed is different and/or the photoresist layer will be left in some places, and the color resist will not be left in some places.
  • the information of the number of color resist layers is different.
  • the transmittance of the mask is determined to be T1>T2 (the transmittance of the mask in different areas is T1 and T2)
  • T1 and T2 This different area T1 is the area corresponding to the spacer, and T2 is the area outside the area corresponding to the spacer
  • Step S50 a spacer color resist layer is coated on the color resist layer, and the spacer color resist layer is patterned with the patterning parameters to form a spacer layer, wherein the spacer layer includes a main spacer having a height difference In the pad area and the auxiliary pad area, the height of the main pad area spacer is greater than the height of the auxiliary pad area spacer.
  • a spacer color resist layer is coated on the color resist layer, that is, a photosensitive material is coated, and the photosensitive material is irradiated with the light of the patterning parameter determined in the above step S40, and the photosensitive material layer is irradiated through the mask plate to form a space An object layer, wherein the spacer layer includes a main spacer region and an auxiliary spacer region having a height difference, and the height of the main spacer region spacer is greater than the height of the auxiliary spacer region spacer.
  • the main spacer area is formed on the color resist layer, and the auxiliary spacer area is formed on the non-light-transmitting area that does not cover the color resist layer.
  • the color resist layer of the spacer may be black, or may be a light-blocking photoresist material of other colors.
  • the color resist in the pixel area and the at least one layer of color resist in the non-pixel area are formed.
  • the first color resist pad high layer; the black spacer above the first color resist pad high layer is in contact with the counter substrate of the array substrate.
  • a second color resist pad upper layer located in the non-pixel area is further included, and a spacer above the second color resist pad upper layer is spaced toward the opposite substrate of the array substrate.
  • different patterning parameters for forming the spacer layer are determined by different information on the number of color resist layers formed on the active switch layer of the substrate.
  • the coating of the spacer is completed according to the determined patterning parameters.
  • the number of the barrier layers is different, and the uniformity of the spacer layer at different positions is increased to avoid the unevenness of the gap between the TFT and the LCD, thereby improving the display uniformity and display effect of the display device.
  • the black spacer is used as an example of the spacer, and the process of manufacturing the black spacer layer includes: in COA (color filter on Array, the color film substrate is fabricated in the array substrate) structure, the R/G/B color layer is formed on the TFT substrate, the color layer order can be arbitrary, then the organic protective layer is made, and then the black spacer layer is made, according to the reserved color layer Situation, with different Mask Design and make black spacers with different steps;
  • step 1 where the R/G/B film thickness is different, at least one color layer remains in the in-plane shading area
  • step 2 when only one color layer is reserved, use half-tone mask (photomask plate), when the photoresist is exposed, the penetration rate of the mask (mask plate) is T1>T2, and the corresponding stroke difference is ⁇ H;
  • Step 2 when two color layers are reserved, they are any two of R/G/B, and the film thickness R ⁇ G ⁇ B of the shading area.
  • half-tone Mask design When making the second color layer, use half-tone Mask design, get black spacers with different steps. Referring to Figure 5, in the shading area, only one layer (left) BPS layer is coated and matched with half-tone mask, its transmissivity T1> T2 (middle); after exposure (right), a step ⁇ Hb is formed, of which 11 is the auxiliary spacer, 12 is the main spacer, and 101 is the blue color resist layer;
  • the recipe (patterning parameter) for the coated photomask plate of the color resist layer and the black spacer layer can be set in advance at the beginning of production line production, without having to be made during the production process Switching, through early switching and detection, improve production efficiency.
  • an embodiment of the present application also provides a display device including a display panel and a timing controller connected to the display panel, an array substrate manufacturing device loaded with a display device in the timing controller, and the display panel
  • the manufacturing process of the array substrate of the display device is completed under the control of the timing controller, and the manufacturing method of the array substrate of the display device stored in the timing controller is completed by the method of manufacturing the array substrate of the display device in the above embodiment.
  • the array substrate manufacturing method of the display device is loaded on the array substrate manufacturing device of the display device.
  • the display device may be a mobile or fixed display device such as a TV, mobile phone, pad (tablet), machine display, and the like.
  • the display device of this embodiment determines different patterning parameters for forming the black spacer layer by different numbers of color resist layers formed on the active switch layer of the substrate, and completes the coating of the spacers according to the determined patterning parameters , Will be made according to the number of color resist layers, so that the uniformity of the spacer layer at different positions is increased, to avoid the unevenness of the spacer resulting in the unevenness of the TFT and LCD segment difference, and improve the display uniformity and display of the display device effect.
  • the display device in this embodiment includes an array substrate; a counter substrate, the counter substrate and the array substrate are disposed oppositely; a liquid crystal layer is filled between the counter substrate and the array substrate, and the array
  • the substrate is produced by the above embodiment.
  • the counter substrate is a color filter substrate, and a pixel electrode is arranged above it, and the pixel electrode of the counter substrate is contacted through the main spacer region spacer, and the auxiliary spacer region spacer is arranged at a distance from the pixel electrode of the counter substrate.
  • the embodiments of the present application also provide a computer-readable storage medium, a computer-readable storage medium, the computer-readable storage medium stores an array substrate manufacturing program of a display device, the array substrate manufacturing program of the display device is When the processor executes, the method for manufacturing the array substrate of the display device as described in the above embodiment is implemented.

Abstract

一种显示装置的阵列基板制作方法、以及显示装置和计算机可读存储介质，显示装置的阵列基板制作方法包括步骤：提供一基板（S10）；在基板上制作主动开关层（S20）；在制作主动开关层上制作色阻层（S30）；确定间隔物层对应区域的色阻层数量信息，根据色阻层数量信息确定制作遮光层的图案化参数（S40）；在色阻层上方涂布间隔物色阻层（101、201、301），以图案化参数图案化间隔物色阻层（101、201、301）形成间隔物层（S50），其中，间隔物层包括具有高度差的主隔垫区和辅隔垫区，主隔垫区间隔物（12、22、32）的高度大于辅隔垫区间隔物（11、21、31）的高度。

Description

显示装置及其阵列基板制作方法和计算机可读存储介质
相关申请
本申请要求于2018年12月25日提交中国专利局、申请号为201811598096.0，发明名称分别为“显示装置的阵列基板制作方法和显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及液晶显示技术领域，尤其涉及显示装置及其阵列基板制作方法和计算机可读存储介质。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术
随着科技水平的不断提高，越来越多带有显示装置的设备进入人们的日常生活和工作当中，例如，电视、手机等。而大部分的显示装置为TFT-LCD（Thin Film Transistor-Liquid Crystal Display，薄膜晶体管液晶显示器）型显示设备。
目前在制作TFT-LCD时，会采用将彩膜制作在TFT基板上，形成COA结构，即，CF（color filter，彩色滤光片） on Array的一种结构。而目前在TFT上制作CF的结构采用的是按照CF的工艺制作在TFT上，完全的借用和转移使用，在制作BPS（black photo Spacer，间隔物）时，采取在色阻层上制作，形成黑色间隔物的结构。而形成显示装置段差的时候，如果仅仅依靠光阻自身或灰阶光罩/半掩膜光罩设计来制作不同段差，要么段差太小，要么段差均匀性不好，导致TFT-LCD的制作形成的段差大小不一，均匀性差，导致液晶面板的显示效果差。
发明内容
本申请一方面提供一种显示装置的阵列基板制作方法，所述显示装置的阵列基板制作方法包括以下步骤：
提供一基板；
在所述基板上制作主动开关层；
在制作所述主动开关层上制作色阻层；
确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；
在所述色阻层上方涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
本申请另一方面还提供一种显示装置，所述显示装置包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述计算机程序被所述处理器执行时实现如上所述的方法的步骤。
本申请还提供一种计算机可读存储介质，所述计算机可读存储介质上存储有显示装置的阵列基板制作程序，所述显示装置的阵列基板制作程序被处理器执行时实现如上所述的显示装置的阵列基板制作方法。
本申请通过形成于基板主动开关层上的色阻层的数量信息不同而确定了不同的形成黑间隔物层的图案化参数，根据确定的图案化参数来完成间隔物的涂布，会根据色阻层的数量不同而制作，使得在不同位置的间隔物层的均匀性增加，避免间隔物不均匀导致TFT与LCD段差不均匀的情况，提高了显示装置的显示均匀性和显示效果。
附图说明
图1为本申请一实施例方案涉及的硬件运行环境的显示装置的结构示意图；
图2为本申请显示装置的阵列基板制作方法的一实施例的流程示意图；
图3为本申请一实施例中制作薄膜晶体管的流程示意图；
图4为本申请另一实施例中制作薄膜晶体管的流程示意图；
图5为本申请一实施例中间隔物制作的架构转换示意图；
图6为本申请另一实施例中间隔物制作的架构转换示意图；
图7为本申请再一实施例中间隔物制作的架构转换示意图。
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
本申请实施例的主要解决方案是：提供一基板；在所述基板上方制作主动开关层；在制作所述主动开关层的上方制作色阻层；确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；在所述色阻层上方涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
由于目前形成显示装置段差的时候，如果仅仅依靠光阻自身或灰阶光罩/半掩膜光罩设计来制作不同段差，要么段差太小，要么段差均匀性不好，导致TFT-LCD的制作形成的段差大小不一，均匀性差，导致液晶面板的显示效果差的问题。本申请提供一种解决方案，通过形成于基板主动开关层上的色阻层的数量信息不同而确定了不同的形成间隔物层的图案化参数，根据确定的图案化参数来完成间隔物的涂布，会根据色阻层的数量不同而制作，使得在不同位置的间隔物层的均匀性增加，避免间隔物不均匀导致TFT与LCD段差不均匀的情况，提高了显示装置的显示均匀性和显示效果。
如图1所示，图1是本申请实施例方案涉及的硬件运行环境的显示装置结构示意图。
如图1所示，该显示装置可以包括：处理器1001，例如CPU，网络接口1004，用户接口1003，存储器1005，通信总线1002。其中，通信总线1002用于实现这些组件之间的连接通信。用户接口1003可以包括显示屏（Display）、输入单元比如键盘（Keyboard），可选用户接口1003还可以包括标准的有线接口、无线接口。网络接口1004可选的可以包括标准的有线接口、无线接口（如WI-FI接口）。存储器1005可以是SRAM存储器，也可以是稳定的存储器（non-volatile memory），例如磁盘存储器。存储器1005可选的还可以是独立于前述处理器1001的存储装置。
可选地，显示装置还可以包括摄像头、RF（Radio Frequency，射频）电路，传感器、音频电路、WiFi模块等等。
本领域技术人员可以理解，图1中示出的终端结构并不构成对显示装置的限定，可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
如图1所示，作为一种计算机可读存储介质的存储器1005中可以包括操作系统、网络通信模块、用户接口模块以及显示装置的阵列基板制作应用程序。
在图1所示的显示装置中，网络接口1004主要用于连接后台服务器，与后台服务器进行数据通信；用户接口1003主要用于连接客户端（用户端），与客户端进行数据通信；而处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序，并执行以下操作：
提供一基板；
在所述基板上制作主动开关层；
在制作所述主动开关层的上方制作色阻层；
确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；
在所述色阻层上方涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
进一步地，处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序，并执行以下操作：
根据所述色阻层数量信息确定掩膜板对应不同遮光区域的穿透率，不同遮光区域的穿透率不同，所述穿透率为制作遮光层的图案化参数。
可选地，所述在制作所述主动开关层的上方制作色阻层的步骤包括：
在遮光区域至少保留一层色阻层，所述色阻层为红色色阻层、蓝色色阻层或绿色色阻层。
进一步地，处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序，并执行以下操作：
在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层；
在保护层上开设贯穿的通孔，在保护层上按照图案化的方式制作像素电极层，所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。
进一步地，所述在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层的步骤之后，处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序，并执行以下操作：
在形成保护层后，通过图案化方式形成像素电极，所述像素电极不形成于保护层上，且所述像素电极直接与所述漏极金属层连接。
进一步地，处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序，并执行以下操作：在所述基板制作色阻层时，包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层；所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
进一步地，处理器1001可以用于调用存储器1005中存储的显示装置的阵列基板制作应用程序，并执行以下操作：在所述基板制作色阻层时，还包括位于非像素区域的第二色阻垫高层，所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。
参照图2，本申请的一实施例提供一种显示装置的阵列基板制作方法，所述显示装置的阵列基板制作方法包括：
步骤S10，提供一基板；
在本实施例中，TFT-LCD（Thin Film Transistor-Liquid Crystal Display，薄膜晶体管液晶显示器）之所以能显示不同的颜色与画面，是因为面板内有很多个R红色像素、G绿色像素、B蓝色像素，这3个像素可以在不同亮度下显示出不同的颜色。配合像素显示的需要提供背光源，背光源给出光线，然后透过液晶和像素产生需要的颜色。
提供一基板，所述基板为玻璃基板，提供的基板为清洗过后的基板。
步骤S20，在所述基板上方制作主动开关层；所述主动开关层可选为薄膜晶体管，也还可以是其他可以控制液晶显示的开关部件。
在基板上制作薄膜晶体管TFT，参考图3，所述薄膜晶体管的流程包括：
步骤S21，在所述基板上依次形成薄膜晶体管的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层；
步骤S22，在保护层上开设贯穿的通孔，在保护层上按照图案化的方式制作像素电极层，所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。在所述阵列基板上沉积一第一金属层；进行第一光罩曝光和腐蚀制造工艺来限定所述第一金属层的图案，以在第一金属层中形成一栅极；在所述基板上沉积一绝缘层，使其覆盖所述第一金属层表面；依序沉积一半导体层、一掺杂硅层以及一第二金属层，进行第二光罩和腐蚀工艺来限定所述半导体层、所述掺杂硅层以及所述第二金属层的图案，用以形成一薄膜晶体管岛状结构；进行一第三光罩和腐蚀制造工艺以在所述第二金属层以及所述掺杂硅层中形成一源极/漏极金属层，并完成所述薄膜晶体管的制作。在TFT上形成一保护层，且覆盖薄膜晶体管以及所述信号线的表面。具体的，TFT的制作过程为：A. Metal 1 Process，第一金属层制作过程；
Metal 1镀膜，光阻涂布/曝光/显影，M1湿蚀刻，去光阻；
B. GIN process，绝缘层制作过程；
CVD（化学气相沉淀）法GIN层镀膜，光阻涂布/曝光/显影，GIN层蚀刻，去光阻；
C. Metal 2 Process，第二金属层制作过程；
Metal 2镀膜，光阻涂布/曝光/显影，M2湿蚀刻，N+蚀刻，去光阻；
D. Passivation Process（钝化过程），保护层制作过程；
CVD passivation镀膜，光阻涂布/曝光/显影，passivation蚀刻，去光阻。
而这里在形成保护层之后，进行干法蚀刻，在保护层上挖接触孔，形成保护层图案。首先在基板的表面全面沉积第一金属层，接着进行第一光罩腐蚀制造工艺，在基板上形成一栅极与一扫描线，且栅极与扫描线是相连接的，完成第一光罩腐蚀制造工艺之后，接着在基板上全面沉积一绝缘层、一半导体层、一掺杂硅层和第二金属层。半导体层选择多晶硅或是非晶硅材料，根据制造工艺和显示需求等条件设定。接下来，进行第二光罩腐蚀制造工艺，限定半导体层、掺杂硅层以及所述第二金属层图案，用以形成一薄膜晶体管岛状结构。进行第三光罩腐蚀制造工艺，在第二金属层以及掺杂硅层中形成一信号线、源极和漏极金属层，完成TFT薄膜晶体管的制作。在完成第三光罩腐蚀制作工艺后，在所述基板上形成一保护层，且覆盖于TFT薄膜晶体管和所述信号线的表面。而这里进行保护层的干法蚀刻，形成源极接触洞、漏极接触洞和信号线接触洞，以在制作像素电极时，像素电极填充接触洞，像素电极通过接触洞与漏极相连接；在形成保护层后，通过图案化方式形成像素电极，所述像素电极不形成于保护层上，且所述像素电极直接与所述漏极金属层连接。
而在一实施例中，为了减少制作工艺，参考图4，在步骤S21之后，还可以是执行：步骤S23，在形成保护层后，通过图案化方式形成像素电极，所述像素电极不形成于保护层上，且所述像素电极直接与所述漏极金属层连接。即，涂布保护层后，不进行干法蚀刻的操作，不形成接触洞，进行一第四光照和腐蚀制造工艺，限定所述像素电极的图案，使得所述像素电极形成于栅绝缘层上，而不形成于保护层之上。在形成保护层后，在所述基板上全面沉积ITO（氧化铟锡）光阻，经过第四光罩和腐蚀制造工艺（显影），ITO湿法蚀刻，去光阻，ITO OVEN（烘烤）在栅极层上形成ITO像素电极，而不形成于保护层上，ITO像素电极直接与漏极金属层Drain电极连接，无需接触洞的方式使得这两者连接。步骤S22和步骤S23为可选执行，只完成其中一个涂布制程。
步骤S30，在制作所述主动开关层的上方制作色阻层；
在基板上形成TFT和像素电极后，在制作所述像素电极层的上方制作色阻层，所述色阻层为红色色阻层、绿色色阻层和蓝色色阻层，而三个色阻层的膜厚不同。制作工艺的顺序可以随机不受限制，一般是先完成红色色阻层，再完成绿色色阻层，最后是蓝色色阻层的制作。制作工艺为图案化的方式来完成。而制作色阻层的时候，除了在像素透光区域制作色阻层，在未透光区域也保留色阻层，而保留于未透光区域的色阻层为至少一层色阻，例如，可以是只保留红色色阻层，也可以是同时保留红色和绿色色阻层。而保留色阻层的部分为相应于设置主间隔物的位置，而不是设置辅间隔物的位置。
步骤S40，确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；
在完成色阻层的制作后，要完成间隔物层的制作，而间隔物的制作的图案化参数需要根据之前保留在未透光区域（遮光区域，与显示区域对应）的色阻层数量信息决定，所述未透光区域为间隔物层对应区域，确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数，例如，色阻层不同，在不同未透光区域的穿透率不同。具体的，根据所述色阻层数量信息确定掩膜板对应不同遮光区域的穿透率，不同遮光区域的穿透率不同，所述穿透率为制作遮光层的图案化参数，该穿透率为掩膜板设置的穿透率，穿透率不同，透光性不同，形成的色阻层的厚度不同和/或在有的位置会留下光阻层有的位置不留下色阻层。色阻层数量信息不同，例如，在只有一层色阻层在未透光区域时，确定了掩膜板的穿透率T1>T2（不同区域的掩膜板穿透率为T1和T2，该不同区域T1为隔垫物对应的区域，T2为隔垫物对应区域之外的区域），而在有两层色阻层在未透光区域时，T1=T2或者T1<T2，因为有多层色阻层来叠加PS的膜厚。
步骤S50，在所述色阻层上方涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
在所述色阻层上方涂布间隔物色阻层，即，涂布感光材料，采用上述步骤S40中确定的图案化参数的光照射感光材料，光透过掩膜板照射感光材料层，形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。主隔垫区形成于色阻层上，而辅隔垫区形成于未覆盖色阻层的未透光区域。所述间隔物色阻层可选为黑色，也可以是其他颜色的可遮光的光阻材料。
而在一实施例中，在未透光区域，即非像素区域在所述基板制作色阻层时，包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层；所述第一色阻垫高层上方的黑间隔物与阵列基板的对向基板接触。在所述基板制作色阻层时，还包括位于非像素区域的第二色阻垫高层，所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。
本实施例通过形成于基板主动开关层上的色阻层的数量信息不同而确定了不同的形成间隔物层的图案化参数，根据确定的图案化参数来完成间隔物的涂布，会根据色阻层的数量不同而制作，使得在不同位置的间隔物层的均匀性增加，避免间隔物不均匀导致TFT与LCD段差不均匀的情况，提高了显示装置的显示均匀性和显示效果。
而在一实施例中为了更好的描述本申请实施例，间隔物以黑间隔物为例，制作黑间隔物层的过程包括：在COA（color filter on Array，彩膜基板制作在阵列基板）结构中，于TFT基板上制作R/G/B色层，其色层顺序可任意，接着做有机保护层，再制作黑间隔物层，根据保留色层情况，搭配不同的Mask 设计，制作不同段差的黑间隔物；
根据步骤1中，其中R/G/B膜厚不一样，在面内遮光区，至少保留一种色层
根据步骤2，当只保留一种色层时，搭配half-tone mask（光掩膜板）,光阻在曝光时mask（掩膜板）穿透率T1>T2，相应行程段差△H;
根据步骤2，当保留2种色层时，为R/G/B的任意两种，其遮光区膜厚R≠G≠B，在制作第二色层时，搭配half-tone mask设计，得到不同段差黑间隔物。参考图5，在遮光区，只有一层layer（左）BPS layer 涂布并搭配half-tone mask，其穿透率T1> T2 (中)； 曝光后（右），形成段差△Hb，其中11为辅隔垫物，12为主隔垫物，101为蓝色色阻层；
以下为只有G绿色色阻层（图6）涂布在遮光区（未透光区），形成段差△Hg，其中21为辅隔垫物，22为主隔垫物，201为绿色色阻层；只有R红色色阻层（图7） 涂布在遮光区，形成段差△Hr，其中31为辅隔垫物，32为主隔垫物301为红色色阻层。
而在一实施例中，对于色阻层和黑间隔物层的涂布的光掩膜板的recipe（图案化参数）可在产线制作开始时提前设置，而无需在制作的过程中做出切换，通过提前切换和侦测，提高制作效率。
此外，本申请实施例还提出一种显示装置，所述显示装置包括显示面板和与显示面板连接的时序控制器，所述时序控制器中加载有显示装置的阵列基板制作装置，所述显示面板在所述时序控制器的控制下完成显示装置的阵列基板制作流程的控制，而时序控制器中存储的显示装置的阵列基板制作方式以上述实施例中的显示装置的阵列基板制作方法完成，该显示装置的阵列基板制作方法加载于显示装置的阵列基板制作装置。所述显示装置可以是电视、手机、pad（平板）、机台显示仪等移动或固定显示设备。本实施例的显示装置通过形成于基板主动开关层上的色阻层的数量信息不同而确定了不同的形成黑间隔物层的图案化参数，根据确定的图案化参数来完成间隔物的涂布，会根据色阻层的数量不同而制作，使得在不同位置的间隔物层的均匀性增加，避免间隔物不均匀导致TFT与LCD段差不均匀的情况，提高了显示装置的显示均匀性和显示效果。
而本实施例中的显示装置包括阵列基板；对向基板，所述对向基板与阵列基板对向设置；液晶层，填充于所述对向基板和所述阵列基板之间，而所述阵列基板由上述实施例制作而形成。对向基板为彩膜基板，在其上方设置有像素电极，通过主隔垫区间隔物与对向基板的像素电极接触，而辅隔垫区间隔物与对向基板的像素电极间隔设置。
此外，本申请实施例还提出一种计算机可读存储介质，计算机可读存储介质，所述计算机可读存储介质上存储有显示装置的阵列基板制作程序，所述显示装置的阵列基板制作程序被处理器执行时实现如上实施例所述的显示装置的阵列基板制作方法。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者系统不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者系统所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者系统中还存在另外的相同要素。
上述本申请实施例序号仅仅为了描述，不代表实施例的优劣。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在如上所述的一个计算机可读存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本申请各个实施例所述的方法。
以上仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (17)

  1. 一种显示装置的阵列基板制作方法，其中，所述显示装置的制作方法包括以下步骤：
    提供一基板；
    在所述基板上制作主动开关层；
    在所述主动开关层上制作色阻层；
    确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；以及
    在所述色阻层上涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
  2. 如权利要求1所述的显示装置的阵列基板制作方法，其中，所述根据所述色阻层数量信息确定制作遮光层的图案化参数的步骤包括：
    根据所述色阻层数量信息确定掩膜板对应不同遮光区域的穿透率，不同遮光区域的穿透率不同，所述穿透率为制作遮光层的图案化参数。
  3. 如权利要求2所述的显示装置的阵列基板制作方法，其中，所述在所述主动开关层上制作色阻层的步骤包括：
    在像素透光区域制作色阻层，未透光区域保留色阻层的部分为相应设置主间隔物的位置。
  4. 如权利要求1所述的显示装置的阵列基板制作方法，其中，所述在所述主动开关层上制作色阻层的步骤包括：
    在遮光区域至少保留一层色阻层，所述色阻层为红色色阻层、蓝色色阻层或绿色色阻层。
  5. 如权利要求4所述的显示装置的阵列基板制作方法，其中，在制作多层色阻层时，不同色阻层的膜厚不同。
  6. 如权利要求1所述的显示装置的阵列基板制作方法，其中，所述在所述主动开关层上制作色阻层的步骤包括：
    在像素透光区域制作色阻层，未透光区域保留色阻层的部分为相应设置主间隔物的位置。
  7. 如权利要求1所述的显示装置的阵列基板制作方法，其中，所述在所述基板上方制作主动开关层的步骤包括：
    在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层；以及
    在保护层上开设贯穿的通孔，在保护层上按照图案化的方式制作像素电极层，所述像素电极层部分制作在所述通孔中并与正下方的漏极金属层接触。
  8. 如权利要求7所述的显示装置的阵列基板制作方法，其中，所述在所述基板上依次形成主动开关层的栅极、栅绝缘层、有源层、源极/漏极金属层和保护层的步骤之后，还包括：
    在形成保护层后，通过图案化方式形成像素电极，所述像素电极不形成于保护层上，且所述像素电极直接与所述漏极金属层连接。
  9. 如权利要求1所述的显示装置的阵列基板制作方法，其中，在所述基板制作色阻层时，包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层；所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
  10. 如权利要求9所述的显示装置的阵列基板制作方法，其中，在所述基板制作色阻层时，还包括位于非像素区域的第二色阻垫高层，所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。
  11. 一种显示装置，其中，所述显示装置包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述计算机程序被所述处理器执行时实现如下的步骤：
    提供一基板；
    在所述基板上制作主动开关层；
    在所述主动开关层上制作色阻层；
    确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；以及
    在所述色阻层上涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
  12. 如权利要求11所述的显示装置，其中，所述显示装置包括：
    阵列基板，
    对向基板，与所述所述阵列基板对向设置；
    液晶层，填充于所述对向基板和所述阵列基板之间；
    所述阵列基板的制作方法包括：
    提供一基板；
    在所述基板上制作主动开关层；
    在所述主动开关层上制作色阻层；
    确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；以及
    在所述色阻层上涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
  13. 一种计算机可读存储介质，其中，所述计算机可读存储介质上存储有显示装置的阵列基板制作程序，所述显示装置的阵列基板制作程序被处理器执行时实现如下的步骤：
    提供一基板；
    在所述基板上制作主动开关层；
    在所述主动开关层上制作色阻层；
    确定间隔物层对应区域的色阻层数量信息；根据所述色阻层数量信息确定制作遮光层的图案化参数；以及
    在所述色阻层上涂布间隔物色阻层，以所述图案化参数图案化所述间隔物色阻层形成间隔物层，其中，所述间隔物层包括具有高度差的主隔垫区和辅隔垫区，所述主隔垫区间隔物的高度大于所述辅隔垫区间隔物的高度。
  14. 如权利要求13所述的计算机可读存储介质，其中，所述显示装置的阵列基板制作程序被处理器执行时实现如下的步骤：
    根据所述色阻层数量信息确定掩膜板对应不同遮光区域的穿透率，不同遮光区域的穿透率不同，所述穿透率为制作遮光层的图案化参数。
  15. 如权利要求13所述的计算机可读存储介质，其中，所述显示装置的阵列基板制作程序被处理器执行时实现如下的步骤：
    在遮光区域至少保留一层色阻层，所述色阻层为红色色阻层、蓝色色阻层或绿色色阻层。
  16. 如权利要求13所述的计算机可读存储介质，其中，所述显示装置的阵列基板制作程序被处理器执行时实现如下的步骤：在所述基板制作色阻层时，包括分别位于像素区域的色阻和位于非像素区域的由至少一层色阻堆叠形成的第一色阻垫高层；所述第一色阻垫高层上方的间隔物与阵列基板的对向基板接触。
  17. 如权利要求16所述的计算机可读存储介质，其中，在所述基板制作色阻层时，还包括位于非像素区域的第二色阻垫高层，所述第二色阻垫高层上方的间隔物朝向所述阵列基板的对向基板间隔设置。
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