WO2019102537A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
WO2019102537A1
WO2019102537A1 PCT/JP2017/041950 JP2017041950W WO2019102537A1 WO 2019102537 A1 WO2019102537 A1 WO 2019102537A1 JP 2017041950 W JP2017041950 W JP 2017041950W WO 2019102537 A1 WO2019102537 A1 WO 2019102537A1
Authority
WO
WIPO (PCT)
Prior art keywords
surface pressure
case
semiconductor device
pressure absorbing
absorbing member
Prior art date
Application number
PCT/JP2017/041950
Other languages
English (en)
French (fr)
Inventor
新 飯塚
是英 岡本
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to DE112017008226.9T priority Critical patent/DE112017008226T5/de
Priority to JP2019556010A priority patent/JP6742538B2/ja
Priority to US16/754,992 priority patent/US20210202330A1/en
Priority to CN201780096912.5A priority patent/CN111373527B/zh
Priority to PCT/JP2017/041950 priority patent/WO2019102537A1/ja
Publication of WO2019102537A1 publication Critical patent/WO2019102537A1/ja

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3672—Foil-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H01L2023/405—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H01L2023/4062—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to or through board or cabinet
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4075—Mechanical elements
    • H01L2023/4087—Mounting accessories, interposers, clamping or screwing parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to a semiconductor device, and more particularly to a cooling structure of a power semiconductor device.
  • a semiconductor device with a direct cooling structure tends to be required to be fastened to a heat sink with a higher fastening torque than a semiconductor device cooled via conventional grease in order to prevent cooling water leakage.
  • An amount of aluminum-based material is often used for the heat sink from the viewpoint of corrosion resistance and weight reduction. Therefore, when the semiconductor device and the heat sink are directly fastened with a bolt, there is a concern that the heat sink may be deformed, for example, the heat sink may be sunk by stress (surface pressure) applied via the bolt.
  • Patent Document 1 in a semiconductor device having a structure in which a ceramic base on which a semiconductor element is mounted is fixed to a heat sink (radiator plate) using a bolt, a metal layer is formed on a portion of the ceramic base in contact with the bolt. By doing this, techniques have been proposed to prevent stress concentration on that portion.
  • Patent Document 1 It is difficult to apply the technology of Patent Document 1 to a semiconductor device having a structure in which a semiconductor element is housed in a resin case. It is because it is difficult to form a metal layer of the extent which can relieve the stress from a bolt on resin which constitutes a case.
  • the present invention has been made to solve the problems as described above, and it is an object of the present invention to suppress deformation of a heat sink at the time of fastening with a bolt in a semiconductor device provided with a resin case.
  • a semiconductor device includes a semiconductor element, a heat sink on which the semiconductor element is mounted, a resin case mounted on the heat sink and containing the semiconductor element, and a fastening hole penetrating the case and the heat sink.
  • the case is provided with a plate-like surface pressure buffer member having a rigidity higher than that of the resin in a portion including the fastening hole in a plan view.
  • the surface pressure buffer member is plate-shaped, high adhesiveness with the resin of the case can be obtained.
  • the stress (surface pressure) generated in the case and the heat sink at the time of fastening by the bolt can be suppressed, and the deformation of the heat sink can be prevented.
  • FIG. 1 is a cross-sectional view of a semiconductor device in accordance with a first embodiment.
  • FIG. 1 is a top view of a semiconductor device according to Embodiment 1;
  • FIG. 6 is a top view of the semiconductor device according to the first embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 8 is a view for explaining a modification of the surface pressure buffer member in the first embodiment.
  • FIG. 8 is a view for explaining a modification of the surface pressure buffer member in the first embodiment.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the second embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the third embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the third embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the third embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 20 is a top view of the semiconductor device according to the fourth embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 18 is a view for explaining a modification of the surface pressure buffer member in the fourth embodiment.
  • FIG. 26 is a top view of the semiconductor device according to the fifth embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 26 is a top view of the semiconductor device according to the fifth embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 26 is a top view of the semiconductor device according to the fifth embodiment, which transmits the external electrode, the resin portion of the case, and the heat sink.
  • FIG. 1 is a cross-sectional view of the semiconductor device according to the first embodiment of the present invention.
  • the semiconductor device includes the semiconductor element 10 housed in a resin case 60 and a heat sink 50 on which the case 60 is mounted.
  • the semiconductor element 10 is a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor), or an FWDi (Free Wheeling Diode).
  • the lower surface of the semiconductor element 10 is bonded to the circuit pattern 30 formed on the insulating substrate 31 using a brazing material 20.
  • the insulating substrate 31 is made of, for example, an insulating material such as aluminum nitride (AlN).
  • the circuit pattern 30 functions as a path for supplying a specific potential to the semiconductor element 10, and is made of, for example, a conductive material such as aluminum (Al) or copper (Cu).
  • a metal pattern 32 made of, for example, Al, Cu or the like is formed on the lower surface of the insulating substrate 31, and the metal pattern 32 is bonded to the upper surface of the heat sink 50 using the insulating substrate 31.
  • the metal pattern 32 and the heat sink 50 may be joined using a technique such as solid phase diffusion bonding or die casting without using the brazing material 21.
  • the brazing material 21 and the insulating substrate 31 may be directly joined without providing the metal pattern 32 on the lower surface of the insulating substrate 31.
  • the heat sink 50 is made of a material having high thermal conductivity and corrosion resistance.
  • the material of the heat sink 50 include, for example, Al, an alloy containing Al as a main component, and the like.
  • a pin-like or plate-like heat radiation fin 51 is provided, and direct cooling of the heat sink 50 by the cooling solvent is possible.
  • the semiconductor element 10 and the circuit pattern 30 are connected to the external electrode 40 provided in the case 60 via the wiring 41.
  • the wiring 41 and the external electrode 40 are made of, for example, a conductive material such as Al or Cu.
  • the external electrode 40 and the semiconductor element 10 and the circuit pattern 30 are connected using the wire 41 of the wire, for example, direct bonding of the external electrode 40 and the semiconductor element 10 or the circuit pattern 30 is directly performed. A lead bonding structure may be applied.
  • the external electrode 40 is a terminal for connecting an external wiring, and is integrally formed with the case 60 by insert molding.
  • a sealing material 70 made of, for example, silicon gel or epoxy resin is filled without a gap.
  • the case 60 and the sealing material 70 may be configured as an integrally molded article made of mold resin.
  • the case 60 and the heat sink 50 are formed with fastening holes 80 penetrating them.
  • the case 60 and the heat sink 50 are fastened to an external housing, such as a cooling jacket, using a bolt (not shown) inserted into the fastening hole 80.
  • the case 60 is provided with a plate-like surface pressure buffer member 61 having rigidity higher than that of the resin of the case 60 in a region including the fastening hole 80 in a plan view.
  • the surface pressure absorbing member 61 is integrally formed with the case 60 by insert molding.
  • iron (Fe) can be considered as a material of the surface pressure absorbing member 61.
  • the thickness of the surface pressure absorbing member 61 is preferably 0.5 mm or more.
  • FIG. 2 is a top view of the semiconductor device shown in FIG. 1, and FIG. 3 is transparent to the external electrode 40 of the semiconductor device, the resin portion of the case 60 (that is, the portion excluding the surface pressure buffer member 61) and the heat sink 50.
  • FIG. Here, a “6 in 1 structure” semiconductor device in which six circuits using the semiconductor element 10 are housed in the case 60 is shown, but it is, for example, a “1 in 1 structure” or a “2 in 1 structure”. May be
  • the surface pressure buffer member 61 is disposed in a portion including the fastening hole 80 in a plan view. That is, the fastening holes 80 are formed in the surface pressure buffer member 61. At least the portion around the fastening hole 80 (the portion in contact with the bolt) of the upper surface of the surface pressure absorbing member 61 is exposed from the resin of the case 60. Further, the lower surface of the surface pressure buffer member 61 abuts on the heat sink 50. Therefore, the surface pressure buffer member 61 is interposed between the head of the bolt inserted into the fastening hole 80 and the heat sink 50. Further, a washer may be engaged between the head of the bolt and the surface pressure absorbing member 61.
  • the surface pressure buffer member 61 is in the form of a frame extending to the outer peripheral portion of the case 60 and is configured as a single plate having a shape including all the fastening holes 80 in a plan view.
  • the plate-like surface pressure buffer member 61 has a large contact area with the resin of the case 60, and high adhesiveness with the resin can be obtained.
  • the stress (surface pressure) which arises in case 60 or the heat sink 50 is suppressed in the case of the fastening by a volt
  • deformation of the heat sink 50, peeling of the surface pressure absorbing member 61 from the resin of the case 60, and breakage of the case 60 are suppressed.
  • the user's handleability is improved.
  • one surface pressure buffer member 61 includes a plurality of fastening holes 80, the stress applied from the surface pressure buffer member 61 to the heat sink 50 can be effectively suppressed.
  • warp suppression effect the effect of suppressing warpage of the semiconductor device
  • the surface pressure buffer member 61 since Fe constituting the surface pressure buffer member 61 has a thermal conductivity higher than that of the resin of the case 60, the surface pressure buffer member 61 also contributes to the heat radiation of the semiconductor device. Since the plate-like surface pressure buffer member 61 has a large surface area as compared with a cylindrical surface pressure buffer member, an effect of improving the cooling performance (hereinafter, referred to as “cooling effect”) can be expected.
  • the surface pressure buffer member 61 may be provided with a beam portion 61 a traversing the inside of the case 60. That is, the surface pressure buffer member 61 includes a portion extending to the outer peripheral portion of the case 60 and a portion (beam portion 61 a) traversing the inside of the case 60. In this case, further improvement of the above-mentioned warpage suppression effect and cooling effect can be expected.
  • the material of the surface pressure buffer member 61 is iron (Fe)
  • a material having higher thermal conductivity such as copper (Cu) may be used. In that case, further improvement of the cooling effect can be expected.
  • the surface pressure absorbing member 61 may be configured with the same amount of material as the bolt (and washer) used for fastening.
  • a material of a bolt stainless steel, brass, titanium, chromium molybdenum etc. are common, for example.
  • FIGS. 6 to 11 are diagrams showing a configuration example of the semiconductor device according to the second embodiment, and are top views transmitted through the external electrode of the semiconductor device, the resin portion of the case, and the heat sink.
  • FIG. 6 or 7 when the number of fastening holes 80 is an even number (eight), a plurality of (four) surface pressure buffering members 61 having a shape including two fastening holes 80 in plan view are provided.
  • FIG. 6 shows an example in which four surface pressure buffer members 61 extending in the width direction of the case 60 are arranged in the longitudinal direction of the case 60.
  • FIG. 7 shows an example in which two surface pressure buffer members 61 extending in the longitudinal direction of the case 60 are arranged two by two on the long side of the case 60.
  • the plurality of surface pressure buffer members 61 are provided, an effect of suppressing stress (surface pressure) generated in the case 60 and the heat sink 50 at the time of fastening by bolts can be obtained as in the first embodiment.
  • the warpage suppressing effect and the cooling effect are smaller than in the first embodiment, the reduction in the size of the individual surface pressure buffer members 61 can be expected to reduce the material cost and the weight.
  • the shapes of the plurality of surface pressure absorbing members 61 are all the same, an increase in the types of parts can be suppressed, and productivity can be improved.
  • FIG. 8 shows an example in which the surface pressure absorbing members 61 extending in the longitudinal direction of the case 60 are disposed on the long sides of the case 60, respectively.
  • FIG. 9 shows an example in which two L-shaped surface pressure buffer members 61 extending to adjacent two sides of the case 60 are arranged point-symmetrically.
  • the size of the surface pressure absorbing member 61 becomes larger and the number thereof becomes smaller. Therefore, coexistence of reduction of material cost, and a warp control effect and a cooling effect can be aimed at. Further, as shown in FIG. 9, when the surface pressure absorbing member 61 is L-shaped, a high warpage suppressing effect can be obtained.
  • FIG. 10 shows an example in which two frame-shaped surface pressure absorbing members 61 are arranged in the longitudinal direction of the case 60.
  • FIG. 11 shows an example in which the surface pressure buffer members 61 extending in the longitudinal direction of the case 60 are disposed on the long sides of the case 60, respectively.
  • Embodiment 3 The upper surface and the side surface of the surface pressure buffer member 61 shown in the first and second embodiments are flat, but in the third embodiment, the periphery (the area in contact with the bolt or washer) of the fastening hole 80 in the surface pressure buffer member 61 Apply holes and irregularities to the parts except).
  • a through hole 61b may be formed to penetrate the surface pressure buffer member 61 in the thickness direction (vertical direction).
  • a plurality of recesses 61 c may be formed on the side surface of the surface pressure buffer member 61 to make the side surface uneven.
  • a plurality of dimples 61 d may be formed on the upper surface of the surface pressure buffer member 61 to make the upper surface uneven.
  • the resin portion of the external electrode 40 is molded so as to cover the portion where the dimple 61 d of the surface pressure buffer member 61 is formed.
  • the effect of improving the adhesion between the resin of the case 60 and the surface pressure absorbing member 61 can be obtained.
  • the through hole 61 b and the recess 61 c may be provided for the purpose of avoiding interference with other members inserted in the case 60 and the surface pressure buffer member 61, and for the purpose of reducing material cost and weight.
  • the effect of suppressing the stress (surface pressure) generated in the case 60 and the heat sink 50 at the time of fastening by bolts can be obtained.
  • the plurality of fastening holes 80 are provided in one surface pressure buffer member 61.
  • only one fastening hole 80 is provided in one surface pressure buffer member 61.
  • Each of the surface pressure absorbing members 61 has a plate shape. In the example of FIG. 15, a rectangular surface pressure buffer member 61 is used.
  • the surface pressure buffer member 61 be disposed so as not to be exposed to the side surface of the case 60 and to be accommodated inside the case 60. That is, it is preferable that the surface pressure absorbing member 61 be contained in the case 60 in plan view. As a result, it is possible to more reliably prevent the surface pressure buffer member 61 from peeling off from the resin portion of the external electrode 40 due to the tightening torque of the bolt and causing an idle rotation. Also, applying the third embodiment, as shown in FIG. 16, providing a plurality of dimples 61 d on the upper surface of the surface pressure absorbing member 61 also improves the adhesion between the resin of the case 60 and the surface pressure absorbing member 61. It is effective.
  • the effect of suppressing the stress (surface pressure) generated in the case 60 and the heat sink 50 at the time of fastening by bolts can be obtained.
  • the warpage suppressing effect and the cooling effect are smaller than in the first embodiment, the reduction in the size of the individual surface pressure buffer members 61 can be expected to reduce the material cost and the weight.
  • the shapes of the plurality of surface pressure absorbing members 61 are all the same, an increase in the types of parts can be suppressed, and productivity can be improved.
  • the Fifth Preferred Embodiment Although the thickness of the surface pressure absorbing member 61 shown in the first to fourth embodiments is uniform, in the fifth embodiment, a portion around the fastening hole 80 in the surface pressure absorbing member 61 (contacts with a bolt or a washer) Make the area thicker than the other parts. In other words, a portion of the surface pressure buffer member 61 excluding the periphery of the fastening hole 80 is thinned, and a portion of the surface pressure buffer member 61 around the fastening hole 80 is protruded in the thickness direction of the surface pressure buffer member 61.
  • the portion around the fastening hole 80 in the surface pressure absorbing member 61 may be protruded downward. That is, in FIG. 17, the portion is made thinner by raising the position of the lower surface of the portion excluding the periphery of the fastening hole 80.
  • a portion around the fastening hole 80 in the surface pressure absorbing member 61 may be protruded upward. That is, in FIG. 18, the portion is made thinner by lowering the position of the upper surface of the portion excluding the periphery of the fastening hole 80.
  • the portion around the fastening hole 80 in the surface pressure buffer member 61 may be protruded in both the upper and lower directions. That is, in FIG. 19, the position of the upper surface of the portion excluding the periphery of the fastening hole 80 is lowered, and the position of the lower surface is increased to thin the portion.
  • the upper surface of the surface pressure absorbing member 61 is exposed from the case 60 at least at a portion (thick portion) around the fastening hole 80, and the lower surface of the surface pressure absorbing member 61 is brought into contact with the heat sink 50.
  • the effect of suppressing the stress (surface pressure) generated in the case 60 and the heat sink 50 at the time of fastening by bolts can be obtained.
  • the side surface of the thick portion of the surface pressure absorbing member 61 (the portion around the fastening hole 80) may be provided with an uneven shape such as a knurl.
  • the surface pressure buffer member 61 is formed integrally with the case 60 by insert molding, but in the sixth embodiment, the surface pressure buffer member 61 is a component separate from the case 60.
  • the surface pressure buffer member 61 and the case 60 are bonded using an adhesive in the process of assembling the semiconductor device. The adhesive is applied only to the surface of the surface pressure buffer member 61 in contact with the case 60 and is not applied to the surface exposed from the case 60 (that is, the surface in contact with the bolt and the heat sink 50).
  • the case 60 and the surface pressure buffer member 61 By bonding the case 60 and the surface pressure buffer member 61 using an adhesive, it is not necessary to take measures against peeling of the surface pressure buffer member 61 (for example, increase in the thickness of the resin of the external electrode 40), and miniaturization of the semiconductor device Can contribute to In addition, since the number of members to be inserted at the time of molding of the case 60 is reduced, productivity improvement of the case 60 can also be expected. Moreover, the metal touch of a fastening part is realizable by not apply
  • each embodiment can be freely combined, or each embodiment can be appropriately modified or omitted.
  • SYMBOLS 10 semiconductor element 20 brazing material, 21 brazing material, 30 circuit pattern, 31 insulated substrate, 32 metal pattern, 40 external electrode, 41 wiring, 50 heat sink, 51 heat dissipation fin, 60 case, 61 surface pressure buffer member, 61a beam portion , 61 b through hole, 61 c recess, 61 d dimple, 70 sealing material, 80 fastening hole.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Casings For Electric Apparatus (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

半導体装置は、半導体素子（１０）と、半導体素子（１０）を搭載したヒートシンク（５０）と、ヒートシンク（５０）に搭載され半導体素子（１０）を収納する樹脂製のケース（６０）とを備える。ケース（６０）およびヒートシンク（５０）には、それらを貫通する締結穴（８０）が形成されている。ケース（６０）は、平面視で締結穴（８０）を含む部分に、樹脂よりも高い剛性を有する板状の面圧緩衝部材（６１）を備える。

Description

半導体装置
　本発明は半導体装置に関し、特に、電力用半導体装置の冷却構造に関するものである。
　高い信頼性を有する電力用半導体装置（パワーモジュール）の高出力化および小型化の要求がある。その要求に応えるために、半導体装置に搭載する半導体素子の大容量化に加え、フィン付きヒートシンクを備えた直接冷却構造を採用した半導体装置も検討されている。直接冷却構造の半導体装置では、冷却水漏れを防ぐために、従来のグリースを介して冷却される半導体装置よりも高い締結トルクでヒートシンクと締結されることが要求される傾向にある。
　ヒートシンクには、耐腐食性や軽量化の観点から、アルミ系材量が使用されることが多い。そのため、半導体装置とヒートシンクとをボルトで直接締結する場合には、ボルトを介して加わる応力（面圧）によって、ヒートシンクが陥没するなど、ヒートシンクの変形が懸念される。
　例えば特許文献１には、半導体素子を搭載するセラミックス基材を、ボルトを用いてヒートシンク（放熱板）に固定した構造を有する半導体装置において、セラミックス基材のボルトと当接する部分に金属層を形成することによって、その部分に応力が集中することを防止する技術が提案されている。
特開２０００－０８２７７４号公報
　特許文献１の技術は、半導体素子が樹脂製のケースに収納される構造の半導体装置へ適用することが困難である。ケースを構成する樹脂上に、ボルトからの応力を緩和できる程度の金属層を形成することが困難なためである。
　また、樹脂製のケースをヒートシンクにボルトで締結するための締結穴に、高剛性の材料からなる「カラー」と呼ばれる円筒形の面圧緩衝部材を挿入する技術もある。カラーは、生産性を考慮して、インサート成型により樹脂製のケースと一体的に形成される。つまり、ケースの製造の際、ケースを成型するための金型内にカラーを固定し、その周りに樹脂を注入することで、カラーとケースとが一体的に形成される。しかし、ボルトに高い締結トルクが要求される場合、その締結トルクによってカラーがケースから剥離し、カラーの空回りやケースの割れが生じる恐れがある。
　本発明は以上のような課題を解決するためになされたものであり、樹脂製のケースを備える半導体装置において、ボルトでの締結の際にヒートシンクの変形を抑制することを目的とする。
　本発明に係る半導体装置は、半導体素子と、前記半導体素子を搭載したヒートシンクと、前記ヒートシンクに搭載され前記半導体素子を収納する樹脂製のケースと、前記ケースおよび前記ヒートシンクを貫通する締結穴と、を備え、前記ケースは、平面視で前記締結穴を含む部分に、前記樹脂よりも高い剛性を有する板状の面圧緩衝部材を備える。
　本発明によれば、面圧緩衝部材が板状であるため、ケースの樹脂との高い密着性を得ることができる。また、ボルトによる締結の際に、ケースやヒートシンクに生じる応力（面圧）が抑制され、ヒートシンクの変形を防止できる。
　本発明の目的、特徴、態様、および利点は、以下の詳細な説明と添付図面とによって、より明白となる。
実施の形態１に係る半導体装置の断面図である。 実施の形態１に係る半導体装置の上面図である。 実施の形態１に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態１における面圧緩衝部材の変形例を説明するための図である。 実施の形態１における面圧緩衝部材の変形例を説明するための図である。 実施の形態２に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態２に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態２に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態２に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態２に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態２に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態３に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態３に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態３に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態４に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態４における面圧緩衝部材の変形例を説明するための図である。 実施の形態５に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態５に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。 実施の形態５に係る半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。
　＜実施の形態１＞
　図１は、本発明の実施の形態１に係る半導体装置の断面図である。図１のように、当該半導体装置は、樹脂製のケース６０に収納された半導体素子１０と、ケース６０を搭載したヒートシンク５０とを備えている。
　半導体素子１０は、ＩＧＢＴ（Insulated Gate Bipolar Transistor）、ＭＯＳＦＥＴ（Metal-Oxide Semiconductor Field-Effect Transistor ）、ＦＷＤｉ（Free Wheeling Diode）などの電力用半導体素子である。半導体素子１０の下面は、ろう材２０を用いて、絶縁基板３１上に形成された回路パターン３０に接合されている。絶縁基板３１は、例えば窒化アルミニウム（ＡｌＮ）などの絶縁材料で構成される。回路パターン３０は、半導体素子１０に特定の電位を供給するパスとして機能し、例えばアルミニウム（Ａｌ）や銅（Ｃｕ）などの導電材料で構成される。
　絶縁基板３１の下面には、例えばＡｌ、Ｃｕなどからなる金属パターン３２が形成されており、金属パターン３２は、絶縁基板３１を用いてヒートシンク５０の上面に接合されている。なお、金属パターン３２とヒートシンク５０とは、ろう材２１を用いずに、固相拡散接合やダイキャストなどの技術を用いて接合されてもよい。また、絶縁基板３１の下面に金属パターン３２を設けず、ろう材２１と絶縁基板３１とを直接接合してもよい。
　ヒートシンク５０は、熱伝導率が高く、且つ、耐腐食性のある材料から構成される。ヒートシンク５０の材料の例としては、例えば、Ａｌや、Ａｌを主成分とする合金などがある。また、ヒートシンク５０の下面には、例えばピン状や板状の放熱フィン５１が設けられており、冷却溶媒によるヒートシンク５０の直接冷却が可能である。
　また、半導体素子１０および回路パターン３０は、配線４１を介して、ケース６０に設けられた外部電極４０に接続される。配線４１および外部電極４０は、例えばＡｌやＣｕなどの導電材料で構成される。ここでは、外部電極４０と半導体素子１０および回路パターン３０とが、ワイヤの配線４１を用いて接続されているが、例えば、外部電極４０と半導体素子１０または回路パターン３０とを直接ろう付けするダイレクトリードボンディング構造を適用してもよい。外部電極４０は、外部の配線を接続するための端子であり、インサート成型によってケース６０と一体的に形成されている。
　ケース６０の内部には、例えばシリコンゲルやエポキシ系樹脂からなる封止材７０が隙間なく充填されている。なお、ケース６０および封止材７０は、モールド樹脂からなる一体成型品として構成されていてもよい。
　ケース６０およびヒートシンク５０には、それらを貫通する締結穴８０が形成されている。ケース６０およびヒートシンク５０は、締結穴８０に挿入されたボルト（不図示）を用いて、例えば冷却ジャケットなどの外部筐体に締結される。
　ここで、ケース６０は、平面視で締結穴８０を含む領域に、ケース６０の樹脂よりも高い剛性を有する板状の面圧緩衝部材６１を備えている。面圧緩衝部材６１は、インサート成型によってケース６０と一体的に形成されている。面圧緩衝部材６１の材料としては、例えば鉄（Ｆｅ）が考えられる。面圧緩衝部材６１の厚みは、０．５ｍｍ以上が好ましい。
　図２は、図１に示した半導体装置の上面図であり、図３は、当該半導体装置の外部電極４０、ケース６０の樹脂部分（すなわち面圧緩衝部材６１を除く部分）およびヒートシンク５０を透過した平面図である。ここでは、ケース６０内に半導体素子１０を用いた回路が６つ収められた「6 in 1構造」の半導体装置を示すが、例えば、「1 in 1構造」や「2 in 1構造」であってもよい。
　図３に示すように、面圧緩衝部材６１は、平面視で締結穴８０を含む部分に配設される。つまり、締結穴８０は、面圧緩衝部材６１に形成されている。面圧緩衝部材６１の上面は、少なくとも締結穴８０の周囲の部分（ボルトとの接触部分）がケース６０の樹脂から露出する。また、面圧緩衝部材６１の下面は、ヒートシンク５０に当接する。よって、締結穴８０に挿入されるボルトのヘッドとヒートシンク５０との間には、面圧緩衝部材６１が介在することになる。また、ボルトのヘッドと面圧緩衝部材６１との間にワッシャーを噛ませてもよい。
　本実施の形態では、面圧緩衝部材６１が、ケース６０の外周部に延在するフレーム状であり、平面視で全ての締結穴８０を含む形状の一枚板として構成されている。円筒形の面圧緩衝部材（カラー）に比べ、板状の面圧緩衝部材６１は、ケース６０の樹脂との接触面積が大きく、当該樹脂との高い密着性を得ることができる。また、ボルトによる締結の際に、ケース６０やヒートシンク５０に生じる応力（面圧）が抑制される。その結果、ヒートシンク５０が変形したり、面圧緩衝部材６１がケース６０の樹脂から剥離したり、ケース６０が破損したりすることが抑制される。その結果、ユーザーの取り扱い性が向上する。特に、１つの面圧緩衝部材６１が複数の締結穴８０を備える場合、面圧緩衝部材６１からヒートシンク５０に加わる応力を効果的に抑制できる。
　なお、面圧緩衝部材６１の角部に面取り加工（Ｒ加工やＣ加工など）を施してもよい。また、図４のように、締結穴８０の周囲の領域（ボルトまたはワッシャーと接触する領域）を除く部分を細くして、材料の使用量を減らし、材料コストの低減を図ってもよい。
　さらに、半導体装置内に、高剛性の面圧緩衝部材６１が延在することで、半導体装置の反りが抑制される効果（以下「反り抑制効果」という）も期待できる。また、面圧緩衝部材６１を構成するＦｅはケース６０の樹脂よりも高い熱伝導率を持つため、面圧緩衝部材６１は半導体装置の放熱にも寄与する。円筒状の面圧緩衝部材に比べて、板状の面圧緩衝部材６１は表面積が大きいため、冷却性能が向上する効果（以下「冷却効果」という）が期待できる。
　また、例えば図５のように、面圧緩衝部材６１にケース６０内を横断する梁部６１ａを設けてもよい。つまり、面圧緩衝部材６１は、ケース６０の外周部に延在する部分と、ケース６０内を横断する部分（梁部６１ａ）とを備える。この場合、上記の反り抑制効果および冷却効果のさらなる向上が期待できる。
　なお、上の説明では、面圧緩衝部材６１の材料を鉄（Ｆｅ）としたが、より熱伝導率の高い材料、例えば銅（Ｃｕ）などでもよい。その場合、冷却効果の更なる向上が期待できる。
　また、面圧緩衝部材６１を、締結に使用するボルト（およびワッシャー）と同じ材量で構成してもよい。ボルトの材料としては、例えばステンレス、真鍮、チタン、クロムモリブデンなどが一般的である。面圧緩衝部材６１の材料とボルトの材料を揃えることで、高温時に生じる応力が抑制され、ヒートシンク５０に生じる応力のさらなる低減が期待できる。
　＜実施の形態２＞
　実施の形態２では、半導体装置のケース６０に複数の面圧緩衝部材６１を設ける。図６～図１１は、実施の形態２に係る半導体装置の構成例を示す図であり、半導体装置の外部電極、ケースの樹脂部分およびヒートシンクを透過した上面図である。
　例えば図６または図７のように、締結穴８０の数が偶数（８個）の場合、平面視で２つの締結穴８０を含む形状の面圧緩衝部材６１を、複数枚（４枚）設けてもよい。図６は、ケース６０の幅方向に延在する面圧緩衝部材６１を、ケース６０の長さ方向に４つ並べて配置した例である。図７は、ケース６０の長さ方向に延在する面圧緩衝部材６１を、ケース６０の長辺のそれぞれに２つずつ配置した例である。
　面圧緩衝部材６１を複数にした場合でも、実施の形態１と同様に、ボルトによる締結時にケース６０やヒートシンク５０に生じる応力（面圧）が抑制される効果が得られる。また、反り抑制効果および冷却効果は実施の形態１よりも小さくなるが、個々の面圧緩衝部材６１のサイズが小さくなることで、材料コストの削減や重量低減が期待できる。さらに、複数の面圧緩衝部材６１の形状を全て同じにすれば、部品の種類の増加を抑制でき、生産性の向上を図ることができる。
　また、例えば図８または図９のように、締結穴８０の数が３の倍数（６個）の場合、平面視で３つの締結穴８０を含む形状の面圧緩衝部材６１を、複数枚（２枚）設けてもよい。図８は、ケース６０の長さ方向に延在する面圧緩衝部材６１を、ケース６０の長辺のそれぞれに配置した例である。図９は、ケース６０の隣接する２辺に延在するＬ字型の面圧緩衝部材６１を、点対称に２つ配置した例である。
　図６および図７の例に比べ、面圧緩衝部材６１のサイズが大きくなり、枚数が少なくなる。そのため、材料コストの削減と、反り抑制効果および冷却効果との両立を図ることができる。また図９のように、面圧緩衝部材６１をＬ字型にすると、高い反り抑制効果が得られる。
　また、例えば図１０または図１１のように、締結穴８０の数が４の倍数（８個）の場合、平面視で４つの締結穴８０を含む形状の面圧緩衝部材６１を、複数枚（２枚）設けてもよい。図１０は、フレーム状の面圧緩衝部材６１を、ケース６０の長さ方向に２つ並べて配置した例である。図１１は、ケース６０の長さ方向に延在する面圧緩衝部材６１を、ケース６０の長辺のそれぞれに配置した例である。
　この場合も、材料コストの削減と、反り抑制効果および冷却効果との両立を図ることができる。また図１０のように、２つの面圧緩衝部材６１をフレーム状にした場合、各面圧緩衝部材６１おいて、ケース６０を横切る辺が図５に示した梁部６１ａと同様に機能するため、高い反り抑制効果が得られる。
　＜実施の形態３＞
　実施の形態１，２に示した面圧緩衝部材６１の上面や側面は平坦であったが、実施の形態３では、面圧緩衝部材６１における締結穴８０の周囲（ボルトまたはワッシャーと接触する領域）を除く部分に、穴加工や凹凸加工を施す。
　例えば、図１２のように、面圧緩衝部材６１を厚さ方向（上下方向）に貫通する貫通穴６１ｂを形成してもよい。また、図１３のように、面圧緩衝部材６１の側面に複数の凹部６１ｃを形成して、当該側面を凹凸状にしてもよい。また、図１４のように、面圧緩衝部材６１の上面に、複数のディンプル６１ｄを形成して、当該上面を凹凸状にしてもよい。この場合、外部電極４０の樹脂部分は、面圧緩衝部材６１のディンプル６１ｄが形成された部分を覆うように成型される。
　本実施の形態によれば、ケース６０の樹脂と面圧緩衝部材６１との密着性が向上する効果が得られる。貫通穴６１ｂおよび凹部６１ｃは、ケース６０にインサートされる他の部材と面圧緩衝部材６１との干渉を避ける目的や、材料コスト低減および重量低減の目的で設けられてもよい。また、実施の形態３においても、実施の形態１と同様に、ボルトによる締結時にケース６０やヒートシンク５０に生じる応力（面圧）が抑制される効果が得られる。
　＜実施の形態４＞
　実施の形態１～３では、１枚の面圧緩衝部材６１に複数の締結穴８０が設けられたが、実施の形態４では、１枚の面圧緩衝部材６１に締結穴８０を１つのみ設ける。つまり、実施の形態４では、図１５のように、１つの締結穴８０ごとに面圧緩衝部材６１が１枚ずつ配設される。それぞれの面圧緩衝部材６１は板状である。図１５の例では、長方形の面圧緩衝部材６１が用いられている。
　また、面圧緩衝部材６１は、ケース６０の側面に露出せず、ケース６０の内部に収まるように配置されることが好ましい。つまり、面圧緩衝部材６１は、平面視でケース６０に内包されることが好ましい。それにより、面圧緩衝部材６１がボルトの締結トルクによって外部電極４０の樹脂部分から剥離して空回りすることを、より確実に防止できる。また、実施の形態３を適用し、図１６のように、面圧緩衝部材６１の上面に複数のディンプル６１ｄを設け、ケース６０の樹脂と面圧緩衝部材６１との密着性を向上させることも効果的である。
　実施の形態４においても、実施の形態１と同様に、ボルトによる締結時にケース６０およびヒートシンク５０に生じる応力（面圧）が抑制される効果が得られる。また、反り抑制効果および冷却効果は実施の形態１よりも小さくなるが、個々の面圧緩衝部材６１のサイズが小さくなることで、材料コストの削減や重量低減が期待できる。さらに、複数の面圧緩衝部材６１の形状を全て同じにすれば、部品の種類の増加を抑制でき、生産性の向上を図ることができる。
　＜実施の形態５＞
　実施の形態１～４に示した面圧緩衝部材６１の厚さは均一であったが、実施の形態５では、面圧緩衝部材６１における締結穴８０の周囲の部分（ボルトまたはワッシャーと接触する領域）を、他の部分よりも厚くする。言い換えれば、面圧緩衝部材６１における締結穴８０の周囲を除く部分を薄くし、面圧緩衝部材６１における締結穴８０の周囲の部分を、面圧緩衝部材６１の厚さ方向に突出させる。
　例えば図１７のように、面圧緩衝部材６１における締結穴８０の周囲の部分を下方に突出させてもよい。つまり、図１７では、締結穴８０の周囲を除く部分の下面の位置を高くすることで、その部分を薄くしている。また図１８のように、面圧緩衝部材６１における締結穴８０の周囲の部分を上方に突出させてもよい。つまり、図１８では、締結穴８０の周囲を除く部分の上面の位置を低くすることで、その部分を薄くしている。また図１９のように、面圧緩衝部材６１における締結穴８０の周囲の部分を上下両方向に突出させてもよい。つまり、図１９では、締結穴８０の周囲を除く部分の上面の位置を低く、且つ、下面の位置を高くすることで、その部分を薄くしている。
　本実施の形態では、少なくとも、締結穴８０の周囲の部分（厚い部分）において、面圧緩衝部材６１の上面をケース６０から露出させ、面圧緩衝部材６１の下面をヒートシンク５０に当接させる。それにより、実施の形態１と同様に、ボルトによる締結時にケース６０やヒートシンク５０に生じる応力（面圧）が抑制される効果が得られる。
　また、面圧緩衝部材６１の薄い部分の上面または下面をケース６０の樹脂で覆うようにすることで、実施の形態１よりも、ケース６０の樹脂と面圧緩衝部材６１との高い密着性が得られる。さらに密着性を高めるために、面圧緩衝部材６１の厚い部分（締結穴８０の周囲の部分）の側面に、ローレット等の凹凸形状を設けてもよい。
　さらに、面圧緩衝部材６１が部分的に薄く形成されることで、材料コストの削減や重量低減も期待できる。
　＜実施の形態６＞
　上記の実施の形態では、面圧緩衝部材６１はインサート成型によってケース６０と一体的に形成されるものとしたが、実施の形態６では、面圧緩衝部材６１をケース６０とは別体の部品とする。この場合、面圧緩衝部材６１とケース６０とは、半導体装置の組み立て工程で、接着剤を用いて接合される。なお、接着剤は、面圧緩衝部材６１のケース６０と接する面にのみ塗布し、ケース６０から露出する面（つまり、ボルトおよびヒートシンク５０と接する面）には塗布しない。
　ケース６０と面圧緩衝部材６１とを接着剤を用いて接合することで、面圧緩衝部材６１の剥離対策（例えば、外部電極４０の樹脂の肉厚増加）が不要となり、半導体装置の小型化に寄与できる。また、ケース６０の成形時にインサートする部材が減ることで、ケース６０の生産性向上も期待できる。また、面圧緩衝部材６１とボルトおよびヒートシンク５０とが接する面に接着剤を塗布しないことで、締結部のメタルタッチを実現できる。
　なお、本発明は、その発明の範囲内において、各実施の形態を自由に組み合わせたり、各実施の形態を適宜、変形、省略することが可能である。
　本発明は詳細に説明されたが、上記した説明は、すべての態様において、例示であって、この発明がそれに限定されるものではない。例示されていない無数の変形例が、この発明の範囲から外れることなく想定され得るものと解される。
　１０　半導体素子、２０　ろう材、２１　ろう材、３０　回路パターン、３１　絶縁基板、３２　金属パターン、４０　外部電極、４１　配線、５０　ヒートシンク、５１　放熱フィン、６０　ケース、６１　面圧緩衝部材、６１ａ　梁部、６１ｂ　貫通穴、６１ｃ　凹部、６１ｄ　ディンプル、７０　封止材、８０　締結穴。

Claims (20)

  1. 　半導体素子と、
    　前記半導体素子を搭載したヒートシンクと、
    　前記ヒートシンクに搭載され前記半導体素子を収納する樹脂製のケースと、
    　前記ケースおよび前記ヒートシンクを貫通する締結穴と、
    を備え、
    　前記ケースは、平面視で前記締結穴を含む部分に、前記樹脂よりも高い剛性を有する板状の面圧緩衝部材を備える、
    半導体装置。
  2. 　少なくとも前記締結穴の周囲において、前記面圧緩衝部材の上面は前記ケースから露出し、前記面圧緩衝部材の下面は前記ヒートシンクに当接する、
    請求項１記載の半導体装置。
  3. 　前記締結穴は複数存在し、
    　前記面圧緩衝部材は、平面視で前記複数の締結穴の全てを含む形状である、
    請求項１または請求項２に記載の半導体装置。
  4. 　前記面圧緩衝部材は、前記ケースの外周部に延在する部分と前記ケース内を横断する梁部とを備える、
    請求項１から請求項３のいずれか一項に記載の半導体装置。
  5. 　前記面圧緩衝部材は、前記ケースの外周部に延在するフレーム状である、
    請求項１から請求項３のいずれか一項に記載の半導体装置。
  6. 　前記面圧緩衝部材は、前記ケース内を横断する梁部を備える、
    請求項５に記載の半導体装置。
  7. 　前記締結穴および前記面圧緩衝部材はそれぞれ複数存在し、
    　前記複数の面圧緩衝部材の各々は、平面視で少なくとも１つの締結穴を含む形状である、
    請求項１または請求項２に記載の半導体装置。
  8. 　前記複数の面圧緩衝部材は、全て同じ形状である、
    請求項７に記載の半導体装置。
  9. 　前記複数の面圧緩衝部材の少なくとも１つは、前記ケースの隣接する２辺に延在するＬ字型である、
    請求項７または請求項８に記載の半導体装置。
  10. 　前記複数の面圧緩衝部材の少なくとも１つは、前記ケースの外周部に延在する部分と前記ケース内を横断する部分とを含むフレーム状である、
    請求項７または請求項８に記載の半導体装置。
  11. 　前記面圧緩衝部材は、前記締結穴の周囲を除く部分に、貫通穴、凹部およびディンプルのうちのいずれかが形成されている、
    請求項１から請求項１０のいずれか一項に記載の半導体装置。
  12. 　前記面圧緩衝部材は、平面視で前記ケースに内包されている、
    請求項１から請求項１１のいずれか一項に記載の半導体装置。
  13. 　前記面圧緩衝部材は、前記締結穴の周囲の部分が他の部分よりも厚く形成されている、
    請求項１から請求項１２のいずれか一項に記載の半導体装置。
  14. 　前記面圧緩衝部材は、前記締結穴の周囲の部分の側面に凹凸が形成されている、
    請求項１３に記載の半導体装置。
  15. 　前記面圧緩衝部材は、前記ケースにインサート成型されている、
    請求項１から請求項１４のいずれか一項に記載の半導体装置。
  16. 　前記面圧緩衝部材は、前記ケースに接着剤を用いて接着されている、
    請求項１から請求項１４のいずれか一項に記載の半導体装置。
  17. 　前記面圧緩衝部材は、前記樹脂よりも高い熱伝導率を有する、
    請求項１から請求項１６のいずれか一項に記載の半導体装置。
  18. 　前記面圧緩衝部材の材料はＦｅである、
    請求項１から請求項１６のいずれか一項に記載の半導体装置。
  19. 　前記面圧緩衝部材の材料はＣｕである、
    請求項１から請求項１６のいずれか一項に記載の半導体装置。
  20. 　前記締結穴に挿入され、前記ケースおよび前記ヒートシンクを外部の筐体に締結するボルトをさらに備え、
    　前記面圧緩衝部材は前記ボルトと同じ材質である、
    請求項１から請求項１６のいずれか一項に記載の半導体装置。
PCT/JP2017/041950 2017-11-22 2017-11-22 半導体装置 WO2019102537A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE112017008226.9T DE112017008226T5 (de) 2017-11-22 2017-11-22 Halbleitervorrichtung
JP2019556010A JP6742538B2 (ja) 2017-11-22 2017-11-22 半導体装置
US16/754,992 US20210202330A1 (en) 2017-11-22 2017-11-22 Semiconductor device
CN201780096912.5A CN111373527B (zh) 2017-11-22 2017-11-22 半导体装置
PCT/JP2017/041950 WO2019102537A1 (ja) 2017-11-22 2017-11-22 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2017/041950 WO2019102537A1 (ja) 2017-11-22 2017-11-22 半導体装置

Publications (1)

Publication Number Publication Date
WO2019102537A1 true WO2019102537A1 (ja) 2019-05-31

Family

ID=66630918

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/041950 WO2019102537A1 (ja) 2017-11-22 2017-11-22 半導体装置

Country Status (5)

Country Link
US (1) US20210202330A1 (ja)
JP (1) JP6742538B2 (ja)
CN (1) CN111373527B (ja)
DE (1) DE112017008226T5 (ja)
WO (1) WO2019102537A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113140531A (zh) * 2020-01-17 2021-07-20 三菱电机株式会社 半导体装置及半导体模块
WO2023281562A1 (ja) * 2021-07-05 2023-01-12 三菱電機株式会社 半導体装置および半導体装置の製造方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7378379B2 (ja) * 2020-11-02 2023-11-13 三菱電機株式会社 パワー半導体モジュール及び電力変換装置
EP4075484A1 (en) 2021-04-12 2022-10-19 Hitachi Energy Switzerland AG Power semiconductor module comprising molded body and method for producing a power semiconductor module

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003133756A (ja) * 2001-10-25 2003-05-09 Nissan Motor Co Ltd 電子ユニットの筐体構造
JP2010135548A (ja) * 2008-12-04 2010-06-17 Casio Hitachi Mobile Communications Co Ltd 部品の固定構造及び電子機器
JP2012028552A (ja) * 2010-07-23 2012-02-09 Nissan Motor Co Ltd 半導体モジュールのケース構造
JP2013222870A (ja) * 2012-04-18 2013-10-28 Ngk Spark Plug Co Ltd 半導体装置
JP2017123360A (ja) * 2016-01-04 2017-07-13 株式会社東芝 半導体モジュール

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0724292B2 (ja) * 1988-05-20 1995-03-15 三菱電機株式会社 半導体装置
JP2000082774A (ja) * 1998-06-30 2000-03-21 Sumitomo Electric Ind Ltd パワ―モジュ―ル用基板およびその基板を用いたパワ―モジュ―ル
JP4006189B2 (ja) * 2001-04-19 2007-11-14 株式会社ケーヒン 車両用制御ユニット構造
DE102010018677A1 (de) * 2010-04-28 2011-11-03 Watermann Polyworks Gmbh Dichtungsmanschette
JP5251991B2 (ja) * 2011-01-14 2013-07-31 トヨタ自動車株式会社 半導体モジュール
WO2013093958A1 (ja) * 2011-12-20 2013-06-27 三菱電機株式会社 樹脂モールド型半導体モジュール
JP6094197B2 (ja) * 2012-12-17 2017-03-15 ダイキン工業株式会社 パワーモジュール
JP5928324B2 (ja) * 2012-12-19 2016-06-01 三菱電機株式会社 電力用半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003133756A (ja) * 2001-10-25 2003-05-09 Nissan Motor Co Ltd 電子ユニットの筐体構造
JP2010135548A (ja) * 2008-12-04 2010-06-17 Casio Hitachi Mobile Communications Co Ltd 部品の固定構造及び電子機器
JP2012028552A (ja) * 2010-07-23 2012-02-09 Nissan Motor Co Ltd 半導体モジュールのケース構造
JP2013222870A (ja) * 2012-04-18 2013-10-28 Ngk Spark Plug Co Ltd 半導体装置
JP2017123360A (ja) * 2016-01-04 2017-07-13 株式会社東芝 半導体モジュール

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113140531A (zh) * 2020-01-17 2021-07-20 三菱电机株式会社 半导体装置及半导体模块
US20210225731A1 (en) * 2020-01-17 2021-07-22 Mitsubishi Electric Corporation Semiconductor device and semiconductor module
WO2023281562A1 (ja) * 2021-07-05 2023-01-12 三菱電機株式会社 半導体装置および半導体装置の製造方法
JP7483142B2 (ja) 2021-07-05 2024-05-14 三菱電機株式会社 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
US20210202330A1 (en) 2021-07-01
DE112017008226T5 (de) 2020-09-03
CN111373527B (zh) 2024-04-26
JPWO2019102537A1 (ja) 2020-05-28
JP6742538B2 (ja) 2020-08-19
CN111373527A (zh) 2020-07-03

Similar Documents

Publication Publication Date Title
JP5602095B2 (ja) 半導体装置
WO2019102537A1 (ja) 半導体装置
US9418910B2 (en) Semiconductor device
JP5955251B2 (ja) パワー半導体モジュール
US9362192B2 (en) Semiconductor device comprising heat dissipating connector
JP5432085B2 (ja) 電力半導体装置
CN109637983B (zh) 芯片封装
JP2019067949A (ja) 半導体装置
JP2017005165A (ja) 半導体装置
JPWO2019167509A1 (ja) 半導体装置
JP6160698B2 (ja) 半導体装置
JP2019125708A (ja) 半導体装置
US20070013053A1 (en) Semiconductor device and method for manufacturing a semiconductor device
US20150130042A1 (en) Semiconductor module with radiation fins
JP2014056982A (ja) パワー半導体装置およびその製造方法
JP2012248700A (ja) 半導体装置
JP7163583B2 (ja) 半導体装置
JP2013026296A (ja) パワーモジュール
JP2015122453A (ja) パワーモジュール
JP5172290B2 (ja) 半導体装置
JP2015185835A (ja) 半導体装置及びその製造方法
TWI660471B (zh) 晶片封裝
US20210225731A1 (en) Semiconductor device and semiconductor module
US9357678B2 (en) Semiconductor module
JP5693395B2 (ja) 半導体装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17932769

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2019556010

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17932769

Country of ref document: EP

Kind code of ref document: A1