WO2015125928A1 - 内蔵キャパシタ層形成用銅張積層板、多層プリント配線板及び多層プリント配線板の製造方法 - Google Patents
内蔵キャパシタ層形成用銅張積層板、多層プリント配線板及び多層プリント配線板の製造方法 Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B15/00—Layered products comprising a layer of metal
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B15/00—Layered products comprising a layer of metal
- B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B15/00—Layered products comprising a layer of metal
- B32B15/20—Layered products comprising a layer of metal comprising aluminium or copper
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2307/00—Properties of the layers or laminate
- B32B2307/50—Properties of the layers or laminate having particular mechanical properties
- B32B2307/51—Elastic
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
- B32B2457/08—PCBs, i.e. printed circuit boards
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
- B32B2457/16—Capacitors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09763—Printed component having superposed conductors, but integrated in one circuit layer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
Definitions
- This application relates to a method for manufacturing a copper-clad laminate for forming a built-in capacitor layer, a multilayer printed wiring board with a built-in capacitor circuit, and a multilayer printed wiring board with a built-in capacitor circuit.
- a multilayer printed wiring board with a capacitor circuit including a capacitor circuit in an inner layer portion is used.
- such a multilayer printed wiring board with a built-in capacitor circuit is used in an infrastructure communication device, a network server, a supercomputer, etc., and copes with an improvement in LSI wiring density and an increase in the size of a chip to be mounted.
- Patent Document 1 discloses a capacitor circuit (built-in capacitor) having a layer configuration of “conductive foil / dielectric sheet / conductive foil” on the inner layer of the multilayer printed wiring board.
- a multilayer printed wiring board with built-in capacitor circuit (indicated by the term “capacitive printed wiring board” in Patent Document 1) is disclosed.
- an insulating layer that exhibits excellent voltage resistance without being short-circuited even when a voltage is applied between copper foil surfaces and that is not destroyed by showering pressure during circuit formation etching is provided.
- a copper foil layer as a conductor is disposed on the outer layers on both sides, and a resin layer as a dielectric is sandwiched between the copper foil layers.
- the resin layer has a three-layer structure in which the layer structure is a thermosetting resin layer / a heat-resistant film layer / a thermosetting resin layer, and the total The thickness is 25 ⁇ m or less, the thermosetting resin layer is composed of an epoxy resin material, the heat-resistant film layer has a Young's modulus of 300 kg / mm 2 or more, a tensile strength of 20 kg / mm 2 or more, and a tensile elongation.
- the capacitance of the capacitor circuit increases as the dielectric constant of the dielectric layer increases and the thickness of the dielectric layer decreases. Therefore, it is natural to make the dielectric layer as thin as possible, but when the dielectric layer is made too thin, the withstand voltage decreases between the upper electrode and the lower electrode of the capacitor circuit, causing a short circuit.
- a high-strength film having heat resistance is disposed in the middle of the dielectric layer.
- a multilayer printed wiring board with a capacitor circuit used in the above-described infrastructure communication device, network server, supercomputer, etc. generally requires a complicated circuit design.
- most of the through holes that are densely populated tend to be designed as clearance holes that do not have electrical continuity with the power supply circuit and the ground circuit. There is.
- the double-sided copper-clad laminate disclosed in Patent Document 2 is used to manufacture the multilayer printed wiring board with a capacitor circuit disclosed in Patent Document 1, and the multilayer printed wiring board with a capacitor circuit is manufactured.
- a through hole for forming a through hole is formed by drilling, there is a problem that a crack is generated in the capacitor dielectric layer.
- the problem that cracks occur in the capacitor dielectric layer during drilling tends to occur more easily as the multilayer printed wiring board with a built-in capacitor circuit progresses. Similar problems tend to occur more easily as the copper layer constituting the capacitor circuit becomes thicker.
- FIG. 6 is a cross-sectional photograph including a through-hole section of a multilayer printed wiring board with built-in capacitor circuit (26 layers) in which a through-hole for forming a through-hole is formed by drilling and copper plating is performed to form a through-hole TH. .
- the rectangular region A in FIG. 6, the capacitor dielectric layer 2 cracks F C occurs can be confirmed.
- FIG. 7 is an enlarged view of the rectangular area A. As can be seen from this figure, large cracks F C to the capacitor dielectric layer 2 can be confirmed. If such a crack occurs in the capacitor dielectric layer 2, a predetermined dielectric constant cannot be obtained, and satisfactory through-hole plating cannot be performed, which may cause a short circuit.
- a high temperature is applied by soldering or the like in the subsequent printed wiring board manufacturing process, there is a possibility that problems such as delamination may occur due to gas expansion in the cracks.
- a copper clad laminate for forming an internal capacitor layer according to the present application is for forming an internal capacitor layer including an internal capacitor circuit having a layer structure of copper layer / capacitor dielectric layer / copper layer in a multilayer printed wiring board.
- a multilayer printed wiring board with a built-in capacitor circuit according to the present application is a multilayer printed wiring board having a through hole formed by drilling and a built-in capacitor layer including a built-in capacitor circuit, and a capacitor dielectric constituting the built-in capacitor circuit.
- the composite elastic modulus Er in the thickness direction of the resin film constituting the body layer is less than 6.1 GPa.
- the manufacturing method of the multilayer printed wiring board with a built-in capacitor circuit according to the present application includes the following steps.
- Manufacturing process of multilayer laminate A multilayer board with a capacitor circuit having a capacitor circuit on the surface of a capacitor dielectric layer including a resin film having a composite elastic modulus Er of less than 6.1 GPa as a constituent material is prepared, and an insulating layer configuration is provided on both sides thereof. A necessary number of two or more printed wiring boards are laminated through a material to obtain a multilayer laminate having a desired number of layers. Drilling process: Through holes for forming through holes are formed at necessary locations by drilling the multilayer laminate. Finishing process: After forming the through-hole for forming the through-hole, necessary processing such as smear removal by desmear treatment, interlayer conduction formation, plating treatment, etc. is performed to form the outer layer circuit and multilayer print with built-in capacitor circuit Get a wiring board.
- the composite elastic modulus Er in the thickness direction of the resin film constituting the capacitor dielectric layer is less than 6.1 GPa.
- the built-in capacitor layer of the multilayer printed wiring board with built-in capacitor circuit manufactured using this copper-clad laminate for forming the built-in capacitor layer is cracked in the capacitor dielectric layer even if through holes for through-hole formation are formed by drilling. Can be prevented. Therefore, the multilayer printed wiring board with a built-in capacitor circuit obtained by using the copper-clad laminate for forming a built-in capacitor layer according to the present application has a good capacitor circuit without damaging the capacitor dielectric layer, and thus has stable capacitor characteristics. Can demonstrate.
- the insulating layer constituent material used when laminating multilayer printed wiring boards is a prepreg in which a thermosetting resin or the like is impregnated into a skeleton material such as glass cloth, glass nonwoven fabric, resin fiber cloth, or resin fiber nonwoven fabric. used.
- a prepreg in which a thermosetting resin or the like is impregnated into a skeleton material such as glass cloth, glass nonwoven fabric, resin fiber cloth, or resin fiber nonwoven fabric.
- a power circuit / ground circuit is formed using a copper layer having a thickness of 70 ⁇ m or more, and a multilayer printed wiring board with a built-in capacitor circuit including three or more power circuit layers / ground circuit layers
- the resin content in the vicinity of the clearance hole becomes very high.
- the thickness of the multilayer printed wiring board with a built-in capacitor circuit is reduced in the vicinity of the clearance hole where the skeleton material does not exist due to the shrinkage when the inflowing resin is cured.
- Directional distortion becomes very large.
- the strain in the thickness direction increases, when drilling, the capacitor dielectric layer existing near the center of the multilayer printed wiring board with built-in capacitor circuit is most likely to accumulate due to the indentation of the drill. We thought that it became easy to occur.
- the copper-clad laminate for forming a built-in capacitor layer is a copper-clad laminate used for forming a built-in capacitor circuit having a layer configuration of “copper layer / capacitor dielectric layer / copper layer” on the inner layer of a multilayer printed wiring board. It is a laminated board. As shown in FIG. 1, the copper clad laminate includes copper layers 3 on both surfaces of the capacitor dielectric layer 2. Therefore, the built-in capacitor circuit manufactured using the copper-clad laminate for forming the built-in capacitor layer also has a layer configuration of “copper layer / capacitor dielectric layer / copper layer”.
- each item will be described. In the drawings in the present application, it is clearly stated that the thickness of each layer such as the capacitor dielectric layer 2, the copper layer 3, the resin film F, etc. shown in the schematic cross section does not reflect the image of the actual thickness. Keep it.
- Capacitor dielectric layer The capacitor dielectric layer of the copper clad laminate for forming a built-in capacitor layer according to the present application includes at least a resin film as a constituent material, and the composite elastic modulus Er in the thickness direction of the resin film is It is less than 6.1 GPa.
- “the capacitor dielectric layer includes a resin film” means that the capacitor dielectric layer 2 adopts a layer structure including only the “resin film layer” in the case of FIG. 1A, and FIG. In this case, it means that a three-layer structure of “resin layer 4 / resin film layer F / resin layer 4” is included.
- a two-layer configuration in which the capacitor dielectric layer 2 is “resin layer 4 / resin film layer F” may be employed.
- the composite elastic modulus Er in the thickness direction of the resin film is 6.1 GPa or more, in the process of manufacturing a multilayer printed wiring board with a built-in capacitor circuit, when forming a through hole for forming a through hole by drilling, A crack is likely to occur in the capacitor dielectric layer, and when the crack occurs, the function as the dielectric layer is impaired. That is, when the composite elastic modulus Er in the thickness direction of the resin film is less than 6.1 GPa, the shear stress generated by the pushing of the drill during the drilling process performed in the process of manufacturing the printed wiring board is relaxed and absorbed. As a result, the generation of cracks in the capacitor dielectric layer can be prevented.
- the lower limit value of the composite elastic modulus Er in the thickness direction of the resin film is not particularly limited, but is about 0.1 GPa in consideration of necessary rigidity and strength as a copper-clad laminate.
- the composite elastic modulus of the resin film in the present application was measured by the nanoindentation method.
- a resin film to be measured is fixed to a stage, and continuous stiffness measurement is performed five times. Then, the measurement data was analyzed, and a composite elastic modulus of the resin film was obtained assuming a Poisson's ratio of 0.3.
- a device name Nano Indenter XP manufactured by MTM Systems is used, and Berkovich, which is a triangular pyramid indenter, is used as an indenter.
- a resin component satisfying the above-described composite elastic modulus and excellent in dielectric characteristics there is no particular limitation.
- epoxy, polyimide, polyamide, polyamideimide, polyphenylene ether, cyanate, polyolefin, liquid crystal polymer, gindiotactic polystyrene, or the like can be used as a “resin component having excellent dielectric properties” suitable for a resin film.
- polyethylene terephthalate polyethylene naphthalate, polyvinyl carbazole, polyphenylene sulfide, polyamide, aromatic polyamide, polyamide imide, polyether sulfone, polyether nitrile, polyether ether ketone, polyimide, or the like.
- the capacitor dielectric layer 2 in the case of adopting the layer structure of only the “resin film layer” is preferably 30 ⁇ m or less in thickness.
- the capacitance when considered as a capacitor is inversely proportional to the thickness of the capacitor dielectric layer. Therefore, the thinner the capacitor dielectric layer, the larger the electric capacity and the larger the amount of electricity stored. The stored electricity is used as part of the power for power supply, leading to power saving. Therefore, the thickness of the capacitor dielectric layer 2 is determined at the stage of product design and circuit design, and is set to 30 ⁇ m or less in consideration of the required level in the market.
- the lower limit of the thickness of the capacitor dielectric layer 2 is not limited, but is preferably 0.5 ⁇ m or more and more reliably. In order to prevent the above-mentioned short circuit, 5 ⁇ m or more is more preferable. However, cracks that occur in the capacitor dielectric layer referred to in this application tend to occur more easily as the thickness of the capacitor dielectric layer increases. Therefore, the technical idea according to the present invention is particularly effective in preventing the occurrence of cracks when the capacitor dielectric layer has a thickness of 12 ⁇ m to 30 ⁇ m.
- the resin film constituting the capacitor dielectric layer 2 can contain a dielectric filler.
- a dielectric filler barium titanate ceramic, lead titanate ceramic, calcium titanate ceramic, magnesium titanate ceramic, bismuth titanate ceramic, strontium titanate It is preferable to disperse a perovskite dielectric filler such as ceramic or lead zirconate ceramic.
- the copper-clad laminate for forming a built-in capacitor layer including the capacitor dielectric layer 2 having only the “resin film layer” described above can be obtained by laminating a resin film between two copper foils. Moreover, after forming the resin film layer by the casting method on the surface of copper foil, the surface of the said resin film layer and copper foil can also be laminated
- a resin composition film that is converted to a polyimide resin by heating for example, polyamic acid, is formed on the surface of the copper foil, and a condensation reaction is caused by heating to form a polyimide resin film layer on the surface of the copper foil. It is a method of forming directly.
- the capacitor dielectric layer 2 adopts a three-layer configuration of “resin layer 4 / resin film layer F / resin layer 4” as shown in FIG. This is because the presence of the resin film F at the center of the capacitor dielectric layer can completely eliminate the possibility that the surfaces of the copper layers on both sides of the capacitor dielectric layer come into contact with each other and cause a circuit short circuit.
- the resin film layer F needs to satisfy the above-described composite elastic modulus. This is because the various objects of the present application cannot be achieved unless the resin film layer F satisfies the above-described composite elastic modulus.
- the resin used for the resin film layer F for example, polyethylene terephthalate, polyethylene naphthalate, polyvinyl carbazole, polyphenylene sulfide, polyimide, polyamide, aromatic polyamide, polyamideimide It is preferable to use polyethersulfone, polyethernitrile, polyetheretherketone or the like.
- the capacitor dielectric layer 2 having a three-layer structure, in order to increase the relative dielectric constant and increase the capacitance of the capacitor circuit, the “dielectric filler” similar to the above is included in the matrix of the resin film layer F. It is also preferable to disperse and contain.
- the resin layer 4 is not particularly limited as long as good adhesion between the copper layer 3 and the resin film layer F can be secured, but as the resin component used for the resin layer 4, epoxy, polyimide, polyamide, polyamideimide It is preferable to use a resin component such as And when using a polyimide for the resin layer 4, use of a thermoplastic polyimide resin is suitable. Assuming that good adhesion between the copper layer 3 and the resin film layer F is ensured, these resin components may be appropriately used and the composition thereof may be adjusted. Furthermore, according to the design quality of the capacitor circuit, the same “dielectric filler” as described above can be contained in the resin layer.
- the thickness of each layer when the capacitor dielectric layer 2 has a layer structure of “resin layer 4 / resin film layer F / resin layer 4” will be described.
- the thickness of the resin film layer F is designed to be thicker than the total thickness of the two resin layers 4.
- the “resin film layer F” used here is preferably a resin film having a thickness of 0.5 ⁇ m to 25 ⁇ m, more preferably a thickness of 2 ⁇ m to 20 ⁇ m.
- the resin layer 4 preferably has a thickness of 0.1 ⁇ m to 10 ⁇ m, more preferably a thickness of 2 ⁇ m to 7 ⁇ m.
- the copper-clad laminate for forming a built-in capacitor layer including the capacitor dielectric layer 2 having the above-described layer configuration of “resin layer 4 / resin film layer F / resin layer 4” is a resin of two copper foils with resin. It can be obtained by arranging and laminating resin films between the resin surfaces in a state where the surfaces are opposed to each other. Moreover, after forming the resin film layer on the surface of the resin layer of one sheet of copper foil with resin, the resin surface of another copper foil with resin can be laminated on the surface of the resin film.
- the copper layer 3 of the copper clad laminate 1 for forming a built-in capacitor layer according to the present application is “a copper layer composed of a copper foil”, “a copper layer composed of a copper foil and a copper plating layer”, It includes concepts such as “a copper layer formed by plating by providing a seed layer on a capacitor dielectric layer”.
- the copper layer 3 is not particularly limited in thickness as long as a power supply circuit and a ground circuit can be formed, but from a practical viewpoint, the thickness is preferably 18 ⁇ m to 105 ⁇ m.
- the thickness of the copper layer 3 is preferably 18 ⁇ m to 105 ⁇ m.
- the resin dielectric layer 2 in the thickness direction of the resin film is used.
- the composite elastic modulus Er less than 6.1 GPa, an effect of preventing the occurrence of cracks can be obtained.
- the thickness of the copper layer 3 is 70 ⁇ m or more, the crack generation rate is higher.
- the capacitor By making the composite elastic modulus Er in the thickness direction of the resin film constituting the dielectric layer less than 6.1 GPa, an effect of preventing the occurrence of cracks can be obtained. Even if the thickness of the copper layer 3 exceeds 105 ⁇ m, there is no particular problem. However, there is no special market requirement for forming a power supply circuit / ground circuit with a copper layer having a thickness of more than 105 ⁇ m, which is a waste of resources.
- a multilayer printed wiring board with a built-in capacitor circuit according to the present application is a multilayer printed wiring board with a built-in capacitor circuit including a through hole formed by drilling and a built-in capacitor layer, and a capacitor dielectric layer constituting the built-in capacitor layer is provided.
- the composite elastic modulus Er in the thickness direction of the resin film to be formed is less than 6.1 GPa.
- the composite elastic modulus in the thickness direction of the resin film constituting the capacitor dielectric layer constituting the built-in capacitor layer “the thickness of the built-in capacitor layer of the multilayer printed wiring board with built-in capacitor circuit according to the present application” , “Resin layer / resin film layer / resin layer structure of capacitor dielectric layer constituting internal capacitor layer”, “Thickness of electrode circuit disposed on both surfaces of internal capacitor layer constituting capacitor circuit”
- the same reason and basis as described in the above-described copper clad laminate for forming a built-in capacitor layer according to the present application can be applied. Therefore, the description here will be omitted in order to avoid redundant description regarding these items.
- only items not described in the above-described copper clad laminate for forming a built-in capacitor layer according to the present application will be described.
- the multilayer printed wiring board with a built-in capacitor circuit according to the present application is preferably intended for a total thickness of 1.8 mm or more and 8 or more layers.
- the “total thickness” here is the thickness of the multilayer printed wiring board with a built-in capacitor circuit to be drilled. If this total thickness exceeds 1.8 mm, cracks in the capacitor dielectric layer are likely to occur when through holes for forming through holes are formed by drilling in the process of manufacturing a printed wiring board.
- the multilayer printed wiring board with a built-in capacitor circuit of 8 layers or more is a target here, as the number of layers of the multilayer printed wiring board with a built-in capacitor circuit increases, cracks tend to occur in the capacitor dielectric layer.
- the invention according to the present application is directed to a multilayer printed wiring board with a built-in capacitor circuit having these numbers of layers. Note that the number of conductor layers is indicated when referring to “8 layers”, “16 layers”, etc.
- the multilayer printed wiring board with a built-in capacitor circuit according to the present application which has a multilayer of 8 layers or more, has a total thickness of 1.8 mm or more, and satisfies the above requirements, Even if the through hole for forming the through hole is formed, it is possible to prevent the occurrence of cracks in the capacitor dielectric layer near the clearance hole including the power supply circuit layer / ground circuit layer having a high resin content.
- the manufacturing method of the multilayer printed wiring board with a built-in capacitor circuit includes the following steps. Hereinafter, it demonstrates for every process.
- a multilayer board with a capacitor circuit having a capacitor circuit on the surface of the capacitor dielectric layer as shown in FIG. 2 is prepared.
- the capacitor dielectric layer at this time includes a resin film having a composite elastic modulus Er of less than 6.1 GPa as a constituent material.
- This laminated board with a capacitor circuit comprises a copper layer used as an upper electrode of a capacitor circuit on one side of the capacitor dielectric layer, and a copper layer used as a lower electrode of the capacitor circuit on the other side of the capacitor dielectric layer. Yes, it can be manufactured by the following method.
- This laminated board with a capacitor circuit can be manufactured by a subtractive method.
- a copper-clad laminate used for forming a built-in capacitor circuit having a layer structure of copper layer / capacitor dielectric layer / copper layer on the inner layer of a multilayer printed wiring board, which has a composite elasticity in the thickness direction.
- a copper-clad laminate 1 for forming a built-in capacitor layer having copper layers on both sides of a capacitor dielectric layer containing a resin film having a rate Er of less than 6.1 GPa as a constituent material is prepared.
- a schematic cross-sectional view of the copper-clad laminate 1 for forming a built-in capacitor layer is shown in FIG.
- a capacitor circuit having a layer configuration of “upper electrode E U / capacitor dielectric layer 2 / lower electrode E L ” is formed on both surfaces of the built-in capacitor layer forming copper-clad laminate 1, and the capacitor shown in FIG.
- the laminated board 10 with a circuit can be obtained.
- this laminated board 10 with a capacitor circuit can be manufactured also by the semi-additive method using copper foil.
- a copper clad laminate 1 for forming a built-in capacitor layer in which an ultrathin copper foil with a carrier foil is laminated is prepared, and the carrier foil is removed from the surface of the ultrathin copper foil layer to be exposed.
- Pattern plating according to the shape of the capacitor circuit is performed, and then the ultrathin copper foil layer exposed between the circuits is removed by flash etching to form a capacitor circuit having the above-described layer configuration.
- this laminated board 10 with a capacitor circuit can also be manufactured by a semi-additive method.
- a seed layer is provided on the surface of the capacitor dielectric layer, and pattern plating corresponding to the circuit shape is performed on the seed layer. Thereafter, the seed layer exposed between the circuits can be removed by flash etching to form a capacitor circuit having the above-described layer configuration.
- the insulating layer constituting material 5 PP1 to PPn
- two or more layers of printed wiring boards PWB1 to PWBn are collectively laminated on the surface of the multilayer board 10 with a capacitor circuit.
- a multilayer laminate can be obtained.
- the multi-layer laminate 20 having the desired number of layers can be quickly formed.
- the insulating layer constituting material 5 is not particularly limited as long as it can be used as an insulating layer of a printed wiring board using a prepreg, a resin sheet or the like. Further, the two or more printed wiring boards PWB1 to PWBn used for the lamination may be obtained by any manufacturing method.
- any material may be used as long as it can be used for the production of the printed wiring board as the copper layer and the insulating layer constituting material.
- formation of interlayer conduction means such as via holes, various platings, etc. may be performed.
- Drilling process In this process, as shown in FIG. 5 (C), the multilayer laminate 20 obtained as described above is drilled to form through holes for forming through holes at necessary locations. 6 is formed.
- the conditions used for the drilling of a normal printed wiring board are generally a drill rotation speed of 60000 rpm to 200000 rpm and a drill pushing speed of 0.5 m / min to 6.0 m / min. Used.
- the through-hole layer is formed by forming a copper plating layer on the inner wall of the through-hole, filling the through-hole with a conductive paste, etc. It is necessary to ensure continuity.
- desmear treatment wet etching using permanganate aqueous solution, plasma etching, etc.
- a multilayer printed wiring board (not shown) with a built-in capacitor circuit can be obtained.
- Example 1 a multilayer printed wiring board with a built-in capacitor circuit in which through holes were formed was manufactured through the following steps, and it was confirmed whether or not cracks occurred in the capacitor dielectric layer 2 in the vicinity of the through holes.
- a copper-clad laminate for forming a built-in capacitor layer was manufactured using a polyimide resin film (thickness: 12.5 ⁇ m) of 5.87 GPa. Two sheets of the resin-coated copper foil are used, the polyimide resin film is sandwiched between them, the resin surfaces of the resin-coated copper foil are placed opposite to each other, and the pressing pressure is 1.5 MPa and the pressing temperature is 190 ° C. ⁇ 1 hour.
- a copper clad laminate 1 for forming a built-in capacitor layer having a layer configuration of “copper layer 3 / capacitor dielectric layer 2 (thickness 22.5 ⁇ m) / copper layer 3” shown in FIG. 1B was obtained. .
- Manufacturing process of multilayer laminate In this step, first, a dry film is applied to both surfaces of the copper-clad laminate 1 for forming the built-in capacitor layer, the etching pattern of the capacitor circuit is exposed and developed, and then the copper etching is performed. performed, the dry film release by performing, to form a capacitor circuit comprising a layer structure of an upper electrode E U / capacitor dielectric layer 2 / the lower electrode E L, with a capacitor circuit laminate as shown in FIG. 2 (B) 10 was obtained.
- the insulating layer constituting material 5 (PP0) is sandwiched between the two laminated boards 10 with a capacitor circuit, and outside the laminated boards 10 with a capacitor circuit.
- Insulating layer component 5 PP1 to PP5
- two-layer multilayer printed wiring boards PWB1 to PWB5 insulating layer thickness: 0.1 mm, circuit thickness: 18 ⁇ m
- the insulating layer is the outermost layer
- the component material 5 (PPn + 1) and the copper foil 7 having a thickness of 18 ⁇ m for forming the outermost copper layer 3 are arranged and laminated together to form a multilayer of 26 layers of the image shown in FIG. 4B.
- a laminate 20 (total thickness 3.2 mm) was obtained.
- a prepreg having a thickness of 0.05 mm (MEGTRON 6 manufactured by Panasonic Corporation) was used for each two layers.
- Drilling process In this process, through-holes 6 for forming through holes were formed at necessary locations as shown in FIG. 5 (C) by drilling the multilayer laminate 20 obtained above. .
- the drilling conditions at this time were a drill rotation speed of 200000 rpm and a drill pushing speed of 4.0 m / min.
- Example 2 instead of the polyimide resin film used in Example 1, a polyimide resin film (thickness: 14.2 ⁇ m) having a composite elastic modulus Er of 2.66 GPa in the thickness direction was used, and the same as in Example 1 1B, a copper clad laminate 1 for forming a built-in capacitor layer having a layer configuration of “copper layer 3 / capacitor dielectric layer 2 (thickness 24.2 ⁇ m) / copper layer 3” shown in FIG. Using this, a multilayer printed wiring board having 26 layers of capacitor circuits in which through holes were formed was manufactured. Then, crack generation evaluation and dimensional stability evaluation were performed in the same manner as in Example 1. The results are shown in Table 1.
- Example 2 instead of the polyimide resin film used in Example 1, an aromatic polyamide resin film (thickness 12.1 ⁇ m) having a composite elastic modulus Er of 6.80 GPa in the thickness direction was used, and the same as in Example 1.
- a 26-layer multilayer printed wiring board with a built-in capacitor circuit in which through holes were formed was manufactured.
- crack generation evaluation and dimensional stability evaluation were performed in the same manner as in Example 1. The results are shown in Table 1.
- Example 1 and Comparative Example are equivalent and that Example 2 has low dimensional stability.
- the composite elastic modulus in the thickness direction of the resin film constituting the capacitor dielectric layer is preferably lower from the viewpoint of preventing the occurrence of cracks, but the composite elastic modulus is 3 as in Example 2.
- the pressure is 0.0 GPa or less, the dimensional stability tends to decrease.
- the thickness direction of the resin film constituting the capacitor dielectric layer is preferably 3.0 GPa to less than 6.1 GPa.
- the copper-clad laminate for forming a built-in capacitor layer allows a composite elastic modulus Er or the like in the thickness direction of the resin film constituting the capacitor dielectric layer to be within an appropriate range, thereby allowing through-through in a printed wiring board manufacturing process. It is possible to effectively prevent the capacitor dielectric layer from being cracked during drilling when forming the through hole for hole formation. Accordingly, it is possible to provide a multilayer printed wiring board with a built-in capacitor circuit having capacitor characteristics as designed. Moreover, the manufacturing method of the multilayer printed wiring board with a built-in capacitor circuit can be used without any changes to the conventional production method, and therefore, it is preferable without requiring extra equipment investment.
Abstract
Description
本件出願に係る内蔵キャパシタ層形成用銅張積層板は、多層プリント配線板の層内に銅層/キャパシタ誘電体層/銅層の層構成の内蔵キャパシタ回路を含む内蔵キャパシタ層を形成するための銅張積層板であって、当該キャパシタ誘電体層は少なくとも樹脂フィルムを構成材料として含むものであり、当該樹脂フィルムの厚さ方向の複合弾性率Erが6.1GPa未満であることを特徴とする。
本件出願に係るキャパシタ回路内蔵多層プリント配線板は、ドリル加工により形成したスルーホールと、内蔵キャパシタ回路を含む内蔵キャパシタ層とを備える多層プリント配線板であって、当該内蔵キャパシタ回路を構成するキャパシタ誘電体層を構成する樹脂フィルムの厚さ方向の複合弾性率Erが6.1GPa未満であることを特徴とする。
本件出願に係るキャパシタ回路内蔵多層プリント配線板の製造方法は、以下の工程を含むことを特徴とする。
孔明け加工工程: 当該多層積層体に対して、ドリル加工により、必要な箇所にスルーホール形成用の貫通孔の形成を行う。
仕上げ加工工程: 当該スルーホール形成用の貫通孔の形成を行った後、デスミア処理によるスミア除去、層間導通形成、めっき処理等の必要な加工を施し、外層回路の形成を行いキャパシタ回路内蔵多層プリント配線板を得る。
本件出願に係る内蔵キャパシタ層形成用銅張積層板は、多層プリント配線板の内層に「銅層/キャパシタ誘電体層/銅層」の層構成を備える内蔵キャパシタ回路を形成するために用いる銅張積層板である。この銅張積層板は、図1に示すように、キャパシタ誘電体層2の両面に銅層3を備える。従って、この内蔵キャパシタ層形成用銅張積層板を用いて製造される内蔵キャパシタ回路も、「銅層/キャパシタ誘電体層/銅層」の層構成を備える。以下、項目毎に説明する。なお、本件出願における図面において、模式断面に示すキャパシタ誘電体層2、銅層3、樹脂フィルムF等の各層の厚さに関しては、現実の厚さのイメージを反映させたものではないことを明記しておく。
本件出願に係るキャパシタ回路内蔵多層プリント配線板は、ドリル加工により形成したスルーホールと内蔵キャパシタ層とを備えるキャパシタ回路内蔵多層プリント配線板であって、当該内蔵キャパシタ層を構成するキャパシタ誘電体層を構成する樹脂フィルムの厚さ方向の複合弾性率Erが6.1GPa未満であることを特徴とする。ここで、「内蔵キャパシタ層を構成するキャパシタ誘電体層を構成する樹脂フィルムの厚さ方向の複合弾性率」、「本件出願に係るキャパシタ回路内蔵多層プリント配線板の前記内蔵キャパシタ層の厚さ」、「内蔵キャパシタ層を構成するキャパシタ誘電体層の樹脂層/樹脂フィルム層/樹脂層の層構成」、「キャパシタ回路を構成する内蔵キャパシタ層の両面に配置する電極回路の厚さ」の各項目に関しては、上述の本件出願に係る内蔵キャパシタ層形成用銅張積層板において述べたと同様の理由及び根拠が適用できる。よって、これらの項目に関する重複した説明を避けるため、ここでの説明は省略する。以下、上述の本件出願に係る内蔵キャパシタ層形成用銅張積層板において述べていない項目に関してのみ述べる。
本件出願に係るキャパシタ回路内蔵多層プリント配線板の製造方法は、以下の工程を含むことを特徴とする。以下、工程毎に説明する。
上述の孔明け加工後の多層積層体20に、スルーホール形成用の貫通孔6の内壁面に銅めっき層を形成し、スルーホール近傍のキャパシタ誘電体層2におけるクラック発生の有無を確認した。このクラックの確認は、金属顕微鏡を用いて、スルーホール近傍のキャパシタ誘電体層2を100倍に拡大して観察することにより行った。評価結果を表1に示す。
IPC-TM-650 2.2.4に規定する寸法安定性評価の試験方法に準拠して、上述の内蔵キャパシタ層形成用銅張積層板の銅箔エッチング後及び加熱後(150℃×30分)の縦及び横の寸法変化率を測定した。
表1から分かるように、多層積層体20のキャパシタ誘電体層2におけるクラック発生の有無を確認すると、実施例1及び実施例2で得られた孔明け加工後の多層積層体20のキャパシタ誘電体層2にクラック発生は認められなかった。これに対し、キャパシタ誘電体層を構成する樹脂フィルムの厚さ方向の複合弾性率Erが6.1GPaを超えている比較例の場合には、クラック発生が認められた。
2 キャパシタ誘電体層
3 銅層
4 樹脂層
5 絶縁層構成材
6 スルーホール形成用の貫通孔
7 銅箔
10 キャパシタ回路付積層板
20 多層積層体
F 樹脂フィルム
EU 上部電極
EL 下部電極
PWB1~PWBn 2層以上の多層プリント配線板
Claims (11)
- 多層プリント配線板の層内に銅層/キャパシタ誘電体層/銅層の層構成の内蔵キャパシタ回路を含む内蔵キャパシタ層を形成するための銅張積層板であって、
当該キャパシタ誘電体層は少なくとも樹脂フィルムを構成材料として含むものであり、当該樹脂フィルムの厚さ方向の複合弾性率Erが6.1GPa未満であることを特徴とする内蔵キャパシタ層形成用銅張積層板。 - 前記銅層は、厚さ18μm~105μmである請求項1に記載の内蔵キャパシタ層形成用銅張積層板。
- 前記キャパシタ誘電体層は、厚さ30μm以下である請求項1又は請求項2に記載の内蔵キャパシタ層形成用銅張積層板。
- 前記キャパシタ誘電体層は、樹脂層/樹脂フィルム層/樹脂層の層構成を備えるものである請求項1~請求項3のいずれか一項に記載の内蔵キャパシタ層形成用銅張積層板。
- ドリル加工により形成したスルーホールと、内蔵キャパシタ回路を含む内蔵キャパシタ層とを備える多層プリント配線板であって、
当該内蔵キャパシタ回路を構成するキャパシタ誘電体層を構成する樹脂フィルムの厚さ方向の複合弾性率Erが6.1GPa未満であることを特徴とするキャパシタ回路内蔵多層プリント配線板。 - 前記キャパシタ誘電体層の両面に配置する電極回路は、厚さ18μm~105μmの銅層である請求項5に記載のキャパシタ回路内蔵多層プリント配線板。
- 前記キャパシタ誘電体層は、厚さ30μm以下である請求項5又は請求項6に記載のキャパシタ回路内蔵多層プリント配線板。
- 前記内蔵キャパシタ層を構成するキャパシタ誘電体層は、樹脂層/樹脂フィルム層/樹脂層の層構成を含む請求項5~請求項7のいずれか一項に記載のキャパシタ回路内蔵多層プリント配線板。
- 前記キャパシタ回路内蔵多層プリント配線板は、トータル厚さが1.8mm以上で、且つ、8層以上である請求項5~請求項8のいずれか一項に記載のキャパシタ回路内蔵多層プリント配線板。
- 内蔵キャパシタ層形成用銅張積層板を用いたキャパシタ回路内蔵多層プリント配線板の製造方法であって、
以下の工程を含むことを特徴とするキャパシタ回路内蔵多層プリント配線板の製造方法。
多層積層体の製造工程: 複合弾性率Erが6.1GPa未満の樹脂フィルムを構成材料として含むキャパシタ誘電体層の表面にキャパシタ回路を備えるキャパシタ回路付積層板を準備し、この両面に絶縁層構成材を介して、2層以上のプリント配線板を必要枚数積層して所望の層数の多層積層体を得る。
孔明け加工工程: 当該多層積層体に対して、ドリル加工により、必要な箇所にスルーホール形成用の貫通孔の形成を行う。
仕上げ加工工程: 当該スルーホール形成用の貫通孔の形成を行った後、デスミア処理によるスミア除去、層間導通形成、めっき処理等の必要な加工を施し、外層回路の形成を行いキャパシタ回路内蔵多層プリント配線板を得る。 - 前記多層積層体の製造工程において、前記キャパシタ回路付積層板の両面に、絶縁層構成材を介して、2層以上のプリント配線板を必要枚数積層して得る多層積層体の層数が8層以上である請求項10に記載のキャパシタ回路内蔵多層プリント配線板の製造方法。
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KR1020167019175A KR102071763B1 (ko) | 2014-02-21 | 2015-02-20 | 내장 캐패시터층 형성용 동장 적층판, 다층 프린트 배선판 및 다층 프린트 배선판의 제조 방법 |
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US10524360B2 (en) | 2019-12-31 |
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MY175520A (en) | 2020-07-01 |
JP6649770B2 (ja) | 2020-02-19 |
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US20180160536A1 (en) | 2018-06-07 |
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KR20190058695A (ko) | 2019-05-29 |
US9924597B2 (en) | 2018-03-20 |
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US20160330839A1 (en) | 2016-11-10 |
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