WO2014187097A1 - 阵列基板、该阵列基板断线修复方法及显示装置 - Google Patents

阵列基板、该阵列基板断线修复方法及显示装置 Download PDF

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Publication number
WO2014187097A1
WO2014187097A1 PCT/CN2013/087962 CN2013087962W WO2014187097A1 WO 2014187097 A1 WO2014187097 A1 WO 2014187097A1 CN 2013087962 W CN2013087962 W CN 2013087962W WO 2014187097 A1 WO2014187097 A1 WO 2014187097A1
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Prior art keywords
data line
line
broken
array substrate
gate
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PCT/CN2013/087962
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English (en)
French (fr)
Inventor
吴松
包杰琼
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京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to US14/372,848 priority Critical patent/US9612461B2/en
Publication of WO2014187097A1 publication Critical patent/WO2014187097A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306Details
    • G02F1/1309Repairing; Testing
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134318Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • G02F1/136263Line defects
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • repairing the broken line is an important means to improve the yield.
  • a structure for arranging data repair lines around the liquid crystal display panel is generally adopted to facilitate the repair of the grid line breakage.
  • ADS type liquid crystal panel (Advanced-Super Dimensional Switching) forms a multi-dimensional electric field by a parallel electric field generated by the pixel electrode or the common electrode edge in the same plane and a longitudinal electric field generated between the pixel electrode and the common electrode, so that the liquid crystal All the aligned liquid crystal molecules directly between the pixel electrode or the common electrode in the box, directly above the pixel electrode or the common electrode can generate a rotation conversion, thereby improving the working efficiency of the planar orientation liquid crystal and increasing the light transmission efficiency.
  • the ADS type liquid crystal display panel can improve the quality of the TFT-LCD picture, and has the advantages of high transmittance, wide viewing angle, high opening ratio, low chromatic aberration, low response time, and no Push Mura.
  • the data line 15 is repaired by, for example, a wire break repair line 9, as shown in FIG.
  • the data line 15 is connected to the disconnection repair line 9 at both ends of the data line 15 by laser welding, and the data line 15 is broken.
  • Repair line 9 got the correct signal.
  • the array substrate is repaired by this method. Since the number of the wire repair lines 9 is limited, there is a limit on the number of lines to be repaired, and it is generally possible to repair the line breaks of the two data lines at most. Moreover, there is currently no mature wire break repair method. If the broken line of the array substrate cannot be effectively repaired, the yield of the liquid crystal display product will be affected. Summary of the invention
  • An embodiment of the present invention provides an array substrate, including:
  • Cross-arranged gate lines and data lines define a plurality of pixel regions arranged in a matrix form; a thin film transistor disposed adjacent to an intersection of the gate line and the data line, a gate of the thin film transistor being connected to the gate line, and a source of the thin film transistor being connected to the data line;
  • a common electrode and a pixel electrode are disposed in each of the pixel regions
  • the common electrode is provided with a plurality of patterns of strip-shaped holes above each pixel area,
  • the gate line, the data line and the common electrode are formed on different layers and partially overlap each other, and the common electrode is provided with a pattern of a first hole-like structure at a position corresponding to the intersection of the gate line and the data line.
  • the common electrode is provided with a pattern of a second hole-like structure directly above the thin film transistor, and the second hole-shaped structure is correspondingly disposed above the gate line and located adjacent to the two first holes Between the structures.
  • the common electrode is a transparent conductive layer.
  • the size of the first hole-like structure in the width direction of the data line is larger than the width of the data line, and protrudes to both sides of the data line.
  • a dimension of the second hole-like structure in a width direction of the gate line is larger than a width of the gate line, and protrudes on both sides of the data line; the first hole-shaped structure is in the gate
  • the dimension in the line width direction is larger than the width of the gate line and protrudes to both sides of the gate line.
  • a plurality of pixel electrodes are located in each of the pixel regions independently of each other, and the pixel electrodes do not overlap with the gate lines and the data lines.
  • the embodiment provides a method for repairing data line breakage of the array substrate described above, which includes the following steps:
  • Step F1 Find the data line break, and determine that the data line between the two first hole-shaped structure regions adjacent to the data line break line above the data line is a data line break line segment;
  • Step F2 cutting the common electrode located above the disconnection segment of the data line along the two sides of the data line to two first hole-shaped structure regions adjacent to the disconnected segment of the data line, so that the data line is electrically conductive Layer area
  • Step F3 splicing the isolated transparent conductive layer region and the data line broken segment at the two ends of the data line disconnection, so that the broken data line passes through the isolated transparent guide The electrical layer area is connected to the signal.
  • the laser cutting method is applied to cut the common electrode above the broken portion of the data line.
  • the isolated transparent conductive layer region and the data line broken segment are welded together by forming a fusion joint by laser welding.
  • the embodiment further provides a method for repairing the grid line breakage of the array substrate as described above, comprising the following steps:
  • Step S1 finding the gate line break, and determining that the gate line between the first hole structure and the second hole structure adjacent to the wire line break line above the gate line is a grid line break joint Paragraph
  • Step S2 cutting the common electrode located above the broken line segment of the gate line along the two sides of the gate line to the first hole-shaped structure region and the second hole-shaped structure region adjacent to the broken line segment of the gate line, thereby setting The common electrode directly above the broken line segment of the gate line is isolated from other areas on the common electrode to form an isolated transparent conductive layer region;
  • Step S3 splicing the isolated transparent conductive layer region and the gate wire break segment at the two ends of the gate line break line, so that the broken gate line is connected through the isolated transparent conductive layer region. signal.
  • the isolated transparent conductive layer region and the gate broken segment are joined together by forming a fusion joint by laser welding.
  • the embodiment further provides a display device including the array substrate as described above.
  • the data line and the broken line of the grid line on the array substrate are repaired conveniently and quickly, and the repair of the data line breakage overcomes the limitation of the number of lines, and is effective.
  • the product yield of the array substrate is improved.
  • FIG. 5 is a structural diagram of a data line break of an ADS type array substrate according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural view of the ADS type array substrate after the data line is broken and repaired according to the embodiment of the present invention
  • FIG. 7 is a structural diagram of a broken line of an ADS type array substrate according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural view of the ADS type array substrate after the wire breakage is repaired according to the embodiment of the present invention. detailed description
  • This embodiment provides an array substrate such as a HADS (High Aperture Ratio-ADS) type or an ADS type liquid crystal array substrate.
  • a HADS High Aperture Ratio-ADS
  • the common electrode 8 the pixel electrode 6, the gate line 2 and the data line 5 are included.
  • the gate line 2 and the data line 5 are both covered with a common electrode 8.
  • the gate lines 2 and the data lines 5 are alternately arranged to form a plurality of pixel regions arranged in a matrix form.
  • the common electrode 8 is respectively provided with a pattern of a plurality of strip-shaped hole structures 8a above each pixel region, and the gate lines 2, the data lines 5 and the common electrode 8 are formed on different layers and partially overlap each other, and the The common electrode 8 is provided with a pattern of the first hole-like structure 12 at a position corresponding to the intersection of the gate line 2 and the data line 5.
  • the data lines of the array substrate and the broken lines of the gate lines can be repaired by the first hole structure 12, and the line break repair of the data lines is not limited by the number of lines.
  • the gate line 2 and the gate 2' are connected to each other and fabricated on the same layer using the same material.
  • the HADS type array substrate includes a substrate 1, a gate 2', a gate insulating layer 3, a semiconductor layer 4, a data line 5, a pixel electrode 6, a protective layer 7, and a common electrode 8.
  • the pixel electrode 6 and the common electrode 8 are both transparent conductive layers, and are covered with the common electrode 8 on both the gate line and the data line 5.
  • the structure difference between FIG. 2 and FIG. 3 is that the structure in FIG. 2 is that the pixel electrode is connected to the thin film crystal through the via structure. The drain of the tube, and the structure in Fig.
  • the common electrode 8 is placed above the pixel electrode 6 and overlapped with each other with an insulating layer interposed therebetween, so that an electric field can be formed therebetween.
  • the plurality of pixel electrodes 6 may be located in each of the pixel regions independently of each other without overlapping the gate lines 2 and the data lines 5.
  • embodiments according to the present invention are not limited to this configuration.
  • the thin film transistor 11a is disposed near the intersection of the gate line and the data line, the gate of the thin film transistor is connected to the gate line, and the source of the thin film transistor is connected to the data line.
  • a common electrode and a pixel electrode are disposed in each of the pixel regions.
  • the dimension in the data line width direction is larger than the width of the data line 5, and protrudes to both sides of the data line 5. Therefore, in repairing the data line, a sufficiently wide isolated transparent conductive layer is left over the data line at the disconnection to repair the data line (the method of repairing the data line will be described below).
  • the common electrode 8 is provided with a pattern of the second hole-shaped structure 11 directly above the thin film transistor 11a.
  • the second hole-shaped structure 11 is correspondingly disposed above the gate line 2, and is adjacent to the adjacent two in the gate line direction. Between the first hole-like structures 12.
  • the dimension in the width direction of the gate line is larger than the width of the gate line 2, and protrudes to both sides of the gate line 2; for the first hole-shaped structure 12, it is on the gate line The dimension in the width direction is larger than the width of the gate line 2 and protrudes to both sides of the gate line 2.
  • the common electrode of the array substrate is a transparent conductive layer, and a transparent metal oxide layer such as ITO or IZO material can be used.
  • Step F1 finding the data disconnection 13 as shown in FIG. 5, and determining the data line between the two first hole-like structures 12 adjacent to the data line break 13 above the data line 5.
  • Step F2 As shown in FIG. 6, the common electrode 12 located above the data line disconnection segment is cut along both sides of the data line 5 to two first hole-shaped structures 12 adjacent to the data line broken segment. , that is, the common electrode of the data line disconnection repair cut-off portion 21 is cut off, so as to be disposed in the data line broken conductive layer region;
  • Step F3 splicing the isolated transparent conductive layer region and the data line broken segment at the two ends of the data line break 13 respectively, that is, repairing the data line broken line as shown in FIG.
  • the junction 31 is soldered so that the broken data line 5 communicates with the signal through the isolated transparent conductive layer region, thereby achieving the purpose of repairing the disconnection of the data line.
  • Step S1 As shown in FIG. 7, the gate line break 14 is found, and the first hole structure 12 and the second hole structure 11a above the gate line 2 adjacent to the gate line break 14 are determined.
  • the gate line between the gate lines is a broken line segment;
  • Step S2 as shown in FIG. 8, the common electrode 8 located above the broken line segment of the gate line is cut along both sides of the gate line to the first hole-shaped structure region 12 and the second adjacent to the broken line segment of the gate line
  • the area of the hole-like structure 11a that is, the common electrode of the gate line breakage repairing cut-off portion 22 is cut, so that the common electrode disposed directly above the broken line segment of the gate line is isolated from other areas on the common electrode to form an isolated transparent Conductive layer area;
  • Step S3 splicing the isolated transparent conductive layer region and the gate wire break segment at the two ends of the gate wire breakage portion 14 respectively, that is, the gate wire break repair joint 32 in FIG. Soldering, so that the broken gate line communicates with the signal through the isolated transparent conductive layer region, and the repair gate line is reached. the goal of.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种阵列基板、阵列基板的断线修复方法及显示装置。阵列基板包括交叉设置的栅线(2)和数据线(5),限定出多个以矩阵形式排列的像素区域;薄膜晶体管(11a),设置在栅线(2)和数据线(5)的交叉处附近,薄膜晶体管(11a)的栅极(2')与栅线(2)连接,薄膜晶体管(11a)的源极与数据线(5)连接;公共电极(8)和像素电极(6),设置于每个像素区域中。公共电极(8)在每个像素区域上方分别设有多个条形孔状结构(8a)的图案,栅线(2)、数据线(5)和公共电极(8)制作在不同层上且相互部分重叠,公共电极(8)在栅线(2)和数据线(5)交叉位置对应处均设有第一孔状结构(12)的图案。

Description

阵列基板、 该阵列基板断线修复方法及显示装置 技术领域
本发明的实施例涉及一种阵列基板、 该阵列基板的断线修复方法及显示 装置。 背景技术
在液晶显示面板的制造过程中, 修复断线是提高良率的一个重要手段。 现有技术中一般采用在液晶显示面板的四周布设数据修复线的结构, 以方便 栅线断线修复。
ADS型液晶面板 ( Advanced-Super Dimensional Switching; 高级超维场 开关技术)通过同一平面内像素电极或公共电极边缘所产生的平行电场以及 像素电极与公共电极间产生的纵向电场形成多维电场, 使液晶盒内像素电极 或公共电极之间、 像素电极或公共电极正上方所有取向液晶分子都能够产生 旋转转换, 从而提高了平面取向系液晶工作效率并增大了透光效率。 ADS型 液晶显示面板可以提高 TFT-LCD画面品质, 具有高透过率、 宽视角、 高开 口率、 低色差、 低响应时间、 无挤压水波纹( Push Mura )等优点。
在目前的阵列基板数据线断线修复方法中, 多采取例如断线修复线 9对 数据线 15进行修复, 如图 1所示。 对于具有数据线断线处 13的数据线 15 , 利用激光焊接在数据线断线修复处 31将此数据线 15两侧与断线修复线 9连 接,此时数据线 15断线信号通过断线修复线 9得到了正确的信号。但是采用 该种方法修复阵列基板, 由于断线修复线 9的数量有限, 因此对于所要修复 数据线有条数限制, 一般最多修复两条数据线的断线。 而且, 目前没有成熟 的栅线的断线修复方法。 如不能有效地修复阵列基板的断线, 就会影响液晶 显示产品的良率。 发明内容
本发明的一个实施例提供一种阵列基板, 包括:
交叉设置的栅线和数据线, 限定出多个以矩阵形式排列的像素区域; 薄膜晶体管, 设置在所述栅线和数据线的交叉处附近, 该薄膜晶体管的 栅极与所述栅线连接, 该薄膜晶体管的源极与所述数据线连接;
公共电极和像素电极, 设置于每个像素区域中,
其中所述公共电极在每个像素区域上方分别设有多个条形孔状结构的图 案,
所述栅线、 数据线和公共电极制作在不同层上且相互部分重叠, 所述公 共电极在所述栅线和数据线交叉位置对应处均设有第一孔状结构的图案。
在一个示例中, 所述公共电极在薄膜晶体管正上方均设有第二孔状结构 的图案, 所述第二孔状结构对应设置在栅线的上方, 且位于相邻两个第一孔 状结构之间。
在一个示例中, 所述公共电极为透明导电层。
在一个示例中, 所述第一孔状结构在所述数据线宽度方向的尺寸大于所 述数据线的宽度, 且突出到所述数据线的两侧。
在一个示例中, 所述第二孔状结构在所述栅线宽度方向的尺寸大于所述 栅线的宽度, 且突出在所述数据线两侧; 所述第一孔状结构在所述栅线宽度 方向的尺寸大于所述栅线的宽度, 且突出到所述栅线的两侧。
在一个示例中, 所述公共电极位于所述像素电极上方且隔着其间的绝缘 层彼此叠置。
在一个示例中, 多个像素电极彼此独立地位于每个像素区域中, 且所述 像素电极不与所述栅线和所述数据线重叠。
本实施例提供一种上述的阵列基板的数据线断线修复的方法, 包括以下 步骤:
步骤 F1: 找到所述数据线断线处, 并且确定该数据线上方与所述数据线 断线处相邻两个第一孔状结构区域之间的数据线为数据线断线节段;
步骤 F2:将位于数据线断线节段上方的公共电极沿该条数据线两侧切割 至与该数据线断线节段相邻的两个第一孔状结构区域, 从而使设置在数据线 明导电层区域;
步骤 F3:将隔离的透明导电层区域与所述数据线断线节段在所述数据线 断线处的两端分别进行悍接, 从而使该断裂的数据线通过所述隔离的透明导 电层区域连通信号。
在一个示例中, 所述步骤 F2 中, 应用激光切割方式对数据线断线节段 上方的公共电极进行切割。
在一个示例中, 所述步骤 F3 中, 应用激光焊接方式将隔离的透明导电 层区域与数据线断线节段通过形成熔接点焊接在一起。
本实施例还提供一种如上所述的阵列基板的栅线断线修复的方法, 包括 以下步骤:
步骤 S1: 找到所述栅线断线处, 并且确定该栅线上方与所述栅线断线处 邻近的第一孔状结构和第二孔状结构之间的栅线为栅线断线节段;
步骤 S2:将位于栅线断线节段上方的公共电极沿该条栅线两侧切割至与 该栅线断线节段相邻的第一孔状结构区域和第二孔状结构区域, 从而使设置 在栅线断线节段的正上方的公共电极与该公共电极上的其他区域隔离, 形成 隔离的透明导电层区域;
步骤 S3:将隔离的透明导电层区域与所述栅线断线节段在所述栅线断线 处的两端分别进行悍接, 从而该断裂的栅线通过该隔离的透明导电层区域连 通信号。
在一个示例中, 所述 S2 步骤中, 采用激光切割的方式将栅线断线节段 上方的公共电极进行切割。
在一个示例中, 所述步骤 S3 中, 应用激光焊接方式将隔离的透明导电 层区域与栅线断线节段通过形成熔接点悍接在一起。
此外, 本实施例还提供一种显示装置, 包括如上所述的阵列基板。
本发明的实施例通过在阵列基板的公共电极上设置镂空结构, 方便、 快 速地对阵列基板上的数据线和栅线的断线进行修复, 数据线断线的修复克服 了条数限制, 有效地提高了阵列基板的产品良率。 附图说明
为了更清楚地说明本发明实施例的技术方案, 下面将对实施例的附图作 筒单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例, 而非对本发明的限制。
图 1是现有阵列基板数据线断线修复后结构示意图; 图 2是根据本发明实施例的一种 ADS型阵列基板的像素剖面结构图; 图 3是根据本发明实施例的另一种 ADS型阵列基板的像素剖面结构图; 图 4是本发明实施例的 ADS型阵列基板的公共电极结构图;
图 5 是本发明实施例的 ADS型阵列基板数据线断线结构图;
图 6是本发明实施例的 ADS型阵列基板的数据线断线修复后结构示意
¾;
图 7是本发明实施例的 ADS型阵列基板栅线断线结构图;
图 8是本发明实施例的 ADS型阵列基板栅线断线修复后结构示意图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例的附图,对本发明实施例的技术方案进行清楚、 完整地描述。显然, 所描述的实施例是本发明的一部分实施例, 而不是全部的实施例。 基于所描 述的本发明的实施例, 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例, 都属于本发明保护的范围。
本实施例提供一种阵列基板, 例如 HADS (高开口率 -高级超维场开关, High Aperture Ratio- ADS )型或 ADS型液晶阵列基板。 如图 2、 图 3、 图 4 和图 5所示, 包括公共电极 8、 像素电极 6, 栅线 2和数据线 5。 所述栅线 2 和数据线 5上方均覆盖有公共电极 8。 所述栅线 2和数据线 5交叉设置形成 多个以矩阵形式排列的像素区域。 所述公共电极 8在每个像素区域上方分别 设有多个条形孔状结构 8a的图案, 所述栅线 2、 数据线 5和公共电极 8制作 在不同层上且相互部分重叠, 且该公共电极 8在所述栅线 2和数据线 5交叉 位置对应处均设有第一孔状结构 12的图案。 通过第一孔状结构 12, 可对所 述阵列基板的数据线和栅线的断线进行修复, 并且, 数据线的断线修复不受 条数限制。 所述栅线 2与栅极 2' 相互连接, 且采用相同材料在同一层制作。
图 2和图 3示出了基于 HADS型液晶阵列基板的截面示意图。如图 2或 图 3所示, HADS型阵列基板包括基板 1、 栅极 2' 、 栅极绝缘层 3、 半导体 层 4、 数据线 5、 像素电极 6、 保护层 7和公共电极 8。 像素电极 6和公共电 极 8均为透明导电层, 且在栅线和数据线 5上均覆盖有公共电极 8。 图 2和 图 3的结构差别在于图 2中的结构是像素电极通过通孔结构连接到薄膜晶体 管的漏极, 而图 3中的结构是像素电极直接连接到薄膜晶体管的漏极。 图 2 和图 3是平行于栅线且在栅线附近截取的, 因此, 在这两幅截面图中并没有 示出栅线的部分(仅示出与栅线 2连接的栅极 2' ) 。
从图 2和图 3可以看到, 公共电极 8位于像素电极 6上方且隔着其间的 绝缘层彼此叠置, 从而能够在两者之间形成电场。 多个像素电极 6可以彼此 独立地位于每个像素区域中, 而不与栅线 2和数据线 5重叠。 然而, 根据本 发明的实施例并不限于这种结构。
在一个示例中,薄膜晶体管 11a设置在所述栅线和数据线的交叉处附近, 该薄膜晶体管的栅极与所述栅线连接, 该薄膜晶体管的源极与所述数据线连 接。 公共电极和像素电极, 设置于每个像素区域中。
在一个示例中, 对于第一孔状结构 12, 其在数据线宽度方向的尺寸大于 数据线 5的宽度, 且突出到数据线 5的两侧。 因此, 在对数据线进行修复的 会在断线处数据线的上方留出足够宽的隔离的透明导电层来修复数据线(在 下文将描述数据线的修复方法) 。
所述公共电极 8在薄膜晶体管 11a正上方均设有第二孔状结构 11的图 案,所述第二孔状结构 11对应设置在栅线 2的上方,且在栅线方向上位于相 邻两个第一孔状结构 12之间。
在一个示例中, 对于第二孔状结构 11 , 其在栅线宽度方向的尺寸大于栅 线 2的宽度, 且突出到栅线 2的两侧; 对于第一孔状结构 12, 其在栅线宽度 方向的尺寸大于栅线 2的宽度, 且突出到栅线 2的两侧。 此时, 在对栅线进 行修复的过程中, 在相邻第一孔状结构和第二孔状结构之间的公共电极与公 共电极的其他区域隔开时, 会在断线处栅线的上方留出足够宽的隔离的透明 导电层来修复栅线(在下文将描述栅线的修复方法) 。
该阵列基板的公共电极为透明导电层,可采用透明金属氧化物层,如 ITO 或 IZO材料等。
本实施例中提供的上述任意一种阵列基板的数据线断线修复的方法, 包 括以下步骤,
步骤 F1 : 找到所述数据断线处 13 , 如图 5所示, 并且确定该数据线 5 上方与所述数据线断线处 13相邻两个第一孔状结构 12区域之间的数据线为 数据线断线节段;
步骤 F2: 如图 6所示, 将位于数据线断线节段上方的公共电极 12沿该 条数据线 5两侧切割至与该数据线断线节段相邻的两个第一孔状结构 12区 域, 即将数据线断线修复切断处 21的公共电极切断,从而使设置在数据线断 导电层区域;
步骤 F3:将隔离的透明导电层区域与所述数据线断线节段在所述数据线 断线处 13的两端分别进行悍接, 即在如图 6所示的数据线断线修复悍接处 31进行焊接,从而使该断裂的数据线 5通过所述隔离的透明导电层区域连通 信号, 从而达到了修复数据线断线的目的。
步骤 F1 中, 采用检查设备, 如使用点灯设备, 通过人工操作找到数据 线断线处 13的坐标, 或检查设备自动找到数据线断线处 13坐标, 再在显 镜下找到具体的数据线断线处 13, 也可使用一些带有点灯功能的修复设备, 就可以直接通过点灯装置找到数据线断线处 13。 进一步, 在步骤 F2中, 应 用激光切割方式对数据线断线节段上方的公共电极进行切割。 在步骤 F3中, 应用激光焊接方式将隔离的透明导电层区域与数据线断线节段通过形成熔接 点焊接在一起。
此外, 本实施例还提供了上述任意一种的阵列基板的栅线断线的修复方 法, 包括以下步骤:
步骤 S1: 如图 7所示, 找到所述栅线断线处 14, 并且确定该栅线 2上 方与所述栅线断线处 14邻近的第一孔状结构 12和第二孔状结构 11a之间的 栅线为栅线断线节段;
步骤 S2: 如图 8所示, 将位于栅线断线节段上方的公共电极 8沿该条栅 线两侧切割至与该栅线断线节段相邻的第一孔状结构区域 12和第二孔状结 构 11a区域, 即将栅线断线修复切断处 22的公共电极切断,从而使设置在栅 线断线节段的正上方的公共电极与该公共电极上的其他区域隔离, 形成隔离 的透明导电层区域;
步骤 S3:将隔离的透明导电层区域与所述栅线断线节段在所述栅线断线 处 14的两端分别进行悍接, 即在图 8中栅线断线修复焊接处 32进行焊接, 从而该断裂的栅线通过该隔离的透明导电层区域连通信号, 达到了修复栅线 的目的。
步骤 SI中, 采用检查设备或其他方式找到栅线断线处 14。 进一步, 步 骤 S2中, 采用激光切割的方式将栅线断线节段上方的公共电极 8进行切割。 而且, 在步骤 S3 中, 采用激光悍接的方式等手段将隔离的透明导电层区域 与所述栅线断线节段在所述栅线断线处 14的两端进行焊接。
本实施例还提供一种显示装置, 包括上述的阵列基板, 所述显示装置可 以为液晶面板、 电子纸、 OLED面板、 手机、 液晶显示器、 平板电脑等具有 任何显示功能的产品或部件。
以上所述仅是本发明的示范性实施方式, 而非用于限制本发明的保护范 围, 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、 一种阵列基板, 包括:
交叉设置的栅线和数据线, 限定出多个以矩阵形式排列的像素区域; 薄膜晶体管, 设置在所述栅线和数据线的交叉处附近, 该薄膜晶体管的 栅极与所述栅线连接, 该薄膜晶体管的源极与所述数据线连接;
公共电极和像素电极, 设置于每个像素区域中,
其中所述公共电极在每个像素区域上方分别设有多个条形孔状结构的图 案,
所述栅线、 数据线和公共电极制作在不同层上且相互部分重叠, 所述公 共电极在所述栅线和数据线交叉位置对应处均设有第一孔状结构的图案。
2、根据权利要求 1所述的阵列基板, 其中, 所述公共电极在薄膜晶体管 正上方均设有第二孔状结构的图案, 所述第二孔状结构对应设置在栅线的上 方, 且位于相邻两个第一孔状结构之间。
3、根据权利要求 1或 2所述的阵列基板, 其中, 所述公共电极为透明导 电层。
4、 根据权利要求 1-3任一项所述的阵列基板, 其中, 所述第一孔状结构 在所述数据线宽度方向的尺寸大于所述数据线的宽度, 且突出到所述数据线 的两侧。
5、 根据权利要求 2所述的阵列基板, 其中, 所述第二孔状结构在所述 栅线宽度方向的尺寸大于所述栅线的宽度, 且突出在所述数据线两侧; 所述 第一孔状结构在所述栅线宽度方向的尺寸大于所述栅线的宽度, 且突出到所 述栅线的两侧。
6、 根据权利要求 1-5任一项所述的阵列基板, 其中, 所述公共电极位于 所述像素电极上方且隔着其间的绝缘层彼此叠置。
7、 根据权利要求 1-6任一项所述的阵列基板, 其中, 多个像素电极彼此 独立地位于每个像素区域中, 且所述像素电极不与所述栅线和所述数据线重 叠。
8、 一种如权利要求 1-7任一项所述阵列基板的数据线断线修复的方法, 包括以下步骤: 步骤 Fl: 找到所述数据线断线处, 并且确定该数据线上方与所述数据线 断线处相邻两个第一孔状结构区域之间的数据线为数据线断线节段;
步骤 F2:将位于数据线断线节段上方的公共电极沿该条数据线两侧切割 至与该数据线断线节段相邻的两个第一孔状结构区域, 从而使设置在数据线 明导电层区域;
步骤 F3:将隔离的透明导电层区域与所述数据线断线节段在所述数据线 断线处的两端分别进行悍接, 从而使该断裂的数据线通过所述隔离的透明导 电层区域连通信号。
9、根据权利要求 8所述的阵列基板数据线断线修复的方法, 其中, 所述 步骤 F2中, 应用激光切割方式对数据线断线节段上方的公共电极进行切割。
10、根据权利要求 8或 9所述的阵列基板数据线断线修复的方法,其中, 所述步骤 F3 中, 应用激光悍接方式将隔离的透明导电层区域与数据线断线 节段通过形成熔接点焊接在一起。
11、 一种如权利要求 2或 5所述阵列基板的栅线断线修复的方法, 包括 以下步骤:
步骤 S1: 找到所述栅线断线处, 并且确定该栅线上方与所述栅线断线处 邻近的第一孔状结构和第二孔状结构之间的栅线为栅线断线节段;
步骤 S2:将位于栅线断线节段上方的公共电极沿该条栅线两侧切割至与 该栅线断线节段相邻的第一孔状结构区域和第二孔状结构区域, 从而使设置 在栅线断线节段的正上方的公共电极与该公共电极上的其他区域隔离, 形成 隔离的透明导电层区域;
步骤 S3:将隔离的透明导电层区域与所述栅线断线节段在所述栅线断线 处的两端分别进行悍接, 从而该断裂的栅线通过该隔离的透明导电层区域连 通信号。
12、根据权利要求 11所述阵列基板的栅线断线修复的方法, 其中, 所述 S2步骤中, 采用激光切割的方式将栅线断线节段上方的公共电极进行切割。
13、根据权利要求 11或 12所述阵列基板的栅线断线修复的方法,其中, 所述步骤 S3 中, 应用激光悍接方式将隔离的透明导电层区域与栅线断线节 段通过形成熔接点焊接在一起。 、 一种显示装置, 包括如权利要求 1-7任一项所述的阵列基板。
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