WO2014069305A1 - 基板及び基板の製造方法 - Google Patents

基板及び基板の製造方法 Download PDF

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Publication number
WO2014069305A1
WO2014069305A1 PCT/JP2013/078704 JP2013078704W WO2014069305A1 WO 2014069305 A1 WO2014069305 A1 WO 2014069305A1 JP 2013078704 W JP2013078704 W JP 2013078704W WO 2014069305 A1 WO2014069305 A1 WO 2014069305A1
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WIPO (PCT)
Prior art keywords
metal layer
solder
substrate
groove
soldering
Prior art date
Application number
PCT/JP2013/078704
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English (en)
French (fr)
Inventor
公教 尾崎
靖弘 小池
裕明 浅野
仁 志満津
川口　茂樹
智朗 浅井
Original Assignee
株式会社 豊田自動織機
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社 豊田自動織機 filed Critical 株式会社 豊田自動織機
Priority to CN201380056539.2A priority Critical patent/CN104756614A/zh
Priority to EP13851622.4A priority patent/EP2916630A4/en
Priority to BR112015009213A priority patent/BR112015009213A2/pt
Priority to US14/437,059 priority patent/US9655240B2/en
Priority to KR1020157013270A priority patent/KR20150064224A/ko
Publication of WO2014069305A1 publication Critical patent/WO2014069305A1/ja

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    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
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    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
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    • H05K2203/01—Tools for processing; Objects used during processing
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    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Definitions

  • the technology of the present disclosure relates to a substrate including an insulating substrate, a metal layer formed on one surface of the insulating substrate, and an electronic component mounted on the surface of the metal layer by soldering, and a method for manufacturing the substrate.
  • soldering reliability is improved by suppressing the wetting and spreading of the solder and sufficiently keeping the solder within a predetermined range.
  • a technique for suppressing the spread of solder from the soldering region by making the entire soldering region a lower solder reservoir than other portions is known (see Patent Document 1).
  • the mask having a predetermined opening is applied to the surface of the metal layer and paste-like solder is applied, and then the mask is removed and applied.
  • a method of mounting an electronic component on solder is generally used.
  • the solder may be peeled off from the metal layer together with the mask when the mask is removed.
  • An object of the present disclosure is to provide a substrate that can easily apply solder to the surface of a metal layer using a mask and can suppress the spread of the solder, and a method for manufacturing the substrate.
  • a substrate for achieving the above object includes an insulating substrate, a metal layer formed on one surface of the insulating substrate, and an electronic component soldered to the surface of the metal layer.
  • the metal layer is formed from a metal plate.
  • the surface of the metal layer has a soldering region and a groove located on the outer periphery of the soldering region.
  • a substrate manufacturing method for achieving the above object includes an insulating substrate, a metal layer made of a metal plate formed on one surface of the insulating substrate, and an electronic component mounted on the surface of the metal layer by soldering.
  • a method of manufacturing a substrate comprising: applying solder using a mask to an application portion set on the surface of the metal layer; and mounting the electronic component on the solder.
  • the metal layer a metal layer in which a groove is formed outside the application part is used.
  • FIG. 2 is a sectional view taken along line 2-2 of FIG. The enlarged view of a groove part. The figure which shows the method of mounting an electronic component.
  • the substrate 10 includes an insulating substrate 11, a pair of metal layers 12 bonded to each other on the upper surface of the insulating substrate 11 at a predetermined interval, and upper surfaces of the pair of metal layers 12. And an electronic component 13 mounted so as to straddle.
  • the metal layer 12 is formed from a metal plate having a predetermined pattern shape, and is formed by stamping a predetermined pattern shape from a metal plate material with a press (press processing).
  • a metal plate for forming the metal layer 12 a copper plate or a metal plate made of a conductive metal material such as aluminum plated on a soldered portion can be used.
  • the thickness of the metal plate is preferably 0.4 to 2.0 mm, more preferably 0.5 to 1.0 mm. In the present embodiment, a copper plate having a thickness of 0.5 mm is used.
  • a groove 20 having a square frame shape in a top view is provided on the upper surface of the metal layer 12.
  • the groove 20 is annular, in other words, endless.
  • the groove 20 includes a bottom surface 21, a first side surface 22 that is a side surface on the inner peripheral side, and a second side surface 23 that is a side surface on the outer peripheral side.
  • the bottom surface 21 is a plane parallel to the top surface of the metal layer 12, and the first side surface 22 and the second side surface 23 are inclined surfaces that connect the bottom surface 21 and the top surface of the metal layer 12.
  • the groove portion 20 is formed by pressing a forming die having a protrusion corresponding to the groove portion 20 against the upper surface of the metal plate and partially denting the upper surface of the metal plate. Can be formed.
  • the angle ⁇ formed between the upper surface of the metal layer 12 and the first side surface 22 and the angle ⁇ formed between the upper surface of the metal layer 12 and the second side surface 23 are set in the range of 95 to 150 degrees, respectively. It is preferable to do. In the present embodiment, the angle ⁇ is 135 degrees, the angle ⁇ is 95 degrees, and the angle ⁇ is larger than the angle ⁇ . Moreover, in this embodiment, the depth of the groove part 20 is 0.12 mm.
  • solder 30 is applied to the region surrounded by the groove 20 on the upper surface of the metal layer 12.
  • the groove portion surrounds the soldering region. 20 is provided.
  • An electronic component 13 such as a semiconductor element is mounted on the upper surface of the metal layer 12 via the solder 30.
  • an application portion R (region inside the broken line in FIG. 4) for applying solder is set on the upper surface of the metal layer 12 bonded to the upper surface of the insulating substrate 11, and the groove portion 20 is an application portion. It is formed in an endless shape surrounding R.
  • the groove 20 extends along the edge of the application part R and is spaced from the edge of the application part R.
  • the mask 40 having the opening 41 having a shape corresponding to the application part R is overlaid on the upper surface of the metal layer 12 (in FIG. 4, the mask 40 is indicated by a one-dot chain line). At this time, the groove 20 formed outside the application part R is covered with the mask 40. Then, after applying paste-like solder from the opening 41 of the mask 40 to the upper surface of the metal layer 12 using a squeegee or the like, the mask 40 is removed from the metal layer 12. Thereby, solder is applied to the upper surface of the application portion R of the metal layer 12.
  • the groove part 20 is not provided in the application part R which is a part to which the solder is applied. Therefore, a bonding surface between the upper surface of the flat application portion R and the solder is secured, and the solder is sufficiently bonded to the metal layer 12. Therefore, it is possible to prevent the solder from being peeled off from the metal layer 12 together with the mask 40.
  • the electronic component 13 is placed on the solder applied to the application portion R of the metal layer 12. Then, the substrate 10 is heated to melt the solder, and then cooled to solidify the solder. Thereby, the electronic component 13 is mounted on the upper surface of the metal layer 12 by soldering.
  • the groove 20 provided around the application portion R prevents the solder from spreading over the groove 20.
  • the flux that flows prior to the solder tends to spread over the metal layer 12 beyond the groove 20, but the solder wetting and spreading is regulated by the groove 20, and the solder tends to be retained inside the groove 20.
  • the entire region surrounded by the groove portion 20 becomes a soldering region.
  • the groove part 20 will be located in the outer periphery of the soldering area
  • the substrate 10 includes an insulating substrate 11, a metal layer 12 formed on the upper surface of the insulating substrate 11, and an electronic component 13 mounted on the upper surface of the metal layer 12 by soldering.
  • the metal layer 12 is formed from a metal plate.
  • a groove 20 is provided on the outer periphery of the soldering region on the upper surface of the metal layer 12.
  • the solder of the metal layer 12 is applied when the solder is applied to the surface of the metal layer 12 using a mask.
  • a bonding surface between the application region (application portion R) and the solder is secured, and the metal layer 12 and the solder are sufficiently bonded. Therefore, when removing the mask, the applied solder is hardly peeled off, and the solder can be easily applied.
  • the groove portion 20 is formed in an endless shape surrounding the soldering region. In other words, the groove 20 continuously extends around the entire soldering area. According to the above configuration, wetting and spreading of the solder 30 from the soldering region in all directions can be suppressed.
  • the groove portion 20 includes a flat bottom surface 21, a first side surface 22 that is a side surface on the inner peripheral side (the side closer to the soldering region), and a second side surface that is the outer peripheral side (the far side from the soldering region). And a side surface 23.
  • the groove 20 is formed by pressing a mold having a protrusion corresponding to the groove 20 against the metal layer 12 a defect such as rounding or chipping occurs at the tip of the protrusion of the mold as the mold is repeatedly used. May occur.
  • the tip of the protrusion provided on the mold also has a flat shape.
  • the angle ⁇ formed between the surface of the metal layer 12 and the first side surface 22 in the groove 20 is in the range of 95 to 150 degrees, and the angle ⁇ formed between the surface of the metal layer 12 and the second side surface 23 is 95 to 150 °.
  • the range is 150 degrees.
  • wetting and spreading of the solder 30 beyond the groove 20 can be suitably suppressed.
  • the above angle when the mold 20 is pressed against the metal layer 12 to form the groove portion 20, the biting between the metal layer 12 and the mold is suppressed and the mold from the metal layer 12 is suppressed. Good mold release.
  • the angle ⁇ formed between the surface of the metal layer 12 and the first side surface 22 is made larger than the angle ⁇ formed between the surface of the metal layer 12 and the second side surface 23.
  • the second side surface 23 located on the outer side has a slope shape that is closer to vertical, so that wetting and spreading of the solder 30 beyond the groove 20 can be more suitably suppressed.
  • the groove 20 is not limited to an endless shape, in other words, a continuous shape, and may be an endless shape, in other words, a non-continuous shape.
  • an endless shape in other words, a continuous shape
  • the cross-sectional shape of the groove 20 is not particularly limited.
  • the bottom surface 21 may be formed in a concave curved surface shape, and also in this case, the effect (3) can be obtained.
  • the angle ⁇ formed by the surface of the metal layer 12 and the first side surface 22 may be the same as the angle ⁇ formed by the surface of the metal layer 12 and the second side surface 23. Further, the angle ⁇ may be smaller than the angle ⁇ .
  • the electronic component 13 is mounted so as to straddle the upper surfaces of the two metal layers 12 that are spaced apart from each other.
  • the electronic component 13 is mounted only on the upper surface of one of the metal layers 12. Also good.
  • the substrate 10 may be a double-sided substrate in which another metal layer is bonded to the lower surface of the insulating substrate 11, or may be a multilayer substrate further having an inner layer having a predetermined pattern.

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Abstract

　基板は、絶縁基板と、前記絶縁基板の一面に形成された金属層と、前記金属層の表面に半田付けされた電子部品と、を備える。前記金属層は金属板から形成される。前記金属層の表面は、半田付け領域と、該半田付け領域の外周に位置する溝部とを有する。

Description

基板及び基板の製造方法
　本開示の技術は、絶縁基板と、絶縁基板の一面に形成された金属層と、金属層の表面に半田付けにより実装された電子部品とを備える基板及びその基板の製造方法に関する。
　絶縁基板の一面に形成された金属層の表面に対して、半田付けにより電子部品を実装する場合には、金属層の表面に半田が必要以上に濡れ広がることを抑制する必要がある。半田の濡れ広がりを抑制して所定の範囲内に半田を十分に留まらせることによって、半田付けの信頼性が高められる。例えば、半田付け領域の全体を他の部分より低い半田溜まり部とすることによって、半田付け領域からの半田の濡れ広がりを抑制する技術が知られている（特許文献１参照）。
特開２０１１－１５１３６８号公報
　ところで、金属層の表面に半田付けにより電子部品を実装する場合には、所定の開口部を有するマスクを金属層の表面に重ねてペースト状の半田を塗布した後、マスクを取り外すとともに塗布された半田上に電子部品を実装する方法が一般的に用いられている。しかしながら、半田付け領域の全体を半田溜まり部とした金属層に対して上記の実装方法を採用した場合には、マスクを取り外す際にマスクと共に半田が金属層から剥がれてしまうことがあった。
　本開示の目的は、マスクを用いて金属層の表面に半田を容易に塗布することができるとともに、半田の濡れ広がりを抑制することのできる基板及びその基板の製造方法を提供することにある。
　上記の目的を達成するための基板は、絶縁基板と、前記絶縁基板の一面に形成された金属層と、前記金属層の表面に半田付けされた電子部品と、を備える。前記金属層は金属板から形成される。前記金属層の表面は、半田付け領域と、該半田付け領域の外周に位置する溝部とを有する。
　上記の目的を達成するための基板の製造方法は、絶縁基板と、前記絶縁基板の一面に形成された金属板かならなる金属層と、前記金属層の表面に半田付けにより実装された電子部品とを備える基板の製造方法であって、前記金属層の表面に設定される塗布部にマスクを用いて半田を塗布することと、前記半田の上に前記電子部品を実装することと、有する。前記金属層として、前記塗布部の外側に溝部を形成した金属層を用いる。
実施形態の基板の上面図。 図１の２－２線断面図。 溝部の拡大図。 電子部品を実装する方法を示す図。
　以下、一実施形態の基板を図面にしたがって説明する。
　図１及び図２に示すように、基板１０は、絶縁基板１１と、絶縁基板１１の上面において、所定の間隔をあけて接着された一対の金属層１２と、一対の金属層１２の上面に跨るように実装された電子部品１３とを備えている。
　金属層１２は、所定のパターン形状を有する金属板から形成されるものであり、金属板材料から所定のパターン形状をプレスにて打ち抜くこと（プレス加工）によって成形されている。金属層１２を形成する金属板としては、銅板や、半田付け部分にメッキ処理したアルミニウム等の導電性金属材料からなる金属板を用いることができる。金属板の厚さは、好ましくは０．４～２．０ｍｍであり、より好ましくは０．５～１．０ｍｍである。なお、本実施形態では、厚さが０．５ｍｍの銅板を用いている。
　図１及び図２に示すように、金属層１２の上面には、上面視四角枠状をなす溝部２０が設けられている。溝部２０は環状、言い換えれば無端状をなしている。図３に示すように、溝部２０は、底面２１と、内周側の側面である第１側面２２と、外周側の側面である第２側面２３とを有する。底面２１は、金属層１２の上面と平行な平面であり、第１側面２２及び第２側面２３は底面２１と金属層１２の上面とを接続する傾斜面である。溝部２０は、例えば、金属層１２をプレス加工により形成する際に、溝部２０に対応する突部を有する成形型を金属板の上面に押し付けて、金属板の上面を部分的に凹ませることによって形成することができる。
　図３に示すように、金属層１２の上面と第１側面２２とがなす角度α、及び金属層１２の上面と第２側面２３とがなす角度βは、それぞれ９５～１５０度の範囲に設定することが好ましい。本実施形態においては、角度αを１３５度とするとともに、角度βを９５度とし、角度αを角度βよりも大きくしている。また、本実施形態においては、溝部２０の深さを０．１２ｍｍとしている。
　図１及び図２に示すように、金属層１２の上面における溝部２０で囲まれた領域には、半田３０が塗布されている。換言すれば、金属層１２に塗布された半田３０の外周、即ち、金属層１２の上面における半田が施された領域（半田付け領域）の外周に沿って、その半田付け領域を囲むように溝部２０が設けられている。そして、半田３０を介して金属層１２の上面に半導体素子等の電子部品１３が実装されている。
　次に、金属層１２の上面に半田付けにより電子部品１３を実装する方法を説明するとともに、本実施形態の基板１０の作用を説明する。
　図４に示すように、絶縁基板１１の上面に接着された金属層１２の上面には、半田を塗布する塗布部Ｒ（図４における破線の内側の領域）が設定され、溝部２０は塗布部Ｒを囲む無端状に形成されている。また、溝部２０は塗布部Ｒの縁に沿って延びるとともに、塗布部Ｒの縁から間隔を有して配置されている。
　この金属層１２の上面に、塗布部Ｒに対応する形状の開口部４１を有するマスク４０を重ねる（図４においては、マスク４０を一点鎖線で示している。）。このとき、塗布部Ｒの外側に形成された溝部２０はマスク４０によって覆われる。そして、マスク４０の開口部４１から金属層１２の上面にスキージ等を用いてペースト状の半田を塗布した後、金属層１２からマスク４０を取り外す。これにより、金属層１２の塗布部Ｒの上面に半田が塗布される。
　本実施形態では、半田が塗布される部位である塗布部Ｒには溝部２０が設けられていない。そのため、平らな塗布部Ｒの上面と半田との接着面が確保されて、金属層１２に対して半田が十分に接着される。そのため、マスク４０と共に半田が金属層１２から剥がれることが抑制される。
　次に、金属層１２の塗布部Ｒに塗布された半田の上に電子部品１３を載置する。そして、基板１０を加熱して半田を溶融させた後、冷却して半田を固化させる。これにより、金属層１２の上面に半田付けにより電子部品１３が実装される。
　半田が溶融する際には、塗布部Ｒの外側へと半田が濡れ広がるが、塗布部Ｒの周囲に設けられている溝部２０によって、溝部２０を越えて半田が濡れ広がることが抑制される。なお、半田に先立って流れるフラックスは溝部２０を越えて金属層１２上に広がり易いが、半田の濡れ広がりは溝部２０にて規制されて、溝部２０の内側に半田が留められる傾向がある。また、金属層１２の上面において、塗布部Ｒと溝部２０との間の領域内に塗布部Ｒから半田が濡れ広がった結果として、溝部２０で囲まれた領域全体が半田付け領域になる。そして、その半田付け領域の外周に溝部２０が位置することになる。
　本実施形態によれば、以下に記載する効果を得ることができる。
　（１）基板１０は、絶縁基板１１と、絶縁基板１１の上面に形成された金属層１２と、金属層１２の上面に半田付けにより実装された電子部品１３とを備えている。金属層１２は金属板から形成されている。金属層１２の上面における半田付け領域の外周に溝部２０が設けられている。
　上記構成によれば、半田付け領域自体ではなく、半田付け領域の外周に溝部２０が設けられているため、マスクを用いて金属層１２の表面に半田を塗布する際に、金属層１２の半田付け領域（塗布部Ｒ）と半田との接着面が確保されて、金属層１２と半田とが十分に接着する。そのため、マスクを取り外す際に、塗布された半田が剥がれ難くなって、半田を容易に塗布することができる。
　また、半田を溶融すべく基板１０を加熱した際に、溝部２０を越えて半田が濡れ広がることが抑制されるとともに溝部２０の内側に半田が留められる。これにより、金属層１２と電子部品１３との間に十分な量の半田が確保されて、半田付けの信頼性が向上する。
　（２）溝部２０は、半田付け領域を囲む無端状に形成されている。言い換えれば、溝部２０は、半田付け領域の周囲全体を連続的に延びている。上記構成によれば、半田付け領域から全方位へ向かう半田３０の濡れ広がりを抑制することができる。
　（３）溝部２０は、平らな底面２１と、内周側（半田付け領域に近い方）の側面である第１側面２２と、外周側（半田付け領域から遠い方）の側面である第２側面２３とを有する。
　溝部２０に対応する突部を有する成形型を金属層１２に押し付けることによって溝部２０を形成する場合には、成形型の繰り返し使用に伴って成形型の突部の先端に丸まりや欠け等の欠損が生じることがある。上記のように、溝部２０を平らな底面２１を有する形状とすると、成形型に設けられる突部の先端も同様に平らな形状となる。これにより、溝部２０を形成する際に、成形型の突部の先端に作用する応力が緩和されて、突部の先端に欠損が生じ難くなる。
　（４）溝部２０における金属層１２の表面と第１側面２２とがなす角度αを９５～１５０度の範囲とするとともに、金属層１２の表面と第２側面２３とがなす角度βを９５～１５０度の範囲としている。
　上記構成によれば、溝部２０を越えた半田３０の濡れ広がりを好適に抑制することができる。また、上記の角度に設定することにより、成形型を金属層１２に押し付けて溝部２０を形成する際に、金属層１２と成形型と間の噛み込みが抑制されて金属層１２からの成形型の型抜けが良好になる。
　（５）金属層１２の表面と第１側面２２とがなす角度αを、金属層１２の表面と第２側面２３とがなす角度βよりも大きくしている。上記構成によれば、外側に位置する第２側面２３が、より垂直に近い斜面形状になることによって、溝部２０を越えた半田３０の濡れ広がりを更に好適に抑制することができる。
　なお、上記実施形態は以下のように変更してもよい。
　溝部２０は無端状のもの、言い換えれば連続的なものに限定されず、有端状のもの、言い換えれば非連続的なものであってもよい。例えば、金属層１２のパターン形状等に応じて、金属層１２の上面には、多少の半田の濡れ広がりが許容される部位と、許容できない部位とが存在する場合がある。このような場合には、半田の濡れ広がりが許容できない部位と半田付け領域（塗布部Ｒ）との間にのみ溝部２０を設けることも可能である。
　溝部２０の断面形状は特に限定されるものではない。例えば、底面２１を凹曲面状に形成してもよく、この場合にも上記（３）の効果を得ることができる。また、底面２１のない断面逆三角形状の溝部２０としてもよい。
　金属層１２の表面と第１側面２２とがなす角度αと、金属層１２の表面と第２側面２３とがなす角度βを同じにしてもよい。また、上記角度αを上記角度βよりも小さくしてもよい。
　上記実施形態では、離間して配置された二つの金属層１２の上面に跨るようにして電子部品１３が実装されていたが、一方の金属層１２の上面のみに電子部品１３が実装されていてもよい。
　基板１０は絶縁基板１１の下面に別の金属層を接着した両面基板であってもよいし、所定のパターンを有する内層を更に有する多層基板であってもよい。

Claims (5)

  1. 　絶縁基板と、
    　前記絶縁基板の一面に形成された金属層と、
    　前記金属層の表面に半田付けされた電子部品と、を備え、
    　前記金属層は金属板から形成され、
    　前記金属層の表面は、半田付け領域と、該半田付け領域の外周に位置する溝部とを有する基板。
  2. 　前記溝部は、前記半田付け領域を囲む無端状に形成されている請求項１に記載の基板。
  3. 　前記溝部は、底面と、第１側面と、第２側面とを有し、前記第１側面は前記半田付け領域と前記第２側面との間に位置し、
    　前記金属層の表面と前記第１側面とがなす角度が９５～１５０度の範囲であり、
    　前記金属層の表面と前記第２側面とがなす角度が９５～１５０度の範囲である請求項２に記載の基板。
  4. 　前記金属層の表面と前記第１側面とがなす角度は、前記金属層の表面と前記第２側面とがなす角度よりも大きい請求項３に記載の基板。
  5. 　絶縁基板と、前記絶縁基板の一面に形成された金属板からなる金属層と、前記金属層の表面に半田付けにより実装された電子部品とを備える基板の製造方法であって、
    　前記金属層の表面に設定される塗布部にマスクを用いて半田を塗布することと、
    　前記半田の上に前記電子部品を実装することと、有し、
    　前記金属層として、前記塗布部の外側に溝部を形成した金属層を用いる、基板の製造方法。
PCT/JP2013/078704 2012-11-01 2013-10-23 基板及び基板の製造方法 WO2014069305A1 (ja)

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BR112015009213A BR112015009213A2 (pt) 2012-11-01 2013-10-23 substrato e método para a produção de substrato
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JP6713334B2 (ja) * 2016-04-21 2020-06-24 スタンレー電気株式会社 基板構造
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WO2020003907A1 (ja) * 2018-06-29 2020-01-02 日本電産株式会社 配線基板および電子部品実装基板
CN110094624B (zh) * 2019-05-17 2020-12-18 北京深醒科技有限公司 一种门禁机安装容错机构

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EP2916630A1 (en) 2015-09-09
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CN104756614A (zh) 2015-07-01
EP2916630A4 (en) 2016-07-13
JP2014093360A (ja) 2014-05-19
KR20150064224A (ko) 2015-06-10
US9655240B2 (en) 2017-05-16
BR112015009213A2 (pt) 2017-07-04

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